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6800c3d0 RM |
1 | /* |
2 | w83793.c - Linux kernel driver for hardware monitoring | |
3 | Copyright (C) 2006 Winbond Electronics Corp. | |
4 | Yuan Mu | |
5 | Rudolf Marek <r.marek@assembler.cz> | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation - version 2. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
19 | 02110-1301 USA. | |
20 | */ | |
21 | ||
22 | /* | |
23 | Supports following chips: | |
24 | ||
25 | Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA | |
26 | w83793 10 12 8 6 0x7b 0x5ca3 yes no | |
27 | */ | |
28 | ||
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/i2c.h> | |
33 | #include <linux/hwmon.h> | |
34 | #include <linux/hwmon-vid.h> | |
35 | #include <linux/hwmon-sysfs.h> | |
36 | #include <linux/err.h> | |
37 | #include <linux/mutex.h> | |
38 | ||
39 | /* Addresses to scan */ | |
25e9c86d MH |
40 | static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, |
41 | I2C_CLIENT_END }; | |
6800c3d0 RM |
42 | |
43 | /* Insmod parameters */ | |
44 | I2C_CLIENT_INSMOD_1(w83793); | |
3aed198c JD |
45 | |
46 | static unsigned short force_subclients[4]; | |
47 | module_param_array(force_subclients, short, NULL, 0); | |
48 | MODULE_PARM_DESC(force_subclients, "List of subclient addresses: " | |
6800c3d0 RM |
49 | "{bus, clientaddr, subclientaddr1, subclientaddr2}"); |
50 | ||
51 | static int reset; | |
52 | module_param(reset, bool, 0); | |
53 | MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); | |
54 | ||
55 | /* | |
56 | Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved | |
57 | as ID, Bank Select registers | |
58 | */ | |
59 | #define W83793_REG_BANKSEL 0x00 | |
60 | #define W83793_REG_VENDORID 0x0d | |
61 | #define W83793_REG_CHIPID 0x0e | |
62 | #define W83793_REG_DEVICEID 0x0f | |
63 | ||
64 | #define W83793_REG_CONFIG 0x40 | |
65 | #define W83793_REG_MFC 0x58 | |
66 | #define W83793_REG_FANIN_CTRL 0x5c | |
67 | #define W83793_REG_FANIN_SEL 0x5d | |
68 | #define W83793_REG_I2C_ADDR 0x0b | |
69 | #define W83793_REG_I2C_SUBADDR 0x0c | |
70 | #define W83793_REG_VID_INA 0x05 | |
71 | #define W83793_REG_VID_INB 0x06 | |
72 | #define W83793_REG_VID_LATCHA 0x07 | |
73 | #define W83793_REG_VID_LATCHB 0x08 | |
74 | #define W83793_REG_VID_CTRL 0x59 | |
75 | ||
76 | static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f }; | |
77 | ||
78 | #define TEMP_READ 0 | |
79 | #define TEMP_CRIT 1 | |
80 | #define TEMP_CRIT_HYST 2 | |
81 | #define TEMP_WARN 3 | |
82 | #define TEMP_WARN_HYST 4 | |
83 | /* only crit and crit_hyst affect real-time alarm status | |
84 | current crit crit_hyst warn warn_hyst */ | |
85 | static u16 W83793_REG_TEMP[][5] = { | |
86 | {0x1c, 0x78, 0x79, 0x7a, 0x7b}, | |
87 | {0x1d, 0x7c, 0x7d, 0x7e, 0x7f}, | |
88 | {0x1e, 0x80, 0x81, 0x82, 0x83}, | |
89 | {0x1f, 0x84, 0x85, 0x86, 0x87}, | |
90 | {0x20, 0x88, 0x89, 0x8a, 0x8b}, | |
91 | {0x21, 0x8c, 0x8d, 0x8e, 0x8f}, | |
92 | }; | |
93 | ||
94 | #define W83793_REG_TEMP_LOW_BITS 0x22 | |
95 | ||
96 | #define W83793_REG_BEEP(index) (0x53 + (index)) | |
97 | #define W83793_REG_ALARM(index) (0x4b + (index)) | |
98 | ||
99 | #define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */ | |
100 | #define W83793_REG_IRQ_CTRL 0x50 | |
101 | #define W83793_REG_OVT_CTRL 0x51 | |
102 | #define W83793_REG_OVT_BEEP 0x52 | |
103 | ||
104 | #define IN_READ 0 | |
105 | #define IN_MAX 1 | |
106 | #define IN_LOW 2 | |
107 | static const u16 W83793_REG_IN[][3] = { | |
108 | /* Current, High, Low */ | |
109 | {0x10, 0x60, 0x61}, /* Vcore A */ | |
110 | {0x11, 0x62, 0x63}, /* Vcore B */ | |
111 | {0x12, 0x64, 0x65}, /* Vtt */ | |
112 | {0x14, 0x6a, 0x6b}, /* VSEN1 */ | |
113 | {0x15, 0x6c, 0x6d}, /* VSEN2 */ | |
114 | {0x16, 0x6e, 0x6f}, /* +3VSEN */ | |
115 | {0x17, 0x70, 0x71}, /* +12VSEN */ | |
116 | {0x18, 0x72, 0x73}, /* 5VDD */ | |
117 | {0x19, 0x74, 0x75}, /* 5VSB */ | |
118 | {0x1a, 0x76, 0x77}, /* VBAT */ | |
119 | }; | |
120 | ||
121 | /* Low Bits of Vcore A/B Vtt Read/High/Low */ | |
122 | static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 }; | |
123 | static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 }; | |
ddca933b | 124 | static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 }; |
6800c3d0 RM |
125 | |
126 | #define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */ | |
127 | #define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */ | |
128 | ||
129 | #define W83793_REG_PWM_DEFAULT 0xb2 | |
130 | #define W83793_REG_PWM_ENABLE 0x207 | |
131 | #define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */ | |
132 | #define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */ | |
133 | #define W83793_REG_TEMP_CRITICAL 0xc5 | |
134 | ||
135 | #define PWM_DUTY 0 | |
136 | #define PWM_START 1 | |
137 | #define PWM_NONSTOP 2 | |
5aebefb0 | 138 | #define PWM_STOP_TIME 3 |
6800c3d0 RM |
139 | #define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \ |
140 | (nr) == 1 ? 0x220 : 0x218) + (index)) | |
141 | ||
142 | /* bit field, fan1 is bit0, fan2 is bit1 ... */ | |
143 | #define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index)) | |
144 | #define W83793_REG_TEMP_TOL(index) (0x208 + (index)) | |
145 | #define W83793_REG_TEMP_CRUISE(index) (0x210 + (index)) | |
146 | #define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index)) | |
147 | #define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr)) | |
148 | #define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr)) | |
149 | ||
150 | static inline unsigned long FAN_FROM_REG(u16 val) | |
151 | { | |
152 | if ((val >= 0xfff) || (val == 0)) | |
153 | return 0; | |
154 | return (1350000UL / val); | |
155 | } | |
156 | ||
157 | static inline u16 FAN_TO_REG(long rpm) | |
158 | { | |
159 | if (rpm <= 0) | |
160 | return 0x0fff; | |
161 | return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); | |
162 | } | |
163 | ||
164 | static inline unsigned long TIME_FROM_REG(u8 reg) | |
165 | { | |
166 | return (reg * 100); | |
167 | } | |
168 | ||
169 | static inline u8 TIME_TO_REG(unsigned long val) | |
170 | { | |
171 | return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); | |
172 | } | |
173 | ||
174 | static inline long TEMP_FROM_REG(s8 reg) | |
175 | { | |
176 | return (reg * 1000); | |
177 | } | |
178 | ||
179 | static inline s8 TEMP_TO_REG(long val, s8 min, s8 max) | |
180 | { | |
181 | return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max); | |
182 | } | |
183 | ||
184 | struct w83793_data { | |
6800c3d0 | 185 | struct i2c_client *lm75[2]; |
1beeffe4 | 186 | struct device *hwmon_dev; |
6800c3d0 RM |
187 | struct mutex update_lock; |
188 | char valid; /* !=0 if following fields are valid */ | |
189 | unsigned long last_updated; /* In jiffies */ | |
190 | unsigned long last_nonvolatile; /* In jiffies, last time we update the | |
191 | nonvolatile registers */ | |
192 | ||
193 | u8 bank; | |
194 | u8 vrm; | |
195 | u8 vid[2]; | |
196 | u8 in[10][3]; /* Register value, read/high/low */ | |
197 | u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */ | |
198 | ||
199 | u16 has_fan; /* Only fan1- fan5 has own pins */ | |
200 | u16 fan[12]; /* Register value combine */ | |
201 | u16 fan_min[12]; /* Register value combine */ | |
202 | ||
203 | s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */ | |
204 | u8 temp_low_bits; /* Additional resolution TD1-TD4 */ | |
205 | u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits | |
206 | byte 1: Temp R1,R2 mode, each has 1 bit */ | |
207 | u8 temp_critical; /* If reached all fan will be at full speed */ | |
208 | u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */ | |
209 | ||
210 | u8 has_pwm; | |
46bed4df | 211 | u8 has_temp; |
c70a8c34 | 212 | u8 has_vid; |
6800c3d0 RM |
213 | u8 pwm_enable; /* Register value, each Temp has 1 bit */ |
214 | u8 pwm_uptime; /* Register value */ | |
215 | u8 pwm_downtime; /* Register value */ | |
216 | u8 pwm_default; /* All fan default pwm, next poweron valid */ | |
217 | u8 pwm[8][3]; /* Register value */ | |
218 | u8 pwm_stop_time[8]; | |
219 | u8 temp_cruise[6]; | |
220 | ||
221 | u8 alarms[5]; /* realtime status registers */ | |
222 | u8 beeps[5]; | |
223 | u8 beep_enable; | |
224 | u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */ | |
225 | u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */ | |
226 | u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */ | |
227 | }; | |
228 | ||
229 | static u8 w83793_read_value(struct i2c_client *client, u16 reg); | |
230 | static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value); | |
a7f13a6e JD |
231 | static int w83793_probe(struct i2c_client *client, |
232 | const struct i2c_device_id *id); | |
233 | static int w83793_detect(struct i2c_client *client, int kind, | |
234 | struct i2c_board_info *info); | |
235 | static int w83793_remove(struct i2c_client *client); | |
6800c3d0 RM |
236 | static void w83793_init_client(struct i2c_client *client); |
237 | static void w83793_update_nonvolatile(struct device *dev); | |
238 | static struct w83793_data *w83793_update_device(struct device *dev); | |
239 | ||
a7f13a6e JD |
240 | static const struct i2c_device_id w83793_id[] = { |
241 | { "w83793", w83793 }, | |
242 | { } | |
243 | }; | |
244 | MODULE_DEVICE_TABLE(i2c, w83793_id); | |
245 | ||
6800c3d0 | 246 | static struct i2c_driver w83793_driver = { |
a7f13a6e | 247 | .class = I2C_CLASS_HWMON, |
6800c3d0 RM |
248 | .driver = { |
249 | .name = "w83793", | |
250 | }, | |
a7f13a6e JD |
251 | .probe = w83793_probe, |
252 | .remove = w83793_remove, | |
253 | .id_table = w83793_id, | |
254 | .detect = w83793_detect, | |
255 | .address_data = &addr_data, | |
6800c3d0 RM |
256 | }; |
257 | ||
258 | static ssize_t | |
259 | show_vrm(struct device *dev, struct device_attribute *attr, char *buf) | |
260 | { | |
8f74efe8 | 261 | struct w83793_data *data = dev_get_drvdata(dev); |
6800c3d0 RM |
262 | return sprintf(buf, "%d\n", data->vrm); |
263 | } | |
264 | ||
265 | static ssize_t | |
266 | show_vid(struct device *dev, struct device_attribute *attr, char *buf) | |
267 | { | |
268 | struct w83793_data *data = w83793_update_device(dev); | |
269 | struct sensor_device_attribute_2 *sensor_attr = | |
270 | to_sensor_dev_attr_2(attr); | |
271 | int index = sensor_attr->index; | |
272 | ||
273 | return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm)); | |
274 | } | |
275 | ||
276 | static ssize_t | |
277 | store_vrm(struct device *dev, struct device_attribute *attr, | |
278 | const char *buf, size_t count) | |
279 | { | |
8f74efe8 | 280 | struct w83793_data *data = dev_get_drvdata(dev); |
6800c3d0 RM |
281 | data->vrm = simple_strtoul(buf, NULL, 10); |
282 | return count; | |
283 | } | |
284 | ||
285 | #define ALARM_STATUS 0 | |
286 | #define BEEP_ENABLE 1 | |
287 | static ssize_t | |
288 | show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
289 | { | |
290 | struct w83793_data *data = w83793_update_device(dev); | |
291 | struct sensor_device_attribute_2 *sensor_attr = | |
292 | to_sensor_dev_attr_2(attr); | |
293 | int nr = sensor_attr->nr; | |
294 | int index = sensor_attr->index >> 3; | |
295 | int bit = sensor_attr->index & 0x07; | |
296 | u8 val; | |
297 | ||
298 | if (ALARM_STATUS == nr) { | |
299 | val = (data->alarms[index] >> (bit)) & 1; | |
300 | } else { /* BEEP_ENABLE */ | |
301 | val = (data->beeps[index] >> (bit)) & 1; | |
302 | } | |
303 | ||
304 | return sprintf(buf, "%u\n", val); | |
305 | } | |
306 | ||
307 | static ssize_t | |
308 | store_beep(struct device *dev, struct device_attribute *attr, | |
309 | const char *buf, size_t count) | |
310 | { | |
311 | struct i2c_client *client = to_i2c_client(dev); | |
312 | struct w83793_data *data = i2c_get_clientdata(client); | |
313 | struct sensor_device_attribute_2 *sensor_attr = | |
314 | to_sensor_dev_attr_2(attr); | |
315 | int index = sensor_attr->index >> 3; | |
316 | int shift = sensor_attr->index & 0x07; | |
317 | u8 beep_bit = 1 << shift; | |
318 | u8 val; | |
319 | ||
320 | val = simple_strtoul(buf, NULL, 10); | |
321 | if (val != 0 && val != 1) | |
322 | return -EINVAL; | |
323 | ||
324 | mutex_lock(&data->update_lock); | |
325 | data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index)); | |
326 | data->beeps[index] &= ~beep_bit; | |
327 | data->beeps[index] |= val << shift; | |
328 | w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]); | |
329 | mutex_unlock(&data->update_lock); | |
330 | ||
331 | return count; | |
332 | } | |
333 | ||
334 | static ssize_t | |
335 | show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf) | |
336 | { | |
337 | struct w83793_data *data = w83793_update_device(dev); | |
338 | return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01); | |
339 | } | |
340 | ||
341 | static ssize_t | |
342 | store_beep_enable(struct device *dev, struct device_attribute *attr, | |
343 | const char *buf, size_t count) | |
344 | { | |
345 | struct i2c_client *client = to_i2c_client(dev); | |
346 | struct w83793_data *data = i2c_get_clientdata(client); | |
347 | u8 val = simple_strtoul(buf, NULL, 10); | |
348 | ||
349 | if (val != 0 && val != 1) | |
350 | return -EINVAL; | |
351 | ||
352 | mutex_lock(&data->update_lock); | |
353 | data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP) | |
354 | & 0xfd; | |
355 | data->beep_enable |= val << 1; | |
356 | w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable); | |
357 | mutex_unlock(&data->update_lock); | |
358 | ||
359 | return count; | |
360 | } | |
361 | ||
362 | /* Write any value to clear chassis alarm */ | |
363 | static ssize_t | |
364 | store_chassis_clear(struct device *dev, | |
365 | struct device_attribute *attr, const char *buf, | |
366 | size_t count) | |
367 | { | |
368 | struct i2c_client *client = to_i2c_client(dev); | |
369 | struct w83793_data *data = i2c_get_clientdata(client); | |
370 | u8 val; | |
371 | ||
372 | mutex_lock(&data->update_lock); | |
373 | val = w83793_read_value(client, W83793_REG_CLR_CHASSIS); | |
374 | val |= 0x80; | |
375 | w83793_write_value(client, W83793_REG_CLR_CHASSIS, val); | |
376 | mutex_unlock(&data->update_lock); | |
377 | return count; | |
378 | } | |
379 | ||
380 | #define FAN_INPUT 0 | |
381 | #define FAN_MIN 1 | |
382 | static ssize_t | |
383 | show_fan(struct device *dev, struct device_attribute *attr, char *buf) | |
384 | { | |
385 | struct sensor_device_attribute_2 *sensor_attr = | |
386 | to_sensor_dev_attr_2(attr); | |
387 | int nr = sensor_attr->nr; | |
388 | int index = sensor_attr->index; | |
389 | struct w83793_data *data = w83793_update_device(dev); | |
390 | u16 val; | |
391 | ||
392 | if (FAN_INPUT == nr) { | |
393 | val = data->fan[index] & 0x0fff; | |
394 | } else { | |
395 | val = data->fan_min[index] & 0x0fff; | |
396 | } | |
397 | ||
398 | return sprintf(buf, "%lu\n", FAN_FROM_REG(val)); | |
399 | } | |
400 | ||
401 | static ssize_t | |
402 | store_fan_min(struct device *dev, struct device_attribute *attr, | |
403 | const char *buf, size_t count) | |
404 | { | |
405 | struct sensor_device_attribute_2 *sensor_attr = | |
406 | to_sensor_dev_attr_2(attr); | |
407 | int index = sensor_attr->index; | |
408 | struct i2c_client *client = to_i2c_client(dev); | |
409 | struct w83793_data *data = i2c_get_clientdata(client); | |
410 | u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10)); | |
411 | ||
412 | mutex_lock(&data->update_lock); | |
413 | data->fan_min[index] = val; | |
414 | w83793_write_value(client, W83793_REG_FAN_MIN(index), | |
415 | (val >> 8) & 0xff); | |
416 | w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff); | |
417 | mutex_unlock(&data->update_lock); | |
418 | ||
419 | return count; | |
420 | } | |
421 | ||
6800c3d0 RM |
422 | static ssize_t |
423 | show_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
424 | { | |
425 | struct sensor_device_attribute_2 *sensor_attr = | |
426 | to_sensor_dev_attr_2(attr); | |
427 | struct w83793_data *data = w83793_update_device(dev); | |
428 | u16 val; | |
429 | int nr = sensor_attr->nr; | |
430 | int index = sensor_attr->index; | |
431 | ||
432 | if (PWM_STOP_TIME == nr) | |
433 | val = TIME_FROM_REG(data->pwm_stop_time[index]); | |
434 | else | |
435 | val = (data->pwm[index][nr] & 0x3f) << 2; | |
436 | ||
437 | return sprintf(buf, "%d\n", val); | |
438 | } | |
439 | ||
440 | static ssize_t | |
441 | store_pwm(struct device *dev, struct device_attribute *attr, | |
442 | const char *buf, size_t count) | |
443 | { | |
444 | struct i2c_client *client = to_i2c_client(dev); | |
445 | struct w83793_data *data = i2c_get_clientdata(client); | |
446 | struct sensor_device_attribute_2 *sensor_attr = | |
447 | to_sensor_dev_attr_2(attr); | |
448 | int nr = sensor_attr->nr; | |
449 | int index = sensor_attr->index; | |
450 | u8 val; | |
451 | ||
452 | mutex_lock(&data->update_lock); | |
453 | if (PWM_STOP_TIME == nr) { | |
454 | val = TIME_TO_REG(simple_strtoul(buf, NULL, 10)); | |
455 | data->pwm_stop_time[index] = val; | |
456 | w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index), | |
457 | val); | |
458 | } else { | |
459 | val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) | |
460 | >> 2; | |
461 | data->pwm[index][nr] = | |
462 | w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0; | |
463 | data->pwm[index][nr] |= val; | |
464 | w83793_write_value(client, W83793_REG_PWM(index, nr), | |
465 | data->pwm[index][nr]); | |
466 | } | |
467 | ||
468 | mutex_unlock(&data->update_lock); | |
469 | return count; | |
470 | } | |
471 | ||
472 | static ssize_t | |
473 | show_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
474 | { | |
475 | struct sensor_device_attribute_2 *sensor_attr = | |
476 | to_sensor_dev_attr_2(attr); | |
477 | int nr = sensor_attr->nr; | |
478 | int index = sensor_attr->index; | |
479 | struct w83793_data *data = w83793_update_device(dev); | |
480 | long temp = TEMP_FROM_REG(data->temp[index][nr]); | |
481 | ||
482 | if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */ | |
483 | int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250; | |
484 | temp += temp > 0 ? low : -low; | |
485 | } | |
486 | return sprintf(buf, "%ld\n", temp); | |
487 | } | |
488 | ||
489 | static ssize_t | |
490 | store_temp(struct device *dev, struct device_attribute *attr, | |
491 | const char *buf, size_t count) | |
492 | { | |
493 | struct sensor_device_attribute_2 *sensor_attr = | |
494 | to_sensor_dev_attr_2(attr); | |
495 | int nr = sensor_attr->nr; | |
496 | int index = sensor_attr->index; | |
497 | struct i2c_client *client = to_i2c_client(dev); | |
498 | struct w83793_data *data = i2c_get_clientdata(client); | |
499 | long tmp = simple_strtol(buf, NULL, 10); | |
500 | ||
501 | mutex_lock(&data->update_lock); | |
502 | data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127); | |
503 | w83793_write_value(client, W83793_REG_TEMP[index][nr], | |
504 | data->temp[index][nr]); | |
505 | mutex_unlock(&data->update_lock); | |
506 | return count; | |
507 | } | |
508 | ||
509 | /* | |
510 | TD1-TD4 | |
511 | each has 4 mode:(2 bits) | |
512 | 0: Stop monitor | |
513 | 1: Use internal temp sensor(default) | |
ddca933b | 514 | 2: Reserved |
6800c3d0 RM |
515 | 3: Use sensor in Intel CPU and get result by PECI |
516 | ||
517 | TR1-TR2 | |
518 | each has 2 mode:(1 bit) | |
519 | 0: Disable temp sensor monitor | |
520 | 1: To enable temp sensors monitor | |
521 | */ | |
522 | ||
ddca933b GJ |
523 | /* 0 disable, 6 PECI */ |
524 | static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 }; | |
6800c3d0 RM |
525 | |
526 | static ssize_t | |
527 | show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
528 | { | |
529 | struct w83793_data *data = w83793_update_device(dev); | |
530 | struct sensor_device_attribute_2 *sensor_attr = | |
531 | to_sensor_dev_attr_2(attr); | |
532 | int index = sensor_attr->index; | |
533 | u8 mask = (index < 4) ? 0x03 : 0x01; | |
534 | u8 shift = (index < 4) ? (2 * index) : (index - 4); | |
535 | u8 tmp; | |
536 | index = (index < 4) ? 0 : 1; | |
537 | ||
538 | tmp = (data->temp_mode[index] >> shift) & mask; | |
539 | ||
540 | /* for the internal sensor, found out if diode or thermistor */ | |
541 | if (tmp == 1) { | |
542 | tmp = index == 0 ? 3 : 4; | |
543 | } else { | |
544 | tmp = TO_TEMP_MODE[tmp]; | |
545 | } | |
546 | ||
547 | return sprintf(buf, "%d\n", tmp); | |
548 | } | |
549 | ||
550 | static ssize_t | |
551 | store_temp_mode(struct device *dev, struct device_attribute *attr, | |
552 | const char *buf, size_t count) | |
553 | { | |
554 | struct i2c_client *client = to_i2c_client(dev); | |
555 | struct w83793_data *data = i2c_get_clientdata(client); | |
556 | struct sensor_device_attribute_2 *sensor_attr = | |
557 | to_sensor_dev_attr_2(attr); | |
558 | int index = sensor_attr->index; | |
559 | u8 mask = (index < 4) ? 0x03 : 0x01; | |
560 | u8 shift = (index < 4) ? (2 * index) : (index - 4); | |
561 | u8 val = simple_strtoul(buf, NULL, 10); | |
562 | ||
563 | /* transform the sysfs interface values into table above */ | |
ddca933b | 564 | if ((val == 6) && (index < 4)) { |
6800c3d0 RM |
565 | val -= 3; |
566 | } else if ((val == 3 && index < 4) | |
46bed4df | 567 | || (val == 4 && index >= 4)) { |
6800c3d0 RM |
568 | /* transform diode or thermistor into internal enable */ |
569 | val = !!val; | |
570 | } else { | |
571 | return -EINVAL; | |
572 | } | |
573 | ||
574 | index = (index < 4) ? 0 : 1; | |
575 | mutex_lock(&data->update_lock); | |
576 | data->temp_mode[index] = | |
577 | w83793_read_value(client, W83793_REG_TEMP_MODE[index]); | |
578 | data->temp_mode[index] &= ~(mask << shift); | |
579 | data->temp_mode[index] |= val << shift; | |
580 | w83793_write_value(client, W83793_REG_TEMP_MODE[index], | |
581 | data->temp_mode[index]); | |
582 | mutex_unlock(&data->update_lock); | |
583 | ||
584 | return count; | |
585 | } | |
586 | ||
587 | #define SETUP_PWM_DEFAULT 0 | |
588 | #define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */ | |
589 | #define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */ | |
590 | #define SETUP_TEMP_CRITICAL 3 | |
591 | static ssize_t | |
592 | show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) | |
593 | { | |
594 | struct sensor_device_attribute_2 *sensor_attr = | |
595 | to_sensor_dev_attr_2(attr); | |
596 | int nr = sensor_attr->nr; | |
597 | struct w83793_data *data = w83793_update_device(dev); | |
598 | u32 val = 0; | |
599 | ||
600 | if (SETUP_PWM_DEFAULT == nr) { | |
601 | val = (data->pwm_default & 0x3f) << 2; | |
602 | } else if (SETUP_PWM_UPTIME == nr) { | |
603 | val = TIME_FROM_REG(data->pwm_uptime); | |
604 | } else if (SETUP_PWM_DOWNTIME == nr) { | |
605 | val = TIME_FROM_REG(data->pwm_downtime); | |
606 | } else if (SETUP_TEMP_CRITICAL == nr) { | |
607 | val = TEMP_FROM_REG(data->temp_critical & 0x7f); | |
608 | } | |
609 | ||
610 | return sprintf(buf, "%d\n", val); | |
611 | } | |
612 | ||
613 | static ssize_t | |
614 | store_sf_setup(struct device *dev, struct device_attribute *attr, | |
615 | const char *buf, size_t count) | |
616 | { | |
617 | struct sensor_device_attribute_2 *sensor_attr = | |
618 | to_sensor_dev_attr_2(attr); | |
619 | int nr = sensor_attr->nr; | |
620 | struct i2c_client *client = to_i2c_client(dev); | |
621 | struct w83793_data *data = i2c_get_clientdata(client); | |
622 | ||
623 | mutex_lock(&data->update_lock); | |
624 | if (SETUP_PWM_DEFAULT == nr) { | |
625 | data->pwm_default = | |
626 | w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0; | |
627 | data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL, | |
628 | 10), | |
629 | 0, 0xff) >> 2; | |
630 | w83793_write_value(client, W83793_REG_PWM_DEFAULT, | |
631 | data->pwm_default); | |
632 | } else if (SETUP_PWM_UPTIME == nr) { | |
633 | data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10)); | |
634 | data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0; | |
635 | w83793_write_value(client, W83793_REG_PWM_UPTIME, | |
636 | data->pwm_uptime); | |
637 | } else if (SETUP_PWM_DOWNTIME == nr) { | |
638 | data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10)); | |
639 | data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0; | |
640 | w83793_write_value(client, W83793_REG_PWM_DOWNTIME, | |
641 | data->pwm_downtime); | |
642 | } else { /* SETUP_TEMP_CRITICAL */ | |
643 | data->temp_critical = | |
644 | w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80; | |
645 | data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10), | |
646 | 0, 0x7f); | |
647 | w83793_write_value(client, W83793_REG_TEMP_CRITICAL, | |
648 | data->temp_critical); | |
649 | } | |
650 | ||
651 | mutex_unlock(&data->update_lock); | |
652 | return count; | |
653 | } | |
654 | ||
655 | /* | |
656 | Temp SmartFan control | |
657 | TEMP_FAN_MAP | |
658 | Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1... | |
659 | It's possible two or more temp channels control the same fan, w83793 | |
660 | always prefers to pick the most critical request and applies it to | |
661 | the related Fan. | |
662 | It's possible one fan is not in any mapping of 6 temp channels, this | |
663 | means the fan is manual mode | |
664 | ||
665 | TEMP_PWM_ENABLE | |
666 | Each temp channel has its own SmartFan mode, and temp channel | |
667 | control fans that are set by TEMP_FAN_MAP | |
668 | 0: SmartFanII mode | |
669 | 1: Thermal Cruise Mode | |
670 | ||
671 | TEMP_CRUISE | |
672 | Target temperature in thermal cruise mode, w83793 will try to turn | |
673 | fan speed to keep the temperature of target device around this | |
674 | temperature. | |
675 | ||
676 | TEMP_TOLERANCE | |
677 | If Temp higher or lower than target with this tolerance, w83793 | |
678 | will take actions to speed up or slow down the fan to keep the | |
679 | temperature within the tolerance range. | |
680 | */ | |
681 | ||
682 | #define TEMP_FAN_MAP 0 | |
683 | #define TEMP_PWM_ENABLE 1 | |
684 | #define TEMP_CRUISE 2 | |
685 | #define TEMP_TOLERANCE 3 | |
686 | static ssize_t | |
687 | show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf) | |
688 | { | |
689 | struct sensor_device_attribute_2 *sensor_attr = | |
690 | to_sensor_dev_attr_2(attr); | |
691 | int nr = sensor_attr->nr; | |
692 | int index = sensor_attr->index; | |
693 | struct w83793_data *data = w83793_update_device(dev); | |
694 | u32 val; | |
695 | ||
696 | if (TEMP_FAN_MAP == nr) { | |
697 | val = data->temp_fan_map[index]; | |
698 | } else if (TEMP_PWM_ENABLE == nr) { | |
699 | /* +2 to transfrom into 2 and 3 to conform with sysfs intf */ | |
700 | val = ((data->pwm_enable >> index) & 0x01) + 2; | |
701 | } else if (TEMP_CRUISE == nr) { | |
702 | val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f); | |
703 | } else { /* TEMP_TOLERANCE */ | |
704 | val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0); | |
705 | val = TEMP_FROM_REG(val & 0x0f); | |
706 | } | |
707 | return sprintf(buf, "%d\n", val); | |
708 | } | |
709 | ||
710 | static ssize_t | |
711 | store_sf_ctrl(struct device *dev, struct device_attribute *attr, | |
712 | const char *buf, size_t count) | |
713 | { | |
714 | struct sensor_device_attribute_2 *sensor_attr = | |
715 | to_sensor_dev_attr_2(attr); | |
716 | int nr = sensor_attr->nr; | |
717 | int index = sensor_attr->index; | |
718 | struct i2c_client *client = to_i2c_client(dev); | |
719 | struct w83793_data *data = i2c_get_clientdata(client); | |
720 | u32 val; | |
721 | ||
722 | mutex_lock(&data->update_lock); | |
723 | if (TEMP_FAN_MAP == nr) { | |
724 | val = simple_strtoul(buf, NULL, 10) & 0xff; | |
725 | w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val); | |
726 | data->temp_fan_map[index] = val; | |
727 | } else if (TEMP_PWM_ENABLE == nr) { | |
728 | val = simple_strtoul(buf, NULL, 10); | |
729 | if (2 == val || 3 == val) { | |
730 | data->pwm_enable = | |
731 | w83793_read_value(client, W83793_REG_PWM_ENABLE); | |
732 | if (val - 2) | |
733 | data->pwm_enable |= 1 << index; | |
734 | else | |
735 | data->pwm_enable &= ~(1 << index); | |
736 | w83793_write_value(client, W83793_REG_PWM_ENABLE, | |
737 | data->pwm_enable); | |
738 | } else { | |
739 | mutex_unlock(&data->update_lock); | |
740 | return -EINVAL; | |
741 | } | |
742 | } else if (TEMP_CRUISE == nr) { | |
743 | data->temp_cruise[index] = | |
744 | w83793_read_value(client, W83793_REG_TEMP_CRUISE(index)); | |
745 | val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f); | |
746 | data->temp_cruise[index] &= 0x80; | |
747 | data->temp_cruise[index] |= val; | |
748 | ||
749 | w83793_write_value(client, W83793_REG_TEMP_CRUISE(index), | |
750 | data->temp_cruise[index]); | |
751 | } else { /* TEMP_TOLERANCE */ | |
752 | int i = index >> 1; | |
753 | u8 shift = (index & 0x01) ? 4 : 0; | |
754 | data->tolerance[i] = | |
755 | w83793_read_value(client, W83793_REG_TEMP_TOL(i)); | |
756 | ||
757 | val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f); | |
758 | data->tolerance[i] &= ~(0x0f << shift); | |
759 | data->tolerance[i] |= val << shift; | |
760 | w83793_write_value(client, W83793_REG_TEMP_TOL(i), | |
761 | data->tolerance[i]); | |
762 | } | |
763 | ||
764 | mutex_unlock(&data->update_lock); | |
765 | return count; | |
766 | } | |
767 | ||
768 | static ssize_t | |
769 | show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
770 | { | |
771 | struct sensor_device_attribute_2 *sensor_attr = | |
772 | to_sensor_dev_attr_2(attr); | |
773 | int nr = sensor_attr->nr; | |
774 | int index = sensor_attr->index; | |
775 | struct w83793_data *data = w83793_update_device(dev); | |
776 | ||
777 | return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2); | |
778 | } | |
779 | ||
780 | static ssize_t | |
781 | store_sf2_pwm(struct device *dev, struct device_attribute *attr, | |
782 | const char *buf, size_t count) | |
783 | { | |
784 | struct i2c_client *client = to_i2c_client(dev); | |
785 | struct w83793_data *data = i2c_get_clientdata(client); | |
786 | struct sensor_device_attribute_2 *sensor_attr = | |
787 | to_sensor_dev_attr_2(attr); | |
788 | int nr = sensor_attr->nr; | |
789 | int index = sensor_attr->index; | |
790 | u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2; | |
791 | ||
792 | mutex_lock(&data->update_lock); | |
793 | data->sf2_pwm[index][nr] = | |
794 | w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0; | |
795 | data->sf2_pwm[index][nr] |= val; | |
796 | w83793_write_value(client, W83793_REG_SF2_PWM(index, nr), | |
797 | data->sf2_pwm[index][nr]); | |
798 | mutex_unlock(&data->update_lock); | |
799 | return count; | |
800 | } | |
801 | ||
802 | static ssize_t | |
803 | show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
804 | { | |
805 | struct sensor_device_attribute_2 *sensor_attr = | |
806 | to_sensor_dev_attr_2(attr); | |
807 | int nr = sensor_attr->nr; | |
808 | int index = sensor_attr->index; | |
809 | struct w83793_data *data = w83793_update_device(dev); | |
810 | ||
811 | return sprintf(buf, "%ld\n", | |
812 | TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f)); | |
813 | } | |
814 | ||
815 | static ssize_t | |
816 | store_sf2_temp(struct device *dev, struct device_attribute *attr, | |
817 | const char *buf, size_t count) | |
818 | { | |
819 | struct i2c_client *client = to_i2c_client(dev); | |
820 | struct w83793_data *data = i2c_get_clientdata(client); | |
821 | struct sensor_device_attribute_2 *sensor_attr = | |
822 | to_sensor_dev_attr_2(attr); | |
823 | int nr = sensor_attr->nr; | |
824 | int index = sensor_attr->index; | |
825 | u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f); | |
826 | ||
827 | mutex_lock(&data->update_lock); | |
828 | data->sf2_temp[index][nr] = | |
829 | w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80; | |
830 | data->sf2_temp[index][nr] |= val; | |
831 | w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr), | |
832 | data->sf2_temp[index][nr]); | |
833 | mutex_unlock(&data->update_lock); | |
834 | return count; | |
835 | } | |
836 | ||
837 | /* only Vcore A/B and Vtt have additional 2 bits precision */ | |
838 | static ssize_t | |
839 | show_in(struct device *dev, struct device_attribute *attr, char *buf) | |
840 | { | |
841 | struct sensor_device_attribute_2 *sensor_attr = | |
842 | to_sensor_dev_attr_2(attr); | |
843 | int nr = sensor_attr->nr; | |
844 | int index = sensor_attr->index; | |
845 | struct w83793_data *data = w83793_update_device(dev); | |
846 | u16 val = data->in[index][nr]; | |
847 | ||
848 | if (index < 3) { | |
849 | val <<= 2; | |
850 | val += (data->in_low_bits[nr] >> (index * 2)) & 0x3; | |
851 | } | |
ddca933b GJ |
852 | /* voltage inputs 5VDD and 5VSB needs 150mV offset */ |
853 | val = val * scale_in[index] + scale_in_add[index]; | |
854 | return sprintf(buf, "%d\n", val); | |
6800c3d0 RM |
855 | } |
856 | ||
857 | static ssize_t | |
858 | store_in(struct device *dev, struct device_attribute *attr, | |
859 | const char *buf, size_t count) | |
860 | { | |
861 | struct sensor_device_attribute_2 *sensor_attr = | |
862 | to_sensor_dev_attr_2(attr); | |
863 | int nr = sensor_attr->nr; | |
864 | int index = sensor_attr->index; | |
865 | struct i2c_client *client = to_i2c_client(dev); | |
866 | struct w83793_data *data = i2c_get_clientdata(client); | |
867 | u32 val; | |
868 | ||
869 | val = | |
870 | (simple_strtoul(buf, NULL, 10) + | |
871 | scale_in[index] / 2) / scale_in[index]; | |
872 | mutex_lock(&data->update_lock); | |
873 | if (index > 2) { | |
ddca933b GJ |
874 | /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */ |
875 | if (1 == nr || 2 == nr) { | |
876 | val -= scale_in_add[index] / scale_in[index]; | |
877 | } | |
6800c3d0 RM |
878 | val = SENSORS_LIMIT(val, 0, 255); |
879 | } else { | |
880 | val = SENSORS_LIMIT(val, 0, 0x3FF); | |
881 | data->in_low_bits[nr] = | |
882 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]); | |
883 | data->in_low_bits[nr] &= ~(0x03 << (2 * index)); | |
884 | data->in_low_bits[nr] |= (val & 0x03) << (2 * index); | |
885 | w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr], | |
886 | data->in_low_bits[nr]); | |
887 | val >>= 2; | |
888 | } | |
889 | data->in[index][nr] = val; | |
890 | w83793_write_value(client, W83793_REG_IN[index][nr], | |
891 | data->in[index][nr]); | |
892 | mutex_unlock(&data->update_lock); | |
893 | return count; | |
894 | } | |
895 | ||
896 | #define NOT_USED -1 | |
897 | ||
898 | #define SENSOR_ATTR_IN(index) \ | |
899 | SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ | |
900 | IN_READ, index), \ | |
901 | SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ | |
902 | store_in, IN_MAX, index), \ | |
903 | SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ | |
904 | store_in, IN_LOW, index), \ | |
905 | SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
906 | NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \ | |
907 | SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ | |
908 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
909 | index + ((index > 2) ? 1 : 0)) | |
910 | ||
911 | #define SENSOR_ATTR_FAN(index) \ | |
912 | SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
913 | NULL, ALARM_STATUS, index + 17), \ | |
914 | SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ | |
915 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \ | |
916 | SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ | |
917 | NULL, FAN_INPUT, index - 1), \ | |
918 | SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ | |
919 | show_fan, store_fan_min, FAN_MIN, index - 1) | |
920 | ||
921 | #define SENSOR_ATTR_PWM(index) \ | |
922 | SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ | |
923 | store_pwm, PWM_DUTY, index - 1), \ | |
924 | SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ | |
925 | show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ | |
926 | SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ | |
927 | show_pwm, store_pwm, PWM_START, index - 1), \ | |
928 | SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ | |
929 | show_pwm, store_pwm, PWM_STOP_TIME, index - 1) | |
930 | ||
931 | #define SENSOR_ATTR_TEMP(index) \ | |
932 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \ | |
933 | show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ | |
934 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ | |
935 | NULL, TEMP_READ, index - 1), \ | |
936 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ | |
937 | store_temp, TEMP_CRIT, index - 1), \ | |
938 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ | |
939 | show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ | |
940 | SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \ | |
941 | store_temp, TEMP_WARN, index - 1), \ | |
942 | SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \ | |
943 | show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ | |
944 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
945 | show_alarm_beep, NULL, ALARM_STATUS, index + 11), \ | |
946 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
947 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \ | |
948 | SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \ | |
949 | S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \ | |
950 | TEMP_FAN_MAP, index - 1), \ | |
951 | SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ | |
952 | show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \ | |
953 | index - 1), \ | |
954 | SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \ | |
955 | show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \ | |
956 | SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\ | |
957 | store_sf_ctrl, TEMP_TOLERANCE, index - 1), \ | |
958 | SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ | |
959 | show_sf2_pwm, store_sf2_pwm, 0, index - 1), \ | |
960 | SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ | |
961 | show_sf2_pwm, store_sf2_pwm, 1, index - 1), \ | |
962 | SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ | |
963 | show_sf2_pwm, store_sf2_pwm, 2, index - 1), \ | |
964 | SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ | |
965 | show_sf2_pwm, store_sf2_pwm, 3, index - 1), \ | |
966 | SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ | |
967 | show_sf2_pwm, store_sf2_pwm, 4, index - 1), \ | |
968 | SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ | |
969 | show_sf2_pwm, store_sf2_pwm, 5, index - 1), \ | |
970 | SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ | |
971 | show_sf2_pwm, store_sf2_pwm, 6, index - 1), \ | |
972 | SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ | |
973 | show_sf2_temp, store_sf2_temp, 0, index - 1), \ | |
974 | SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ | |
975 | show_sf2_temp, store_sf2_temp, 1, index - 1), \ | |
976 | SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ | |
977 | show_sf2_temp, store_sf2_temp, 2, index - 1), \ | |
978 | SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ | |
979 | show_sf2_temp, store_sf2_temp, 3, index - 1), \ | |
980 | SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ | |
981 | show_sf2_temp, store_sf2_temp, 4, index - 1), \ | |
982 | SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ | |
983 | show_sf2_temp, store_sf2_temp, 5, index - 1), \ | |
984 | SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ | |
985 | show_sf2_temp, store_sf2_temp, 6, index - 1) | |
986 | ||
987 | static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = { | |
988 | SENSOR_ATTR_IN(0), | |
989 | SENSOR_ATTR_IN(1), | |
990 | SENSOR_ATTR_IN(2), | |
991 | SENSOR_ATTR_IN(3), | |
992 | SENSOR_ATTR_IN(4), | |
993 | SENSOR_ATTR_IN(5), | |
994 | SENSOR_ATTR_IN(6), | |
995 | SENSOR_ATTR_IN(7), | |
996 | SENSOR_ATTR_IN(8), | |
997 | SENSOR_ATTR_IN(9), | |
6800c3d0 RM |
998 | SENSOR_ATTR_FAN(1), |
999 | SENSOR_ATTR_FAN(2), | |
1000 | SENSOR_ATTR_FAN(3), | |
1001 | SENSOR_ATTR_FAN(4), | |
1002 | SENSOR_ATTR_FAN(5), | |
1003 | SENSOR_ATTR_PWM(1), | |
1004 | SENSOR_ATTR_PWM(2), | |
1005 | SENSOR_ATTR_PWM(3), | |
1006 | }; | |
1007 | ||
46bed4df GJ |
1008 | static struct sensor_device_attribute_2 w83793_temp[] = { |
1009 | SENSOR_ATTR_TEMP(1), | |
1010 | SENSOR_ATTR_TEMP(2), | |
1011 | SENSOR_ATTR_TEMP(3), | |
1012 | SENSOR_ATTR_TEMP(4), | |
1013 | SENSOR_ATTR_TEMP(5), | |
1014 | SENSOR_ATTR_TEMP(6), | |
1015 | }; | |
1016 | ||
6800c3d0 RM |
1017 | /* Fan6-Fan12 */ |
1018 | static struct sensor_device_attribute_2 w83793_left_fan[] = { | |
1019 | SENSOR_ATTR_FAN(6), | |
1020 | SENSOR_ATTR_FAN(7), | |
1021 | SENSOR_ATTR_FAN(8), | |
1022 | SENSOR_ATTR_FAN(9), | |
1023 | SENSOR_ATTR_FAN(10), | |
1024 | SENSOR_ATTR_FAN(11), | |
1025 | SENSOR_ATTR_FAN(12), | |
1026 | }; | |
1027 | ||
1028 | /* Pwm4-Pwm8 */ | |
1029 | static struct sensor_device_attribute_2 w83793_left_pwm[] = { | |
1030 | SENSOR_ATTR_PWM(4), | |
1031 | SENSOR_ATTR_PWM(5), | |
1032 | SENSOR_ATTR_PWM(6), | |
1033 | SENSOR_ATTR_PWM(7), | |
1034 | SENSOR_ATTR_PWM(8), | |
1035 | }; | |
1036 | ||
c70a8c34 | 1037 | static struct sensor_device_attribute_2 w83793_vid[] = { |
6800c3d0 RM |
1038 | SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0), |
1039 | SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1), | |
c70a8c34 | 1040 | }; |
93c75a4a | 1041 | static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm); |
c70a8c34 GJ |
1042 | |
1043 | static struct sensor_device_attribute_2 sda_single_files[] = { | |
6800c3d0 RM |
1044 | SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep, |
1045 | store_chassis_clear, ALARM_STATUS, 30), | |
1046 | SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable, | |
1047 | store_beep_enable, NOT_USED, NOT_USED), | |
1048 | SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, | |
1049 | store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), | |
1050 | SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1051 | store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), | |
1052 | SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1053 | store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), | |
1054 | SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup, | |
1055 | store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED), | |
1056 | }; | |
1057 | ||
1058 | static void w83793_init_client(struct i2c_client *client) | |
1059 | { | |
1060 | if (reset) { | |
1061 | w83793_write_value(client, W83793_REG_CONFIG, 0x80); | |
1062 | } | |
1063 | ||
1064 | /* Start monitoring */ | |
1065 | w83793_write_value(client, W83793_REG_CONFIG, | |
1066 | w83793_read_value(client, W83793_REG_CONFIG) | 0x01); | |
1067 | ||
1068 | } | |
1069 | ||
a7f13a6e | 1070 | static int w83793_remove(struct i2c_client *client) |
6800c3d0 RM |
1071 | { |
1072 | struct w83793_data *data = i2c_get_clientdata(client); | |
1073 | struct device *dev = &client->dev; | |
a7f13a6e | 1074 | int i; |
6800c3d0 | 1075 | |
a7f13a6e | 1076 | hwmon_device_unregister(data->hwmon_dev); |
6800c3d0 | 1077 | |
a7f13a6e JD |
1078 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) |
1079 | device_remove_file(dev, | |
1080 | &w83793_sensor_attr_2[i].dev_attr); | |
6800c3d0 | 1081 | |
a7f13a6e JD |
1082 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) |
1083 | device_remove_file(dev, &sda_single_files[i].dev_attr); | |
6800c3d0 | 1084 | |
a7f13a6e JD |
1085 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) |
1086 | device_remove_file(dev, &w83793_vid[i].dev_attr); | |
1087 | device_remove_file(dev, &dev_attr_vrm); | |
c70a8c34 | 1088 | |
a7f13a6e JD |
1089 | for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++) |
1090 | device_remove_file(dev, &w83793_left_fan[i].dev_attr); | |
6800c3d0 | 1091 | |
a7f13a6e JD |
1092 | for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++) |
1093 | device_remove_file(dev, &w83793_left_pwm[i].dev_attr); | |
46bed4df | 1094 | |
a7f13a6e JD |
1095 | for (i = 0; i < ARRAY_SIZE(w83793_temp); i++) |
1096 | device_remove_file(dev, &w83793_temp[i].dev_attr); | |
6800c3d0 | 1097 | |
a7f13a6e JD |
1098 | if (data->lm75[0] != NULL) |
1099 | i2c_unregister_device(data->lm75[0]); | |
1100 | if (data->lm75[1] != NULL) | |
1101 | i2c_unregister_device(data->lm75[1]); | |
6800c3d0 | 1102 | |
a7f13a6e | 1103 | kfree(data); |
6800c3d0 RM |
1104 | |
1105 | return 0; | |
1106 | } | |
1107 | ||
1108 | static int | |
a7f13a6e | 1109 | w83793_detect_subclients(struct i2c_client *client) |
6800c3d0 RM |
1110 | { |
1111 | int i, id, err; | |
a7f13a6e | 1112 | int address = client->addr; |
6800c3d0 | 1113 | u8 tmp; |
a7f13a6e | 1114 | struct i2c_adapter *adapter = client->adapter; |
6800c3d0 RM |
1115 | struct w83793_data *data = i2c_get_clientdata(client); |
1116 | ||
1117 | id = i2c_adapter_id(adapter); | |
1118 | if (force_subclients[0] == id && force_subclients[1] == address) { | |
1119 | for (i = 2; i <= 3; i++) { | |
1120 | if (force_subclients[i] < 0x48 | |
1121 | || force_subclients[i] > 0x4f) { | |
1122 | dev_err(&client->dev, | |
1123 | "invalid subclient " | |
1124 | "address %d; must be 0x48-0x4f\n", | |
1125 | force_subclients[i]); | |
1126 | err = -EINVAL; | |
1127 | goto ERROR_SC_0; | |
1128 | } | |
1129 | } | |
1130 | w83793_write_value(client, W83793_REG_I2C_SUBADDR, | |
1131 | (force_subclients[2] & 0x07) | | |
1132 | ((force_subclients[3] & 0x07) << 4)); | |
1133 | } | |
1134 | ||
1135 | tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR); | |
1136 | if (!(tmp & 0x08)) { | |
a7f13a6e | 1137 | data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7)); |
6800c3d0 RM |
1138 | } |
1139 | if (!(tmp & 0x80)) { | |
1140 | if ((data->lm75[0] != NULL) | |
1141 | && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) { | |
1142 | dev_err(&client->dev, | |
1143 | "duplicate addresses 0x%x, " | |
1144 | "use force_subclients\n", data->lm75[0]->addr); | |
1145 | err = -ENODEV; | |
1146 | goto ERROR_SC_1; | |
1147 | } | |
a7f13a6e JD |
1148 | data->lm75[1] = i2c_new_dummy(adapter, |
1149 | 0x48 + ((tmp >> 4) & 0x7)); | |
6800c3d0 RM |
1150 | } |
1151 | ||
1152 | return 0; | |
1153 | ||
1154 | /* Undo inits in case of errors */ | |
1155 | ||
1156 | ERROR_SC_1: | |
a7f13a6e JD |
1157 | if (data->lm75[0] != NULL) |
1158 | i2c_unregister_device(data->lm75[0]); | |
6800c3d0 RM |
1159 | ERROR_SC_0: |
1160 | return err; | |
1161 | } | |
1162 | ||
a7f13a6e JD |
1163 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
1164 | static int w83793_detect(struct i2c_client *client, int kind, | |
1165 | struct i2c_board_info *info) | |
6800c3d0 | 1166 | { |
a7f13a6e JD |
1167 | u8 tmp, bank; |
1168 | struct i2c_adapter *adapter = client->adapter; | |
1169 | unsigned short address = client->addr; | |
6800c3d0 RM |
1170 | |
1171 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) { | |
a7f13a6e | 1172 | return -ENODEV; |
6800c3d0 RM |
1173 | } |
1174 | ||
a7f13a6e | 1175 | bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL); |
6800c3d0 | 1176 | |
6800c3d0 | 1177 | if (kind < 0) { |
a7f13a6e | 1178 | tmp = bank & 0x80 ? 0x5c : 0xa3; |
6800c3d0 RM |
1179 | /* Check Winbond vendor ID */ |
1180 | if (tmp != i2c_smbus_read_byte_data(client, | |
1181 | W83793_REG_VENDORID)) { | |
1182 | pr_debug("w83793: Detection failed at check " | |
1183 | "vendor id\n"); | |
a7f13a6e | 1184 | return -ENODEV; |
6800c3d0 RM |
1185 | } |
1186 | ||
1187 | /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR | |
1188 | should match */ | |
a7f13a6e | 1189 | if ((bank & 0x07) == 0 |
6800c3d0 RM |
1190 | && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) != |
1191 | (address << 1)) { | |
1192 | pr_debug("w83793: Detection failed at check " | |
1193 | "i2c addr\n"); | |
a7f13a6e | 1194 | return -ENODEV; |
6800c3d0 RM |
1195 | } |
1196 | ||
1197 | } | |
1198 | ||
1199 | /* We have either had a force parameter, or we have already detected the | |
1200 | Winbond. Determine the chip type now */ | |
1201 | ||
1202 | if (kind <= 0) { | |
a7f13a6e JD |
1203 | if (0x7b == i2c_smbus_read_byte_data(client, |
1204 | W83793_REG_CHIPID)) { | |
6800c3d0 RM |
1205 | kind = w83793; |
1206 | } else { | |
1207 | if (kind == 0) | |
1208 | dev_warn(&adapter->dev, "w83793: Ignoring " | |
1209 | "'force' parameter for unknown chip " | |
1210 | "at address 0x%02x\n", address); | |
a7f13a6e | 1211 | return -ENODEV; |
6800c3d0 RM |
1212 | } |
1213 | } | |
1214 | ||
a7f13a6e JD |
1215 | strlcpy(info->type, "w83793", I2C_NAME_SIZE); |
1216 | ||
1217 | return 0; | |
1218 | } | |
6800c3d0 | 1219 | |
a7f13a6e JD |
1220 | static int w83793_probe(struct i2c_client *client, |
1221 | const struct i2c_device_id *id) | |
1222 | { | |
1223 | struct device *dev = &client->dev; | |
1224 | struct w83793_data *data; | |
1225 | int i, tmp, val, err; | |
1226 | int files_fan = ARRAY_SIZE(w83793_left_fan) / 7; | |
1227 | int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5; | |
1228 | int files_temp = ARRAY_SIZE(w83793_temp) / 6; | |
1229 | ||
1230 | data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL); | |
1231 | if (!data) { | |
1232 | err = -ENOMEM; | |
1233 | goto exit; | |
1234 | } | |
1235 | ||
1236 | i2c_set_clientdata(client, data); | |
1237 | data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL); | |
6800c3d0 RM |
1238 | mutex_init(&data->update_lock); |
1239 | ||
a7f13a6e JD |
1240 | err = w83793_detect_subclients(client); |
1241 | if (err) | |
6800c3d0 RM |
1242 | goto free_mem; |
1243 | ||
6800c3d0 RM |
1244 | /* Initialize the chip */ |
1245 | w83793_init_client(client); | |
1246 | ||
6800c3d0 RM |
1247 | /* |
1248 | Only fan 1-5 has their own input pins, | |
1249 | Pwm 1-3 has their own pins | |
1250 | */ | |
1251 | data->has_fan = 0x1f; | |
1252 | data->has_pwm = 0x07; | |
1253 | tmp = w83793_read_value(client, W83793_REG_MFC); | |
1254 | val = w83793_read_value(client, W83793_REG_FANIN_CTRL); | |
1255 | ||
1256 | /* check the function of pins 49-56 */ | |
93c75a4a JD |
1257 | if (tmp & 0x80) { |
1258 | data->has_vid |= 0x2; /* has VIDB */ | |
1259 | } else { | |
6800c3d0 RM |
1260 | data->has_pwm |= 0x18; /* pwm 4,5 */ |
1261 | if (val & 0x01) { /* fan 6 */ | |
1262 | data->has_fan |= 0x20; | |
1263 | data->has_pwm |= 0x20; | |
1264 | } | |
1265 | if (val & 0x02) { /* fan 7 */ | |
1266 | data->has_fan |= 0x40; | |
1267 | data->has_pwm |= 0x40; | |
1268 | } | |
1269 | if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */ | |
1270 | data->has_fan |= 0x80; | |
1271 | data->has_pwm |= 0x80; | |
1272 | } | |
1273 | } | |
1274 | ||
93c75a4a JD |
1275 | /* check the function of pins 37-40 */ |
1276 | if (!(tmp & 0x29)) | |
1277 | data->has_vid |= 0x1; /* has VIDA */ | |
6800c3d0 RM |
1278 | if (0x08 == (tmp & 0x0c)) { |
1279 | if (val & 0x08) /* fan 9 */ | |
1280 | data->has_fan |= 0x100; | |
1281 | if (val & 0x10) /* fan 10 */ | |
1282 | data->has_fan |= 0x200; | |
1283 | } | |
6800c3d0 RM |
1284 | if (0x20 == (tmp & 0x30)) { |
1285 | if (val & 0x20) /* fan 11 */ | |
1286 | data->has_fan |= 0x400; | |
1287 | if (val & 0x40) /* fan 12 */ | |
1288 | data->has_fan |= 0x800; | |
1289 | } | |
1290 | ||
1291 | if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */ | |
1292 | data->has_fan |= 0x80; | |
1293 | data->has_pwm |= 0x80; | |
1294 | } | |
1295 | ||
c9294315 RM |
1296 | tmp = w83793_read_value(client, W83793_REG_FANIN_SEL); |
1297 | if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */ | |
1298 | data->has_fan |= 0x100; | |
1299 | } | |
1300 | if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */ | |
1301 | data->has_fan |= 0x200; | |
1302 | } | |
1303 | if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */ | |
1304 | data->has_fan |= 0x400; | |
1305 | } | |
1306 | if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */ | |
1307 | data->has_fan |= 0x800; | |
1308 | } | |
1309 | ||
46bed4df GJ |
1310 | /* check the temp1-6 mode, ignore former AMDSI selected inputs */ |
1311 | tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]); | |
1312 | if (tmp & 0x01) | |
1313 | data->has_temp |= 0x01; | |
1314 | if (tmp & 0x04) | |
1315 | data->has_temp |= 0x02; | |
1316 | if (tmp & 0x10) | |
1317 | data->has_temp |= 0x04; | |
1318 | if (tmp & 0x40) | |
1319 | data->has_temp |= 0x08; | |
1320 | ||
1321 | tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]); | |
1322 | if (tmp & 0x01) | |
1323 | data->has_temp |= 0x10; | |
1324 | if (tmp & 0x02) | |
1325 | data->has_temp |= 0x20; | |
1326 | ||
6800c3d0 RM |
1327 | /* Register sysfs hooks */ |
1328 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) { | |
1329 | err = device_create_file(dev, | |
1330 | &w83793_sensor_attr_2[i].dev_attr); | |
1331 | if (err) | |
1332 | goto exit_remove; | |
1333 | } | |
1334 | ||
c70a8c34 GJ |
1335 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) { |
1336 | if (!(data->has_vid & (1 << i))) | |
1337 | continue; | |
1338 | err = device_create_file(dev, &w83793_vid[i].dev_attr); | |
1339 | if (err) | |
1340 | goto exit_remove; | |
1341 | } | |
93c75a4a JD |
1342 | if (data->has_vid) { |
1343 | data->vrm = vid_which_vrm(); | |
1344 | err = device_create_file(dev, &dev_attr_vrm); | |
1345 | if (err) | |
1346 | goto exit_remove; | |
1347 | } | |
c70a8c34 | 1348 | |
6800c3d0 RM |
1349 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { |
1350 | err = device_create_file(dev, &sda_single_files[i].dev_attr); | |
1351 | if (err) | |
1352 | goto exit_remove; | |
1353 | ||
1354 | } | |
1355 | ||
46bed4df GJ |
1356 | for (i = 0; i < 6; i++) { |
1357 | int j; | |
1358 | if (!(data->has_temp & (1 << i))) | |
1359 | continue; | |
1360 | for (j = 0; j < files_temp; j++) { | |
1361 | err = device_create_file(dev, | |
1362 | &w83793_temp[(i) * files_temp | |
1363 | + j].dev_attr); | |
1364 | if (err) | |
1365 | goto exit_remove; | |
1366 | } | |
1367 | } | |
1368 | ||
6800c3d0 RM |
1369 | for (i = 5; i < 12; i++) { |
1370 | int j; | |
1371 | if (!(data->has_fan & (1 << i))) | |
1372 | continue; | |
1373 | for (j = 0; j < files_fan; j++) { | |
1374 | err = device_create_file(dev, | |
1375 | &w83793_left_fan[(i - 5) * files_fan | |
1376 | + j].dev_attr); | |
1377 | if (err) | |
1378 | goto exit_remove; | |
1379 | } | |
1380 | } | |
1381 | ||
1382 | for (i = 3; i < 8; i++) { | |
1383 | int j; | |
1384 | if (!(data->has_pwm & (1 << i))) | |
1385 | continue; | |
1386 | for (j = 0; j < files_pwm; j++) { | |
1387 | err = device_create_file(dev, | |
1388 | &w83793_left_pwm[(i - 3) * files_pwm | |
1389 | + j].dev_attr); | |
1390 | if (err) | |
1391 | goto exit_remove; | |
1392 | } | |
1393 | } | |
1394 | ||
1beeffe4 TJ |
1395 | data->hwmon_dev = hwmon_device_register(dev); |
1396 | if (IS_ERR(data->hwmon_dev)) { | |
1397 | err = PTR_ERR(data->hwmon_dev); | |
6800c3d0 RM |
1398 | goto exit_remove; |
1399 | } | |
1400 | ||
1401 | return 0; | |
1402 | ||
1403 | /* Unregister sysfs hooks */ | |
1404 | ||
1405 | exit_remove: | |
1406 | for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) | |
1407 | device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr); | |
1408 | ||
1409 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) | |
1410 | device_remove_file(dev, &sda_single_files[i].dev_attr); | |
1411 | ||
c70a8c34 GJ |
1412 | for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) |
1413 | device_remove_file(dev, &w83793_vid[i].dev_attr); | |
1414 | ||
6800c3d0 RM |
1415 | for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++) |
1416 | device_remove_file(dev, &w83793_left_fan[i].dev_attr); | |
1417 | ||
1418 | for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++) | |
1419 | device_remove_file(dev, &w83793_left_pwm[i].dev_attr); | |
1420 | ||
46bed4df GJ |
1421 | for (i = 0; i < ARRAY_SIZE(w83793_temp); i++) |
1422 | device_remove_file(dev, &w83793_temp[i].dev_attr); | |
1423 | ||
a7f13a6e JD |
1424 | if (data->lm75[0] != NULL) |
1425 | i2c_unregister_device(data->lm75[0]); | |
1426 | if (data->lm75[1] != NULL) | |
1427 | i2c_unregister_device(data->lm75[1]); | |
6800c3d0 RM |
1428 | free_mem: |
1429 | kfree(data); | |
1430 | exit: | |
1431 | return err; | |
1432 | } | |
1433 | ||
1434 | static void w83793_update_nonvolatile(struct device *dev) | |
1435 | { | |
1436 | struct i2c_client *client = to_i2c_client(dev); | |
1437 | struct w83793_data *data = i2c_get_clientdata(client); | |
1438 | int i, j; | |
1439 | /* | |
1440 | They are somewhat "stable" registers, and to update them everytime | |
1441 | takes so much time, it's just not worthy. Update them in a long | |
1442 | interval to avoid exception. | |
1443 | */ | |
1444 | if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300) | |
1445 | || !data->valid)) | |
1446 | return; | |
1447 | /* update voltage limits */ | |
1448 | for (i = 1; i < 3; i++) { | |
1449 | for (j = 0; j < ARRAY_SIZE(data->in); j++) { | |
1450 | data->in[j][i] = | |
1451 | w83793_read_value(client, W83793_REG_IN[j][i]); | |
1452 | } | |
1453 | data->in_low_bits[i] = | |
1454 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]); | |
1455 | } | |
1456 | ||
1457 | for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) { | |
1458 | /* Update the Fan measured value and limits */ | |
1459 | if (!(data->has_fan & (1 << i))) { | |
1460 | continue; | |
1461 | } | |
1462 | data->fan_min[i] = | |
1463 | w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8; | |
1464 | data->fan_min[i] |= | |
1465 | w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1); | |
1466 | } | |
1467 | ||
1468 | for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) { | |
46bed4df GJ |
1469 | if (!(data->has_temp & (1 << i))) |
1470 | continue; | |
6800c3d0 RM |
1471 | data->temp_fan_map[i] = |
1472 | w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i)); | |
1473 | for (j = 1; j < 5; j++) { | |
1474 | data->temp[i][j] = | |
1475 | w83793_read_value(client, W83793_REG_TEMP[i][j]); | |
1476 | } | |
1477 | data->temp_cruise[i] = | |
1478 | w83793_read_value(client, W83793_REG_TEMP_CRUISE(i)); | |
1479 | for (j = 0; j < 7; j++) { | |
1480 | data->sf2_pwm[i][j] = | |
1481 | w83793_read_value(client, W83793_REG_SF2_PWM(i, j)); | |
1482 | data->sf2_temp[i][j] = | |
1483 | w83793_read_value(client, | |
1484 | W83793_REG_SF2_TEMP(i, j)); | |
1485 | } | |
1486 | } | |
1487 | ||
1488 | for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++) | |
1489 | data->temp_mode[i] = | |
1490 | w83793_read_value(client, W83793_REG_TEMP_MODE[i]); | |
1491 | ||
1492 | for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) { | |
1493 | data->tolerance[i] = | |
1494 | w83793_read_value(client, W83793_REG_TEMP_TOL(i)); | |
1495 | } | |
1496 | ||
1497 | for (i = 0; i < ARRAY_SIZE(data->pwm); i++) { | |
1498 | if (!(data->has_pwm & (1 << i))) | |
1499 | continue; | |
1500 | data->pwm[i][PWM_NONSTOP] = | |
1501 | w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP)); | |
1502 | data->pwm[i][PWM_START] = | |
1503 | w83793_read_value(client, W83793_REG_PWM(i, PWM_START)); | |
1504 | data->pwm_stop_time[i] = | |
1505 | w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i)); | |
1506 | } | |
1507 | ||
1508 | data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT); | |
1509 | data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE); | |
1510 | data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME); | |
1511 | data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME); | |
1512 | data->temp_critical = | |
1513 | w83793_read_value(client, W83793_REG_TEMP_CRITICAL); | |
1514 | data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP); | |
1515 | ||
1516 | for (i = 0; i < ARRAY_SIZE(data->beeps); i++) { | |
1517 | data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i)); | |
1518 | } | |
1519 | ||
1520 | data->last_nonvolatile = jiffies; | |
1521 | } | |
1522 | ||
1523 | static struct w83793_data *w83793_update_device(struct device *dev) | |
1524 | { | |
1525 | struct i2c_client *client = to_i2c_client(dev); | |
1526 | struct w83793_data *data = i2c_get_clientdata(client); | |
1527 | int i; | |
1528 | ||
1529 | mutex_lock(&data->update_lock); | |
1530 | ||
1531 | if (!(time_after(jiffies, data->last_updated + HZ * 2) | |
1532 | || !data->valid)) | |
1533 | goto END; | |
1534 | ||
1535 | /* Update the voltages measured value and limits */ | |
1536 | for (i = 0; i < ARRAY_SIZE(data->in); i++) | |
1537 | data->in[i][IN_READ] = | |
1538 | w83793_read_value(client, W83793_REG_IN[i][IN_READ]); | |
1539 | ||
1540 | data->in_low_bits[IN_READ] = | |
1541 | w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]); | |
1542 | ||
1543 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { | |
1544 | if (!(data->has_fan & (1 << i))) { | |
1545 | continue; | |
1546 | } | |
1547 | data->fan[i] = | |
1548 | w83793_read_value(client, W83793_REG_FAN(i)) << 8; | |
1549 | data->fan[i] |= | |
1550 | w83793_read_value(client, W83793_REG_FAN(i) + 1); | |
1551 | } | |
1552 | ||
46bed4df GJ |
1553 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { |
1554 | if (!(data->has_temp & (1 << i))) | |
1555 | continue; | |
6800c3d0 RM |
1556 | data->temp[i][TEMP_READ] = |
1557 | w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]); | |
46bed4df | 1558 | } |
6800c3d0 RM |
1559 | |
1560 | data->temp_low_bits = | |
1561 | w83793_read_value(client, W83793_REG_TEMP_LOW_BITS); | |
1562 | ||
1563 | for (i = 0; i < ARRAY_SIZE(data->pwm); i++) { | |
1564 | if (data->has_pwm & (1 << i)) | |
1565 | data->pwm[i][PWM_DUTY] = | |
1566 | w83793_read_value(client, | |
1567 | W83793_REG_PWM(i, PWM_DUTY)); | |
1568 | } | |
1569 | ||
1570 | for (i = 0; i < ARRAY_SIZE(data->alarms); i++) | |
1571 | data->alarms[i] = | |
1572 | w83793_read_value(client, W83793_REG_ALARM(i)); | |
c70a8c34 GJ |
1573 | if (data->has_vid & 0x01) |
1574 | data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA); | |
1575 | if (data->has_vid & 0x02) | |
1576 | data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB); | |
6800c3d0 RM |
1577 | w83793_update_nonvolatile(dev); |
1578 | data->last_updated = jiffies; | |
1579 | data->valid = 1; | |
1580 | ||
1581 | END: | |
1582 | mutex_unlock(&data->update_lock); | |
1583 | return data; | |
1584 | } | |
1585 | ||
1586 | /* Ignore the possibility that somebody change bank outside the driver | |
1587 | Must be called with data->update_lock held, except during initialization */ | |
1588 | static u8 w83793_read_value(struct i2c_client *client, u16 reg) | |
1589 | { | |
1590 | struct w83793_data *data = i2c_get_clientdata(client); | |
1591 | u8 res = 0xff; | |
1592 | u8 new_bank = reg >> 8; | |
1593 | ||
1594 | new_bank |= data->bank & 0xfc; | |
1595 | if (data->bank != new_bank) { | |
1596 | if (i2c_smbus_write_byte_data | |
1597 | (client, W83793_REG_BANKSEL, new_bank) >= 0) | |
1598 | data->bank = new_bank; | |
1599 | else { | |
1600 | dev_err(&client->dev, | |
1601 | "set bank to %d failed, fall back " | |
1602 | "to bank %d, read reg 0x%x error\n", | |
1603 | new_bank, data->bank, reg); | |
1604 | res = 0x0; /* read 0x0 from the chip */ | |
1605 | goto END; | |
1606 | } | |
1607 | } | |
1608 | res = i2c_smbus_read_byte_data(client, reg & 0xff); | |
1609 | END: | |
1610 | return res; | |
1611 | } | |
1612 | ||
1613 | /* Must be called with data->update_lock held, except during initialization */ | |
1614 | static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value) | |
1615 | { | |
1616 | struct w83793_data *data = i2c_get_clientdata(client); | |
1617 | int res; | |
1618 | u8 new_bank = reg >> 8; | |
1619 | ||
1620 | new_bank |= data->bank & 0xfc; | |
1621 | if (data->bank != new_bank) { | |
1622 | if ((res = i2c_smbus_write_byte_data | |
1623 | (client, W83793_REG_BANKSEL, new_bank)) >= 0) | |
1624 | data->bank = new_bank; | |
1625 | else { | |
1626 | dev_err(&client->dev, | |
1627 | "set bank to %d failed, fall back " | |
1628 | "to bank %d, write reg 0x%x error\n", | |
1629 | new_bank, data->bank, reg); | |
1630 | goto END; | |
1631 | } | |
1632 | } | |
1633 | ||
1634 | res = i2c_smbus_write_byte_data(client, reg & 0xff, value); | |
1635 | END: | |
1636 | return res; | |
1637 | } | |
1638 | ||
1639 | static int __init sensors_w83793_init(void) | |
1640 | { | |
1641 | return i2c_add_driver(&w83793_driver); | |
1642 | } | |
1643 | ||
1644 | static void __exit sensors_w83793_exit(void) | |
1645 | { | |
1646 | i2c_del_driver(&w83793_driver); | |
1647 | } | |
1648 | ||
1649 | MODULE_AUTHOR("Yuan Mu"); | |
1650 | MODULE_DESCRIPTION("w83793 driver"); | |
1651 | MODULE_LICENSE("GPL"); | |
1652 | ||
1653 | module_init(sensors_w83793_init); | |
1654 | module_exit(sensors_w83793_exit); |