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Merge tag 'cxl-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm...
[mirror_ubuntu-jammy-kernel.git] / drivers / hwmon / w83793.c
CommitLineData
ff7924b0 1// SPDX-License-Identifier: GPL-2.0-only
6800c3d0 2/*
47efe877
GR		 3 * w83793.c - Linux kernel driver for hardware monitoring
4 * Copyright (C) 2006 Winbond Electronics Corp.
5 * Yuan Mu
6 * Rudolf Marek <r.marek@assembler.cz>
7 * Copyright (C) 2009-2010 Sven Anders <anders@anduras.de>, ANDURAS AG.
8 * Watchdog driver part
9 * (Based partially on fschmd driver,
10 * Copyright 2007-2008 by Hans de Goede)
47efe877 11 */
6800c3d0
RM		 12
13/*
47efe877
GR		 14 * Supports following chips:
15 *
16 * Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
17 * w83793 10 12 8 6 0x7b 0x5ca3 yes no
18 */
6800c3d0
RM		 19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/slab.h>
23#include <linux/i2c.h>
24#include <linux/hwmon.h>
25#include <linux/hwmon-vid.h>
26#include <linux/hwmon-sysfs.h>
27#include <linux/err.h>
28#include <linux/mutex.h>
5852f960
SA		 29#include <linux/fs.h>
30#include <linux/watchdog.h>
31#include <linux/miscdevice.h>
32#include <linux/uaccess.h>
33#include <linux/kref.h>
34#include <linux/notifier.h>
35#include <linux/reboot.h>
dcd8f392 36#include <linux/jiffies.h>
5852f960
SA		 37
38/* Default values */
39#define WATCHDOG_TIMEOUT 2 /* 2 minute default timeout */
6800c3d0
RM		 40
41/* Addresses to scan */
25e9c86d
MH		 42static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
43 I2C_CLIENT_END };
6800c3d0
RM		 44
45/* Insmod parameters */
3aed198c
JD		 46
47static unsigned short force_subclients[4];
48module_param_array(force_subclients, short, NULL, 0);
b55f3757
GR		 49MODULE_PARM_DESC(force_subclients,
50 "List of subclient addresses: {bus, clientaddr, subclientaddr1, subclientaddr2}");
6800c3d0 51
90ab5ee9 52static bool reset;
6800c3d0
RM		 53module_param(reset, bool, 0);
54MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
55
5852f960
SA		 56static int timeout = WATCHDOG_TIMEOUT; /* default timeout in minutes */
57module_param(timeout, int, 0);
58MODULE_PARM_DESC(timeout,
59 "Watchdog timeout in minutes. 2<= timeout <=255 (default="
60 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
61
86a1e189
WVS		 62static bool nowayout = WATCHDOG_NOWAYOUT;
63module_param(nowayout, bool, 0);
5852f960
SA		 64MODULE_PARM_DESC(nowayout,
65 "Watchdog cannot be stopped once started (default="
66 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
67
6800c3d0 68/*
47efe877
GR		 69 * Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
70 * as ID, Bank Select registers
71 */
6800c3d0
RM		 72#define W83793_REG_BANKSEL 0x00
73#define W83793_REG_VENDORID 0x0d
74#define W83793_REG_CHIPID 0x0e
75#define W83793_REG_DEVICEID 0x0f
76
77#define W83793_REG_CONFIG 0x40
78#define W83793_REG_MFC 0x58
79#define W83793_REG_FANIN_CTRL 0x5c
80#define W83793_REG_FANIN_SEL 0x5d
81#define W83793_REG_I2C_ADDR 0x0b
82#define W83793_REG_I2C_SUBADDR 0x0c
83#define W83793_REG_VID_INA 0x05
84#define W83793_REG_VID_INB 0x06
85#define W83793_REG_VID_LATCHA 0x07
86#define W83793_REG_VID_LATCHB 0x08
87#define W83793_REG_VID_CTRL 0x59
88
5852f960
SA		 89#define W83793_REG_WDT_LOCK 0x01
90#define W83793_REG_WDT_ENABLE 0x02
91#define W83793_REG_WDT_STATUS 0x03
92#define W83793_REG_WDT_TIMEOUT 0x04
93
6800c3d0
RM		 94static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
95
96#define TEMP_READ 0
97#define TEMP_CRIT 1
98#define TEMP_CRIT_HYST 2
99#define TEMP_WARN 3
100#define TEMP_WARN_HYST 4
47efe877
GR		 101/*
102 * only crit and crit_hyst affect real-time alarm status
103 * current crit crit_hyst warn warn_hyst
104 */
6800c3d0
RM		 105static u16 W83793_REG_TEMP[][5] = {
106 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
107 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
108 {0x1e, 0x80, 0x81, 0x82, 0x83},
109 {0x1f, 0x84, 0x85, 0x86, 0x87},
110 {0x20, 0x88, 0x89, 0x8a, 0x8b},
111 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
112};
113
114#define W83793_REG_TEMP_LOW_BITS 0x22
115
116#define W83793_REG_BEEP(index) (0x53 + (index))
117#define W83793_REG_ALARM(index) (0x4b + (index))
118
119#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
120#define W83793_REG_IRQ_CTRL 0x50
121#define W83793_REG_OVT_CTRL 0x51
122#define W83793_REG_OVT_BEEP 0x52
123
124#define IN_READ 0
125#define IN_MAX 1
126#define IN_LOW 2
127static const u16 W83793_REG_IN[][3] = {
128 /* Current, High, Low */
129 {0x10, 0x60, 0x61}, /* Vcore A */
130 {0x11, 0x62, 0x63}, /* Vcore B */
131 {0x12, 0x64, 0x65}, /* Vtt */
132 {0x14, 0x6a, 0x6b}, /* VSEN1 */
133 {0x15, 0x6c, 0x6d}, /* VSEN2 */
134 {0x16, 0x6e, 0x6f}, /* +3VSEN */
135 {0x17, 0x70, 0x71}, /* +12VSEN */
136 {0x18, 0x72, 0x73}, /* 5VDD */
137 {0x19, 0x74, 0x75}, /* 5VSB */
138 {0x1a, 0x76, 0x77}, /* VBAT */
139};
140
141/* Low Bits of Vcore A/B Vtt Read/High/Low */
142static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
143static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 144static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 145
146#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
147#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
148
149#define W83793_REG_PWM_DEFAULT 0xb2
150#define W83793_REG_PWM_ENABLE 0x207
151#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
152#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
153#define W83793_REG_TEMP_CRITICAL 0xc5
154
155#define PWM_DUTY 0
156#define PWM_START 1
157#define PWM_NONSTOP 2
5aebefb0 158#define PWM_STOP_TIME 3
6800c3d0
RM		 159#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
160 (nr) == 1 ? 0x220 : 0x218) + (index))
161
162/* bit field, fan1 is bit0, fan2 is bit1 ... */
163#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
164#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
165#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
166#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
167#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
168#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
169
170static inline unsigned long FAN_FROM_REG(u16 val)
171{
172 if ((val >= 0xfff) || (val == 0))
173 return 0;
7fe83ad8 174 return 1350000UL / val;
6800c3d0
RM		 175}
176
177static inline u16 FAN_TO_REG(long rpm)
178{
179 if (rpm <= 0)
180 return 0x0fff;
2a844c14 181 return clamp_val((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
6800c3d0
RM		 182}
183
184static inline unsigned long TIME_FROM_REG(u8 reg)
185{
7fe83ad8 186 return reg * 100;
6800c3d0
RM		 187}
188
189static inline u8 TIME_TO_REG(unsigned long val)
190{
2a844c14 191 return clamp_val((val + 50) / 100, 0, 0xff);
6800c3d0
RM		 192}
193
194static inline long TEMP_FROM_REG(s8 reg)
195{
7fe83ad8 196 return reg * 1000;
6800c3d0
RM		 197}
198
199static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
200{
2a844c14 201 return clamp_val((val + (val < 0 ? -500 : 500)) / 1000, min, max);
6800c3d0
RM		 202}
203
204struct w83793_data {
6800c3d0 205 struct i2c_client *lm75[2];
1beeffe4 206 struct device *hwmon_dev;
6800c3d0
RM		 207 struct mutex update_lock;
208 char valid; /* !=0 if following fields are valid */
209 unsigned long last_updated; /* In jiffies */
210 unsigned long last_nonvolatile; /* In jiffies, last time we update the
47efe877
GR		 211 * nonvolatile registers
212 */
6800c3d0
RM		 213
214 u8 bank;
215 u8 vrm;
216 u8 vid[2];
217 u8 in[10][3]; /* Register value, read/high/low */
218 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
219
220 u16 has_fan; /* Only fan1- fan5 has own pins */
221 u16 fan[12]; /* Register value combine */
222 u16 fan_min[12]; /* Register value combine */
223
224 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
225 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
226 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
47efe877
GR		 227 * byte 1: Temp R1,R2 mode, each has 1 bit
228 */
6800c3d0
RM		 229 u8 temp_critical; /* If reached all fan will be at full speed */
230 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
231
232 u8 has_pwm;
46bed4df 233 u8 has_temp;
c70a8c34 234 u8 has_vid;
6800c3d0
RM		 235 u8 pwm_enable; /* Register value, each Temp has 1 bit */
236 u8 pwm_uptime; /* Register value */
237 u8 pwm_downtime; /* Register value */
238 u8 pwm_default; /* All fan default pwm, next poweron valid */
239 u8 pwm[8][3]; /* Register value */
240 u8 pwm_stop_time[8];
241 u8 temp_cruise[6];
242
243 u8 alarms[5]; /* realtime status registers */
244 u8 beeps[5];
245 u8 beep_enable;
246 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
247 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
248 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
5852f960
SA		 249
250 /* watchdog */
251 struct i2c_client *client;
252 struct mutex watchdog_lock;
253 struct list_head list; /* member of the watchdog_data_list */
254 struct kref kref;
255 struct miscdevice watchdog_miscdev;
256 unsigned long watchdog_is_open;
257 char watchdog_expect_close;
258 char watchdog_name[10]; /* must be unique to avoid sysfs conflict */
259 unsigned int watchdog_caused_reboot;
260 int watchdog_timeout; /* watchdog timeout in minutes */
6800c3d0
RM		 261};
262
47efe877
GR		 263/*
264 * Somewhat ugly :( global data pointer list with all devices, so that
265 * we can find our device data as when using misc_register. There is no
266 * other method to get to one's device data from the open file-op and
267 * for usage in the reboot notifier callback.
268 */
5852f960
SA		 269static LIST_HEAD(watchdog_data_list);
270
271/* Note this lock not only protect list access, but also data.kref access */
272static DEFINE_MUTEX(watchdog_data_mutex);
273
47efe877
GR		 274/*
275 * Release our data struct when we're detached from the i2c client *and* all
276 * references to our watchdog device are released
277 */
5852f960
SA		 278static void w83793_release_resources(struct kref *ref)
279{
280 struct w83793_data *data = container_of(ref, struct w83793_data, kref);
281 kfree(data);
282}
283
6800c3d0
RM		 284static u8 w83793_read_value(struct i2c_client *client, u16 reg);
285static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
16b237f5 286static int w83793_probe(struct i2c_client *client);
310ec792 287static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 288 struct i2c_board_info *info);
289static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 290static void w83793_init_client(struct i2c_client *client);
291static void w83793_update_nonvolatile(struct device *dev);
292static struct w83793_data *w83793_update_device(struct device *dev);
293
a7f13a6e 294static const struct i2c_device_id w83793_id[] = {
1f86df49 295 { "w83793", 0 },
a7f13a6e
JD		 296 { }
297};
298MODULE_DEVICE_TABLE(i2c, w83793_id);
299
6800c3d0 300static struct i2c_driver w83793_driver = {
a7f13a6e 301 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 302 .driver = {
303 .name = "w83793",
304 },
16b237f5 305 .probe_new = w83793_probe,
a7f13a6e
JD		 306 .remove = w83793_remove,
307 .id_table = w83793_id,
308 .detect = w83793_detect,
c3813d6a 309 .address_list = normal_i2c,
6800c3d0
RM		 310};
311
312static ssize_t
329beb71 313vrm_show(struct device *dev, struct device_attribute *attr, char *buf)
6800c3d0 314{
8f74efe8 315 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 316 return sprintf(buf, "%d\n", data->vrm);
317}
318
319static ssize_t
320show_vid(struct device *dev, struct device_attribute *attr, char *buf)
321{
322 struct w83793_data *data = w83793_update_device(dev);
323 struct sensor_device_attribute_2 *sensor_attr =
324 to_sensor_dev_attr_2(attr);
325 int index = sensor_attr->index;
326
327 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
328}
329
330static ssize_t
329beb71 331vrm_store(struct device *dev, struct device_attribute *attr,
6800c3d0
RM		 332 const char *buf, size_t count)
333{
8f74efe8 334 struct w83793_data *data = dev_get_drvdata(dev);
47efe877
GR		 335 unsigned long val;
336 int err;
337
338 err = kstrtoul(buf, 10, &val);
339 if (err)
340 return err;
341
2aeee04d
AL		 342 if (val > 255)
343 return -EINVAL;
344
47efe877 345 data->vrm = val;
6800c3d0
RM		 346 return count;
347}
348
349#define ALARM_STATUS 0
350#define BEEP_ENABLE 1
351static ssize_t
352show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
353{
354 struct w83793_data *data = w83793_update_device(dev);
355 struct sensor_device_attribute_2 *sensor_attr =
356 to_sensor_dev_attr_2(attr);
357 int nr = sensor_attr->nr;
358 int index = sensor_attr->index >> 3;
359 int bit = sensor_attr->index & 0x07;
360 u8 val;
361
47efe877 362 if (nr == ALARM_STATUS) {
6800c3d0
RM		 363 val = (data->alarms[index] >> (bit)) & 1;
364 } else { /* BEEP_ENABLE */
365 val = (data->beeps[index] >> (bit)) & 1;
366 }
367
368 return sprintf(buf, "%u\n", val);
369}
370
371static ssize_t
372store_beep(struct device *dev, struct device_attribute *attr,
373 const char *buf, size_t count)
374{
375 struct i2c_client *client = to_i2c_client(dev);
376 struct w83793_data *data = i2c_get_clientdata(client);
377 struct sensor_device_attribute_2 *sensor_attr =
378 to_sensor_dev_attr_2(attr);
379 int index = sensor_attr->index >> 3;
380 int shift = sensor_attr->index & 0x07;
381 u8 beep_bit = 1 << shift;
47efe877
GR		 382 unsigned long val;
383 int err;
6800c3d0 384
47efe877
GR		 385 err = kstrtoul(buf, 10, &val);
386 if (err)
387 return err;
388
389 if (val > 1)
6800c3d0
RM		 390 return -EINVAL;
391
392 mutex_lock(&data->update_lock);
393 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
394 data->beeps[index] &= ~beep_bit;
395 data->beeps[index] |= val << shift;
396 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
397 mutex_unlock(&data->update_lock);
398
399 return count;
400}
401
402static ssize_t
403show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
404{
405 struct w83793_data *data = w83793_update_device(dev);
406 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
407}
408
409static ssize_t
410store_beep_enable(struct device *dev, struct device_attribute *attr,
411 const char *buf, size_t count)
412{
413 struct i2c_client *client = to_i2c_client(dev);
414 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 415 unsigned long val;
416 int err;
417
418 err = kstrtoul(buf, 10, &val);
419 if (err)
420 return err;
6800c3d0 421
47efe877 422 if (val > 1)
6800c3d0
RM		 423 return -EINVAL;
424
425 mutex_lock(&data->update_lock);
426 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
427 & 0xfd;
428 data->beep_enable |= val << 1;
429 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
430 mutex_unlock(&data->update_lock);
431
432 return count;
433}
434
a516dc3e
JD		 435/* Write 0 to clear chassis alarm */
436static ssize_t
437store_chassis_clear(struct device *dev,
438 struct device_attribute *attr, const char *buf,
439 size_t count)
440{
441 struct i2c_client *client = to_i2c_client(dev);
442 struct w83793_data *data = i2c_get_clientdata(client);
443 unsigned long val;
444 u8 reg;
47efe877 445 int err;
a516dc3e 446
47efe877
GR		 447 err = kstrtoul(buf, 10, &val);
448 if (err)
449 return err;
450 if (val)
a516dc3e
JD		 451 return -EINVAL;
452
453 mutex_lock(&data->update_lock);
454 reg = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
455 w83793_write_value(client, W83793_REG_CLR_CHASSIS, reg | 0x80);
456 data->valid = 0; /* Force cache refresh */
457 mutex_unlock(&data->update_lock);
458 return count;
459}
460
6800c3d0
RM		 461#define FAN_INPUT 0
462#define FAN_MIN 1
463static ssize_t
464show_fan(struct device *dev, struct device_attribute *attr, char *buf)
465{
466 struct sensor_device_attribute_2 *sensor_attr =
467 to_sensor_dev_attr_2(attr);
468 int nr = sensor_attr->nr;
469 int index = sensor_attr->index;
470 struct w83793_data *data = w83793_update_device(dev);
471 u16 val;
472
47efe877 473 if (nr == FAN_INPUT)
6800c3d0 474 val = data->fan[index] & 0x0fff;
47efe877 475 else
6800c3d0 476 val = data->fan_min[index] & 0x0fff;
6800c3d0
RM		 477
478 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
479}
480
481static ssize_t
482store_fan_min(struct device *dev, struct device_attribute *attr,
483 const char *buf, size_t count)
484{
485 struct sensor_device_attribute_2 *sensor_attr =
486 to_sensor_dev_attr_2(attr);
487 int index = sensor_attr->index;
488 struct i2c_client *client = to_i2c_client(dev);
489 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 490 unsigned long val;
491 int err;
492
493 err = kstrtoul(buf, 10, &val);
494 if (err)
495 return err;
496 val = FAN_TO_REG(val);
6800c3d0
RM		 497
498 mutex_lock(&data->update_lock);
499 data->fan_min[index] = val;
500 w83793_write_value(client, W83793_REG_FAN_MIN(index),
501 (val >> 8) & 0xff);
502 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
503 mutex_unlock(&data->update_lock);
504
505 return count;
506}
507
6800c3d0
RM		 508static ssize_t
509show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
510{
511 struct sensor_device_attribute_2 *sensor_attr =
512 to_sensor_dev_attr_2(attr);
513 struct w83793_data *data = w83793_update_device(dev);
514 u16 val;
515 int nr = sensor_attr->nr;
516 int index = sensor_attr->index;
517
47efe877 518 if (nr == PWM_STOP_TIME)
6800c3d0
RM		 519 val = TIME_FROM_REG(data->pwm_stop_time[index]);
520 else
521 val = (data->pwm[index][nr] & 0x3f) << 2;
522
523 return sprintf(buf, "%d\n", val);
524}
525
526static ssize_t
527store_pwm(struct device *dev, struct device_attribute *attr,
528 const char *buf, size_t count)
529{
530 struct i2c_client *client = to_i2c_client(dev);
531 struct w83793_data *data = i2c_get_clientdata(client);
532 struct sensor_device_attribute_2 *sensor_attr =
533 to_sensor_dev_attr_2(attr);
534 int nr = sensor_attr->nr;
535 int index = sensor_attr->index;
47efe877
GR		 536 unsigned long val;
537 int err;
538
539 err = kstrtoul(buf, 10, &val);
540 if (err)
541 return err;
6800c3d0
RM		 542
543 mutex_lock(&data->update_lock);
47efe877
GR		 544 if (nr == PWM_STOP_TIME) {
545 val = TIME_TO_REG(val);
6800c3d0
RM		 546 data->pwm_stop_time[index] = val;
547 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
548 val);
549 } else {
2a844c14 550 val = clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 551 data->pwm[index][nr] =
552 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
553 data->pwm[index][nr] |= val;
554 w83793_write_value(client, W83793_REG_PWM(index, nr),
555 data->pwm[index][nr]);
556 }
557
558 mutex_unlock(&data->update_lock);
559 return count;
560}
561
562static ssize_t
563show_temp(struct device *dev, struct device_attribute *attr, char *buf)
564{
565 struct sensor_device_attribute_2 *sensor_attr =
566 to_sensor_dev_attr_2(attr);
567 int nr = sensor_attr->nr;
568 int index = sensor_attr->index;
569 struct w83793_data *data = w83793_update_device(dev);
570 long temp = TEMP_FROM_REG(data->temp[index][nr]);
571
47efe877 572 if (nr == TEMP_READ && index < 4) { /* Only TD1-TD4 have low bits */
6800c3d0
RM		 573 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
574 temp += temp > 0 ? low : -low;
575 }
576 return sprintf(buf, "%ld\n", temp);
577}
578
579static ssize_t
580store_temp(struct device *dev, struct device_attribute *attr,
581 const char *buf, size_t count)
582{
583 struct sensor_device_attribute_2 *sensor_attr =
584 to_sensor_dev_attr_2(attr);
585 int nr = sensor_attr->nr;
586 int index = sensor_attr->index;
587 struct i2c_client *client = to_i2c_client(dev);
588 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 589 long tmp;
590 int err;
591
592 err = kstrtol(buf, 10, &tmp);
593 if (err)
594 return err;
6800c3d0
RM		 595
596 mutex_lock(&data->update_lock);
597 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
598 w83793_write_value(client, W83793_REG_TEMP[index][nr],
599 data->temp[index][nr]);
600 mutex_unlock(&data->update_lock);
601 return count;
602}
603
604/*
47efe877
GR		 605 * TD1-TD4
606 * each has 4 mode:(2 bits)
607 * 0: Stop monitor
608 * 1: Use internal temp sensor(default)
609 * 2: Reserved
610 * 3: Use sensor in Intel CPU and get result by PECI
611 *
612 * TR1-TR2
613 * each has 2 mode:(1 bit)
614 * 0: Disable temp sensor monitor
615 * 1: To enable temp sensors monitor
616 */
6800c3d0 617
ddca933b
GJ		 618/* 0 disable, 6 PECI */
619static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 620
621static ssize_t
622show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
623{
624 struct w83793_data *data = w83793_update_device(dev);
625 struct sensor_device_attribute_2 *sensor_attr =
626 to_sensor_dev_attr_2(attr);
627 int index = sensor_attr->index;
628 u8 mask = (index < 4) ? 0x03 : 0x01;
629 u8 shift = (index < 4) ? (2 * index) : (index - 4);
630 u8 tmp;
631 index = (index < 4) ? 0 : 1;
632
633 tmp = (data->temp_mode[index] >> shift) & mask;
634
635 /* for the internal sensor, found out if diode or thermistor */
47efe877 636 if (tmp == 1)
6800c3d0 637 tmp = index == 0 ? 3 : 4;
47efe877 638 else
6800c3d0 639 tmp = TO_TEMP_MODE[tmp];
6800c3d0
RM		 640
641 return sprintf(buf, "%d\n", tmp);
642}
643
644static ssize_t
645store_temp_mode(struct device *dev, struct device_attribute *attr,
646 const char *buf, size_t count)
647{
648 struct i2c_client *client = to_i2c_client(dev);
649 struct w83793_data *data = i2c_get_clientdata(client);
650 struct sensor_device_attribute_2 *sensor_attr =
651 to_sensor_dev_attr_2(attr);
652 int index = sensor_attr->index;
653 u8 mask = (index < 4) ? 0x03 : 0x01;
654 u8 shift = (index < 4) ? (2 * index) : (index - 4);
47efe877
GR		 655 unsigned long val;
656 int err;
657
658 err = kstrtoul(buf, 10, &val);
659 if (err)
660 return err;
6800c3d0
RM		 661
662 /* transform the sysfs interface values into table above */
ddca933b 663 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 664 val -= 3;
665 } else if ((val == 3 && index < 4)
46bed4df 666 || (val == 4 && index >= 4)) {
6800c3d0
RM		 667 /* transform diode or thermistor into internal enable */
668 val = !!val;
669 } else {
670 return -EINVAL;
671 }
672
673 index = (index < 4) ? 0 : 1;
674 mutex_lock(&data->update_lock);
675 data->temp_mode[index] =
676 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
677 data->temp_mode[index] &= ~(mask << shift);
678 data->temp_mode[index] |= val << shift;
679 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
680 data->temp_mode[index]);
681 mutex_unlock(&data->update_lock);
682
683 return count;
684}
685
686#define SETUP_PWM_DEFAULT 0
687#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
688#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
689#define SETUP_TEMP_CRITICAL 3
690static ssize_t
691show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
692{
693 struct sensor_device_attribute_2 *sensor_attr =
694 to_sensor_dev_attr_2(attr);
695 int nr = sensor_attr->nr;
696 struct w83793_data *data = w83793_update_device(dev);
697 u32 val = 0;
698
47efe877 699 if (nr == SETUP_PWM_DEFAULT)
6800c3d0 700 val = (data->pwm_default & 0x3f) << 2;
47efe877 701 else if (nr == SETUP_PWM_UPTIME)
6800c3d0 702 val = TIME_FROM_REG(data->pwm_uptime);
47efe877 703 else if (nr == SETUP_PWM_DOWNTIME)
6800c3d0 704 val = TIME_FROM_REG(data->pwm_downtime);
47efe877 705 else if (nr == SETUP_TEMP_CRITICAL)
6800c3d0 706 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
6800c3d0
RM		 707
708 return sprintf(buf, "%d\n", val);
709}
710
711static ssize_t
712store_sf_setup(struct device *dev, struct device_attribute *attr,
713 const char *buf, size_t count)
714{
715 struct sensor_device_attribute_2 *sensor_attr =
716 to_sensor_dev_attr_2(attr);
717 int nr = sensor_attr->nr;
718 struct i2c_client *client = to_i2c_client(dev);
719 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 720 long val;
721 int err;
722
723 err = kstrtol(buf, 10, &val);
724 if (err)
725 return err;
6800c3d0
RM		 726
727 mutex_lock(&data->update_lock);
47efe877 728 if (nr == SETUP_PWM_DEFAULT) {
6800c3d0
RM		 729 data->pwm_default =
730 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
2a844c14 731 data->pwm_default |= clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 732 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
733 data->pwm_default);
47efe877
GR		 734 } else if (nr == SETUP_PWM_UPTIME) {
735 data->pwm_uptime = TIME_TO_REG(val);
6800c3d0
RM		 736 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
737 w83793_write_value(client, W83793_REG_PWM_UPTIME,
738 data->pwm_uptime);
47efe877
GR		 739 } else if (nr == SETUP_PWM_DOWNTIME) {
740 data->pwm_downtime = TIME_TO_REG(val);
6800c3d0
RM		 741 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
742 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
743 data->pwm_downtime);
744 } else { /* SETUP_TEMP_CRITICAL */
745 data->temp_critical =
746 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
47efe877 747 data->temp_critical |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 748 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
749 data->temp_critical);
750 }
751
752 mutex_unlock(&data->update_lock);
753 return count;
754}
755
756/*
47efe877
GR		 757 * Temp SmartFan control
758 * TEMP_FAN_MAP
759 * Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
760 * It's possible two or more temp channels control the same fan, w83793
761 * always prefers to pick the most critical request and applies it to
762 * the related Fan.
763 * It's possible one fan is not in any mapping of 6 temp channels, this
764 * means the fan is manual mode
765 *
766 * TEMP_PWM_ENABLE
767 * Each temp channel has its own SmartFan mode, and temp channel
768 * control fans that are set by TEMP_FAN_MAP
769 * 0: SmartFanII mode
770 * 1: Thermal Cruise Mode
771 *
772 * TEMP_CRUISE
773 * Target temperature in thermal cruise mode, w83793 will try to turn
774 * fan speed to keep the temperature of target device around this
775 * temperature.
776 *
777 * TEMP_TOLERANCE
778 * If Temp higher or lower than target with this tolerance, w83793
779 * will take actions to speed up or slow down the fan to keep the
780 * temperature within the tolerance range.
781 */
6800c3d0
RM		 782
783#define TEMP_FAN_MAP 0
784#define TEMP_PWM_ENABLE 1
785#define TEMP_CRUISE 2
786#define TEMP_TOLERANCE 3
787static ssize_t
788show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
789{
790 struct sensor_device_attribute_2 *sensor_attr =
791 to_sensor_dev_attr_2(attr);
792 int nr = sensor_attr->nr;
793 int index = sensor_attr->index;
794 struct w83793_data *data = w83793_update_device(dev);
795 u32 val;
796
47efe877 797 if (nr == TEMP_FAN_MAP) {
6800c3d0 798 val = data->temp_fan_map[index];
47efe877 799 } else if (nr == TEMP_PWM_ENABLE) {
84fb029f 800 /* +2 to transform into 2 and 3 to conform with sysfs intf */
6800c3d0 801 val = ((data->pwm_enable >> index) & 0x01) + 2;
47efe877 802 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 803 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
804 } else { /* TEMP_TOLERANCE */
805 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
806 val = TEMP_FROM_REG(val & 0x0f);
807 }
808 return sprintf(buf, "%d\n", val);
809}
810
811static ssize_t
812store_sf_ctrl(struct device *dev, struct device_attribute *attr,
813 const char *buf, size_t count)
814{
815 struct sensor_device_attribute_2 *sensor_attr =
816 to_sensor_dev_attr_2(attr);
817 int nr = sensor_attr->nr;
818 int index = sensor_attr->index;
819 struct i2c_client *client = to_i2c_client(dev);
820 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 821 long val;
822 int err;
823
824 err = kstrtol(buf, 10, &val);
825 if (err)
826 return err;
6800c3d0
RM		 827
828 mutex_lock(&data->update_lock);
47efe877 829 if (nr == TEMP_FAN_MAP) {
2a844c14 830 val = clamp_val(val, 0, 255);
6800c3d0
RM		 831 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
832 data->temp_fan_map[index] = val;
47efe877
GR		 833 } else if (nr == TEMP_PWM_ENABLE) {
834 if (val == 2 || val == 3) {
6800c3d0
RM		 835 data->pwm_enable =
836 w83793_read_value(client, W83793_REG_PWM_ENABLE);
837 if (val - 2)
838 data->pwm_enable |= 1 << index;
839 else
840 data->pwm_enable &= ~(1 << index);
841 w83793_write_value(client, W83793_REG_PWM_ENABLE,
842 data->pwm_enable);
843 } else {
844 mutex_unlock(&data->update_lock);
845 return -EINVAL;
846 }
47efe877 847 } else if (nr == TEMP_CRUISE) {
6800c3d0
RM		 848 data->temp_cruise[index] =
849 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
6800c3d0 850 data->temp_cruise[index] &= 0x80;
47efe877 851 data->temp_cruise[index] |= TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 852
853 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
854 data->temp_cruise[index]);
855 } else { /* TEMP_TOLERANCE */
856 int i = index >> 1;
857 u8 shift = (index & 0x01) ? 4 : 0;
858 data->tolerance[i] =
859 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
860
6800c3d0 861 data->tolerance[i] &= ~(0x0f << shift);
47efe877 862 data->tolerance[i] |= TEMP_TO_REG(val, 0, 0x0f) << shift;
6800c3d0
RM		 863 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
864 data->tolerance[i]);
865 }
866
867 mutex_unlock(&data->update_lock);
868 return count;
869}
870
871static ssize_t
872show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
873{
874 struct sensor_device_attribute_2 *sensor_attr =
875 to_sensor_dev_attr_2(attr);
876 int nr = sensor_attr->nr;
877 int index = sensor_attr->index;
878 struct w83793_data *data = w83793_update_device(dev);
879
880 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
881}
882
883static ssize_t
884store_sf2_pwm(struct device *dev, struct device_attribute *attr,
885 const char *buf, size_t count)
886{
887 struct i2c_client *client = to_i2c_client(dev);
888 struct w83793_data *data = i2c_get_clientdata(client);
889 struct sensor_device_attribute_2 *sensor_attr =
890 to_sensor_dev_attr_2(attr);
891 int nr = sensor_attr->nr;
892 int index = sensor_attr->index;
47efe877
GR		 893 unsigned long val;
894 int err;
895
896 err = kstrtoul(buf, 10, &val);
897 if (err)
898 return err;
2a844c14 899 val = clamp_val(val, 0, 0xff) >> 2;
6800c3d0
RM		 900
901 mutex_lock(&data->update_lock);
902 data->sf2_pwm[index][nr] =
903 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
904 data->sf2_pwm[index][nr] |= val;
905 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
906 data->sf2_pwm[index][nr]);
907 mutex_unlock(&data->update_lock);
908 return count;
909}
910
911static ssize_t
912show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
913{
914 struct sensor_device_attribute_2 *sensor_attr =
915 to_sensor_dev_attr_2(attr);
916 int nr = sensor_attr->nr;
917 int index = sensor_attr->index;
918 struct w83793_data *data = w83793_update_device(dev);
919
920 return sprintf(buf, "%ld\n",
921 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
922}
923
924static ssize_t
925store_sf2_temp(struct device *dev, struct device_attribute *attr,
926 const char *buf, size_t count)
927{
928 struct i2c_client *client = to_i2c_client(dev);
929 struct w83793_data *data = i2c_get_clientdata(client);
930 struct sensor_device_attribute_2 *sensor_attr =
931 to_sensor_dev_attr_2(attr);
932 int nr = sensor_attr->nr;
933 int index = sensor_attr->index;
47efe877
GR		 934 long val;
935 int err;
936
937 err = kstrtol(buf, 10, &val);
938 if (err)
939 return err;
940 val = TEMP_TO_REG(val, 0, 0x7f);
6800c3d0
RM		 941
942 mutex_lock(&data->update_lock);
943 data->sf2_temp[index][nr] =
944 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
945 data->sf2_temp[index][nr] |= val;
946 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
947 data->sf2_temp[index][nr]);
948 mutex_unlock(&data->update_lock);
949 return count;
950}
951
952/* only Vcore A/B and Vtt have additional 2 bits precision */
953static ssize_t
954show_in(struct device *dev, struct device_attribute *attr, char *buf)
955{
956 struct sensor_device_attribute_2 *sensor_attr =
957 to_sensor_dev_attr_2(attr);
958 int nr = sensor_attr->nr;
959 int index = sensor_attr->index;
960 struct w83793_data *data = w83793_update_device(dev);
961 u16 val = data->in[index][nr];
962
963 if (index < 3) {
964 val <<= 2;
965 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
966 }
ddca933b
GJ		 967 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
968 val = val * scale_in[index] + scale_in_add[index];
969 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 970}
971
972static ssize_t
973store_in(struct device *dev, struct device_attribute *attr,
974 const char *buf, size_t count)
975{
976 struct sensor_device_attribute_2 *sensor_attr =
977 to_sensor_dev_attr_2(attr);
978 int nr = sensor_attr->nr;
979 int index = sensor_attr->index;
980 struct i2c_client *client = to_i2c_client(dev);
981 struct w83793_data *data = i2c_get_clientdata(client);
47efe877
GR		 982 unsigned long val;
983 int err;
984
985 err = kstrtoul(buf, 10, &val);
986 if (err)
987 return err;
988 val = (val + scale_in[index] / 2) / scale_in[index];
6800c3d0 989
6800c3d0
RM		 990 mutex_lock(&data->update_lock);
991 if (index > 2) {
ddca933b 992 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
47efe877 993 if (nr == 1 || nr == 2)
ddca933b 994 val -= scale_in_add[index] / scale_in[index];
2a844c14 995 val = clamp_val(val, 0, 255);
6800c3d0 996 } else {
2a844c14 997 val = clamp_val(val, 0, 0x3FF);
6800c3d0
RM		 998 data->in_low_bits[nr] =
999 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
1000 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
1001 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
1002 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
1003 data->in_low_bits[nr]);
1004 val >>= 2;
1005 }
1006 data->in[index][nr] = val;
1007 w83793_write_value(client, W83793_REG_IN[index][nr],
1008 data->in[index][nr]);
1009 mutex_unlock(&data->update_lock);
1010 return count;
1011}
1012
1013#define NOT_USED -1
1014
1015#define SENSOR_ATTR_IN(index) \
1016 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1017 IN_READ, index), \
1018 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1019 store_in, IN_MAX, index), \
1020 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1021 store_in, IN_LOW, index), \
1022 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1023 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
1024 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1025 show_alarm_beep, store_beep, BEEP_ENABLE, \
1026 index + ((index > 2) ? 1 : 0))
1027
1028#define SENSOR_ATTR_FAN(index) \
1029 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1030 NULL, ALARM_STATUS, index + 17), \
1031 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1032 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
1033 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1034 NULL, FAN_INPUT, index - 1), \
1035 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1036 show_fan, store_fan_min, FAN_MIN, index - 1)
1037
1038#define SENSOR_ATTR_PWM(index) \
1039 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1040 store_pwm, PWM_DUTY, index - 1), \
1041 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1042 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1043 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1044 show_pwm, store_pwm, PWM_START, index - 1), \
1045 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1046 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
1047
1048#define SENSOR_ATTR_TEMP(index) \
1049 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1050 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1051 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1052 NULL, TEMP_READ, index - 1), \
1053 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1054 store_temp, TEMP_CRIT, index - 1), \
1055 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1056 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1057 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1058 store_temp, TEMP_WARN, index - 1), \
1059 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1060 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1061 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1062 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
1063 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1064 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
1065 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
1066 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
1067 TEMP_FAN_MAP, index - 1), \
1068 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1069 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
1070 index - 1), \
1071 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
1072 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
1073 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
1074 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
1075 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1076 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
1077 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1078 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
1079 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1080 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
1081 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1082 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
1083 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1084 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
1085 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1086 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
1087 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1088 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
1089 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1090 show_sf2_temp, store_sf2_temp, 0, index - 1), \
1091 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1092 show_sf2_temp, store_sf2_temp, 1, index - 1), \
1093 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1094 show_sf2_temp, store_sf2_temp, 2, index - 1), \
1095 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1096 show_sf2_temp, store_sf2_temp, 3, index - 1), \
1097 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1098 show_sf2_temp, store_sf2_temp, 4, index - 1), \
1099 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1100 show_sf2_temp, store_sf2_temp, 5, index - 1), \
1101 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1102 show_sf2_temp, store_sf2_temp, 6, index - 1)
1103
1104static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
1105 SENSOR_ATTR_IN(0),
1106 SENSOR_ATTR_IN(1),
1107 SENSOR_ATTR_IN(2),
1108 SENSOR_ATTR_IN(3),
1109 SENSOR_ATTR_IN(4),
1110 SENSOR_ATTR_IN(5),
1111 SENSOR_ATTR_IN(6),
1112 SENSOR_ATTR_IN(7),
1113 SENSOR_ATTR_IN(8),
1114 SENSOR_ATTR_IN(9),
6800c3d0
RM		 1115 SENSOR_ATTR_FAN(1),
1116 SENSOR_ATTR_FAN(2),
1117 SENSOR_ATTR_FAN(3),
1118 SENSOR_ATTR_FAN(4),
1119 SENSOR_ATTR_FAN(5),
1120 SENSOR_ATTR_PWM(1),
1121 SENSOR_ATTR_PWM(2),
1122 SENSOR_ATTR_PWM(3),
1123};
1124
46bed4df
GJ		 1125static struct sensor_device_attribute_2 w83793_temp[] = {
1126 SENSOR_ATTR_TEMP(1),
1127 SENSOR_ATTR_TEMP(2),
1128 SENSOR_ATTR_TEMP(3),
1129 SENSOR_ATTR_TEMP(4),
1130 SENSOR_ATTR_TEMP(5),
1131 SENSOR_ATTR_TEMP(6),
1132};
1133
6800c3d0
RM		 1134/* Fan6-Fan12 */
1135static struct sensor_device_attribute_2 w83793_left_fan[] = {
1136 SENSOR_ATTR_FAN(6),
1137 SENSOR_ATTR_FAN(7),
1138 SENSOR_ATTR_FAN(8),
1139 SENSOR_ATTR_FAN(9),
1140 SENSOR_ATTR_FAN(10),
1141 SENSOR_ATTR_FAN(11),
1142 SENSOR_ATTR_FAN(12),
1143};
1144
1145/* Pwm4-Pwm8 */
1146static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1147 SENSOR_ATTR_PWM(4),
1148 SENSOR_ATTR_PWM(5),
1149 SENSOR_ATTR_PWM(6),
1150 SENSOR_ATTR_PWM(7),
1151 SENSOR_ATTR_PWM(8),
1152};
1153
c70a8c34 1154static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1155 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1156 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1157};
329beb71 1158static DEVICE_ATTR_RW(vrm);
c70a8c34
GJ		 1159
1160static struct sensor_device_attribute_2 sda_single_files[] = {
a516dc3e 1161 SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep,
6800c3d0
RM		 1162 store_chassis_clear, ALARM_STATUS, 30),
1163 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1164 store_beep_enable, NOT_USED, NOT_USED),
1165 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1166 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1167 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1168 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1169 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1170 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1171 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1172 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1173};
1174
1175static void w83793_init_client(struct i2c_client *client)
1176{
47efe877 1177 if (reset)
6800c3d0 1178 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
6800c3d0
RM		 1179
1180 /* Start monitoring */
1181 w83793_write_value(client, W83793_REG_CONFIG,
1182 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
5852f960
SA		 1183}
1184
1185/*
1186 * Watchdog routines
1187 */
1188
1189static int watchdog_set_timeout(struct w83793_data *data, int timeout)
1190{
26336c8a
DC		 1191 unsigned int mtimeout;
1192 int ret;
5852f960
SA		 1193
1194 mtimeout = DIV_ROUND_UP(timeout, 60);
1195
1196 if (mtimeout > 255)
1197 return -EINVAL;
1198
1199 mutex_lock(&data->watchdog_lock);
1200 if (!data->client) {
1201 ret = -ENODEV;
1202 goto leave;
1203 }
1204
1205 data->watchdog_timeout = mtimeout;
1206
1207 /* Set Timeout value (in Minutes) */
1208 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1209 data->watchdog_timeout);
1210
1211 ret = mtimeout * 60;
1212
1213leave:
1214 mutex_unlock(&data->watchdog_lock);
1215 return ret;
1216}
1217
1218static int watchdog_get_timeout(struct w83793_data *data)
1219{
1220 int timeout;
1221
1222 mutex_lock(&data->watchdog_lock);
1223 timeout = data->watchdog_timeout * 60;
1224 mutex_unlock(&data->watchdog_lock);
1225
1226 return timeout;
1227}
1228
1229static int watchdog_trigger(struct w83793_data *data)
1230{
1231 int ret = 0;
1232
1233 mutex_lock(&data->watchdog_lock);
1234 if (!data->client) {
1235 ret = -ENODEV;
1236 goto leave;
1237 }
1238
1239 /* Set Timeout value (in Minutes) */
1240 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1241 data->watchdog_timeout);
1242
1243leave:
1244 mutex_unlock(&data->watchdog_lock);
1245 return ret;
1246}
1247
1248static int watchdog_enable(struct w83793_data *data)
1249{
1250 int ret = 0;
1251
1252 mutex_lock(&data->watchdog_lock);
1253 if (!data->client) {
1254 ret = -ENODEV;
1255 goto leave;
1256 }
1257
1258 /* Set initial timeout */
1259 w83793_write_value(data->client, W83793_REG_WDT_TIMEOUT,
1260 data->watchdog_timeout);
1261
1262 /* Enable Soft Watchdog */
1263 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0x55);
1264
1265leave:
1266 mutex_unlock(&data->watchdog_lock);
1267 return ret;
1268}
1269
1270static int watchdog_disable(struct w83793_data *data)
1271{
1272 int ret = 0;
1273
1274 mutex_lock(&data->watchdog_lock);
1275 if (!data->client) {
1276 ret = -ENODEV;
1277 goto leave;
1278 }
1279
1280 /* Disable Soft Watchdog */
1281 w83793_write_value(data->client, W83793_REG_WDT_LOCK, 0xAA);
1282
1283leave:
1284 mutex_unlock(&data->watchdog_lock);
1285 return ret;
1286}
1287
1288static int watchdog_open(struct inode *inode, struct file *filp)
1289{
1290 struct w83793_data *pos, *data = NULL;
1291 int watchdog_is_open;
1292
47efe877
GR		 1293 /*
1294 * We get called from drivers/char/misc.c with misc_mtx hold, and we
1295 * call misc_register() from w83793_probe() with watchdog_data_mutex
1296 * hold, as misc_register() takes the misc_mtx lock, this is a possible
1297 * deadlock, so we use mutex_trylock here.
1298 */
5852f960
SA		 1299 if (!mutex_trylock(&watchdog_data_mutex))
1300 return -ERESTARTSYS;
1301 list_for_each_entry(pos, &watchdog_data_list, list) {
1302 if (pos->watchdog_miscdev.minor == iminor(inode)) {
1303 data = pos;
1304 break;
1305 }
1306 }
1307
1308 /* Check, if device is already open */
1309 watchdog_is_open = test_and_set_bit(0, &data->watchdog_is_open);
1310
47efe877
GR		 1311 /*
1312 * Increase data reference counter (if not already done).
1313 * Note we can never not have found data, so we don't check for this
1314 */
5852f960
SA		 1315 if (!watchdog_is_open)
1316 kref_get(&data->kref);
1317
1318 mutex_unlock(&watchdog_data_mutex);
1319
1320 /* Check, if device is already open and possibly issue error */
1321 if (watchdog_is_open)
1322 return -EBUSY;
1323
1324 /* Enable Soft Watchdog */
1325 watchdog_enable(data);
1326
1327 /* Store pointer to data into filp's private data */
1328 filp->private_data = data;
1329
c5bf68fe 1330 return stream_open(inode, filp);
5852f960
SA		 1331}
1332
1333static int watchdog_close(struct inode *inode, struct file *filp)
1334{
1335 struct w83793_data *data = filp->private_data;
6800c3d0 1336
5852f960
SA		 1337 if (data->watchdog_expect_close) {
1338 watchdog_disable(data);
1339 data->watchdog_expect_close = 0;
1340 } else {
1341 watchdog_trigger(data);
1342 dev_crit(&data->client->dev,
1343 "unexpected close, not stopping watchdog!\n");
1344 }
1345
1346 clear_bit(0, &data->watchdog_is_open);
1347
1348 /* Decrease data reference counter */
1349 mutex_lock(&watchdog_data_mutex);
1350 kref_put(&data->kref, w83793_release_resources);
1351 mutex_unlock(&watchdog_data_mutex);
1352
1353 return 0;
1354}
1355
1356static ssize_t watchdog_write(struct file *filp, const char __user *buf,
1357 size_t count, loff_t *offset)
1358{
3f7cd7ea 1359 ssize_t ret;
5852f960
SA		 1360 struct w83793_data *data = filp->private_data;
1361
1362 if (count) {
1363 if (!nowayout) {
1364 size_t i;
1365
1366 /* Clear it in case it was set with a previous write */
1367 data->watchdog_expect_close = 0;
1368
1369 for (i = 0; i != count; i++) {
1370 char c;
1371 if (get_user(c, buf + i))
1372 return -EFAULT;
1373 if (c == 'V')
1374 data->watchdog_expect_close = 1;
1375 }
1376 }
1377 ret = watchdog_trigger(data);
1378 if (ret < 0)
1379 return ret;
1380 }
1381 return count;
1382}
1383
55929332
AB		 1384static long watchdog_ioctl(struct file *filp, unsigned int cmd,
1385 unsigned long arg)
5852f960 1386{
36c7fe13 1387 struct watchdog_info ident = {
5852f960
SA		 1388 .options = WDIOF_KEEPALIVEPING |
1389 WDIOF_SETTIMEOUT |
1390 WDIOF_CARDRESET,
1391 .identity = "w83793 watchdog"
1392 };
1393
1394 int val, ret = 0;
1395 struct w83793_data *data = filp->private_data;
1396
1397 switch (cmd) {
1398 case WDIOC_GETSUPPORT:
1399 if (!nowayout)
1400 ident.options |= WDIOF_MAGICCLOSE;
1401 if (copy_to_user((void __user *)arg, &ident, sizeof(ident)))
1402 ret = -EFAULT;
1403 break;
1404
1405 case WDIOC_GETSTATUS:
1406 val = data->watchdog_caused_reboot ? WDIOF_CARDRESET : 0;
1407 ret = put_user(val, (int __user *)arg);
1408 break;
1409
1410 case WDIOC_GETBOOTSTATUS:
1411 ret = put_user(0, (int __user *)arg);
1412 break;
1413
1414 case WDIOC_KEEPALIVE:
1415 ret = watchdog_trigger(data);
1416 break;
1417
1418 case WDIOC_GETTIMEOUT:
1419 val = watchdog_get_timeout(data);
1420 ret = put_user(val, (int __user *)arg);
1421 break;
1422
1423 case WDIOC_SETTIMEOUT:
1424 if (get_user(val, (int __user *)arg)) {
1425 ret = -EFAULT;
1426 break;
1427 }
1428 ret = watchdog_set_timeout(data, val);
1429 if (ret > 0)
1430 ret = put_user(ret, (int __user *)arg);
1431 break;
1432
1433 case WDIOC_SETOPTIONS:
1434 if (get_user(val, (int __user *)arg)) {
1435 ret = -EFAULT;
1436 break;
1437 }
1438
1439 if (val & WDIOS_DISABLECARD)
1440 ret = watchdog_disable(data);
1441 else if (val & WDIOS_ENABLECARD)
1442 ret = watchdog_enable(data);
1443 else
1444 ret = -EINVAL;
1445
1446 break;
1447 default:
1448 ret = -ENOTTY;
1449 }
5852f960
SA		 1450 return ret;
1451}
1452
1453static const struct file_operations watchdog_fops = {
1454 .owner = THIS_MODULE,
1455 .llseek = no_llseek,
1456 .open = watchdog_open,
1457 .release = watchdog_close,
1458 .write = watchdog_write,
55929332 1459 .unlocked_ioctl = watchdog_ioctl,
b6dfb247 1460 .compat_ioctl = compat_ptr_ioctl,
5852f960
SA		 1461};
1462
1463/*
1464 * Notifier for system down
1465 */
1466
1467static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
1468 void *unused)
1469{
1470 struct w83793_data *data = NULL;
1471
1472 if (code == SYS_DOWN || code == SYS_HALT) {
1473
1474 /* Disable each registered watchdog */
1475 mutex_lock(&watchdog_data_mutex);
1476 list_for_each_entry(data, &watchdog_data_list, list) {
1477 if (data->watchdog_miscdev.minor)
1478 watchdog_disable(data);
1479 }
1480 mutex_unlock(&watchdog_data_mutex);
1481 }
1482
1483 return NOTIFY_DONE;
6800c3d0
RM		 1484}
1485
5852f960
SA		 1486/*
1487 * The WDT needs to learn about soft shutdowns in order to
1488 * turn the timebomb registers off.
1489 */
1490
1491static struct notifier_block watchdog_notifier = {
1492 .notifier_call = watchdog_notify_sys,
1493};
1494
1495/*
1496 * Init / remove routines
1497 */
1498
a7f13a6e 1499static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1500{
1501 struct w83793_data *data = i2c_get_clientdata(client);
1502 struct device *dev = &client->dev;
5852f960
SA		 1503 int i, tmp;
1504
1505 /* Unregister the watchdog (if registered) */
1506 if (data->watchdog_miscdev.minor) {
1507 misc_deregister(&data->watchdog_miscdev);
1508
1509 if (data->watchdog_is_open) {
1510 dev_warn(&client->dev,
1511 "i2c client detached with watchdog open! "
1512 "Stopping watchdog.\n");
1513 watchdog_disable(data);
1514 }
1515
1516 mutex_lock(&watchdog_data_mutex);
1517 list_del(&data->list);
1518 mutex_unlock(&watchdog_data_mutex);
1519
1520 /* Tell the watchdog code the client is gone */
1521 mutex_lock(&data->watchdog_lock);
1522 data->client = NULL;
1523 mutex_unlock(&data->watchdog_lock);
1524 }
1525
1526 /* Reset Configuration Register to Disable Watch Dog Registers */
1527 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1528 w83793_write_value(client, W83793_REG_CONFIG, tmp & ~0x04);
1529
1530 unregister_reboot_notifier(&watchdog_notifier);
6800c3d0 1531
a7f13a6e 1532 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1533
a7f13a6e
JD		 1534 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1535 device_remove_file(dev,
1536 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1537
a7f13a6e
JD		 1538 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1539 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1540
a7f13a6e
JD		 1541 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1542 device_remove_file(dev, &w83793_vid[i].dev_attr);
1543 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1544
a7f13a6e
JD		 1545 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1546 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1547
a7f13a6e
JD		 1548 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1549 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1550
a7f13a6e
JD		 1551 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1552 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1553
5852f960
SA		 1554 /* Decrease data reference counter */
1555 mutex_lock(&watchdog_data_mutex);
1556 kref_put(&data->kref, w83793_release_resources);
1557 mutex_unlock(&watchdog_data_mutex);
6800c3d0
RM		 1558
1559 return 0;
1560}
1561
1562static int
a7f13a6e 1563w83793_detect_subclients(struct i2c_client *client)
6800c3d0 1564{
cf48d176 1565 int i, id;
a7f13a6e 1566 int address = client->addr;
6800c3d0 1567 u8 tmp;
a7f13a6e 1568 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1569 struct w83793_data *data = i2c_get_clientdata(client);
1570
1571 id = i2c_adapter_id(adapter);
1572 if (force_subclients[0] == id && force_subclients[1] == address) {
1573 for (i = 2; i <= 3; i++) {
1574 if (force_subclients[i] < 0x48
1575 || force_subclients[i] > 0x4f) {
1576 dev_err(&client->dev,
1577 "invalid subclient "
1578 "address %d; must be 0x48-0x4f\n",
1579 force_subclients[i]);
cf48d176 1580 return -EINVAL;
6800c3d0
RM		 1581 }
1582 }
1583 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1584 (force_subclients[2] & 0x07) |
1585 ((force_subclients[3] & 0x07) << 4));
1586 }
1587
1588 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
47efe877 1589 if (!(tmp & 0x08))
cf48d176
WS		 1590 data->lm75[0] = devm_i2c_new_dummy_device(&client->dev, adapter,
1591 0x48 + (tmp & 0x7));
6800c3d0 1592 if (!(tmp & 0x80)) {
cf48d176 1593 if (!IS_ERR(data->lm75[0])
6800c3d0
RM		 1594 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1595 dev_err(&client->dev,
1596 "duplicate addresses 0x%x, "
1597 "use force_subclients\n", data->lm75[0]->addr);
cf48d176 1598 return -ENODEV;
6800c3d0 1599 }
cf48d176
WS		 1600 data->lm75[1] = devm_i2c_new_dummy_device(&client->dev, adapter,
1601 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1602 }
1603
1604 return 0;
6800c3d0
RM		 1605}
1606
a7f13a6e 1607/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1608static int w83793_detect(struct i2c_client *client,
a7f13a6e 1609 struct i2c_board_info *info)
6800c3d0 1610{
52df6440 1611 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1612 struct i2c_adapter *adapter = client->adapter;
1613 unsigned short address = client->addr;
6800c3d0 1614
47efe877 1615 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
a7f13a6e 1616 return -ENODEV;
6800c3d0 1617
a7f13a6e 1618 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1619
52df6440
JD		 1620 tmp = bank & 0x80 ? 0x5c : 0xa3;
1621 /* Check Winbond vendor ID */
1622 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1623 pr_debug("w83793: Detection failed at check vendor id\n");
1624 return -ENODEV;
6800c3d0
RM		 1625 }
1626
47efe877
GR		 1627 /*
1628 * If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1629 * should match
1630 */
52df6440
JD		 1631 if ((bank & 0x07) == 0
1632 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1633 (address << 1)) {
1634 pr_debug("w83793: Detection failed at check i2c addr\n");
1635 return -ENODEV;
6800c3d0
RM		 1636 }
1637
52df6440
JD		 1638 /* Determine the chip type now */
1639 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1640 if (chip_id != 0x7b)
1641 return -ENODEV;
1642
a7f13a6e
JD		 1643 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1644
1645 return 0;
1646}
6800c3d0 1647
16b237f5 1648static int w83793_probe(struct i2c_client *client)
a7f13a6e
JD		 1649{
1650 struct device *dev = &client->dev;
7a76a7f3
CIK		 1651 static const int watchdog_minors[] = {
1652 WATCHDOG_MINOR, 212, 213, 214, 215
1653 };
a7f13a6e
JD		 1654 struct w83793_data *data;
1655 int i, tmp, val, err;
1656 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1657 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1658 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1659
1660 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1661 if (!data) {
1662 err = -ENOMEM;
1663 goto exit;
1664 }
1665
1666 i2c_set_clientdata(client, data);
1667 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1668 mutex_init(&data->update_lock);
5852f960
SA		 1669 mutex_init(&data->watchdog_lock);
1670 INIT_LIST_HEAD(&data->list);
1671 kref_init(&data->kref);
1672
47efe877
GR		 1673 /*
1674 * Store client pointer in our data struct for watchdog usage
1675 * (where the client is found through a data ptr instead of the
1676 * otherway around)
1677 */
5852f960 1678 data->client = client;
6800c3d0 1679
a7f13a6e
JD		 1680 err = w83793_detect_subclients(client);
1681 if (err)
6800c3d0
RM		 1682 goto free_mem;
1683
6800c3d0
RM		 1684 /* Initialize the chip */
1685 w83793_init_client(client);
1686
6800c3d0 1687 /*
47efe877
GR		 1688 * Only fan 1-5 has their own input pins,
1689 * Pwm 1-3 has their own pins
6800c3d0
RM		 1690 */
1691 data->has_fan = 0x1f;
1692 data->has_pwm = 0x07;
1693 tmp = w83793_read_value(client, W83793_REG_MFC);
1694 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1695
1696 /* check the function of pins 49-56 */
93c75a4a
JD		 1697 if (tmp & 0x80) {
1698 data->has_vid |= 0x2; /* has VIDB */
1699 } else {
6800c3d0
RM		 1700 data->has_pwm |= 0x18; /* pwm 4,5 */
1701 if (val & 0x01) { /* fan 6 */
1702 data->has_fan |= 0x20;
1703 data->has_pwm |= 0x20;
1704 }
1705 if (val & 0x02) { /* fan 7 */
1706 data->has_fan |= 0x40;
1707 data->has_pwm |= 0x40;
1708 }
1709 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1710 data->has_fan |= 0x80;
1711 data->has_pwm |= 0x80;
1712 }
1713 }
1714
93c75a4a
JD		 1715 /* check the function of pins 37-40 */
1716 if (!(tmp & 0x29))
1717 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1718 if (0x08 == (tmp & 0x0c)) {
1719 if (val & 0x08) /* fan 9 */
1720 data->has_fan |= 0x100;
1721 if (val & 0x10) /* fan 10 */
1722 data->has_fan |= 0x200;
1723 }
6800c3d0
RM		 1724 if (0x20 == (tmp & 0x30)) {
1725 if (val & 0x20) /* fan 11 */
1726 data->has_fan |= 0x400;
1727 if (val & 0x40) /* fan 12 */
1728 data->has_fan |= 0x800;
1729 }
1730
1731 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1732 data->has_fan |= 0x80;
1733 data->has_pwm |= 0x80;
1734 }
1735
c9294315
RM		 1736 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1737 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1738 data->has_fan |= 0x100;
1739 }
1740 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1741 data->has_fan |= 0x200;
1742 }
1743 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1744 data->has_fan |= 0x400;
1745 }
1746 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1747 data->has_fan |= 0x800;
1748 }
1749
46bed4df 1750 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
47efe877 1751 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[0]);
46bed4df
GJ		 1752 if (tmp & 0x01)
1753 data->has_temp |= 0x01;
1754 if (tmp & 0x04)
1755 data->has_temp |= 0x02;
1756 if (tmp & 0x10)
1757 data->has_temp |= 0x04;
1758 if (tmp & 0x40)
1759 data->has_temp |= 0x08;
1760
47efe877 1761 tmp = w83793_read_value(client, W83793_REG_TEMP_MODE[1]);
46bed4df
GJ		 1762 if (tmp & 0x01)
1763 data->has_temp |= 0x10;
1764 if (tmp & 0x02)
1765 data->has_temp |= 0x20;
1766
6800c3d0
RM		 1767 /* Register sysfs hooks */
1768 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1769 err = device_create_file(dev,
1770 &w83793_sensor_attr_2[i].dev_attr);
1771 if (err)
1772 goto exit_remove;
1773 }
1774
c70a8c34
GJ		 1775 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1776 if (!(data->has_vid & (1 << i)))
1777 continue;
1778 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1779 if (err)
1780 goto exit_remove;
1781 }
93c75a4a
JD		 1782 if (data->has_vid) {
1783 data->vrm = vid_which_vrm();
1784 err = device_create_file(dev, &dev_attr_vrm);
1785 if (err)
1786 goto exit_remove;
1787 }
c70a8c34 1788
6800c3d0
RM		 1789 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1790 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1791 if (err)
1792 goto exit_remove;
1793
1794 }
1795
46bed4df
GJ		 1796 for (i = 0; i < 6; i++) {
1797 int j;
1798 if (!(data->has_temp & (1 << i)))
1799 continue;
1800 for (j = 0; j < files_temp; j++) {
1801 err = device_create_file(dev,
1802 &w83793_temp[(i) * files_temp
1803 + j].dev_attr);
1804 if (err)
1805 goto exit_remove;
1806 }
1807 }
1808
6800c3d0
RM		 1809 for (i = 5; i < 12; i++) {
1810 int j;
1811 if (!(data->has_fan & (1 << i)))
1812 continue;
1813 for (j = 0; j < files_fan; j++) {
1814 err = device_create_file(dev,
1815 &w83793_left_fan[(i - 5) * files_fan
1816 + j].dev_attr);
1817 if (err)
1818 goto exit_remove;
1819 }
1820 }
1821
1822 for (i = 3; i < 8; i++) {
1823 int j;
1824 if (!(data->has_pwm & (1 << i)))
1825 continue;
1826 for (j = 0; j < files_pwm; j++) {
1827 err = device_create_file(dev,
1828 &w83793_left_pwm[(i - 3) * files_pwm
1829 + j].dev_attr);
1830 if (err)
1831 goto exit_remove;
1832 }
1833 }
1834
1beeffe4
TJ		 1835 data->hwmon_dev = hwmon_device_register(dev);
1836 if (IS_ERR(data->hwmon_dev)) {
1837 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1838 goto exit_remove;
1839 }
1840
5852f960
SA		 1841 /* Watchdog initialization */
1842
1843 /* Register boot notifier */
1844 err = register_reboot_notifier(&watchdog_notifier);
1845 if (err != 0) {
1846 dev_err(&client->dev,
1847 "cannot register reboot notifier (err=%d)\n", err);
1848 goto exit_devunreg;
1849 }
1850
47efe877
GR		 1851 /*
1852 * Enable Watchdog registers.
1853 * Set Configuration Register to Enable Watch Dog Registers
1854 * (Bit 2) = XXXX, X1XX.
1855 */
5852f960
SA		 1856 tmp = w83793_read_value(client, W83793_REG_CONFIG);
1857 w83793_write_value(client, W83793_REG_CONFIG, tmp | 0x04);
1858
1859 /* Set the default watchdog timeout */
1860 data->watchdog_timeout = timeout;
1861
1862 /* Check, if last reboot was caused by watchdog */
1863 data->watchdog_caused_reboot =
1864 w83793_read_value(data->client, W83793_REG_WDT_STATUS) & 0x01;
1865
1866 /* Disable Soft Watchdog during initialiation */
1867 watchdog_disable(data);
1868
47efe877
GR		 1869 /*
1870 * We take the data_mutex lock early so that watchdog_open() cannot
1871 * run when misc_register() has completed, but we've not yet added
1872 * our data to the watchdog_data_list (and set the default timeout)
1873 */
5852f960
SA		 1874 mutex_lock(&watchdog_data_mutex);
1875 for (i = 0; i < ARRAY_SIZE(watchdog_minors); i++) {
1876 /* Register our watchdog part */
1877 snprintf(data->watchdog_name, sizeof(data->watchdog_name),
1878 "watchdog%c", (i == 0) ? '\0' : ('0' + i));
1879 data->watchdog_miscdev.name = data->watchdog_name;
1880 data->watchdog_miscdev.fops = &watchdog_fops;
1881 data->watchdog_miscdev.minor = watchdog_minors[i];
1882
1883 err = misc_register(&data->watchdog_miscdev);
1884 if (err == -EBUSY)
1885 continue;
1886 if (err) {
1887 data->watchdog_miscdev.minor = 0;
1888 dev_err(&client->dev,
1889 "Registering watchdog chardev: %d\n", err);
1890 break;
1891 }
1892
1893 list_add(&data->list, &watchdog_data_list);
1894
1895 dev_info(&client->dev,
1896 "Registered watchdog chardev major 10, minor: %d\n",
1897 watchdog_minors[i]);
1898 break;
1899 }
1900 if (i == ARRAY_SIZE(watchdog_minors)) {
1901 data->watchdog_miscdev.minor = 0;
b55f3757
GR		 1902 dev_warn(&client->dev,
1903 "Couldn't register watchdog chardev (due to no free minor)\n");
5852f960
SA		 1904 }
1905
1906 mutex_unlock(&watchdog_data_mutex);
1907
6800c3d0
RM		 1908 return 0;
1909
5852f960
SA		 1910 /* Unregister hwmon device */
1911
1912exit_devunreg:
1913
1914 hwmon_device_unregister(data->hwmon_dev);
1915
6800c3d0
RM		 1916 /* Unregister sysfs hooks */
1917
1918exit_remove:
1919 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1920 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1921
1922 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1923 device_remove_file(dev, &sda_single_files[i].dev_attr);
1924
c70a8c34
GJ		 1925 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1926 device_remove_file(dev, &w83793_vid[i].dev_attr);
1927
6800c3d0
RM		 1928 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1929 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1930
1931 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1932 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1933
46bed4df
GJ		 1934 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1935 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0
RM		 1936free_mem:
1937 kfree(data);
1938exit:
1939 return err;
1940}
1941
1942static void w83793_update_nonvolatile(struct device *dev)
1943{
1944 struct i2c_client *client = to_i2c_client(dev);
1945 struct w83793_data *data = i2c_get_clientdata(client);
1946 int i, j;
1947 /*
47efe877
GR		 1948 * They are somewhat "stable" registers, and to update them every time
1949 * takes so much time, it's just not worthy. Update them in a long
1950 * interval to avoid exception.
6800c3d0
RM		 1951 */
1952 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1953 || !data->valid))
1954 return;
1955 /* update voltage limits */
1956 for (i = 1; i < 3; i++) {
1957 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1958 data->in[j][i] =
1959 w83793_read_value(client, W83793_REG_IN[j][i]);
1960 }
1961 data->in_low_bits[i] =
1962 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1963 }
1964
1965 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1966 /* Update the Fan measured value and limits */
47efe877 1967 if (!(data->has_fan & (1 << i)))
6800c3d0 1968 continue;
6800c3d0
RM		 1969 data->fan_min[i] =
1970 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1971 data->fan_min[i] |=
1972 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1973 }
1974
1975 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1976 if (!(data->has_temp & (1 << i)))
1977 continue;
6800c3d0
RM		 1978 data->temp_fan_map[i] =
1979 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1980 for (j = 1; j < 5; j++) {
1981 data->temp[i][j] =
1982 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1983 }
1984 data->temp_cruise[i] =
1985 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1986 for (j = 0; j < 7; j++) {
1987 data->sf2_pwm[i][j] =
1988 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1989 data->sf2_temp[i][j] =
1990 w83793_read_value(client,
1991 W83793_REG_SF2_TEMP(i, j));
1992 }
1993 }
1994
1995 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1996 data->temp_mode[i] =
1997 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
1998
1999 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
2000 data->tolerance[i] =
2001 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
2002 }
2003
2004 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2005 if (!(data->has_pwm & (1 << i)))
2006 continue;
2007 data->pwm[i][PWM_NONSTOP] =
2008 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
2009 data->pwm[i][PWM_START] =
2010 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
2011 data->pwm_stop_time[i] =
2012 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
2013 }
2014
2015 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
2016 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
2017 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
2018 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
2019 data->temp_critical =
2020 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
2021 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
2022
47efe877 2023 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
6800c3d0 2024 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
6800c3d0
RM		 2025
2026 data->last_nonvolatile = jiffies;
2027}
2028
2029static struct w83793_data *w83793_update_device(struct device *dev)
2030{
2031 struct i2c_client *client = to_i2c_client(dev);
2032 struct w83793_data *data = i2c_get_clientdata(client);
2033 int i;
2034
2035 mutex_lock(&data->update_lock);
2036
2037 if (!(time_after(jiffies, data->last_updated + HZ * 2)
2038 || !data->valid))
2039 goto END;
2040
2041 /* Update the voltages measured value and limits */
2042 for (i = 0; i < ARRAY_SIZE(data->in); i++)
2043 data->in[i][IN_READ] =
2044 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
2045
2046 data->in_low_bits[IN_READ] =
2047 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
2048
2049 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
47efe877 2050 if (!(data->has_fan & (1 << i)))
6800c3d0 2051 continue;
6800c3d0
RM		 2052 data->fan[i] =
2053 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
2054 data->fan[i] |=
2055 w83793_read_value(client, W83793_REG_FAN(i) + 1);
2056 }
2057
46bed4df
GJ		 2058 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
2059 if (!(data->has_temp & (1 << i)))
2060 continue;
6800c3d0
RM		 2061 data->temp[i][TEMP_READ] =
2062 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 2063 }
6800c3d0
RM		 2064
2065 data->temp_low_bits =
2066 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
2067
2068 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
2069 if (data->has_pwm & (1 << i))
2070 data->pwm[i][PWM_DUTY] =
2071 w83793_read_value(client,
2072 W83793_REG_PWM(i, PWM_DUTY));
2073 }
2074
2075 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
2076 data->alarms[i] =
2077 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 2078 if (data->has_vid & 0x01)
2079 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
2080 if (data->has_vid & 0x02)
2081 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 2082 w83793_update_nonvolatile(dev);
2083 data->last_updated = jiffies;
2084 data->valid = 1;
2085
2086END:
2087 mutex_unlock(&data->update_lock);
2088 return data;
2089}
2090
47efe877
GR		 2091/*
2092 * Ignore the possibility that somebody change bank outside the driver
2093 * Must be called with data->update_lock held, except during initialization
2094 */
6800c3d0
RM		 2095static u8 w83793_read_value(struct i2c_client *client, u16 reg)
2096{
2097 struct w83793_data *data = i2c_get_clientdata(client);
58a24b52 2098 u8 res;
6800c3d0
RM		 2099 u8 new_bank = reg >> 8;
2100
2101 new_bank |= data->bank & 0xfc;
2102 if (data->bank != new_bank) {
2103 if (i2c_smbus_write_byte_data
2104 (client, W83793_REG_BANKSEL, new_bank) >= 0)
2105 data->bank = new_bank;
2106 else {
2107 dev_err(&client->dev,
2108 "set bank to %d failed, fall back "
2109 "to bank %d, read reg 0x%x error\n",
2110 new_bank, data->bank, reg);
2111 res = 0x0; /* read 0x0 from the chip */
2112 goto END;
2113 }
2114 }
2115 res = i2c_smbus_read_byte_data(client, reg & 0xff);
2116END:
2117 return res;
2118}
2119
2120/* Must be called with data->update_lock held, except during initialization */
2121static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
2122{
2123 struct w83793_data *data = i2c_get_clientdata(client);
2124 int res;
2125 u8 new_bank = reg >> 8;
2126
2127 new_bank |= data->bank & 0xfc;
2128 if (data->bank != new_bank) {
47efe877
GR		 2129 res = i2c_smbus_write_byte_data(client, W83793_REG_BANKSEL,
2130 new_bank);
2131 if (res < 0) {
6800c3d0
RM		 2132 dev_err(&client->dev,
2133 "set bank to %d failed, fall back "
2134 "to bank %d, write reg 0x%x error\n",
2135 new_bank, data->bank, reg);
2136 goto END;
2137 }
47efe877 2138 data->bank = new_bank;
6800c3d0
RM		 2139 }
2140
2141 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
2142END:
2143 return res;
2144}
2145
f0967eea 2146module_i2c_driver(w83793_driver);
6800c3d0 2147
5852f960 2148MODULE_AUTHOR("Yuan Mu, Sven Anders");
6800c3d0
RM		 2149MODULE_DESCRIPTION("w83793 driver");
2150MODULE_LICENSE("GPL");
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