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792d376b WS |
1 | /* |
2 | * w83795.c - Linux kernel driver for hardware monitoring | |
3 | * Copyright (C) 2008 Nuvoton Technology Corp. | |
4 | * Wei Song | |
e3760b43 | 5 | * Copyright (C) 2010 Jean Delvare <khali@linux-fr.org> |
792d376b WS |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation - version 2. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
19 | * 02110-1301 USA. | |
20 | * | |
21 | * Supports following chips: | |
22 | * | |
23 | * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA | |
24 | * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no | |
25 | * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no | |
26 | */ | |
27 | ||
28 | #include <linux/kernel.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/i2c.h> | |
33 | #include <linux/hwmon.h> | |
34 | #include <linux/hwmon-sysfs.h> | |
35 | #include <linux/err.h> | |
36 | #include <linux/mutex.h> | |
37 | #include <linux/delay.h> | |
38 | ||
39 | /* Addresses to scan */ | |
86ef4d2f JD |
40 | static const unsigned short normal_i2c[] = { |
41 | 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END | |
42 | }; | |
792d376b | 43 | |
792d376b WS |
44 | |
45 | static int reset; | |
46 | module_param(reset, bool, 0); | |
47 | MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended"); | |
48 | ||
49 | ||
50 | #define W83795_REG_BANKSEL 0x00 | |
51 | #define W83795_REG_VENDORID 0xfd | |
52 | #define W83795_REG_CHIPID 0xfe | |
53 | #define W83795_REG_DEVICEID 0xfb | |
2be381de | 54 | #define W83795_REG_DEVICEID_A 0xff |
792d376b WS |
55 | |
56 | #define W83795_REG_I2C_ADDR 0xfc | |
57 | #define W83795_REG_CONFIG 0x01 | |
58 | #define W83795_REG_CONFIG_CONFIG48 0x04 | |
80646b95 | 59 | #define W83795_REG_CONFIG_START 0x01 |
792d376b WS |
60 | |
61 | /* Multi-Function Pin Ctrl Registers */ | |
62 | #define W83795_REG_VOLT_CTRL1 0x02 | |
63 | #define W83795_REG_VOLT_CTRL2 0x03 | |
64 | #define W83795_REG_TEMP_CTRL1 0x04 | |
65 | #define W83795_REG_TEMP_CTRL2 0x05 | |
66 | #define W83795_REG_FANIN_CTRL1 0x06 | |
67 | #define W83795_REG_FANIN_CTRL2 0x07 | |
68 | #define W83795_REG_VMIGB_CTRL 0x08 | |
69 | ||
792d376b WS |
70 | #define TEMP_READ 0 |
71 | #define TEMP_CRIT 1 | |
72 | #define TEMP_CRIT_HYST 2 | |
73 | #define TEMP_WARN 3 | |
74 | #define TEMP_WARN_HYST 4 | |
75 | /* only crit and crit_hyst affect real-time alarm status | |
76 | * current crit crit_hyst warn warn_hyst */ | |
86ef4d2f | 77 | static const u16 W83795_REG_TEMP[][5] = { |
792d376b WS |
78 | {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */ |
79 | {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */ | |
80 | {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */ | |
81 | {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */ | |
82 | {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */ | |
83 | {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */ | |
84 | }; | |
85 | ||
86 | #define IN_READ 0 | |
87 | #define IN_MAX 1 | |
88 | #define IN_LOW 2 | |
89 | static const u16 W83795_REG_IN[][3] = { | |
90 | /* Current, HL, LL */ | |
91 | {0x10, 0x70, 0x71}, /* VSEN1 */ | |
92 | {0x11, 0x72, 0x73}, /* VSEN2 */ | |
93 | {0x12, 0x74, 0x75}, /* VSEN3 */ | |
94 | {0x13, 0x76, 0x77}, /* VSEN4 */ | |
95 | {0x14, 0x78, 0x79}, /* VSEN5 */ | |
96 | {0x15, 0x7a, 0x7b}, /* VSEN6 */ | |
97 | {0x16, 0x7c, 0x7d}, /* VSEN7 */ | |
98 | {0x17, 0x7e, 0x7f}, /* VSEN8 */ | |
99 | {0x18, 0x80, 0x81}, /* VSEN9 */ | |
100 | {0x19, 0x82, 0x83}, /* VSEN10 */ | |
101 | {0x1A, 0x84, 0x85}, /* VSEN11 */ | |
102 | {0x1B, 0x86, 0x87}, /* VTT */ | |
103 | {0x1C, 0x88, 0x89}, /* 3VDD */ | |
104 | {0x1D, 0x8a, 0x8b}, /* 3VSB */ | |
105 | {0x1E, 0x8c, 0x8d}, /* VBAT */ | |
106 | {0x1F, 0xa6, 0xa7}, /* VSEN12 */ | |
107 | {0x20, 0xaa, 0xab}, /* VSEN13 */ | |
108 | {0x21, 0x96, 0x97}, /* VSEN14 */ | |
109 | {0x22, 0x9a, 0x9b}, /* VSEN15 */ | |
110 | {0x23, 0x9e, 0x9f}, /* VSEN16 */ | |
111 | {0x24, 0xa2, 0xa3}, /* VSEN17 */ | |
112 | }; | |
113 | #define W83795_REG_VRLSB 0x3C | |
792d376b WS |
114 | |
115 | static const u8 W83795_REG_IN_HL_LSB[] = { | |
116 | 0x8e, /* VSEN1-4 */ | |
117 | 0x90, /* VSEN5-8 */ | |
118 | 0x92, /* VSEN9-11 */ | |
119 | 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */ | |
120 | 0xa8, /* VSEN12 */ | |
121 | 0xac, /* VSEN13 */ | |
122 | 0x98, /* VSEN14 */ | |
123 | 0x9c, /* VSEN15 */ | |
124 | 0xa0, /* VSEN16 */ | |
125 | 0xa4, /* VSEN17 */ | |
126 | }; | |
127 | ||
128 | #define IN_LSB_REG(index, type) \ | |
129 | (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \ | |
130 | : (W83795_REG_IN_HL_LSB[(index)] + 1)) | |
131 | ||
792d376b WS |
132 | #define IN_LSB_SHIFT 0 |
133 | #define IN_LSB_IDX 1 | |
134 | static const u8 IN_LSB_SHIFT_IDX[][2] = { | |
135 | /* High/Low LSB shift, LSB No. */ | |
136 | {0x00, 0x00}, /* VSEN1 */ | |
137 | {0x02, 0x00}, /* VSEN2 */ | |
138 | {0x04, 0x00}, /* VSEN3 */ | |
139 | {0x06, 0x00}, /* VSEN4 */ | |
140 | {0x00, 0x01}, /* VSEN5 */ | |
141 | {0x02, 0x01}, /* VSEN6 */ | |
142 | {0x04, 0x01}, /* VSEN7 */ | |
143 | {0x06, 0x01}, /* VSEN8 */ | |
144 | {0x00, 0x02}, /* VSEN9 */ | |
145 | {0x02, 0x02}, /* VSEN10 */ | |
146 | {0x04, 0x02}, /* VSEN11 */ | |
147 | {0x00, 0x03}, /* VTT */ | |
148 | {0x02, 0x03}, /* 3VDD */ | |
149 | {0x04, 0x03}, /* 3VSB */ | |
150 | {0x06, 0x03}, /* VBAT */ | |
151 | {0x06, 0x04}, /* VSEN12 */ | |
152 | {0x06, 0x05}, /* VSEN13 */ | |
153 | {0x06, 0x06}, /* VSEN14 */ | |
154 | {0x06, 0x07}, /* VSEN15 */ | |
155 | {0x06, 0x08}, /* VSEN16 */ | |
156 | {0x06, 0x09}, /* VSEN17 */ | |
157 | }; | |
158 | ||
159 | ||
792d376b WS |
160 | #define W83795_REG_FAN(index) (0x2E + (index)) |
161 | #define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index)) | |
162 | #define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2) | |
163 | #define W83795_REG_FAN_MIN_LSB_SHIFT(index) \ | |
7eb8d508 | 164 | (((index) & 1) ? 4 : 0) |
792d376b WS |
165 | |
166 | #define W83795_REG_VID_CTRL 0x6A | |
167 | ||
cf6b9ea6 JD |
168 | #define W83795_REG_ALARM_CTRL 0x40 |
169 | #define ALARM_CTRL_RTSACS (1 << 7) | |
792d376b | 170 | #define W83795_REG_ALARM(index) (0x41 + (index)) |
792d376b | 171 | #define W83795_REG_CLR_CHASSIS 0x4D |
cf6b9ea6 | 172 | #define W83795_REG_BEEP(index) (0x50 + (index)) |
792d376b WS |
173 | |
174 | ||
792d376b WS |
175 | #define W83795_REG_FCMS1 0x201 |
176 | #define W83795_REG_FCMS2 0x208 | |
177 | #define W83795_REG_TFMR(index) (0x202 + (index)) | |
178 | #define W83795_REG_FOMC 0x20F | |
792d376b WS |
179 | |
180 | #define W83795_REG_TSS(index) (0x209 + (index)) | |
181 | ||
edff2f8d JD |
182 | #define TSS_MAP_RESERVED 0xff |
183 | static const u8 tss_map[4][6] = { | |
184 | { 0, 1, 2, 3, 4, 5}, | |
185 | { 6, 7, 8, 9, 0, 1}, | |
186 | {10, 11, 12, 13, 2, 3}, | |
187 | { 4, 5, 4, 5, TSS_MAP_RESERVED, TSS_MAP_RESERVED}, | |
188 | }; | |
189 | ||
792d376b | 190 | #define PWM_OUTPUT 0 |
fd7f82b8 JD |
191 | #define PWM_FREQ 1 |
192 | #define PWM_START 2 | |
193 | #define PWM_NONSTOP 3 | |
194 | #define PWM_STOP_TIME 4 | |
195 | #define W83795_REG_PWM(index, nr) (0x210 + (nr) * 8 + (index)) | |
792d376b | 196 | |
792d376b WS |
197 | #define W83795_REG_FTSH(index) (0x240 + (index) * 2) |
198 | #define W83795_REG_FTSL(index) (0x241 + (index) * 2) | |
199 | #define W83795_REG_TFTS 0x250 | |
200 | ||
201 | #define TEMP_PWM_TTTI 0 | |
202 | #define TEMP_PWM_CTFS 1 | |
203 | #define TEMP_PWM_HCT 2 | |
204 | #define TEMP_PWM_HOT 3 | |
205 | #define W83795_REG_TTTI(index) (0x260 + (index)) | |
206 | #define W83795_REG_CTFS(index) (0x268 + (index)) | |
207 | #define W83795_REG_HT(index) (0x270 + (index)) | |
208 | ||
209 | #define SF4_TEMP 0 | |
210 | #define SF4_PWM 1 | |
211 | #define W83795_REG_SF4_TEMP(temp_num, index) \ | |
212 | (0x280 + 0x10 * (temp_num) + (index)) | |
213 | #define W83795_REG_SF4_PWM(temp_num, index) \ | |
214 | (0x288 + 0x10 * (temp_num) + (index)) | |
215 | ||
216 | #define W83795_REG_DTSC 0x301 | |
217 | #define W83795_REG_DTSE 0x302 | |
218 | #define W83795_REG_DTS(index) (0x26 + (index)) | |
54891a3c | 219 | #define W83795_REG_PECI_TBASE(index) (0x320 + (index)) |
792d376b WS |
220 | |
221 | #define DTS_CRIT 0 | |
222 | #define DTS_CRIT_HYST 1 | |
223 | #define DTS_WARN 2 | |
224 | #define DTS_WARN_HYST 3 | |
225 | #define W83795_REG_DTS_EXT(index) (0xB2 + (index)) | |
226 | ||
227 | #define SETUP_PWM_DEFAULT 0 | |
228 | #define SETUP_PWM_UPTIME 1 | |
229 | #define SETUP_PWM_DOWNTIME 2 | |
230 | #define W83795_REG_SETUP_PWM(index) (0x20C + (index)) | |
231 | ||
232 | static inline u16 in_from_reg(u8 index, u16 val) | |
233 | { | |
49c7347a JD |
234 | /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */ |
235 | if (index >= 12 && index <= 14) | |
792d376b WS |
236 | return val * 6; |
237 | else | |
238 | return val * 2; | |
239 | } | |
240 | ||
241 | static inline u16 in_to_reg(u8 index, u16 val) | |
242 | { | |
49c7347a | 243 | if (index >= 12 && index <= 14) |
792d376b WS |
244 | return val / 6; |
245 | else | |
246 | return val / 2; | |
247 | } | |
248 | ||
249 | static inline unsigned long fan_from_reg(u16 val) | |
250 | { | |
6c82b2f3 | 251 | if ((val == 0xfff) || (val == 0)) |
792d376b WS |
252 | return 0; |
253 | return 1350000UL / val; | |
254 | } | |
255 | ||
256 | static inline u16 fan_to_reg(long rpm) | |
257 | { | |
258 | if (rpm <= 0) | |
259 | return 0x0fff; | |
260 | return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe); | |
261 | } | |
262 | ||
263 | static inline unsigned long time_from_reg(u8 reg) | |
264 | { | |
265 | return reg * 100; | |
266 | } | |
267 | ||
268 | static inline u8 time_to_reg(unsigned long val) | |
269 | { | |
270 | return SENSORS_LIMIT((val + 50) / 100, 0, 0xff); | |
271 | } | |
272 | ||
273 | static inline long temp_from_reg(s8 reg) | |
274 | { | |
275 | return reg * 1000; | |
276 | } | |
277 | ||
278 | static inline s8 temp_to_reg(long val, s8 min, s8 max) | |
279 | { | |
dd127f5c | 280 | return SENSORS_LIMIT(val / 1000, min, max); |
792d376b WS |
281 | } |
282 | ||
01879a85 JD |
283 | static const u16 pwm_freq_cksel0[16] = { |
284 | 1024, 512, 341, 256, 205, 171, 146, 128, | |
285 | 85, 64, 32, 16, 8, 4, 2, 1 | |
286 | }; | |
287 | ||
288 | static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin) | |
289 | { | |
290 | unsigned long base_clock; | |
291 | ||
292 | if (reg & 0x80) { | |
293 | base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); | |
294 | return base_clock / ((reg & 0x7f) + 1); | |
295 | } else | |
296 | return pwm_freq_cksel0[reg & 0x0f]; | |
297 | } | |
298 | ||
299 | static u8 pwm_freq_to_reg(unsigned long val, u16 clkin) | |
300 | { | |
301 | unsigned long base_clock; | |
302 | u8 reg0, reg1; | |
303 | unsigned long best0, best1; | |
304 | ||
305 | /* Best fit for cksel = 0 */ | |
306 | for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) { | |
307 | if (val > (pwm_freq_cksel0[reg0] + | |
308 | pwm_freq_cksel0[reg0 + 1]) / 2) | |
309 | break; | |
310 | } | |
311 | if (val < 375) /* cksel = 1 can't beat this */ | |
312 | return reg0; | |
313 | best0 = pwm_freq_cksel0[reg0]; | |
314 | ||
315 | /* Best fit for cksel = 1 */ | |
316 | base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256); | |
317 | reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128); | |
318 | best1 = base_clock / reg1; | |
319 | reg1 = 0x80 | (reg1 - 1); | |
320 | ||
321 | /* Choose the closest one */ | |
322 | if (abs(val - best0) > abs(val - best1)) | |
323 | return reg1; | |
324 | else | |
325 | return reg0; | |
326 | } | |
792d376b WS |
327 | |
328 | enum chip_types {w83795g, w83795adg}; | |
329 | ||
330 | struct w83795_data { | |
331 | struct device *hwmon_dev; | |
332 | struct mutex update_lock; | |
333 | unsigned long last_updated; /* In jiffies */ | |
334 | enum chip_types chip_type; | |
335 | ||
336 | u8 bank; | |
337 | ||
338 | u32 has_in; /* Enable monitor VIN or not */ | |
0e256018 | 339 | u8 has_dyn_in; /* Only in2-0 can have this */ |
792d376b WS |
340 | u16 in[21][3]; /* Register value, read/high/low */ |
341 | u8 in_lsb[10][3]; /* LSB Register value, high/low */ | |
342 | u8 has_gain; /* has gain: in17-20 * 8 */ | |
343 | ||
344 | u16 has_fan; /* Enable fan14-1 or not */ | |
345 | u16 fan[14]; /* Register value combine */ | |
346 | u16 fan_min[14]; /* Register value combine */ | |
347 | ||
348 | u8 has_temp; /* Enable monitor temp6-1 or not */ | |
dd127f5c | 349 | s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */ |
792d376b | 350 | u8 temp_read_vrlsb[6]; |
39deb699 | 351 | u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */ |
792d376b WS |
352 | u8 temp_src[3]; /* Register value */ |
353 | ||
354 | u8 enable_dts; /* Enable PECI and SB-TSI, | |
355 | * bit 0: =1 enable, =0 disable, | |
356 | * bit 1: =1 AMD SB-TSI, =0 Intel PECI */ | |
357 | u8 has_dts; /* Enable monitor DTS temp */ | |
dd127f5c | 358 | s8 dts[8]; /* Register value */ |
792d376b | 359 | u8 dts_read_vrlsb[8]; /* Register value */ |
dd127f5c | 360 | s8 dts_ext[4]; /* Register value */ |
792d376b WS |
361 | |
362 | u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2, | |
363 | * no config register, only affected by chip | |
364 | * type */ | |
fd7f82b8 JD |
365 | u8 pwm[8][5]; /* Register value, output, freq, start, |
366 | * non stop, stop time */ | |
01879a85 | 367 | u16 clkin; /* CLKIN frequency in kHz */ |
792d376b WS |
368 | u8 pwm_fcms[2]; /* Register value */ |
369 | u8 pwm_tfmr[6]; /* Register value */ | |
370 | u8 pwm_fomc; /* Register value */ | |
371 | ||
372 | u16 target_speed[8]; /* Register value, target speed for speed | |
373 | * cruise */ | |
374 | u8 tol_speed; /* tolerance of target speed */ | |
375 | u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */ | |
376 | u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */ | |
377 | ||
378 | u8 setup_pwm[3]; /* Register value */ | |
379 | ||
380 | u8 alarms[6]; /* Register value */ | |
381 | u8 beeps[6]; /* Register value */ | |
792d376b WS |
382 | |
383 | char valid; | |
2ae61de9 | 384 | char valid_limits; |
1bb3450c | 385 | char valid_pwm_config; |
792d376b WS |
386 | }; |
387 | ||
388 | /* | |
389 | * Hardware access | |
b2469f42 | 390 | * We assume that nobdody can change the bank outside the driver. |
792d376b WS |
391 | */ |
392 | ||
b2469f42 JD |
393 | /* Must be called with data->update_lock held, except during initialization */ |
394 | static int w83795_set_bank(struct i2c_client *client, u8 bank) | |
792d376b WS |
395 | { |
396 | struct w83795_data *data = i2c_get_clientdata(client); | |
b2469f42 JD |
397 | int err; |
398 | ||
399 | /* If the same bank is already set, nothing to do */ | |
400 | if ((data->bank & 0x07) == bank) | |
401 | return 0; | |
402 | ||
403 | /* Change to new bank, preserve all other bits */ | |
404 | bank |= data->bank & ~0x07; | |
405 | err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank); | |
406 | if (err < 0) { | |
407 | dev_err(&client->dev, | |
408 | "Failed to set bank to %d, err %d\n", | |
409 | (int)bank, err); | |
410 | return err; | |
792d376b | 411 | } |
b2469f42 JD |
412 | data->bank = bank; |
413 | ||
414 | return 0; | |
792d376b WS |
415 | } |
416 | ||
417 | /* Must be called with data->update_lock held, except during initialization */ | |
b2469f42 | 418 | static u8 w83795_read(struct i2c_client *client, u16 reg) |
792d376b | 419 | { |
b2469f42 JD |
420 | int err; |
421 | ||
422 | err = w83795_set_bank(client, reg >> 8); | |
423 | if (err < 0) | |
424 | return 0x00; /* Arbitrary */ | |
425 | ||
426 | err = i2c_smbus_read_byte_data(client, reg & 0xff); | |
427 | if (err < 0) { | |
428 | dev_err(&client->dev, | |
429 | "Failed to read from register 0x%03x, err %d\n", | |
430 | (int)reg, err); | |
431 | return 0x00; /* Arbitrary */ | |
792d376b | 432 | } |
b2469f42 JD |
433 | return err; |
434 | } | |
792d376b | 435 | |
b2469f42 JD |
436 | /* Must be called with data->update_lock held, except during initialization */ |
437 | static int w83795_write(struct i2c_client *client, u16 reg, u8 value) | |
438 | { | |
439 | int err; | |
440 | ||
441 | err = w83795_set_bank(client, reg >> 8); | |
442 | if (err < 0) | |
443 | return err; | |
444 | ||
445 | err = i2c_smbus_write_byte_data(client, reg & 0xff, value); | |
446 | if (err < 0) | |
447 | dev_err(&client->dev, | |
448 | "Failed to write to register 0x%03x, err %d\n", | |
449 | (int)reg, err); | |
450 | return err; | |
792d376b WS |
451 | } |
452 | ||
0d7237bf JD |
453 | static void w83795_update_limits(struct i2c_client *client) |
454 | { | |
455 | struct w83795_data *data = i2c_get_clientdata(client); | |
456 | int i, limit; | |
457 | ||
458 | /* Read the voltage limits */ | |
459 | for (i = 0; i < ARRAY_SIZE(data->in); i++) { | |
460 | if (!(data->has_in & (1 << i))) | |
461 | continue; | |
462 | data->in[i][IN_MAX] = | |
463 | w83795_read(client, W83795_REG_IN[i][IN_MAX]); | |
464 | data->in[i][IN_LOW] = | |
465 | w83795_read(client, W83795_REG_IN[i][IN_LOW]); | |
466 | } | |
467 | for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) { | |
468 | if ((i == 2 && data->chip_type == w83795adg) || | |
469 | (i >= 4 && !(data->has_in & (1 << (i + 11))))) | |
470 | continue; | |
471 | data->in_lsb[i][IN_MAX] = | |
472 | w83795_read(client, IN_LSB_REG(i, IN_MAX)); | |
473 | data->in_lsb[i][IN_LOW] = | |
474 | w83795_read(client, IN_LSB_REG(i, IN_LOW)); | |
475 | } | |
476 | ||
477 | /* Read the fan limits */ | |
478 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { | |
479 | u8 lsb; | |
480 | ||
481 | /* Each register contains LSB for 2 fans, but we want to | |
482 | * read it only once to save time */ | |
483 | if ((i & 1) == 0 && (data->has_fan & (3 << i))) | |
484 | lsb = w83795_read(client, W83795_REG_FAN_MIN_LSB(i)); | |
485 | ||
486 | if (!(data->has_fan & (1 << i))) | |
487 | continue; | |
488 | data->fan_min[i] = | |
489 | w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4; | |
490 | data->fan_min[i] |= | |
491 | (lsb >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F; | |
492 | } | |
493 | ||
494 | /* Read the temperature limits */ | |
495 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { | |
496 | if (!(data->has_temp & (1 << i))) | |
497 | continue; | |
498 | for (limit = TEMP_CRIT; limit <= TEMP_WARN_HYST; limit++) | |
499 | data->temp[i][limit] = | |
500 | w83795_read(client, W83795_REG_TEMP[i][limit]); | |
501 | } | |
502 | ||
503 | /* Read the DTS limits */ | |
eb02755a | 504 | if (data->enable_dts) { |
0d7237bf JD |
505 | for (limit = DTS_CRIT; limit <= DTS_WARN_HYST; limit++) |
506 | data->dts_ext[limit] = | |
507 | w83795_read(client, W83795_REG_DTS_EXT(limit)); | |
508 | } | |
509 | ||
510 | /* Read beep settings */ | |
511 | for (i = 0; i < ARRAY_SIZE(data->beeps); i++) | |
512 | data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i)); | |
2ae61de9 JD |
513 | |
514 | data->valid_limits = 1; | |
0d7237bf JD |
515 | } |
516 | ||
1bb3450c | 517 | static struct w83795_data *w83795_update_pwm_config(struct device *dev) |
0d7237bf | 518 | { |
1bb3450c | 519 | struct i2c_client *client = to_i2c_client(dev); |
0d7237bf JD |
520 | struct w83795_data *data = i2c_get_clientdata(client); |
521 | int i, tmp; | |
522 | ||
1bb3450c JD |
523 | mutex_lock(&data->update_lock); |
524 | ||
525 | if (data->valid_pwm_config) | |
526 | goto END; | |
527 | ||
0d7237bf JD |
528 | /* Read temperature source selection */ |
529 | for (i = 0; i < ARRAY_SIZE(data->temp_src); i++) | |
530 | data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i)); | |
531 | ||
532 | /* Read automatic fan speed control settings */ | |
533 | data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1); | |
534 | data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2); | |
535 | for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++) | |
536 | data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i)); | |
537 | data->pwm_fomc = w83795_read(client, W83795_REG_FOMC); | |
538 | for (i = 0; i < data->has_pwm; i++) { | |
539 | for (tmp = PWM_FREQ; tmp <= PWM_STOP_TIME; tmp++) | |
540 | data->pwm[i][tmp] = | |
541 | w83795_read(client, W83795_REG_PWM(i, tmp)); | |
542 | } | |
543 | for (i = 0; i < ARRAY_SIZE(data->target_speed); i++) { | |
544 | data->target_speed[i] = | |
545 | w83795_read(client, W83795_REG_FTSH(i)) << 4; | |
546 | data->target_speed[i] |= | |
547 | w83795_read(client, W83795_REG_FTSL(i)) >> 4; | |
548 | } | |
549 | data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f; | |
550 | ||
551 | for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) { | |
552 | data->pwm_temp[i][TEMP_PWM_TTTI] = | |
553 | w83795_read(client, W83795_REG_TTTI(i)) & 0x7f; | |
554 | data->pwm_temp[i][TEMP_PWM_CTFS] = | |
555 | w83795_read(client, W83795_REG_CTFS(i)); | |
556 | tmp = w83795_read(client, W83795_REG_HT(i)); | |
eb02755a | 557 | data->pwm_temp[i][TEMP_PWM_HCT] = tmp >> 4; |
0d7237bf JD |
558 | data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f; |
559 | } | |
560 | ||
561 | /* Read SmartFanIV trip points */ | |
562 | for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) { | |
563 | for (tmp = 0; tmp < 7; tmp++) { | |
564 | data->sf4_reg[i][SF4_TEMP][tmp] = | |
565 | w83795_read(client, | |
566 | W83795_REG_SF4_TEMP(i, tmp)); | |
567 | data->sf4_reg[i][SF4_PWM][tmp] = | |
568 | w83795_read(client, W83795_REG_SF4_PWM(i, tmp)); | |
569 | } | |
570 | } | |
571 | ||
572 | /* Read setup PWM */ | |
573 | for (i = 0; i < ARRAY_SIZE(data->setup_pwm); i++) | |
574 | data->setup_pwm[i] = | |
575 | w83795_read(client, W83795_REG_SETUP_PWM(i)); | |
1bb3450c JD |
576 | |
577 | data->valid_pwm_config = 1; | |
578 | ||
579 | END: | |
580 | mutex_unlock(&data->update_lock); | |
581 | return data; | |
0d7237bf JD |
582 | } |
583 | ||
792d376b WS |
584 | static struct w83795_data *w83795_update_device(struct device *dev) |
585 | { | |
586 | struct i2c_client *client = to_i2c_client(dev); | |
587 | struct w83795_data *data = i2c_get_clientdata(client); | |
588 | u16 tmp; | |
cf6b9ea6 | 589 | u8 intrusion; |
792d376b WS |
590 | int i; |
591 | ||
592 | mutex_lock(&data->update_lock); | |
593 | ||
2ae61de9 JD |
594 | if (!data->valid_limits) |
595 | w83795_update_limits(client); | |
596 | ||
792d376b WS |
597 | if (!(time_after(jiffies, data->last_updated + HZ * 2) |
598 | || !data->valid)) | |
599 | goto END; | |
600 | ||
601 | /* Update the voltages value */ | |
602 | for (i = 0; i < ARRAY_SIZE(data->in); i++) { | |
603 | if (!(data->has_in & (1 << i))) | |
604 | continue; | |
605 | tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2; | |
a654b9d4 | 606 | tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6; |
792d376b WS |
607 | data->in[i][IN_READ] = tmp; |
608 | } | |
609 | ||
0e256018 JD |
610 | /* in0-2 can have dynamic limits (W83795G only) */ |
611 | if (data->has_dyn_in) { | |
612 | u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX)); | |
613 | u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW)); | |
614 | ||
615 | for (i = 0; i < 3; i++) { | |
616 | if (!(data->has_dyn_in & (1 << i))) | |
617 | continue; | |
618 | data->in[i][IN_MAX] = | |
619 | w83795_read(client, W83795_REG_IN[i][IN_MAX]); | |
620 | data->in[i][IN_LOW] = | |
621 | w83795_read(client, W83795_REG_IN[i][IN_LOW]); | |
622 | data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03; | |
623 | data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03; | |
624 | } | |
625 | } | |
626 | ||
792d376b WS |
627 | /* Update fan */ |
628 | for (i = 0; i < ARRAY_SIZE(data->fan); i++) { | |
629 | if (!(data->has_fan & (1 << i))) | |
630 | continue; | |
631 | data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4; | |
eb02755a | 632 | data->fan[i] |= w83795_read(client, W83795_REG_VRLSB) >> 4; |
792d376b WS |
633 | } |
634 | ||
635 | /* Update temperature */ | |
636 | for (i = 0; i < ARRAY_SIZE(data->temp); i++) { | |
792d376b WS |
637 | data->temp[i][TEMP_READ] = |
638 | w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]); | |
639 | data->temp_read_vrlsb[i] = | |
640 | w83795_read(client, W83795_REG_VRLSB); | |
641 | } | |
642 | ||
643 | /* Update dts temperature */ | |
eb02755a | 644 | if (data->enable_dts) { |
792d376b WS |
645 | for (i = 0; i < ARRAY_SIZE(data->dts); i++) { |
646 | if (!(data->has_dts & (1 << i))) | |
647 | continue; | |
648 | data->dts[i] = | |
649 | w83795_read(client, W83795_REG_DTS(i)); | |
650 | data->dts_read_vrlsb[i] = | |
651 | w83795_read(client, W83795_REG_VRLSB); | |
652 | } | |
653 | } | |
654 | ||
655 | /* Update pwm output */ | |
656 | for (i = 0; i < data->has_pwm; i++) { | |
657 | data->pwm[i][PWM_OUTPUT] = | |
658 | w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT)); | |
659 | } | |
660 | ||
cf6b9ea6 JD |
661 | /* Update intrusion and alarms |
662 | * It is important to read intrusion first, because reading from | |
663 | * register SMI STS6 clears the interrupt status temporarily. */ | |
664 | tmp = w83795_read(client, W83795_REG_ALARM_CTRL); | |
665 | /* Switch to interrupt status for intrusion if needed */ | |
666 | if (tmp & ALARM_CTRL_RTSACS) | |
667 | w83795_write(client, W83795_REG_ALARM_CTRL, | |
668 | tmp & ~ALARM_CTRL_RTSACS); | |
669 | intrusion = w83795_read(client, W83795_REG_ALARM(5)) & (1 << 6); | |
670 | /* Switch to real-time alarms */ | |
671 | w83795_write(client, W83795_REG_ALARM_CTRL, tmp | ALARM_CTRL_RTSACS); | |
cd316df5 | 672 | for (i = 0; i < ARRAY_SIZE(data->alarms); i++) |
792d376b | 673 | data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i)); |
cf6b9ea6 JD |
674 | data->alarms[5] |= intrusion; |
675 | /* Restore original configuration if needed */ | |
676 | if (!(tmp & ALARM_CTRL_RTSACS)) | |
677 | w83795_write(client, W83795_REG_ALARM_CTRL, | |
678 | tmp & ~ALARM_CTRL_RTSACS); | |
792d376b WS |
679 | |
680 | data->last_updated = jiffies; | |
681 | data->valid = 1; | |
682 | ||
683 | END: | |
684 | mutex_unlock(&data->update_lock); | |
685 | return data; | |
686 | } | |
687 | ||
688 | /* | |
689 | * Sysfs attributes | |
690 | */ | |
691 | ||
692 | #define ALARM_STATUS 0 | |
693 | #define BEEP_ENABLE 1 | |
694 | static ssize_t | |
695 | show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf) | |
696 | { | |
697 | struct w83795_data *data = w83795_update_device(dev); | |
698 | struct sensor_device_attribute_2 *sensor_attr = | |
699 | to_sensor_dev_attr_2(attr); | |
700 | int nr = sensor_attr->nr; | |
701 | int index = sensor_attr->index >> 3; | |
702 | int bit = sensor_attr->index & 0x07; | |
703 | u8 val; | |
704 | ||
eb02755a JD |
705 | if (nr == ALARM_STATUS) |
706 | val = (data->alarms[index] >> bit) & 1; | |
707 | else /* BEEP_ENABLE */ | |
708 | val = (data->beeps[index] >> bit) & 1; | |
792d376b WS |
709 | |
710 | return sprintf(buf, "%u\n", val); | |
711 | } | |
712 | ||
713 | static ssize_t | |
714 | store_beep(struct device *dev, struct device_attribute *attr, | |
715 | const char *buf, size_t count) | |
716 | { | |
717 | struct i2c_client *client = to_i2c_client(dev); | |
718 | struct w83795_data *data = i2c_get_clientdata(client); | |
719 | struct sensor_device_attribute_2 *sensor_attr = | |
720 | to_sensor_dev_attr_2(attr); | |
721 | int index = sensor_attr->index >> 3; | |
722 | int shift = sensor_attr->index & 0x07; | |
723 | u8 beep_bit = 1 << shift; | |
724 | unsigned long val; | |
725 | ||
726 | if (strict_strtoul(buf, 10, &val) < 0) | |
727 | return -EINVAL; | |
728 | if (val != 0 && val != 1) | |
729 | return -EINVAL; | |
730 | ||
731 | mutex_lock(&data->update_lock); | |
732 | data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index)); | |
733 | data->beeps[index] &= ~beep_bit; | |
734 | data->beeps[index] |= val << shift; | |
735 | w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]); | |
736 | mutex_unlock(&data->update_lock); | |
737 | ||
738 | return count; | |
739 | } | |
740 | ||
24377101 | 741 | /* Write 0 to clear chassis alarm */ |
792d376b WS |
742 | static ssize_t |
743 | store_chassis_clear(struct device *dev, | |
744 | struct device_attribute *attr, const char *buf, | |
745 | size_t count) | |
746 | { | |
747 | struct i2c_client *client = to_i2c_client(dev); | |
748 | struct w83795_data *data = i2c_get_clientdata(client); | |
24377101 JD |
749 | unsigned long val; |
750 | ||
751 | if (strict_strtoul(buf, 10, &val) < 0 || val != 0) | |
752 | return -EINVAL; | |
792d376b WS |
753 | |
754 | mutex_lock(&data->update_lock); | |
755 | val = w83795_read(client, W83795_REG_CLR_CHASSIS); | |
756 | val |= 0x80; | |
757 | w83795_write(client, W83795_REG_CLR_CHASSIS, val); | |
793c51d5 JD |
758 | |
759 | /* Clear status and force cache refresh */ | |
760 | w83795_read(client, W83795_REG_ALARM(5)); | |
761 | data->valid = 0; | |
792d376b WS |
762 | mutex_unlock(&data->update_lock); |
763 | return count; | |
764 | } | |
765 | ||
766 | #define FAN_INPUT 0 | |
767 | #define FAN_MIN 1 | |
768 | static ssize_t | |
769 | show_fan(struct device *dev, struct device_attribute *attr, char *buf) | |
770 | { | |
771 | struct sensor_device_attribute_2 *sensor_attr = | |
772 | to_sensor_dev_attr_2(attr); | |
773 | int nr = sensor_attr->nr; | |
774 | int index = sensor_attr->index; | |
775 | struct w83795_data *data = w83795_update_device(dev); | |
776 | u16 val; | |
777 | ||
eb02755a | 778 | if (nr == FAN_INPUT) |
792d376b WS |
779 | val = data->fan[index] & 0x0fff; |
780 | else | |
781 | val = data->fan_min[index] & 0x0fff; | |
782 | ||
783 | return sprintf(buf, "%lu\n", fan_from_reg(val)); | |
784 | } | |
785 | ||
786 | static ssize_t | |
787 | store_fan_min(struct device *dev, struct device_attribute *attr, | |
788 | const char *buf, size_t count) | |
789 | { | |
790 | struct sensor_device_attribute_2 *sensor_attr = | |
791 | to_sensor_dev_attr_2(attr); | |
792 | int index = sensor_attr->index; | |
793 | struct i2c_client *client = to_i2c_client(dev); | |
794 | struct w83795_data *data = i2c_get_clientdata(client); | |
795 | unsigned long val; | |
796 | ||
797 | if (strict_strtoul(buf, 10, &val)) | |
798 | return -EINVAL; | |
799 | val = fan_to_reg(val); | |
800 | ||
801 | mutex_lock(&data->update_lock); | |
802 | data->fan_min[index] = val; | |
803 | w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff); | |
804 | val &= 0x0f; | |
7eb8d508 | 805 | if (index & 1) { |
792d376b WS |
806 | val <<= 4; |
807 | val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) | |
808 | & 0x0f; | |
809 | } else { | |
810 | val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index)) | |
811 | & 0xf0; | |
812 | } | |
813 | w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff); | |
814 | mutex_unlock(&data->update_lock); | |
815 | ||
816 | return count; | |
817 | } | |
818 | ||
819 | static ssize_t | |
820 | show_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
821 | { | |
1bb3450c | 822 | struct w83795_data *data; |
792d376b WS |
823 | struct sensor_device_attribute_2 *sensor_attr = |
824 | to_sensor_dev_attr_2(attr); | |
825 | int nr = sensor_attr->nr; | |
826 | int index = sensor_attr->index; | |
01879a85 | 827 | unsigned int val; |
792d376b | 828 | |
1bb3450c JD |
829 | data = nr == PWM_OUTPUT ? w83795_update_device(dev) |
830 | : w83795_update_pwm_config(dev); | |
831 | ||
792d376b WS |
832 | switch (nr) { |
833 | case PWM_STOP_TIME: | |
834 | val = time_from_reg(data->pwm[index][nr]); | |
835 | break; | |
01879a85 JD |
836 | case PWM_FREQ: |
837 | val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin); | |
792d376b WS |
838 | break; |
839 | default: | |
840 | val = data->pwm[index][nr]; | |
841 | break; | |
842 | } | |
843 | ||
844 | return sprintf(buf, "%u\n", val); | |
845 | } | |
846 | ||
847 | static ssize_t | |
848 | store_pwm(struct device *dev, struct device_attribute *attr, | |
849 | const char *buf, size_t count) | |
850 | { | |
851 | struct i2c_client *client = to_i2c_client(dev); | |
852 | struct w83795_data *data = i2c_get_clientdata(client); | |
853 | struct sensor_device_attribute_2 *sensor_attr = | |
854 | to_sensor_dev_attr_2(attr); | |
855 | int nr = sensor_attr->nr; | |
856 | int index = sensor_attr->index; | |
857 | unsigned long val; | |
792d376b WS |
858 | |
859 | if (strict_strtoul(buf, 10, &val) < 0) | |
860 | return -EINVAL; | |
861 | ||
862 | mutex_lock(&data->update_lock); | |
863 | switch (nr) { | |
864 | case PWM_STOP_TIME: | |
865 | val = time_to_reg(val); | |
866 | break; | |
01879a85 JD |
867 | case PWM_FREQ: |
868 | val = pwm_freq_to_reg(val, data->clkin); | |
792d376b WS |
869 | break; |
870 | default: | |
871 | val = SENSORS_LIMIT(val, 0, 0xff); | |
872 | break; | |
873 | } | |
874 | w83795_write(client, W83795_REG_PWM(index, nr), val); | |
01879a85 | 875 | data->pwm[index][nr] = val; |
792d376b WS |
876 | mutex_unlock(&data->update_lock); |
877 | return count; | |
792d376b WS |
878 | } |
879 | ||
880 | static ssize_t | |
881 | show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf) | |
882 | { | |
883 | struct sensor_device_attribute_2 *sensor_attr = | |
884 | to_sensor_dev_attr_2(attr); | |
1bb3450c | 885 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
886 | int index = sensor_attr->index; |
887 | u8 tmp; | |
888 | ||
ae51cd9b JD |
889 | /* Speed cruise mode */ |
890 | if (data->pwm_fcms[0] & (1 << index)) { | |
792d376b WS |
891 | tmp = 2; |
892 | goto out; | |
893 | } | |
ae51cd9b | 894 | /* Thermal cruise or SmartFan IV mode */ |
792d376b WS |
895 | for (tmp = 0; tmp < 6; tmp++) { |
896 | if (data->pwm_tfmr[tmp] & (1 << index)) { | |
897 | tmp = 3; | |
898 | goto out; | |
899 | } | |
900 | } | |
ae51cd9b JD |
901 | /* Manual mode */ |
902 | tmp = 1; | |
792d376b WS |
903 | |
904 | out: | |
905 | return sprintf(buf, "%u\n", tmp); | |
906 | } | |
907 | ||
908 | static ssize_t | |
909 | store_pwm_enable(struct device *dev, struct device_attribute *attr, | |
910 | const char *buf, size_t count) | |
911 | { | |
912 | struct i2c_client *client = to_i2c_client(dev); | |
1bb3450c | 913 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
914 | struct sensor_device_attribute_2 *sensor_attr = |
915 | to_sensor_dev_attr_2(attr); | |
916 | int index = sensor_attr->index; | |
917 | unsigned long val; | |
918 | int i; | |
919 | ||
920 | if (strict_strtoul(buf, 10, &val) < 0) | |
921 | return -EINVAL; | |
ae51cd9b | 922 | if (val < 1 || val > 2) |
792d376b WS |
923 | return -EINVAL; |
924 | ||
925 | mutex_lock(&data->update_lock); | |
926 | switch (val) { | |
792d376b | 927 | case 1: |
ae51cd9b | 928 | /* Clear speed cruise mode bits */ |
792d376b WS |
929 | data->pwm_fcms[0] &= ~(1 << index); |
930 | w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); | |
ae51cd9b | 931 | /* Clear thermal cruise mode bits */ |
792d376b WS |
932 | for (i = 0; i < 6; i++) { |
933 | data->pwm_tfmr[i] &= ~(1 << index); | |
934 | w83795_write(client, W83795_REG_TFMR(i), | |
935 | data->pwm_tfmr[i]); | |
936 | } | |
792d376b WS |
937 | break; |
938 | case 2: | |
939 | data->pwm_fcms[0] |= (1 << index); | |
940 | w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]); | |
941 | break; | |
942 | } | |
943 | mutex_unlock(&data->update_lock); | |
944 | return count; | |
792d376b WS |
945 | } |
946 | ||
d5ab845a JD |
947 | static ssize_t |
948 | show_pwm_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
949 | { | |
950 | struct w83795_data *data = w83795_update_pwm_config(dev); | |
951 | int index = to_sensor_dev_attr_2(attr)->index; | |
952 | unsigned int mode; | |
953 | ||
954 | if (data->pwm_fomc & (1 << index)) | |
955 | mode = 0; /* DC */ | |
956 | else | |
957 | mode = 1; /* PWM */ | |
958 | ||
959 | return sprintf(buf, "%u\n", mode); | |
960 | } | |
961 | ||
edff2f8d JD |
962 | /* |
963 | * Check whether a given temperature source can ever be useful. | |
964 | * Returns the number of selectable temperature channels which are | |
965 | * enabled. | |
966 | */ | |
967 | static int w83795_tss_useful(const struct w83795_data *data, int tsrc) | |
968 | { | |
969 | int useful = 0, i; | |
970 | ||
971 | for (i = 0; i < 4; i++) { | |
972 | if (tss_map[i][tsrc] == TSS_MAP_RESERVED) | |
973 | continue; | |
974 | if (tss_map[i][tsrc] < 6) /* Analog */ | |
975 | useful += (data->has_temp >> tss_map[i][tsrc]) & 1; | |
976 | else /* Digital */ | |
977 | useful += (data->has_dts >> (tss_map[i][tsrc] - 6)) & 1; | |
978 | } | |
979 | ||
980 | return useful; | |
981 | } | |
982 | ||
792d376b WS |
983 | static ssize_t |
984 | show_temp_src(struct device *dev, struct device_attribute *attr, char *buf) | |
985 | { | |
986 | struct sensor_device_attribute_2 *sensor_attr = | |
987 | to_sensor_dev_attr_2(attr); | |
1bb3450c | 988 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b | 989 | int index = sensor_attr->index; |
2a2d27da | 990 | u8 tmp = data->temp_src[index / 2]; |
792d376b | 991 | |
7eb8d508 | 992 | if (index & 1) |
2a2d27da | 993 | tmp >>= 4; /* Pick high nibble */ |
792d376b | 994 | else |
2a2d27da | 995 | tmp &= 0x0f; /* Pick low nibble */ |
792d376b | 996 | |
2a2d27da JD |
997 | /* Look-up the actual temperature channel number */ |
998 | if (tmp >= 4 || tss_map[tmp][index] == TSS_MAP_RESERVED) | |
999 | return -EINVAL; /* Shouldn't happen */ | |
1000 | ||
1001 | return sprintf(buf, "%u\n", (unsigned int)tss_map[tmp][index] + 1); | |
792d376b WS |
1002 | } |
1003 | ||
1004 | static ssize_t | |
1005 | store_temp_src(struct device *dev, struct device_attribute *attr, | |
1006 | const char *buf, size_t count) | |
1007 | { | |
1008 | struct i2c_client *client = to_i2c_client(dev); | |
1bb3450c | 1009 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1010 | struct sensor_device_attribute_2 *sensor_attr = |
1011 | to_sensor_dev_attr_2(attr); | |
1012 | int index = sensor_attr->index; | |
2a2d27da JD |
1013 | int tmp; |
1014 | unsigned long channel; | |
792d376b WS |
1015 | u8 val = index / 2; |
1016 | ||
2a2d27da JD |
1017 | if (strict_strtoul(buf, 10, &channel) < 0 || |
1018 | channel < 1 || channel > 14) | |
1019 | return -EINVAL; | |
1020 | ||
1021 | /* Check if request can be fulfilled */ | |
1022 | for (tmp = 0; tmp < 4; tmp++) { | |
1023 | if (tss_map[tmp][index] == channel - 1) | |
1024 | break; | |
1025 | } | |
1026 | if (tmp == 4) /* No match */ | |
792d376b | 1027 | return -EINVAL; |
792d376b WS |
1028 | |
1029 | mutex_lock(&data->update_lock); | |
7eb8d508 | 1030 | if (index & 1) { |
792d376b WS |
1031 | tmp <<= 4; |
1032 | data->temp_src[val] &= 0x0f; | |
1033 | } else { | |
1034 | data->temp_src[val] &= 0xf0; | |
1035 | } | |
1036 | data->temp_src[val] |= tmp; | |
1037 | w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]); | |
1038 | mutex_unlock(&data->update_lock); | |
1039 | ||
1040 | return count; | |
1041 | } | |
1042 | ||
1043 | #define TEMP_PWM_ENABLE 0 | |
1044 | #define TEMP_PWM_FAN_MAP 1 | |
1045 | static ssize_t | |
1046 | show_temp_pwm_enable(struct device *dev, struct device_attribute *attr, | |
1047 | char *buf) | |
1048 | { | |
1bb3450c | 1049 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1050 | struct sensor_device_attribute_2 *sensor_attr = |
1051 | to_sensor_dev_attr_2(attr); | |
1052 | int nr = sensor_attr->nr; | |
1053 | int index = sensor_attr->index; | |
1054 | u8 tmp = 0xff; | |
1055 | ||
1056 | switch (nr) { | |
1057 | case TEMP_PWM_ENABLE: | |
1058 | tmp = (data->pwm_fcms[1] >> index) & 1; | |
1059 | if (tmp) | |
1060 | tmp = 4; | |
1061 | else | |
1062 | tmp = 3; | |
1063 | break; | |
1064 | case TEMP_PWM_FAN_MAP: | |
1065 | tmp = data->pwm_tfmr[index]; | |
1066 | break; | |
1067 | } | |
1068 | ||
1069 | return sprintf(buf, "%u\n", tmp); | |
1070 | } | |
1071 | ||
1072 | static ssize_t | |
1073 | store_temp_pwm_enable(struct device *dev, struct device_attribute *attr, | |
1074 | const char *buf, size_t count) | |
1075 | { | |
1076 | struct i2c_client *client = to_i2c_client(dev); | |
1bb3450c | 1077 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1078 | struct sensor_device_attribute_2 *sensor_attr = |
1079 | to_sensor_dev_attr_2(attr); | |
1080 | int nr = sensor_attr->nr; | |
1081 | int index = sensor_attr->index; | |
1082 | unsigned long tmp; | |
1083 | ||
1084 | if (strict_strtoul(buf, 10, &tmp) < 0) | |
1085 | return -EINVAL; | |
1086 | ||
1087 | switch (nr) { | |
1088 | case TEMP_PWM_ENABLE: | |
eb02755a | 1089 | if (tmp != 3 && tmp != 4) |
792d376b WS |
1090 | return -EINVAL; |
1091 | tmp -= 3; | |
1092 | mutex_lock(&data->update_lock); | |
1093 | data->pwm_fcms[1] &= ~(1 << index); | |
1094 | data->pwm_fcms[1] |= tmp << index; | |
1095 | w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]); | |
1096 | mutex_unlock(&data->update_lock); | |
1097 | break; | |
1098 | case TEMP_PWM_FAN_MAP: | |
1099 | mutex_lock(&data->update_lock); | |
1100 | tmp = SENSORS_LIMIT(tmp, 0, 0xff); | |
1101 | w83795_write(client, W83795_REG_TFMR(index), tmp); | |
1102 | data->pwm_tfmr[index] = tmp; | |
1103 | mutex_unlock(&data->update_lock); | |
1104 | break; | |
1105 | } | |
1106 | return count; | |
1107 | } | |
1108 | ||
1109 | #define FANIN_TARGET 0 | |
1110 | #define FANIN_TOL 1 | |
1111 | static ssize_t | |
1112 | show_fanin(struct device *dev, struct device_attribute *attr, char *buf) | |
1113 | { | |
1bb3450c | 1114 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1115 | struct sensor_device_attribute_2 *sensor_attr = |
1116 | to_sensor_dev_attr_2(attr); | |
1117 | int nr = sensor_attr->nr; | |
1118 | int index = sensor_attr->index; | |
1119 | u16 tmp = 0; | |
1120 | ||
1121 | switch (nr) { | |
1122 | case FANIN_TARGET: | |
1123 | tmp = fan_from_reg(data->target_speed[index]); | |
1124 | break; | |
1125 | case FANIN_TOL: | |
1126 | tmp = data->tol_speed; | |
1127 | break; | |
1128 | } | |
1129 | ||
1130 | return sprintf(buf, "%u\n", tmp); | |
1131 | } | |
1132 | ||
1133 | static ssize_t | |
1134 | store_fanin(struct device *dev, struct device_attribute *attr, | |
1135 | const char *buf, size_t count) | |
1136 | { | |
1137 | struct i2c_client *client = to_i2c_client(dev); | |
1138 | struct w83795_data *data = i2c_get_clientdata(client); | |
1139 | struct sensor_device_attribute_2 *sensor_attr = | |
1140 | to_sensor_dev_attr_2(attr); | |
1141 | int nr = sensor_attr->nr; | |
1142 | int index = sensor_attr->index; | |
1143 | unsigned long val; | |
1144 | ||
1145 | if (strict_strtoul(buf, 10, &val) < 0) | |
1146 | return -EINVAL; | |
1147 | ||
1148 | mutex_lock(&data->update_lock); | |
1149 | switch (nr) { | |
1150 | case FANIN_TARGET: | |
1151 | val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff)); | |
eb02755a | 1152 | w83795_write(client, W83795_REG_FTSH(index), val >> 4); |
792d376b WS |
1153 | w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0); |
1154 | data->target_speed[index] = val; | |
1155 | break; | |
1156 | case FANIN_TOL: | |
1157 | val = SENSORS_LIMIT(val, 0, 0x3f); | |
1158 | w83795_write(client, W83795_REG_TFTS, val); | |
1159 | data->tol_speed = val; | |
1160 | break; | |
1161 | } | |
1162 | mutex_unlock(&data->update_lock); | |
1163 | ||
1164 | return count; | |
1165 | } | |
1166 | ||
1167 | ||
1168 | static ssize_t | |
1169 | show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
1170 | { | |
1bb3450c | 1171 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1172 | struct sensor_device_attribute_2 *sensor_attr = |
1173 | to_sensor_dev_attr_2(attr); | |
1174 | int nr = sensor_attr->nr; | |
1175 | int index = sensor_attr->index; | |
1176 | long tmp = temp_from_reg(data->pwm_temp[index][nr]); | |
1177 | ||
1178 | return sprintf(buf, "%ld\n", tmp); | |
1179 | } | |
1180 | ||
1181 | static ssize_t | |
1182 | store_temp_pwm(struct device *dev, struct device_attribute *attr, | |
1183 | const char *buf, size_t count) | |
1184 | { | |
1185 | struct i2c_client *client = to_i2c_client(dev); | |
1186 | struct w83795_data *data = i2c_get_clientdata(client); | |
1187 | struct sensor_device_attribute_2 *sensor_attr = | |
1188 | to_sensor_dev_attr_2(attr); | |
1189 | int nr = sensor_attr->nr; | |
1190 | int index = sensor_attr->index; | |
1191 | unsigned long val; | |
1192 | u8 tmp; | |
1193 | ||
1194 | if (strict_strtoul(buf, 10, &val) < 0) | |
1195 | return -EINVAL; | |
1196 | val /= 1000; | |
1197 | ||
1198 | mutex_lock(&data->update_lock); | |
1199 | switch (nr) { | |
1200 | case TEMP_PWM_TTTI: | |
1201 | val = SENSORS_LIMIT(val, 0, 0x7f); | |
1202 | w83795_write(client, W83795_REG_TTTI(index), val); | |
1203 | break; | |
1204 | case TEMP_PWM_CTFS: | |
1205 | val = SENSORS_LIMIT(val, 0, 0x7f); | |
1206 | w83795_write(client, W83795_REG_CTFS(index), val); | |
1207 | break; | |
1208 | case TEMP_PWM_HCT: | |
1209 | val = SENSORS_LIMIT(val, 0, 0x0f); | |
1210 | tmp = w83795_read(client, W83795_REG_HT(index)); | |
1211 | tmp &= 0x0f; | |
1212 | tmp |= (val << 4) & 0xf0; | |
1213 | w83795_write(client, W83795_REG_HT(index), tmp); | |
1214 | break; | |
1215 | case TEMP_PWM_HOT: | |
1216 | val = SENSORS_LIMIT(val, 0, 0x0f); | |
1217 | tmp = w83795_read(client, W83795_REG_HT(index)); | |
1218 | tmp &= 0xf0; | |
1219 | tmp |= val & 0x0f; | |
1220 | w83795_write(client, W83795_REG_HT(index), tmp); | |
1221 | break; | |
1222 | } | |
1223 | data->pwm_temp[index][nr] = val; | |
1224 | mutex_unlock(&data->update_lock); | |
1225 | ||
1226 | return count; | |
1227 | } | |
1228 | ||
1229 | static ssize_t | |
1230 | show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf) | |
1231 | { | |
1bb3450c | 1232 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1233 | struct sensor_device_attribute_2 *sensor_attr = |
1234 | to_sensor_dev_attr_2(attr); | |
1235 | int nr = sensor_attr->nr; | |
1236 | int index = sensor_attr->index; | |
1237 | ||
1238 | return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]); | |
1239 | } | |
1240 | ||
1241 | static ssize_t | |
1242 | store_sf4_pwm(struct device *dev, struct device_attribute *attr, | |
1243 | const char *buf, size_t count) | |
1244 | { | |
1245 | struct i2c_client *client = to_i2c_client(dev); | |
1246 | struct w83795_data *data = i2c_get_clientdata(client); | |
1247 | struct sensor_device_attribute_2 *sensor_attr = | |
1248 | to_sensor_dev_attr_2(attr); | |
1249 | int nr = sensor_attr->nr; | |
1250 | int index = sensor_attr->index; | |
1251 | unsigned long val; | |
1252 | ||
1253 | if (strict_strtoul(buf, 10, &val) < 0) | |
1254 | return -EINVAL; | |
1255 | ||
1256 | mutex_lock(&data->update_lock); | |
1257 | w83795_write(client, W83795_REG_SF4_PWM(index, nr), val); | |
1258 | data->sf4_reg[index][SF4_PWM][nr] = val; | |
1259 | mutex_unlock(&data->update_lock); | |
1260 | ||
1261 | return count; | |
1262 | } | |
1263 | ||
1264 | static ssize_t | |
1265 | show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
1266 | { | |
1bb3450c | 1267 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1268 | struct sensor_device_attribute_2 *sensor_attr = |
1269 | to_sensor_dev_attr_2(attr); | |
1270 | int nr = sensor_attr->nr; | |
1271 | int index = sensor_attr->index; | |
1272 | ||
1273 | return sprintf(buf, "%u\n", | |
1274 | (data->sf4_reg[index][SF4_TEMP][nr]) * 1000); | |
1275 | } | |
1276 | ||
1277 | static ssize_t | |
1278 | store_sf4_temp(struct device *dev, struct device_attribute *attr, | |
1279 | const char *buf, size_t count) | |
1280 | { | |
1281 | struct i2c_client *client = to_i2c_client(dev); | |
1282 | struct w83795_data *data = i2c_get_clientdata(client); | |
1283 | struct sensor_device_attribute_2 *sensor_attr = | |
1284 | to_sensor_dev_attr_2(attr); | |
1285 | int nr = sensor_attr->nr; | |
1286 | int index = sensor_attr->index; | |
1287 | unsigned long val; | |
1288 | ||
1289 | if (strict_strtoul(buf, 10, &val) < 0) | |
1290 | return -EINVAL; | |
1291 | val /= 1000; | |
1292 | ||
1293 | mutex_lock(&data->update_lock); | |
1294 | w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val); | |
1295 | data->sf4_reg[index][SF4_TEMP][nr] = val; | |
1296 | mutex_unlock(&data->update_lock); | |
1297 | ||
1298 | return count; | |
1299 | } | |
1300 | ||
1301 | ||
1302 | static ssize_t | |
1303 | show_temp(struct device *dev, struct device_attribute *attr, char *buf) | |
1304 | { | |
1305 | struct sensor_device_attribute_2 *sensor_attr = | |
1306 | to_sensor_dev_attr_2(attr); | |
1307 | int nr = sensor_attr->nr; | |
1308 | int index = sensor_attr->index; | |
1309 | struct w83795_data *data = w83795_update_device(dev); | |
dd127f5c | 1310 | long temp = temp_from_reg(data->temp[index][nr]); |
792d376b | 1311 | |
eb02755a | 1312 | if (nr == TEMP_READ) |
a654b9d4 | 1313 | temp += (data->temp_read_vrlsb[index] >> 6) * 250; |
792d376b WS |
1314 | return sprintf(buf, "%ld\n", temp); |
1315 | } | |
1316 | ||
1317 | static ssize_t | |
1318 | store_temp(struct device *dev, struct device_attribute *attr, | |
1319 | const char *buf, size_t count) | |
1320 | { | |
1321 | struct sensor_device_attribute_2 *sensor_attr = | |
1322 | to_sensor_dev_attr_2(attr); | |
1323 | int nr = sensor_attr->nr; | |
1324 | int index = sensor_attr->index; | |
1325 | struct i2c_client *client = to_i2c_client(dev); | |
1326 | struct w83795_data *data = i2c_get_clientdata(client); | |
1327 | long tmp; | |
1328 | ||
1329 | if (strict_strtol(buf, 10, &tmp) < 0) | |
1330 | return -EINVAL; | |
1331 | ||
1332 | mutex_lock(&data->update_lock); | |
1333 | data->temp[index][nr] = temp_to_reg(tmp, -128, 127); | |
1334 | w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]); | |
1335 | mutex_unlock(&data->update_lock); | |
1336 | return count; | |
1337 | } | |
1338 | ||
1339 | ||
1340 | static ssize_t | |
1341 | show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
1342 | { | |
21fc9775 | 1343 | struct w83795_data *data = dev_get_drvdata(dev); |
39deb699 | 1344 | int tmp; |
792d376b | 1345 | |
39deb699 JD |
1346 | if (data->enable_dts & 2) |
1347 | tmp = 5; | |
1348 | else | |
1349 | tmp = 6; | |
792d376b WS |
1350 | |
1351 | return sprintf(buf, "%d\n", tmp); | |
1352 | } | |
1353 | ||
1354 | static ssize_t | |
1355 | show_dts(struct device *dev, struct device_attribute *attr, char *buf) | |
1356 | { | |
1357 | struct sensor_device_attribute_2 *sensor_attr = | |
1358 | to_sensor_dev_attr_2(attr); | |
1359 | int index = sensor_attr->index; | |
1360 | struct w83795_data *data = w83795_update_device(dev); | |
dd127f5c | 1361 | long temp = temp_from_reg(data->dts[index]); |
792d376b | 1362 | |
a654b9d4 | 1363 | temp += (data->dts_read_vrlsb[index] >> 6) * 250; |
792d376b WS |
1364 | return sprintf(buf, "%ld\n", temp); |
1365 | } | |
1366 | ||
1367 | static ssize_t | |
1368 | show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf) | |
1369 | { | |
1370 | struct sensor_device_attribute_2 *sensor_attr = | |
1371 | to_sensor_dev_attr_2(attr); | |
1372 | int nr = sensor_attr->nr; | |
21fc9775 | 1373 | struct w83795_data *data = dev_get_drvdata(dev); |
dd127f5c | 1374 | long temp = temp_from_reg(data->dts_ext[nr]); |
792d376b | 1375 | |
792d376b WS |
1376 | return sprintf(buf, "%ld\n", temp); |
1377 | } | |
1378 | ||
1379 | static ssize_t | |
1380 | store_dts_ext(struct device *dev, struct device_attribute *attr, | |
1381 | const char *buf, size_t count) | |
1382 | { | |
1383 | struct sensor_device_attribute_2 *sensor_attr = | |
1384 | to_sensor_dev_attr_2(attr); | |
1385 | int nr = sensor_attr->nr; | |
1386 | struct i2c_client *client = to_i2c_client(dev); | |
1387 | struct w83795_data *data = i2c_get_clientdata(client); | |
1388 | long tmp; | |
1389 | ||
1390 | if (strict_strtol(buf, 10, &tmp) < 0) | |
1391 | return -EINVAL; | |
1392 | ||
1393 | mutex_lock(&data->update_lock); | |
1394 | data->dts_ext[nr] = temp_to_reg(tmp, -128, 127); | |
1395 | w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]); | |
1396 | mutex_unlock(&data->update_lock); | |
1397 | return count; | |
1398 | } | |
1399 | ||
1400 | ||
792d376b WS |
1401 | static ssize_t |
1402 | show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf) | |
1403 | { | |
21fc9775 | 1404 | struct w83795_data *data = dev_get_drvdata(dev); |
792d376b WS |
1405 | struct sensor_device_attribute_2 *sensor_attr = |
1406 | to_sensor_dev_attr_2(attr); | |
1407 | int index = sensor_attr->index; | |
39deb699 | 1408 | int tmp; |
792d376b | 1409 | |
39deb699 JD |
1410 | if (data->temp_mode & (1 << index)) |
1411 | tmp = 3; /* Thermal diode */ | |
1412 | else | |
1413 | tmp = 4; /* Thermistor */ | |
792d376b WS |
1414 | |
1415 | return sprintf(buf, "%d\n", tmp); | |
1416 | } | |
1417 | ||
39deb699 | 1418 | /* Only for temp1-4 (temp5-6 can only be thermistor) */ |
792d376b WS |
1419 | static ssize_t |
1420 | store_temp_mode(struct device *dev, struct device_attribute *attr, | |
1421 | const char *buf, size_t count) | |
1422 | { | |
1423 | struct i2c_client *client = to_i2c_client(dev); | |
1424 | struct w83795_data *data = i2c_get_clientdata(client); | |
1425 | struct sensor_device_attribute_2 *sensor_attr = | |
1426 | to_sensor_dev_attr_2(attr); | |
1427 | int index = sensor_attr->index; | |
39deb699 | 1428 | int reg_shift; |
792d376b WS |
1429 | unsigned long val; |
1430 | u8 tmp; | |
792d376b WS |
1431 | |
1432 | if (strict_strtoul(buf, 10, &val) < 0) | |
1433 | return -EINVAL; | |
1434 | if ((val != 4) && (val != 3)) | |
1435 | return -EINVAL; | |
792d376b WS |
1436 | |
1437 | mutex_lock(&data->update_lock); | |
1438 | if (val == 3) { | |
39deb699 JD |
1439 | /* Thermal diode */ |
1440 | val = 0x01; | |
792d376b WS |
1441 | data->temp_mode |= 1 << index; |
1442 | } else if (val == 4) { | |
39deb699 JD |
1443 | /* Thermistor */ |
1444 | val = 0x03; | |
1445 | data->temp_mode &= ~(1 << index); | |
792d376b WS |
1446 | } |
1447 | ||
39deb699 JD |
1448 | reg_shift = 2 * index; |
1449 | tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); | |
1450 | tmp &= ~(0x03 << reg_shift); | |
1451 | tmp |= val << reg_shift; | |
1452 | w83795_write(client, W83795_REG_TEMP_CTRL2, tmp); | |
792d376b WS |
1453 | |
1454 | mutex_unlock(&data->update_lock); | |
1455 | return count; | |
1456 | } | |
1457 | ||
1458 | ||
1459 | /* show/store VIN */ | |
1460 | static ssize_t | |
1461 | show_in(struct device *dev, struct device_attribute *attr, char *buf) | |
1462 | { | |
1463 | struct sensor_device_attribute_2 *sensor_attr = | |
1464 | to_sensor_dev_attr_2(attr); | |
1465 | int nr = sensor_attr->nr; | |
1466 | int index = sensor_attr->index; | |
1467 | struct w83795_data *data = w83795_update_device(dev); | |
1468 | u16 val = data->in[index][nr]; | |
1469 | u8 lsb_idx; | |
1470 | ||
1471 | switch (nr) { | |
1472 | case IN_READ: | |
1473 | /* calculate this value again by sensors as sensors3.conf */ | |
1474 | if ((index >= 17) && | |
6f9dfd85 | 1475 | !((data->has_gain >> (index - 17)) & 1)) |
792d376b WS |
1476 | val *= 8; |
1477 | break; | |
1478 | case IN_MAX: | |
1479 | case IN_LOW: | |
1480 | lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; | |
1481 | val <<= 2; | |
1482 | val |= (data->in_lsb[lsb_idx][nr] >> | |
5d2cd958 | 1483 | IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]) & 0x03; |
792d376b | 1484 | if ((index >= 17) && |
6f9dfd85 | 1485 | !((data->has_gain >> (index - 17)) & 1)) |
792d376b WS |
1486 | val *= 8; |
1487 | break; | |
1488 | } | |
1489 | val = in_from_reg(index, val); | |
1490 | ||
1491 | return sprintf(buf, "%d\n", val); | |
1492 | } | |
1493 | ||
1494 | static ssize_t | |
1495 | store_in(struct device *dev, struct device_attribute *attr, | |
1496 | const char *buf, size_t count) | |
1497 | { | |
1498 | struct sensor_device_attribute_2 *sensor_attr = | |
1499 | to_sensor_dev_attr_2(attr); | |
1500 | int nr = sensor_attr->nr; | |
1501 | int index = sensor_attr->index; | |
1502 | struct i2c_client *client = to_i2c_client(dev); | |
1503 | struct w83795_data *data = i2c_get_clientdata(client); | |
1504 | unsigned long val; | |
1505 | u8 tmp; | |
1506 | u8 lsb_idx; | |
1507 | ||
1508 | if (strict_strtoul(buf, 10, &val) < 0) | |
1509 | return -EINVAL; | |
1510 | val = in_to_reg(index, val); | |
1511 | ||
1512 | if ((index >= 17) && | |
6f9dfd85 | 1513 | !((data->has_gain >> (index - 17)) & 1)) |
792d376b WS |
1514 | val /= 8; |
1515 | val = SENSORS_LIMIT(val, 0, 0x3FF); | |
1516 | mutex_lock(&data->update_lock); | |
1517 | ||
1518 | lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX]; | |
1519 | tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr)); | |
1520 | tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]); | |
1521 | tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]; | |
1522 | w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp); | |
1523 | data->in_lsb[lsb_idx][nr] = tmp; | |
1524 | ||
1525 | tmp = (val >> 2) & 0xff; | |
1526 | w83795_write(client, W83795_REG_IN[index][nr], tmp); | |
1527 | data->in[index][nr] = tmp; | |
1528 | ||
1529 | mutex_unlock(&data->update_lock); | |
1530 | return count; | |
1531 | } | |
1532 | ||
1533 | ||
00030af2 | 1534 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
792d376b WS |
1535 | static ssize_t |
1536 | show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf) | |
1537 | { | |
1538 | struct sensor_device_attribute_2 *sensor_attr = | |
1539 | to_sensor_dev_attr_2(attr); | |
1540 | int nr = sensor_attr->nr; | |
1bb3450c | 1541 | struct w83795_data *data = w83795_update_pwm_config(dev); |
792d376b WS |
1542 | u16 val = data->setup_pwm[nr]; |
1543 | ||
1544 | switch (nr) { | |
1545 | case SETUP_PWM_UPTIME: | |
1546 | case SETUP_PWM_DOWNTIME: | |
1547 | val = time_from_reg(val); | |
1548 | break; | |
1549 | } | |
1550 | ||
1551 | return sprintf(buf, "%d\n", val); | |
1552 | } | |
1553 | ||
1554 | static ssize_t | |
1555 | store_sf_setup(struct device *dev, struct device_attribute *attr, | |
1556 | const char *buf, size_t count) | |
1557 | { | |
1558 | struct sensor_device_attribute_2 *sensor_attr = | |
1559 | to_sensor_dev_attr_2(attr); | |
1560 | int nr = sensor_attr->nr; | |
1561 | struct i2c_client *client = to_i2c_client(dev); | |
1562 | struct w83795_data *data = i2c_get_clientdata(client); | |
1563 | unsigned long val; | |
1564 | ||
1565 | if (strict_strtoul(buf, 10, &val) < 0) | |
1566 | return -EINVAL; | |
1567 | ||
1568 | switch (nr) { | |
1569 | case SETUP_PWM_DEFAULT: | |
1570 | val = SENSORS_LIMIT(val, 0, 0xff); | |
1571 | break; | |
1572 | case SETUP_PWM_UPTIME: | |
1573 | case SETUP_PWM_DOWNTIME: | |
1574 | val = time_to_reg(val); | |
1575 | if (val == 0) | |
1576 | return -EINVAL; | |
1577 | break; | |
1578 | } | |
1579 | ||
1580 | mutex_lock(&data->update_lock); | |
1581 | data->setup_pwm[nr] = val; | |
1582 | w83795_write(client, W83795_REG_SETUP_PWM(nr), val); | |
1583 | mutex_unlock(&data->update_lock); | |
1584 | return count; | |
1585 | } | |
00030af2 | 1586 | #endif |
792d376b WS |
1587 | |
1588 | ||
1589 | #define NOT_USED -1 | |
1590 | ||
0e256018 JD |
1591 | /* Don't change the attribute order, _max and _min are accessed by index |
1592 | * somewhere else in the code */ | |
87df0dad | 1593 | #define SENSOR_ATTR_IN(index) { \ |
792d376b WS |
1594 | SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \ |
1595 | IN_READ, index), \ | |
1596 | SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \ | |
1597 | store_in, IN_MAX, index), \ | |
1598 | SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \ | |
1599 | store_in, IN_LOW, index), \ | |
1600 | SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
1601 | NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \ | |
1602 | SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \ | |
1603 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
87df0dad | 1604 | index + ((index > 14) ? 1 : 0)) } |
792d376b | 1605 | |
87df0dad | 1606 | #define SENSOR_ATTR_FAN(index) { \ |
792d376b WS |
1607 | SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \ |
1608 | NULL, FAN_INPUT, index - 1), \ | |
1609 | SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \ | |
1610 | show_fan, store_fan_min, FAN_MIN, index - 1), \ | |
1611 | SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \ | |
1612 | NULL, ALARM_STATUS, index + 31), \ | |
1613 | SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \ | |
87df0dad | 1614 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) } |
792d376b | 1615 | |
b5f6a90a | 1616 | #define SENSOR_ATTR_PWM(index) { \ |
792d376b WS |
1617 | SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \ |
1618 | store_pwm, PWM_OUTPUT, index - 1), \ | |
1619 | SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \ | |
1620 | show_pwm, store_pwm, PWM_NONSTOP, index - 1), \ | |
1621 | SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \ | |
1622 | show_pwm, store_pwm, PWM_START, index - 1), \ | |
1623 | SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \ | |
1624 | show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \ | |
01879a85 JD |
1625 | SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \ |
1626 | show_pwm, store_pwm, PWM_FREQ, index - 1), \ | |
792d376b | 1627 | SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \ |
b2cc528e | 1628 | show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \ |
d5ab845a JD |
1629 | SENSOR_ATTR_2(pwm##index##_mode, S_IRUGO, \ |
1630 | show_pwm_mode, NULL, NOT_USED, index - 1), \ | |
b2cc528e JD |
1631 | SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \ |
1632 | show_fanin, store_fanin, FANIN_TARGET, index - 1) } | |
792d376b | 1633 | |
87df0dad | 1634 | #define SENSOR_ATTR_DTS(index) { \ |
792d376b WS |
1635 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \ |
1636 | show_dts_mode, NULL, NOT_USED, index - 7), \ | |
1637 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \ | |
1638 | NULL, NOT_USED, index - 7), \ | |
a0ce402f | 1639 | SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \ |
792d376b | 1640 | store_dts_ext, DTS_CRIT, NOT_USED), \ |
a0ce402f | 1641 | SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ |
792d376b | 1642 | show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \ |
a0ce402f | 1643 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \ |
792d376b | 1644 | store_dts_ext, DTS_WARN, NOT_USED), \ |
a0ce402f | 1645 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ |
792d376b WS |
1646 | show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \ |
1647 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
1648 | show_alarm_beep, NULL, ALARM_STATUS, index + 17), \ | |
1649 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
87df0dad | 1650 | show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) } |
792d376b | 1651 | |
87df0dad | 1652 | #define SENSOR_ATTR_TEMP(index) { \ |
39deb699 | 1653 | SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \ |
792d376b WS |
1654 | show_temp_mode, store_temp_mode, NOT_USED, index - 1), \ |
1655 | SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \ | |
1656 | NULL, TEMP_READ, index - 1), \ | |
a0ce402f | 1657 | SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \ |
792d376b | 1658 | store_temp, TEMP_CRIT, index - 1), \ |
a0ce402f | 1659 | SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \ |
792d376b | 1660 | show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \ |
a0ce402f | 1661 | SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \ |
792d376b | 1662 | store_temp, TEMP_WARN, index - 1), \ |
a0ce402f | 1663 | SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \ |
792d376b WS |
1664 | show_temp, store_temp, TEMP_WARN_HYST, index - 1), \ |
1665 | SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \ | |
1666 | show_alarm_beep, NULL, ALARM_STATUS, \ | |
1667 | index + (index > 4 ? 11 : 17)), \ | |
1668 | SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \ | |
1669 | show_alarm_beep, store_beep, BEEP_ENABLE, \ | |
1670 | index + (index > 4 ? 11 : 17)), \ | |
792d376b WS |
1671 | SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \ |
1672 | show_temp_pwm_enable, store_temp_pwm_enable, \ | |
1673 | TEMP_PWM_ENABLE, index - 1), \ | |
1674 | SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \ | |
1675 | show_temp_pwm_enable, store_temp_pwm_enable, \ | |
1676 | TEMP_PWM_FAN_MAP, index - 1), \ | |
1677 | SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \ | |
1678 | show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \ | |
a0ce402f | 1679 | SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \ |
792d376b | 1680 | show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \ |
a0ce402f | 1681 | SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \ |
792d376b WS |
1682 | show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \ |
1683 | SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \ | |
1684 | show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \ | |
1685 | SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \ | |
1686 | show_sf4_pwm, store_sf4_pwm, 0, index - 1), \ | |
1687 | SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \ | |
1688 | show_sf4_pwm, store_sf4_pwm, 1, index - 1), \ | |
1689 | SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \ | |
1690 | show_sf4_pwm, store_sf4_pwm, 2, index - 1), \ | |
1691 | SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \ | |
1692 | show_sf4_pwm, store_sf4_pwm, 3, index - 1), \ | |
1693 | SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \ | |
1694 | show_sf4_pwm, store_sf4_pwm, 4, index - 1), \ | |
1695 | SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \ | |
1696 | show_sf4_pwm, store_sf4_pwm, 5, index - 1), \ | |
1697 | SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \ | |
1698 | show_sf4_pwm, store_sf4_pwm, 6, index - 1), \ | |
1699 | SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\ | |
1700 | show_sf4_temp, store_sf4_temp, 0, index - 1), \ | |
1701 | SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\ | |
1702 | show_sf4_temp, store_sf4_temp, 1, index - 1), \ | |
1703 | SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\ | |
1704 | show_sf4_temp, store_sf4_temp, 2, index - 1), \ | |
1705 | SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\ | |
1706 | show_sf4_temp, store_sf4_temp, 3, index - 1), \ | |
1707 | SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\ | |
1708 | show_sf4_temp, store_sf4_temp, 4, index - 1), \ | |
1709 | SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\ | |
1710 | show_sf4_temp, store_sf4_temp, 5, index - 1), \ | |
1711 | SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\ | |
87df0dad | 1712 | show_sf4_temp, store_sf4_temp, 6, index - 1) } |
792d376b WS |
1713 | |
1714 | ||
87df0dad | 1715 | static struct sensor_device_attribute_2 w83795_in[][5] = { |
792d376b WS |
1716 | SENSOR_ATTR_IN(0), |
1717 | SENSOR_ATTR_IN(1), | |
1718 | SENSOR_ATTR_IN(2), | |
1719 | SENSOR_ATTR_IN(3), | |
1720 | SENSOR_ATTR_IN(4), | |
1721 | SENSOR_ATTR_IN(5), | |
1722 | SENSOR_ATTR_IN(6), | |
1723 | SENSOR_ATTR_IN(7), | |
1724 | SENSOR_ATTR_IN(8), | |
1725 | SENSOR_ATTR_IN(9), | |
1726 | SENSOR_ATTR_IN(10), | |
1727 | SENSOR_ATTR_IN(11), | |
1728 | SENSOR_ATTR_IN(12), | |
1729 | SENSOR_ATTR_IN(13), | |
1730 | SENSOR_ATTR_IN(14), | |
1731 | SENSOR_ATTR_IN(15), | |
1732 | SENSOR_ATTR_IN(16), | |
1733 | SENSOR_ATTR_IN(17), | |
1734 | SENSOR_ATTR_IN(18), | |
1735 | SENSOR_ATTR_IN(19), | |
1736 | SENSOR_ATTR_IN(20), | |
1737 | }; | |
1738 | ||
86ef4d2f | 1739 | static const struct sensor_device_attribute_2 w83795_fan[][4] = { |
792d376b WS |
1740 | SENSOR_ATTR_FAN(1), |
1741 | SENSOR_ATTR_FAN(2), | |
1742 | SENSOR_ATTR_FAN(3), | |
1743 | SENSOR_ATTR_FAN(4), | |
1744 | SENSOR_ATTR_FAN(5), | |
1745 | SENSOR_ATTR_FAN(6), | |
1746 | SENSOR_ATTR_FAN(7), | |
1747 | SENSOR_ATTR_FAN(8), | |
1748 | SENSOR_ATTR_FAN(9), | |
1749 | SENSOR_ATTR_FAN(10), | |
1750 | SENSOR_ATTR_FAN(11), | |
1751 | SENSOR_ATTR_FAN(12), | |
1752 | SENSOR_ATTR_FAN(13), | |
1753 | SENSOR_ATTR_FAN(14), | |
1754 | }; | |
1755 | ||
edff2f8d | 1756 | static const struct sensor_device_attribute_2 w83795_temp[][28] = { |
792d376b WS |
1757 | SENSOR_ATTR_TEMP(1), |
1758 | SENSOR_ATTR_TEMP(2), | |
1759 | SENSOR_ATTR_TEMP(3), | |
1760 | SENSOR_ATTR_TEMP(4), | |
1761 | SENSOR_ATTR_TEMP(5), | |
1762 | SENSOR_ATTR_TEMP(6), | |
1763 | }; | |
1764 | ||
86ef4d2f | 1765 | static const struct sensor_device_attribute_2 w83795_dts[][8] = { |
792d376b WS |
1766 | SENSOR_ATTR_DTS(7), |
1767 | SENSOR_ATTR_DTS(8), | |
1768 | SENSOR_ATTR_DTS(9), | |
1769 | SENSOR_ATTR_DTS(10), | |
1770 | SENSOR_ATTR_DTS(11), | |
1771 | SENSOR_ATTR_DTS(12), | |
1772 | SENSOR_ATTR_DTS(13), | |
1773 | SENSOR_ATTR_DTS(14), | |
1774 | }; | |
1775 | ||
d5ab845a | 1776 | static const struct sensor_device_attribute_2 w83795_pwm[][8] = { |
b5f6a90a JD |
1777 | SENSOR_ATTR_PWM(1), |
1778 | SENSOR_ATTR_PWM(2), | |
792d376b WS |
1779 | SENSOR_ATTR_PWM(3), |
1780 | SENSOR_ATTR_PWM(4), | |
1781 | SENSOR_ATTR_PWM(5), | |
1782 | SENSOR_ATTR_PWM(6), | |
1783 | SENSOR_ATTR_PWM(7), | |
1784 | SENSOR_ATTR_PWM(8), | |
1785 | }; | |
1786 | ||
edff2f8d JD |
1787 | static const struct sensor_device_attribute_2 w83795_tss[6] = { |
1788 | SENSOR_ATTR_2(temp1_source_sel, S_IWUSR | S_IRUGO, | |
1789 | show_temp_src, store_temp_src, NOT_USED, 0), | |
1790 | SENSOR_ATTR_2(temp2_source_sel, S_IWUSR | S_IRUGO, | |
1791 | show_temp_src, store_temp_src, NOT_USED, 1), | |
1792 | SENSOR_ATTR_2(temp3_source_sel, S_IWUSR | S_IRUGO, | |
1793 | show_temp_src, store_temp_src, NOT_USED, 2), | |
1794 | SENSOR_ATTR_2(temp4_source_sel, S_IWUSR | S_IRUGO, | |
1795 | show_temp_src, store_temp_src, NOT_USED, 3), | |
1796 | SENSOR_ATTR_2(temp5_source_sel, S_IWUSR | S_IRUGO, | |
1797 | show_temp_src, store_temp_src, NOT_USED, 4), | |
1798 | SENSOR_ATTR_2(temp6_source_sel, S_IWUSR | S_IRUGO, | |
1799 | show_temp_src, store_temp_src, NOT_USED, 5), | |
1800 | }; | |
1801 | ||
86ef4d2f | 1802 | static const struct sensor_device_attribute_2 sda_single_files[] = { |
24377101 | 1803 | SENSOR_ATTR_2(intrusion0_alarm, S_IWUSR | S_IRUGO, show_alarm_beep, |
792d376b | 1804 | store_chassis_clear, ALARM_STATUS, 46), |
24377101 JD |
1805 | SENSOR_ATTR_2(intrusion0_beep, S_IWUSR | S_IRUGO, show_alarm_beep, |
1806 | store_beep, BEEP_ENABLE, 46), | |
02728ffe JD |
1807 | SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep, |
1808 | store_beep, BEEP_ENABLE, 47), | |
00030af2 | 1809 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
792d376b WS |
1810 | SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin, |
1811 | store_fanin, FANIN_TOL, NOT_USED), | |
1812 | SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup, | |
1813 | store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED), | |
1814 | SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1815 | store_sf_setup, SETUP_PWM_UPTIME, NOT_USED), | |
1816 | SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup, | |
1817 | store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED), | |
00030af2 | 1818 | #endif |
792d376b WS |
1819 | }; |
1820 | ||
1821 | /* | |
1822 | * Driver interface | |
1823 | */ | |
1824 | ||
1825 | static void w83795_init_client(struct i2c_client *client) | |
1826 | { | |
01879a85 JD |
1827 | struct w83795_data *data = i2c_get_clientdata(client); |
1828 | static const u16 clkin[4] = { /* in kHz */ | |
1829 | 14318, 24000, 33333, 48000 | |
1830 | }; | |
80646b95 JD |
1831 | u8 config; |
1832 | ||
792d376b WS |
1833 | if (reset) |
1834 | w83795_write(client, W83795_REG_CONFIG, 0x80); | |
1835 | ||
80646b95 JD |
1836 | /* Start monitoring if needed */ |
1837 | config = w83795_read(client, W83795_REG_CONFIG); | |
1838 | if (!(config & W83795_REG_CONFIG_START)) { | |
1839 | dev_info(&client->dev, "Enabling monitoring operations\n"); | |
1840 | w83795_write(client, W83795_REG_CONFIG, | |
1841 | config | W83795_REG_CONFIG_START); | |
1842 | } | |
01879a85 JD |
1843 | |
1844 | data->clkin = clkin[(config >> 3) & 0x3]; | |
1845 | dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin); | |
792d376b WS |
1846 | } |
1847 | ||
2be381de JD |
1848 | static int w83795_get_device_id(struct i2c_client *client) |
1849 | { | |
1850 | int device_id; | |
1851 | ||
1852 | device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID); | |
1853 | ||
1854 | /* Special case for rev. A chips; can't be checked first because later | |
1855 | revisions emulate this for compatibility */ | |
1856 | if (device_id < 0 || (device_id & 0xf0) != 0x50) { | |
1857 | int alt_id; | |
1858 | ||
1859 | alt_id = i2c_smbus_read_byte_data(client, | |
1860 | W83795_REG_DEVICEID_A); | |
1861 | if (alt_id == 0x50) | |
1862 | device_id = alt_id; | |
1863 | } | |
1864 | ||
1865 | return device_id; | |
1866 | } | |
1867 | ||
792d376b WS |
1868 | /* Return 0 if detection is successful, -ENODEV otherwise */ |
1869 | static int w83795_detect(struct i2c_client *client, | |
1870 | struct i2c_board_info *info) | |
1871 | { | |
2be381de | 1872 | int bank, vendor_id, device_id, expected, i2c_addr, config; |
792d376b WS |
1873 | struct i2c_adapter *adapter = client->adapter; |
1874 | unsigned short address = client->addr; | |
093d1a47 | 1875 | const char *chip_name; |
792d376b WS |
1876 | |
1877 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) | |
1878 | return -ENODEV; | |
1879 | bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); | |
2be381de JD |
1880 | if (bank < 0 || (bank & 0x7c)) { |
1881 | dev_dbg(&adapter->dev, | |
1882 | "w83795: Detection failed at addr 0x%02hx, check %s\n", | |
1883 | address, "bank"); | |
1884 | return -ENODEV; | |
1885 | } | |
792d376b | 1886 | |
792d376b | 1887 | /* Check Nuvoton vendor ID */ |
2be381de JD |
1888 | vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID); |
1889 | expected = bank & 0x80 ? 0x5c : 0xa3; | |
1890 | if (vendor_id != expected) { | |
1891 | dev_dbg(&adapter->dev, | |
1892 | "w83795: Detection failed at addr 0x%02hx, check %s\n", | |
1893 | address, "vendor id"); | |
792d376b WS |
1894 | return -ENODEV; |
1895 | } | |
1896 | ||
2be381de JD |
1897 | /* Check device ID */ |
1898 | device_id = w83795_get_device_id(client) | | |
1899 | (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8); | |
1900 | if ((device_id >> 4) != 0x795) { | |
1901 | dev_dbg(&adapter->dev, | |
1902 | "w83795: Detection failed at addr 0x%02hx, check %s\n", | |
1903 | address, "device id\n"); | |
792d376b WS |
1904 | return -ENODEV; |
1905 | } | |
1906 | ||
2be381de JD |
1907 | /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR |
1908 | should match */ | |
1909 | if ((bank & 0x07) == 0) { | |
1910 | i2c_addr = i2c_smbus_read_byte_data(client, | |
1911 | W83795_REG_I2C_ADDR); | |
1912 | if ((i2c_addr & 0x7f) != address) { | |
1913 | dev_dbg(&adapter->dev, | |
1914 | "w83795: Detection failed at addr 0x%02hx, " | |
1915 | "check %s\n", address, "i2c addr"); | |
1916 | return -ENODEV; | |
1917 | } | |
792d376b WS |
1918 | } |
1919 | ||
093d1a47 JD |
1920 | /* Check 795 chip type: 795G or 795ADG |
1921 | Usually we don't write to chips during detection, but here we don't | |
1922 | quite have the choice; hopefully it's OK, we are about to return | |
1923 | success anyway */ | |
1924 | if ((bank & 0x07) != 0) | |
1925 | i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, | |
1926 | bank & ~0x07); | |
2be381de JD |
1927 | config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG); |
1928 | if (config & W83795_REG_CONFIG_CONFIG48) | |
093d1a47 | 1929 | chip_name = "w83795adg"; |
2be381de | 1930 | else |
093d1a47 | 1931 | chip_name = "w83795g"; |
792d376b | 1932 | |
093d1a47 | 1933 | strlcpy(info->type, chip_name, I2C_NAME_SIZE); |
2be381de JD |
1934 | dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name, |
1935 | 'A' + (device_id & 0xf), address); | |
792d376b WS |
1936 | |
1937 | return 0; | |
1938 | } | |
1939 | ||
6f3dcde9 JD |
1940 | static int w83795_handle_files(struct device *dev, int (*fn)(struct device *, |
1941 | const struct device_attribute *)) | |
892514a6 JD |
1942 | { |
1943 | struct w83795_data *data = dev_get_drvdata(dev); | |
87df0dad | 1944 | int err, i, j; |
892514a6 JD |
1945 | |
1946 | for (i = 0; i < ARRAY_SIZE(w83795_in); i++) { | |
87df0dad | 1947 | if (!(data->has_in & (1 << i))) |
892514a6 | 1948 | continue; |
87df0dad JD |
1949 | for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) { |
1950 | err = fn(dev, &w83795_in[i][j].dev_attr); | |
1951 | if (err) | |
1952 | return err; | |
1953 | } | |
892514a6 JD |
1954 | } |
1955 | ||
1956 | for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) { | |
87df0dad | 1957 | if (!(data->has_fan & (1 << i))) |
892514a6 | 1958 | continue; |
87df0dad JD |
1959 | for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) { |
1960 | err = fn(dev, &w83795_fan[i][j].dev_attr); | |
1961 | if (err) | |
1962 | return err; | |
1963 | } | |
892514a6 JD |
1964 | } |
1965 | ||
edff2f8d JD |
1966 | for (i = 0; i < ARRAY_SIZE(w83795_tss); i++) { |
1967 | j = w83795_tss_useful(data, i); | |
1968 | if (!j) | |
1969 | continue; | |
1970 | err = fn(dev, &w83795_tss[i].dev_attr); | |
1971 | if (err) | |
1972 | return err; | |
1973 | } | |
1974 | ||
892514a6 | 1975 | for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) { |
6f3dcde9 | 1976 | err = fn(dev, &sda_single_files[i].dev_attr); |
892514a6 JD |
1977 | if (err) |
1978 | return err; | |
1979 | } | |
1980 | ||
00030af2 | 1981 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
b5f6a90a JD |
1982 | for (i = 0; i < data->has_pwm; i++) { |
1983 | for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) { | |
1984 | err = fn(dev, &w83795_pwm[i][j].dev_attr); | |
892514a6 JD |
1985 | if (err) |
1986 | return err; | |
1987 | } | |
1988 | } | |
00030af2 | 1989 | #endif |
892514a6 JD |
1990 | |
1991 | for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) { | |
87df0dad | 1992 | if (!(data->has_temp & (1 << i))) |
892514a6 | 1993 | continue; |
00030af2 | 1994 | #ifdef CONFIG_SENSORS_W83795_FANCTRL |
87df0dad | 1995 | for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) { |
00030af2 JD |
1996 | #else |
1997 | for (j = 0; j < 8; j++) { | |
1998 | #endif | |
87df0dad JD |
1999 | err = fn(dev, &w83795_temp[i][j].dev_attr); |
2000 | if (err) | |
2001 | return err; | |
2002 | } | |
892514a6 JD |
2003 | } |
2004 | ||
eb02755a | 2005 | if (data->enable_dts) { |
892514a6 | 2006 | for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) { |
87df0dad | 2007 | if (!(data->has_dts & (1 << i))) |
892514a6 | 2008 | continue; |
87df0dad JD |
2009 | for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) { |
2010 | err = fn(dev, &w83795_dts[i][j].dev_attr); | |
2011 | if (err) | |
2012 | return err; | |
2013 | } | |
892514a6 JD |
2014 | } |
2015 | } | |
2016 | ||
892514a6 JD |
2017 | return 0; |
2018 | } | |
2019 | ||
6f3dcde9 JD |
2020 | /* We need a wrapper that fits in w83795_handle_files */ |
2021 | static int device_remove_file_wrapper(struct device *dev, | |
2022 | const struct device_attribute *attr) | |
2fa09878 | 2023 | { |
6f3dcde9 JD |
2024 | device_remove_file(dev, attr); |
2025 | return 0; | |
2fa09878 JD |
2026 | } |
2027 | ||
0e256018 JD |
2028 | static void w83795_check_dynamic_in_limits(struct i2c_client *client) |
2029 | { | |
2030 | struct w83795_data *data = i2c_get_clientdata(client); | |
2031 | u8 vid_ctl; | |
2032 | int i, err_max, err_min; | |
2033 | ||
2034 | vid_ctl = w83795_read(client, W83795_REG_VID_CTRL); | |
2035 | ||
2036 | /* Return immediately if VRM isn't configured */ | |
2037 | if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07) | |
2038 | return; | |
2039 | ||
2040 | data->has_dyn_in = (vid_ctl >> 3) & 0x07; | |
2041 | for (i = 0; i < 2; i++) { | |
2042 | if (!(data->has_dyn_in & (1 << i))) | |
2043 | continue; | |
2044 | ||
2045 | /* Voltage limits in dynamic mode, switch to read-only */ | |
2046 | err_max = sysfs_chmod_file(&client->dev.kobj, | |
2047 | &w83795_in[i][2].dev_attr.attr, | |
2048 | S_IRUGO); | |
2049 | err_min = sysfs_chmod_file(&client->dev.kobj, | |
2050 | &w83795_in[i][3].dev_attr.attr, | |
2051 | S_IRUGO); | |
2052 | if (err_max || err_min) | |
2053 | dev_warn(&client->dev, "Failed to set in%d limits " | |
2054 | "read-only (%d, %d)\n", i, err_max, err_min); | |
2055 | else | |
2056 | dev_info(&client->dev, "in%d limits set dynamically " | |
2057 | "from VID\n", i); | |
2058 | } | |
2059 | } | |
2060 | ||
71caf46f JD |
2061 | /* Check pins that can be used for either temperature or voltage monitoring */ |
2062 | static void w83795_apply_temp_config(struct w83795_data *data, u8 config, | |
2063 | int temp_chan, int in_chan) | |
2064 | { | |
2065 | /* config is a 2-bit value */ | |
2066 | switch (config) { | |
2067 | case 0x2: /* Voltage monitoring */ | |
2068 | data->has_in |= 1 << in_chan; | |
2069 | break; | |
2070 | case 0x1: /* Thermal diode */ | |
2071 | if (temp_chan >= 4) | |
2072 | break; | |
2073 | data->temp_mode |= 1 << temp_chan; | |
2074 | /* fall through */ | |
2075 | case 0x3: /* Thermistor */ | |
2076 | data->has_temp |= 1 << temp_chan; | |
2077 | break; | |
2078 | } | |
2079 | } | |
2080 | ||
792d376b WS |
2081 | static int w83795_probe(struct i2c_client *client, |
2082 | const struct i2c_device_id *id) | |
2083 | { | |
2084 | int i; | |
2085 | u8 tmp; | |
2086 | struct device *dev = &client->dev; | |
2087 | struct w83795_data *data; | |
71caf46f | 2088 | int err; |
792d376b WS |
2089 | |
2090 | data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL); | |
2091 | if (!data) { | |
2092 | err = -ENOMEM; | |
2093 | goto exit; | |
2094 | } | |
2095 | ||
2096 | i2c_set_clientdata(client, data); | |
093d1a47 | 2097 | data->chip_type = id->driver_data; |
792d376b WS |
2098 | data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL); |
2099 | mutex_init(&data->update_lock); | |
2100 | ||
2101 | /* Initialize the chip */ | |
2102 | w83795_init_client(client); | |
2103 | ||
71caf46f JD |
2104 | /* Check which voltages and fans are present */ |
2105 | data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1) | |
2106 | | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8); | |
2107 | data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1) | |
2108 | | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8); | |
792d376b | 2109 | |
71caf46f | 2110 | /* Check which analog temperatures and extra voltages are present */ |
792d376b WS |
2111 | tmp = w83795_read(client, W83795_REG_TEMP_CTRL1); |
2112 | if (tmp & 0x20) | |
2113 | data->enable_dts = 1; | |
71caf46f JD |
2114 | w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16); |
2115 | w83795_apply_temp_config(data, tmp & 0x3, 4, 15); | |
792d376b | 2116 | tmp = w83795_read(client, W83795_REG_TEMP_CTRL2); |
71caf46f JD |
2117 | w83795_apply_temp_config(data, tmp >> 6, 3, 20); |
2118 | w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19); | |
2119 | w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18); | |
2120 | w83795_apply_temp_config(data, tmp & 0x3, 0, 17); | |
792d376b WS |
2121 | |
2122 | /* Check DTS enable status */ | |
71caf46f | 2123 | if (data->enable_dts) { |
792d376b WS |
2124 | if (1 & w83795_read(client, W83795_REG_DTSC)) |
2125 | data->enable_dts |= 2; | |
2126 | data->has_dts = w83795_read(client, W83795_REG_DTSE); | |
2127 | } | |
2128 | ||
54891a3c JD |
2129 | /* Report PECI Tbase values */ |
2130 | if (data->enable_dts == 1) { | |
2131 | for (i = 0; i < 8; i++) { | |
2132 | if (!(data->has_dts & (1 << i))) | |
2133 | continue; | |
2134 | tmp = w83795_read(client, W83795_REG_PECI_TBASE(i)); | |
2135 | dev_info(&client->dev, | |
2136 | "PECI agent %d Tbase temperature: %u\n", | |
2137 | i + 1, (unsigned int)tmp & 0x7f); | |
2138 | } | |
2139 | } | |
2140 | ||
792d376b | 2141 | data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f; |
792d376b WS |
2142 | |
2143 | /* pwm and smart fan */ | |
2144 | if (data->chip_type == w83795g) | |
2145 | data->has_pwm = 8; | |
2146 | else | |
2147 | data->has_pwm = 2; | |
792d376b | 2148 | |
6f3dcde9 | 2149 | err = w83795_handle_files(dev, device_create_file); |
892514a6 JD |
2150 | if (err) |
2151 | goto exit_remove; | |
792d376b | 2152 | |
0e256018 JD |
2153 | if (data->chip_type == w83795g) |
2154 | w83795_check_dynamic_in_limits(client); | |
2155 | ||
792d376b WS |
2156 | data->hwmon_dev = hwmon_device_register(dev); |
2157 | if (IS_ERR(data->hwmon_dev)) { | |
2158 | err = PTR_ERR(data->hwmon_dev); | |
2159 | goto exit_remove; | |
2160 | } | |
2161 | ||
2162 | return 0; | |
2163 | ||
792d376b | 2164 | exit_remove: |
6f3dcde9 | 2165 | w83795_handle_files(dev, device_remove_file_wrapper); |
792d376b WS |
2166 | kfree(data); |
2167 | exit: | |
2168 | return err; | |
2169 | } | |
2170 | ||
2171 | static int w83795_remove(struct i2c_client *client) | |
2172 | { | |
2173 | struct w83795_data *data = i2c_get_clientdata(client); | |
792d376b WS |
2174 | |
2175 | hwmon_device_unregister(data->hwmon_dev); | |
6f3dcde9 | 2176 | w83795_handle_files(&client->dev, device_remove_file_wrapper); |
792d376b WS |
2177 | kfree(data); |
2178 | ||
2179 | return 0; | |
2180 | } | |
2181 | ||
2182 | ||
2183 | static const struct i2c_device_id w83795_id[] = { | |
093d1a47 JD |
2184 | { "w83795g", w83795g }, |
2185 | { "w83795adg", w83795adg }, | |
792d376b WS |
2186 | { } |
2187 | }; | |
2188 | MODULE_DEVICE_TABLE(i2c, w83795_id); | |
2189 | ||
2190 | static struct i2c_driver w83795_driver = { | |
2191 | .driver = { | |
2192 | .name = "w83795", | |
2193 | }, | |
2194 | .probe = w83795_probe, | |
2195 | .remove = w83795_remove, | |
2196 | .id_table = w83795_id, | |
2197 | ||
2198 | .class = I2C_CLASS_HWMON, | |
2199 | .detect = w83795_detect, | |
2200 | .address_list = normal_i2c, | |
2201 | }; | |
2202 | ||
2203 | static int __init sensors_w83795_init(void) | |
2204 | { | |
2205 | return i2c_add_driver(&w83795_driver); | |
2206 | } | |
2207 | ||
2208 | static void __exit sensors_w83795_exit(void) | |
2209 | { | |
2210 | i2c_del_driver(&w83795_driver); | |
2211 | } | |
2212 | ||
e3760b43 | 2213 | MODULE_AUTHOR("Wei Song, Jean Delvare <khali@linux-fr.org>"); |
315bacfd | 2214 | MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver"); |
792d376b WS |
2215 | MODULE_LICENSE("GPL"); |
2216 | ||
2217 | module_init(sensors_w83795_init); | |
2218 | module_exit(sensors_w83795_exit); |