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Commit | Line | Data |
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1da177e4 | 1 | /* |
3d438291 | 2 | * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters |
1da177e4 | 3 | * Copyright (C) 2004 Arcom Control Systems |
c01b0831 | 4 | * Copyright (C) 2008 Pengutronix |
1da177e4 LT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
5694f8a8 JD |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, |
19 | * MA 02110-1301 USA. | |
1da177e4 LT |
20 | */ |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/moduleparam.h> | |
25 | #include <linux/delay.h> | |
8e99ada8 | 26 | #include <linux/jiffies.h> |
1da177e4 LT |
27 | #include <linux/init.h> |
28 | #include <linux/errno.h> | |
29 | #include <linux/i2c.h> | |
30 | #include <linux/i2c-algo-pca.h> | |
1da177e4 | 31 | |
bac3e7c2 FS |
32 | #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \ |
33 | printk(KERN_DEBUG fmt, ## args); } while (0) | |
34 | #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \ | |
35 | printk(KERN_DEBUG fmt, ## args); } while (0) | |
36 | #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \ | |
37 | printk(KERN_DEBUG fmt, ## args); } while (0) | |
1da177e4 | 38 | |
60507095 | 39 | static int i2c_debug; |
1da177e4 | 40 | |
c01b0831 WS |
41 | #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val) |
42 | #define pca_inw(adap, reg) adap->read_byte(adap->data, reg) | |
1da177e4 LT |
43 | |
44 | #define pca_status(adap) pca_inw(adap, I2C_PCA_STA) | |
c01b0831 | 45 | #define pca_clock(adap) adap->i2c_clock |
1da177e4 LT |
46 | #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val) |
47 | #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON) | |
c01b0831 WS |
48 | #define pca_wait(adap) adap->wait_for_completion(adap->data) |
49 | #define pca_reset(adap) adap->reset_chip(adap->data) | |
1da177e4 | 50 | |
eff9ec95 MAC |
51 | static void pca9665_reset(void *pd) |
52 | { | |
53 | struct i2c_algo_pca_data *adap = pd; | |
54 | pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); | |
55 | pca_outw(adap, I2C_PCA_IND, 0xA5); | |
56 | pca_outw(adap, I2C_PCA_IND, 0x5A); | |
57 | } | |
58 | ||
1da177e4 LT |
59 | /* |
60 | * Generate a start condition on the i2c bus. | |
61 | * | |
44bbe87e | 62 | * returns after the start condition has occurred |
1da177e4 | 63 | */ |
2378bc09 | 64 | static int pca_start(struct i2c_algo_pca_data *adap) |
1da177e4 LT |
65 | { |
66 | int sta = pca_get_con(adap); | |
67 | DEB2("=== START\n"); | |
68 | sta |= I2C_PCA_CON_STA; | |
69 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); | |
70 | pca_set_con(adap, sta); | |
2378bc09 | 71 | return pca_wait(adap); |
1da177e4 LT |
72 | } |
73 | ||
74 | /* | |
46b615f4 | 75 | * Generate a repeated start condition on the i2c bus |
1da177e4 | 76 | * |
44bbe87e | 77 | * return after the repeated start condition has occurred |
1da177e4 | 78 | */ |
2378bc09 | 79 | static int pca_repeated_start(struct i2c_algo_pca_data *adap) |
1da177e4 LT |
80 | { |
81 | int sta = pca_get_con(adap); | |
82 | DEB2("=== REPEATED START\n"); | |
83 | sta |= I2C_PCA_CON_STA; | |
84 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); | |
85 | pca_set_con(adap, sta); | |
2378bc09 | 86 | return pca_wait(adap); |
1da177e4 LT |
87 | } |
88 | ||
89 | /* | |
90 | * Generate a stop condition on the i2c bus | |
91 | * | |
92 | * returns after the stop condition has been generated | |
93 | * | |
94 | * STOPs do not generate an interrupt or set the SI flag, since the | |
46b615f4 | 95 | * part returns the idle state (0xf8). Hence we don't need to |
1da177e4 LT |
96 | * pca_wait here. |
97 | */ | |
98 | static void pca_stop(struct i2c_algo_pca_data *adap) | |
99 | { | |
100 | int sta = pca_get_con(adap); | |
101 | DEB2("=== STOP\n"); | |
102 | sta |= I2C_PCA_CON_STO; | |
103 | sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI); | |
104 | pca_set_con(adap, sta); | |
105 | } | |
106 | ||
107 | /* | |
108 | * Send the slave address and R/W bit | |
109 | * | |
110 | * returns after the address has been sent | |
111 | */ | |
2378bc09 | 112 | static int pca_address(struct i2c_algo_pca_data *adap, |
2086ca48 | 113 | struct i2c_msg *msg) |
1da177e4 LT |
114 | { |
115 | int sta = pca_get_con(adap); | |
116 | int addr; | |
117 | ||
2086ca48 FH |
118 | addr = ((0x7f & msg->addr) << 1); |
119 | if (msg->flags & I2C_M_RD) | |
1da177e4 | 120 | addr |= 1; |
3d438291 | 121 | DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n", |
1da177e4 | 122 | msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr); |
3d438291 | 123 | |
1da177e4 LT |
124 | pca_outw(adap, I2C_PCA_DAT, addr); |
125 | ||
126 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); | |
127 | pca_set_con(adap, sta); | |
128 | ||
2378bc09 | 129 | return pca_wait(adap); |
1da177e4 LT |
130 | } |
131 | ||
132 | /* | |
133 | * Transmit a byte. | |
134 | * | |
135 | * Returns after the byte has been transmitted | |
136 | */ | |
2378bc09 | 137 | static int pca_tx_byte(struct i2c_algo_pca_data *adap, |
2086ca48 | 138 | __u8 b) |
1da177e4 LT |
139 | { |
140 | int sta = pca_get_con(adap); | |
141 | DEB2("=== WRITE %#04x\n", b); | |
142 | pca_outw(adap, I2C_PCA_DAT, b); | |
143 | ||
144 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); | |
145 | pca_set_con(adap, sta); | |
146 | ||
2378bc09 | 147 | return pca_wait(adap); |
1da177e4 LT |
148 | } |
149 | ||
150 | /* | |
151 | * Receive a byte | |
152 | * | |
153 | * returns immediately. | |
154 | */ | |
3d438291 | 155 | static void pca_rx_byte(struct i2c_algo_pca_data *adap, |
1da177e4 LT |
156 | __u8 *b, int ack) |
157 | { | |
158 | *b = pca_inw(adap, I2C_PCA_DAT); | |
159 | DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK"); | |
160 | } | |
161 | ||
3d438291 | 162 | /* |
1da177e4 LT |
163 | * Setup ACK or NACK for next received byte and wait for it to arrive. |
164 | * | |
165 | * Returns after next byte has arrived. | |
166 | */ | |
2378bc09 | 167 | static int pca_rx_ack(struct i2c_algo_pca_data *adap, |
2086ca48 | 168 | int ack) |
1da177e4 LT |
169 | { |
170 | int sta = pca_get_con(adap); | |
171 | ||
172 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA); | |
173 | ||
2086ca48 | 174 | if (ack) |
1da177e4 LT |
175 | sta |= I2C_PCA_CON_AA; |
176 | ||
177 | pca_set_con(adap, sta); | |
2378bc09 | 178 | return pca_wait(adap); |
1da177e4 LT |
179 | } |
180 | ||
1da177e4 | 181 | static int pca_xfer(struct i2c_adapter *i2c_adap, |
2086ca48 FH |
182 | struct i2c_msg *msgs, |
183 | int num) | |
1da177e4 | 184 | { |
2086ca48 FH |
185 | struct i2c_algo_pca_data *adap = i2c_adap->algo_data; |
186 | struct i2c_msg *msg = NULL; | |
187 | int curmsg; | |
1da177e4 LT |
188 | int numbytes = 0; |
189 | int state; | |
190 | int ret; | |
2378bc09 | 191 | int completed = 1; |
8e99ada8 WS |
192 | unsigned long timeout = jiffies + i2c_adap->timeout; |
193 | ||
c454dee2 | 194 | while ((state = pca_status(adap)) != 0xf8) { |
8e99ada8 WS |
195 | if (time_before(jiffies, timeout)) { |
196 | msleep(10); | |
197 | } else { | |
198 | dev_dbg(&i2c_adap->dev, "bus is not idle. status is " | |
199 | "%#04x\n", state); | |
4403988a | 200 | return -EBUSY; |
8e99ada8 | 201 | } |
1da177e4 LT |
202 | } |
203 | ||
204 | DEB1("{{{ XFER %d messages\n", num); | |
205 | ||
2086ca48 | 206 | if (i2c_debug >= 2) { |
1da177e4 LT |
207 | for (curmsg = 0; curmsg < num; curmsg++) { |
208 | int addr, i; | |
209 | msg = &msgs[curmsg]; | |
3d438291 | 210 | |
1da177e4 | 211 | addr = (0x7f & msg->addr) ; |
3d438291 | 212 | |
2086ca48 | 213 | if (msg->flags & I2C_M_RD) |
3d438291 | 214 | printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n", |
2086ca48 | 215 | curmsg, msg->len, addr, (addr << 1) | 1); |
1da177e4 | 216 | else { |
3d438291 | 217 | printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s", |
2086ca48 | 218 | curmsg, msg->len, addr, addr << 1, |
1da177e4 | 219 | msg->len == 0 ? "" : ", "); |
2086ca48 | 220 | for (i = 0; i < msg->len; i++) |
1da177e4 LT |
221 | printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", "); |
222 | printk("]\n"); | |
223 | } | |
224 | } | |
225 | } | |
226 | ||
227 | curmsg = 0; | |
4403988a | 228 | ret = -EIO; |
1da177e4 LT |
229 | while (curmsg < num) { |
230 | state = pca_status(adap); | |
231 | ||
232 | DEB3("STATE is 0x%02x\n", state); | |
233 | msg = &msgs[curmsg]; | |
234 | ||
235 | switch (state) { | |
236 | case 0xf8: /* On reset or stop the bus is idle */ | |
2378bc09 | 237 | completed = pca_start(adap); |
1da177e4 LT |
238 | break; |
239 | ||
240 | case 0x08: /* A START condition has been transmitted */ | |
241 | case 0x10: /* A repeated start condition has been transmitted */ | |
2378bc09 | 242 | completed = pca_address(adap, msg); |
1da177e4 | 243 | break; |
3d438291 | 244 | |
1da177e4 LT |
245 | case 0x18: /* SLA+W has been transmitted; ACK has been received */ |
246 | case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */ | |
247 | if (numbytes < msg->len) { | |
2378bc09 WS |
248 | completed = pca_tx_byte(adap, |
249 | msg->buf[numbytes]); | |
1da177e4 LT |
250 | numbytes++; |
251 | break; | |
252 | } | |
253 | curmsg++; numbytes = 0; | |
254 | if (curmsg == num) | |
255 | pca_stop(adap); | |
256 | else | |
2378bc09 | 257 | completed = pca_repeated_start(adap); |
1da177e4 LT |
258 | break; |
259 | ||
260 | case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */ | |
261 | DEB2("NOT ACK received after SLA+W\n"); | |
262 | pca_stop(adap); | |
4403988a | 263 | ret = -ENXIO; |
1da177e4 LT |
264 | goto out; |
265 | ||
266 | case 0x40: /* SLA+R has been transmitted; ACK has been received */ | |
2378bc09 | 267 | completed = pca_rx_ack(adap, msg->len > 1); |
1da177e4 LT |
268 | break; |
269 | ||
270 | case 0x50: /* Data bytes has been received; ACK has been returned */ | |
271 | if (numbytes < msg->len) { | |
272 | pca_rx_byte(adap, &msg->buf[numbytes], 1); | |
273 | numbytes++; | |
2378bc09 WS |
274 | completed = pca_rx_ack(adap, |
275 | numbytes < msg->len - 1); | |
1da177e4 LT |
276 | break; |
277 | } | |
278 | curmsg++; numbytes = 0; | |
279 | if (curmsg == num) | |
280 | pca_stop(adap); | |
281 | else | |
2378bc09 | 282 | completed = pca_repeated_start(adap); |
1da177e4 LT |
283 | break; |
284 | ||
285 | case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */ | |
286 | DEB2("NOT ACK received after SLA+R\n"); | |
287 | pca_stop(adap); | |
4403988a | 288 | ret = -ENXIO; |
1da177e4 LT |
289 | goto out; |
290 | ||
291 | case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */ | |
292 | DEB2("NOT ACK received after data byte\n"); | |
2196d1cf | 293 | pca_stop(adap); |
1da177e4 LT |
294 | goto out; |
295 | ||
296 | case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */ | |
297 | DEB2("Arbitration lost\n"); | |
2196d1cf EB |
298 | /* |
299 | * The PCA9564 data sheet (2006-09-01) says "A | |
300 | * START condition will be transmitted when the | |
301 | * bus becomes free (STOP or SCL and SDA high)" | |
302 | * when the STA bit is set (p. 11). | |
303 | * | |
304 | * In case this won't work, try pca_reset() | |
305 | * instead. | |
306 | */ | |
307 | pca_start(adap); | |
1da177e4 | 308 | goto out; |
3d438291 | 309 | |
1da177e4 | 310 | case 0x58: /* Data byte has been received; NOT ACK has been returned */ |
2086ca48 | 311 | if (numbytes == msg->len - 1) { |
1da177e4 LT |
312 | pca_rx_byte(adap, &msg->buf[numbytes], 0); |
313 | curmsg++; numbytes = 0; | |
314 | if (curmsg == num) | |
315 | pca_stop(adap); | |
316 | else | |
2378bc09 | 317 | completed = pca_repeated_start(adap); |
1da177e4 LT |
318 | } else { |
319 | DEB2("NOT ACK sent after data byte received. " | |
320 | "Not final byte. numbytes %d. len %d\n", | |
321 | numbytes, msg->len); | |
322 | pca_stop(adap); | |
323 | goto out; | |
324 | } | |
325 | break; | |
326 | case 0x70: /* Bus error - SDA stuck low */ | |
327 | DEB2("BUS ERROR - SDA Stuck low\n"); | |
328 | pca_reset(adap); | |
329 | goto out; | |
330 | case 0x90: /* Bus error - SCL stuck low */ | |
331 | DEB2("BUS ERROR - SCL Stuck low\n"); | |
332 | pca_reset(adap); | |
333 | goto out; | |
334 | case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */ | |
335 | DEB2("BUS ERROR - Illegal START or STOP\n"); | |
336 | pca_reset(adap); | |
337 | goto out; | |
338 | default: | |
c01b0831 | 339 | dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state); |
1da177e4 LT |
340 | break; |
341 | } | |
3d438291 | 342 | |
2378bc09 WS |
343 | if (!completed) |
344 | goto out; | |
1da177e4 LT |
345 | } |
346 | ||
347 | ret = curmsg; | |
348 | out: | |
25985edc | 349 | DEB1("}}} transferred %d/%d messages. " |
3d438291 | 350 | "status is %#04x. control is %#04x\n", |
1da177e4 LT |
351 | curmsg, num, pca_status(adap), |
352 | pca_get_con(adap)); | |
353 | return ret; | |
354 | } | |
355 | ||
356 | static u32 pca_func(struct i2c_adapter *adap) | |
357 | { | |
2086ca48 | 358 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
1da177e4 LT |
359 | } |
360 | ||
c01b0831 WS |
361 | static const struct i2c_algorithm pca_algo = { |
362 | .master_xfer = pca_xfer, | |
363 | .functionality = pca_func, | |
364 | }; | |
365 | ||
eff9ec95 | 366 | static unsigned int pca_probe_chip(struct i2c_adapter *adap) |
1da177e4 | 367 | { |
c01b0831 | 368 | struct i2c_algo_pca_data *pca_data = adap->algo_data; |
eff9ec95 MAC |
369 | /* The trick here is to check if there is an indirect register |
370 | * available. If there is one, we will read the value we first | |
371 | * wrote on I2C_PCA_IADR. Otherwise, we will read the last value | |
372 | * we wrote on I2C_PCA_ADR | |
373 | */ | |
374 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); | |
375 | pca_outw(pca_data, I2C_PCA_IND, 0xAA); | |
376 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO); | |
377 | pca_outw(pca_data, I2C_PCA_IND, 0x00); | |
378 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); | |
379 | if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) { | |
380 | printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name); | |
381 | return I2C_PCA_CHIP_9665; | |
382 | } else { | |
383 | printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name); | |
384 | return I2C_PCA_CHIP_9564; | |
c01b0831 | 385 | } |
eff9ec95 MAC |
386 | } |
387 | ||
388 | static int pca_init(struct i2c_adapter *adap) | |
389 | { | |
390 | struct i2c_algo_pca_data *pca_data = adap->algo_data; | |
c01b0831 WS |
391 | |
392 | adap->algo = &pca_algo; | |
1da177e4 | 393 | |
eff9ec95 MAC |
394 | if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) { |
395 | static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36}; | |
396 | int clock; | |
397 | ||
398 | if (pca_data->i2c_clock > 7) { | |
399 | switch (pca_data->i2c_clock) { | |
400 | case 330000: | |
401 | pca_data->i2c_clock = I2C_PCA_CON_330kHz; | |
402 | break; | |
403 | case 288000: | |
404 | pca_data->i2c_clock = I2C_PCA_CON_288kHz; | |
405 | break; | |
406 | case 217000: | |
407 | pca_data->i2c_clock = I2C_PCA_CON_217kHz; | |
408 | break; | |
409 | case 146000: | |
410 | pca_data->i2c_clock = I2C_PCA_CON_146kHz; | |
411 | break; | |
412 | case 88000: | |
413 | pca_data->i2c_clock = I2C_PCA_CON_88kHz; | |
414 | break; | |
415 | case 59000: | |
416 | pca_data->i2c_clock = I2C_PCA_CON_59kHz; | |
417 | break; | |
418 | case 44000: | |
419 | pca_data->i2c_clock = I2C_PCA_CON_44kHz; | |
420 | break; | |
421 | case 36000: | |
422 | pca_data->i2c_clock = I2C_PCA_CON_36kHz; | |
423 | break; | |
424 | default: | |
425 | printk(KERN_WARNING | |
426 | "%s: Invalid I2C clock speed selected." | |
427 | " Using default 59kHz.\n", adap->name); | |
428 | pca_data->i2c_clock = I2C_PCA_CON_59kHz; | |
429 | } | |
430 | } else { | |
431 | printk(KERN_WARNING "%s: " | |
432 | "Choosing the clock frequency based on " | |
433 | "index is deprecated." | |
434 | " Use the nominal frequency.\n", adap->name); | |
435 | } | |
436 | ||
437 | pca_reset(pca_data); | |
438 | ||
439 | clock = pca_clock(pca_data); | |
440 | printk(KERN_INFO "%s: Clock frequency is %dkHz\n", | |
441 | adap->name, freqs[clock]); | |
442 | ||
443 | pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); | |
444 | } else { | |
445 | int clock; | |
446 | int mode; | |
447 | int tlow, thi; | |
448 | /* Values can be found on PCA9665 datasheet section 7.3.2.6 */ | |
449 | int min_tlow, min_thi; | |
450 | /* These values are the maximum raise and fall values allowed | |
451 | * by the I2C operation mode (Standard, Fast or Fast+) | |
452 | * They are used (added) below to calculate the clock dividers | |
453 | * of PCA9665. Note that they are slightly different of the | |
454 | * real maximum, to allow the change on mode exactly on the | |
455 | * maximum clock rate for each mode | |
456 | */ | |
457 | int raise_fall_time; | |
458 | ||
eff9ec95 MAC |
459 | /* Ignore the reset function from the module, |
460 | * we can use the parallel bus reset | |
461 | */ | |
462 | pca_data->reset_chip = pca9665_reset; | |
463 | ||
464 | if (pca_data->i2c_clock > 1265800) { | |
465 | printk(KERN_WARNING "%s: I2C clock speed too high." | |
466 | " Using 1265.8kHz.\n", adap->name); | |
467 | pca_data->i2c_clock = 1265800; | |
468 | } | |
469 | ||
470 | if (pca_data->i2c_clock < 60300) { | |
471 | printk(KERN_WARNING "%s: I2C clock speed too low." | |
472 | " Using 60.3kHz.\n", adap->name); | |
473 | pca_data->i2c_clock = 60300; | |
474 | } | |
475 | ||
476 | /* To avoid integer overflow, use clock/100 for calculations */ | |
477 | clock = pca_clock(pca_data) / 100; | |
478 | ||
479 | if (pca_data->i2c_clock > 10000) { | |
480 | mode = I2C_PCA_MODE_TURBO; | |
481 | min_tlow = 14; | |
482 | min_thi = 5; | |
483 | raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ | |
484 | } else if (pca_data->i2c_clock > 4000) { | |
485 | mode = I2C_PCA_MODE_FASTP; | |
486 | min_tlow = 17; | |
487 | min_thi = 9; | |
488 | raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ | |
489 | } else if (pca_data->i2c_clock > 1000) { | |
490 | mode = I2C_PCA_MODE_FAST; | |
491 | min_tlow = 44; | |
492 | min_thi = 20; | |
493 | raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */ | |
494 | } else { | |
495 | mode = I2C_PCA_MODE_STD; | |
496 | min_tlow = 157; | |
497 | min_thi = 134; | |
498 | raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */ | |
499 | } | |
500 | ||
501 | /* The minimum clock that respects the thi/tlow = 134/157 is | |
502 | * 64800 Hz. Below that, we have to fix the tlow to 255 and | |
503 | * calculate the thi factor. | |
504 | */ | |
505 | if (clock < 648) { | |
506 | tlow = 255; | |
507 | thi = 1000000 - clock * raise_fall_time; | |
508 | thi /= (I2C_PCA_OSC_PER * clock) - tlow; | |
509 | } else { | |
510 | tlow = (1000000 - clock * raise_fall_time) * min_tlow; | |
511 | tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); | |
512 | thi = tlow * min_thi / min_tlow; | |
513 | } | |
514 | ||
515 | pca_reset(pca_data); | |
1da177e4 | 516 | |
eff9ec95 MAC |
517 | printk(KERN_INFO |
518 | "%s: Clock frequency is %dHz\n", adap->name, clock * 100); | |
1da177e4 | 519 | |
eff9ec95 MAC |
520 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); |
521 | pca_outw(pca_data, I2C_PCA_IND, mode); | |
522 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); | |
523 | pca_outw(pca_data, I2C_PCA_IND, tlow); | |
524 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); | |
525 | pca_outw(pca_data, I2C_PCA_IND, thi); | |
526 | ||
527 | pca_set_con(pca_data, I2C_PCA_CON_ENSIO); | |
528 | } | |
3d438291 | 529 | udelay(500); /* 500 us for oscilator to stabilise */ |
1da177e4 LT |
530 | |
531 | return 0; | |
532 | } | |
533 | ||
3d438291 WS |
534 | /* |
535 | * registering functions to load algorithms at runtime | |
1da177e4 LT |
536 | */ |
537 | int i2c_pca_add_bus(struct i2c_adapter *adap) | |
538 | { | |
1da177e4 LT |
539 | int rval; |
540 | ||
c01b0831 WS |
541 | rval = pca_init(adap); |
542 | if (rval) | |
543 | return rval; | |
1da177e4 | 544 | |
c01b0831 WS |
545 | return i2c_add_adapter(adap); |
546 | } | |
547 | EXPORT_SYMBOL(i2c_pca_add_bus); | |
1da177e4 | 548 | |
c01b0831 WS |
549 | int i2c_pca_add_numbered_bus(struct i2c_adapter *adap) |
550 | { | |
551 | int rval; | |
1da177e4 | 552 | |
c01b0831 WS |
553 | rval = pca_init(adap); |
554 | if (rval) | |
555 | return rval; | |
1da177e4 | 556 | |
c01b0831 | 557 | return i2c_add_numbered_adapter(adap); |
1da177e4 | 558 | } |
c01b0831 | 559 | EXPORT_SYMBOL(i2c_pca_add_numbered_bus); |
1da177e4 | 560 | |
c01b0831 WS |
561 | MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, " |
562 | "Wolfram Sang <w.sang@pengutronix.de>"); | |
eff9ec95 | 563 | MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm"); |
1da177e4 LT |
564 | MODULE_LICENSE("GPL"); |
565 | ||
566 | module_param(i2c_debug, int, 0); |