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Commit | Line | Data |
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1da177e4 | 1 | /* |
3d438291 | 2 | * i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters |
1da177e4 | 3 | * Copyright (C) 2004 Arcom Control Systems |
c01b0831 | 4 | * Copyright (C) 2008 Pengutronix |
1da177e4 LT |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
1da177e4 LT |
15 | */ |
16 | ||
17 | #include <linux/kernel.h> | |
18 | #include <linux/module.h> | |
19 | #include <linux/moduleparam.h> | |
20 | #include <linux/delay.h> | |
8e99ada8 | 21 | #include <linux/jiffies.h> |
1da177e4 LT |
22 | #include <linux/errno.h> |
23 | #include <linux/i2c.h> | |
24 | #include <linux/i2c-algo-pca.h> | |
1da177e4 | 25 | |
bac3e7c2 FS |
26 | #define DEB1(fmt, args...) do { if (i2c_debug >= 1) \ |
27 | printk(KERN_DEBUG fmt, ## args); } while (0) | |
28 | #define DEB2(fmt, args...) do { if (i2c_debug >= 2) \ | |
29 | printk(KERN_DEBUG fmt, ## args); } while (0) | |
30 | #define DEB3(fmt, args...) do { if (i2c_debug >= 3) \ | |
31 | printk(KERN_DEBUG fmt, ## args); } while (0) | |
1da177e4 | 32 | |
60507095 | 33 | static int i2c_debug; |
1da177e4 | 34 | |
c01b0831 WS |
35 | #define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val) |
36 | #define pca_inw(adap, reg) adap->read_byte(adap->data, reg) | |
1da177e4 LT |
37 | |
38 | #define pca_status(adap) pca_inw(adap, I2C_PCA_STA) | |
c01b0831 | 39 | #define pca_clock(adap) adap->i2c_clock |
1da177e4 LT |
40 | #define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val) |
41 | #define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON) | |
c01b0831 | 42 | #define pca_wait(adap) adap->wait_for_completion(adap->data) |
1da177e4 | 43 | |
a76e7c68 | 44 | static void pca_reset(struct i2c_algo_pca_data *adap) |
eff9ec95 | 45 | { |
a76e7c68 TK |
46 | if (adap->chip == I2C_PCA_CHIP_9665) { |
47 | /* Ignore the reset function from the module, | |
48 | * we can use the parallel bus reset. | |
49 | */ | |
50 | pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET); | |
51 | pca_outw(adap, I2C_PCA_IND, 0xA5); | |
52 | pca_outw(adap, I2C_PCA_IND, 0x5A); | |
53 | } else { | |
54 | adap->reset_chip(adap->data); | |
55 | } | |
eff9ec95 MAC |
56 | } |
57 | ||
1da177e4 LT |
58 | /* |
59 | * Generate a start condition on the i2c bus. | |
60 | * | |
44bbe87e | 61 | * returns after the start condition has occurred |
1da177e4 | 62 | */ |
2378bc09 | 63 | static int pca_start(struct i2c_algo_pca_data *adap) |
1da177e4 LT |
64 | { |
65 | int sta = pca_get_con(adap); | |
66 | DEB2("=== START\n"); | |
67 | sta |= I2C_PCA_CON_STA; | |
68 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); | |
69 | pca_set_con(adap, sta); | |
2378bc09 | 70 | return pca_wait(adap); |
1da177e4 LT |
71 | } |
72 | ||
73 | /* | |
46b615f4 | 74 | * Generate a repeated start condition on the i2c bus |
1da177e4 | 75 | * |
44bbe87e | 76 | * return after the repeated start condition has occurred |
1da177e4 | 77 | */ |
2378bc09 | 78 | static int pca_repeated_start(struct i2c_algo_pca_data *adap) |
1da177e4 LT |
79 | { |
80 | int sta = pca_get_con(adap); | |
81 | DEB2("=== REPEATED START\n"); | |
82 | sta |= I2C_PCA_CON_STA; | |
83 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI); | |
84 | pca_set_con(adap, sta); | |
2378bc09 | 85 | return pca_wait(adap); |
1da177e4 LT |
86 | } |
87 | ||
88 | /* | |
89 | * Generate a stop condition on the i2c bus | |
90 | * | |
91 | * returns after the stop condition has been generated | |
92 | * | |
93 | * STOPs do not generate an interrupt or set the SI flag, since the | |
46b615f4 | 94 | * part returns the idle state (0xf8). Hence we don't need to |
1da177e4 LT |
95 | * pca_wait here. |
96 | */ | |
97 | static void pca_stop(struct i2c_algo_pca_data *adap) | |
98 | { | |
99 | int sta = pca_get_con(adap); | |
100 | DEB2("=== STOP\n"); | |
101 | sta |= I2C_PCA_CON_STO; | |
102 | sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI); | |
103 | pca_set_con(adap, sta); | |
104 | } | |
105 | ||
106 | /* | |
107 | * Send the slave address and R/W bit | |
108 | * | |
109 | * returns after the address has been sent | |
110 | */ | |
2378bc09 | 111 | static int pca_address(struct i2c_algo_pca_data *adap, |
2086ca48 | 112 | struct i2c_msg *msg) |
1da177e4 LT |
113 | { |
114 | int sta = pca_get_con(adap); | |
115 | int addr; | |
116 | ||
2086ca48 FH |
117 | addr = ((0x7f & msg->addr) << 1); |
118 | if (msg->flags & I2C_M_RD) | |
1da177e4 | 119 | addr |= 1; |
3d438291 | 120 | DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n", |
1da177e4 | 121 | msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr); |
3d438291 | 122 | |
1da177e4 LT |
123 | pca_outw(adap, I2C_PCA_DAT, addr); |
124 | ||
125 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); | |
126 | pca_set_con(adap, sta); | |
127 | ||
2378bc09 | 128 | return pca_wait(adap); |
1da177e4 LT |
129 | } |
130 | ||
131 | /* | |
132 | * Transmit a byte. | |
133 | * | |
134 | * Returns after the byte has been transmitted | |
135 | */ | |
2378bc09 | 136 | static int pca_tx_byte(struct i2c_algo_pca_data *adap, |
2086ca48 | 137 | __u8 b) |
1da177e4 LT |
138 | { |
139 | int sta = pca_get_con(adap); | |
140 | DEB2("=== WRITE %#04x\n", b); | |
141 | pca_outw(adap, I2C_PCA_DAT, b); | |
142 | ||
143 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI); | |
144 | pca_set_con(adap, sta); | |
145 | ||
2378bc09 | 146 | return pca_wait(adap); |
1da177e4 LT |
147 | } |
148 | ||
149 | /* | |
150 | * Receive a byte | |
151 | * | |
152 | * returns immediately. | |
153 | */ | |
3d438291 | 154 | static void pca_rx_byte(struct i2c_algo_pca_data *adap, |
1da177e4 LT |
155 | __u8 *b, int ack) |
156 | { | |
157 | *b = pca_inw(adap, I2C_PCA_DAT); | |
158 | DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK"); | |
159 | } | |
160 | ||
3d438291 | 161 | /* |
1da177e4 LT |
162 | * Setup ACK or NACK for next received byte and wait for it to arrive. |
163 | * | |
164 | * Returns after next byte has arrived. | |
165 | */ | |
2378bc09 | 166 | static int pca_rx_ack(struct i2c_algo_pca_data *adap, |
2086ca48 | 167 | int ack) |
1da177e4 LT |
168 | { |
169 | int sta = pca_get_con(adap); | |
170 | ||
171 | sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA); | |
172 | ||
2086ca48 | 173 | if (ack) |
1da177e4 LT |
174 | sta |= I2C_PCA_CON_AA; |
175 | ||
176 | pca_set_con(adap, sta); | |
2378bc09 | 177 | return pca_wait(adap); |
1da177e4 LT |
178 | } |
179 | ||
1da177e4 | 180 | static int pca_xfer(struct i2c_adapter *i2c_adap, |
2086ca48 FH |
181 | struct i2c_msg *msgs, |
182 | int num) | |
1da177e4 | 183 | { |
2086ca48 FH |
184 | struct i2c_algo_pca_data *adap = i2c_adap->algo_data; |
185 | struct i2c_msg *msg = NULL; | |
186 | int curmsg; | |
1da177e4 LT |
187 | int numbytes = 0; |
188 | int state; | |
189 | int ret; | |
2378bc09 | 190 | int completed = 1; |
8e99ada8 WS |
191 | unsigned long timeout = jiffies + i2c_adap->timeout; |
192 | ||
c454dee2 | 193 | while ((state = pca_status(adap)) != 0xf8) { |
8e99ada8 WS |
194 | if (time_before(jiffies, timeout)) { |
195 | msleep(10); | |
196 | } else { | |
197 | dev_dbg(&i2c_adap->dev, "bus is not idle. status is " | |
198 | "%#04x\n", state); | |
4403988a | 199 | return -EBUSY; |
8e99ada8 | 200 | } |
1da177e4 LT |
201 | } |
202 | ||
203 | DEB1("{{{ XFER %d messages\n", num); | |
204 | ||
2086ca48 | 205 | if (i2c_debug >= 2) { |
1da177e4 LT |
206 | for (curmsg = 0; curmsg < num; curmsg++) { |
207 | int addr, i; | |
208 | msg = &msgs[curmsg]; | |
3d438291 | 209 | |
1da177e4 | 210 | addr = (0x7f & msg->addr) ; |
3d438291 | 211 | |
2086ca48 | 212 | if (msg->flags & I2C_M_RD) |
3d438291 | 213 | printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n", |
2086ca48 | 214 | curmsg, msg->len, addr, (addr << 1) | 1); |
1da177e4 | 215 | else { |
3d438291 | 216 | printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s", |
2086ca48 | 217 | curmsg, msg->len, addr, addr << 1, |
1da177e4 | 218 | msg->len == 0 ? "" : ", "); |
2086ca48 | 219 | for (i = 0; i < msg->len; i++) |
1da177e4 LT |
220 | printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", "); |
221 | printk("]\n"); | |
222 | } | |
223 | } | |
224 | } | |
225 | ||
226 | curmsg = 0; | |
4403988a | 227 | ret = -EIO; |
1da177e4 LT |
228 | while (curmsg < num) { |
229 | state = pca_status(adap); | |
230 | ||
231 | DEB3("STATE is 0x%02x\n", state); | |
232 | msg = &msgs[curmsg]; | |
233 | ||
234 | switch (state) { | |
235 | case 0xf8: /* On reset or stop the bus is idle */ | |
2378bc09 | 236 | completed = pca_start(adap); |
1da177e4 LT |
237 | break; |
238 | ||
239 | case 0x08: /* A START condition has been transmitted */ | |
240 | case 0x10: /* A repeated start condition has been transmitted */ | |
2378bc09 | 241 | completed = pca_address(adap, msg); |
1da177e4 | 242 | break; |
3d438291 | 243 | |
1da177e4 LT |
244 | case 0x18: /* SLA+W has been transmitted; ACK has been received */ |
245 | case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */ | |
246 | if (numbytes < msg->len) { | |
2378bc09 WS |
247 | completed = pca_tx_byte(adap, |
248 | msg->buf[numbytes]); | |
1da177e4 LT |
249 | numbytes++; |
250 | break; | |
251 | } | |
252 | curmsg++; numbytes = 0; | |
253 | if (curmsg == num) | |
254 | pca_stop(adap); | |
255 | else | |
2378bc09 | 256 | completed = pca_repeated_start(adap); |
1da177e4 LT |
257 | break; |
258 | ||
259 | case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */ | |
260 | DEB2("NOT ACK received after SLA+W\n"); | |
261 | pca_stop(adap); | |
4403988a | 262 | ret = -ENXIO; |
1da177e4 LT |
263 | goto out; |
264 | ||
265 | case 0x40: /* SLA+R has been transmitted; ACK has been received */ | |
2378bc09 | 266 | completed = pca_rx_ack(adap, msg->len > 1); |
1da177e4 LT |
267 | break; |
268 | ||
269 | case 0x50: /* Data bytes has been received; ACK has been returned */ | |
270 | if (numbytes < msg->len) { | |
271 | pca_rx_byte(adap, &msg->buf[numbytes], 1); | |
272 | numbytes++; | |
2378bc09 WS |
273 | completed = pca_rx_ack(adap, |
274 | numbytes < msg->len - 1); | |
1da177e4 LT |
275 | break; |
276 | } | |
277 | curmsg++; numbytes = 0; | |
278 | if (curmsg == num) | |
279 | pca_stop(adap); | |
280 | else | |
2378bc09 | 281 | completed = pca_repeated_start(adap); |
1da177e4 LT |
282 | break; |
283 | ||
284 | case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */ | |
285 | DEB2("NOT ACK received after SLA+R\n"); | |
286 | pca_stop(adap); | |
4403988a | 287 | ret = -ENXIO; |
1da177e4 LT |
288 | goto out; |
289 | ||
290 | case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */ | |
291 | DEB2("NOT ACK received after data byte\n"); | |
2196d1cf | 292 | pca_stop(adap); |
1da177e4 LT |
293 | goto out; |
294 | ||
295 | case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */ | |
296 | DEB2("Arbitration lost\n"); | |
2196d1cf EB |
297 | /* |
298 | * The PCA9564 data sheet (2006-09-01) says "A | |
299 | * START condition will be transmitted when the | |
300 | * bus becomes free (STOP or SCL and SDA high)" | |
301 | * when the STA bit is set (p. 11). | |
302 | * | |
303 | * In case this won't work, try pca_reset() | |
304 | * instead. | |
305 | */ | |
306 | pca_start(adap); | |
1da177e4 | 307 | goto out; |
3d438291 | 308 | |
1da177e4 | 309 | case 0x58: /* Data byte has been received; NOT ACK has been returned */ |
2086ca48 | 310 | if (numbytes == msg->len - 1) { |
1da177e4 LT |
311 | pca_rx_byte(adap, &msg->buf[numbytes], 0); |
312 | curmsg++; numbytes = 0; | |
313 | if (curmsg == num) | |
314 | pca_stop(adap); | |
315 | else | |
2378bc09 | 316 | completed = pca_repeated_start(adap); |
1da177e4 LT |
317 | } else { |
318 | DEB2("NOT ACK sent after data byte received. " | |
319 | "Not final byte. numbytes %d. len %d\n", | |
320 | numbytes, msg->len); | |
321 | pca_stop(adap); | |
322 | goto out; | |
323 | } | |
324 | break; | |
325 | case 0x70: /* Bus error - SDA stuck low */ | |
326 | DEB2("BUS ERROR - SDA Stuck low\n"); | |
327 | pca_reset(adap); | |
328 | goto out; | |
329 | case 0x90: /* Bus error - SCL stuck low */ | |
330 | DEB2("BUS ERROR - SCL Stuck low\n"); | |
331 | pca_reset(adap); | |
332 | goto out; | |
333 | case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */ | |
334 | DEB2("BUS ERROR - Illegal START or STOP\n"); | |
335 | pca_reset(adap); | |
336 | goto out; | |
337 | default: | |
c01b0831 | 338 | dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state); |
1da177e4 LT |
339 | break; |
340 | } | |
3d438291 | 341 | |
2378bc09 WS |
342 | if (!completed) |
343 | goto out; | |
1da177e4 LT |
344 | } |
345 | ||
346 | ret = curmsg; | |
347 | out: | |
25985edc | 348 | DEB1("}}} transferred %d/%d messages. " |
3d438291 | 349 | "status is %#04x. control is %#04x\n", |
1da177e4 LT |
350 | curmsg, num, pca_status(adap), |
351 | pca_get_con(adap)); | |
352 | return ret; | |
353 | } | |
354 | ||
355 | static u32 pca_func(struct i2c_adapter *adap) | |
356 | { | |
2086ca48 | 357 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
1da177e4 LT |
358 | } |
359 | ||
c01b0831 WS |
360 | static const struct i2c_algorithm pca_algo = { |
361 | .master_xfer = pca_xfer, | |
362 | .functionality = pca_func, | |
363 | }; | |
364 | ||
eff9ec95 | 365 | static unsigned int pca_probe_chip(struct i2c_adapter *adap) |
1da177e4 | 366 | { |
c01b0831 | 367 | struct i2c_algo_pca_data *pca_data = adap->algo_data; |
eff9ec95 MAC |
368 | /* The trick here is to check if there is an indirect register |
369 | * available. If there is one, we will read the value we first | |
370 | * wrote on I2C_PCA_IADR. Otherwise, we will read the last value | |
371 | * we wrote on I2C_PCA_ADR | |
372 | */ | |
373 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); | |
374 | pca_outw(pca_data, I2C_PCA_IND, 0xAA); | |
375 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO); | |
376 | pca_outw(pca_data, I2C_PCA_IND, 0x00); | |
377 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR); | |
378 | if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) { | |
379 | printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name); | |
a76e7c68 | 380 | pca_data->chip = I2C_PCA_CHIP_9665; |
eff9ec95 MAC |
381 | } else { |
382 | printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name); | |
a76e7c68 | 383 | pca_data->chip = I2C_PCA_CHIP_9564; |
c01b0831 | 384 | } |
a76e7c68 | 385 | return pca_data->chip; |
eff9ec95 MAC |
386 | } |
387 | ||
388 | static int pca_init(struct i2c_adapter *adap) | |
389 | { | |
390 | struct i2c_algo_pca_data *pca_data = adap->algo_data; | |
c01b0831 WS |
391 | |
392 | adap->algo = &pca_algo; | |
1da177e4 | 393 | |
eff9ec95 MAC |
394 | if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) { |
395 | static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36}; | |
396 | int clock; | |
397 | ||
398 | if (pca_data->i2c_clock > 7) { | |
399 | switch (pca_data->i2c_clock) { | |
400 | case 330000: | |
401 | pca_data->i2c_clock = I2C_PCA_CON_330kHz; | |
402 | break; | |
403 | case 288000: | |
404 | pca_data->i2c_clock = I2C_PCA_CON_288kHz; | |
405 | break; | |
406 | case 217000: | |
407 | pca_data->i2c_clock = I2C_PCA_CON_217kHz; | |
408 | break; | |
409 | case 146000: | |
410 | pca_data->i2c_clock = I2C_PCA_CON_146kHz; | |
411 | break; | |
412 | case 88000: | |
413 | pca_data->i2c_clock = I2C_PCA_CON_88kHz; | |
414 | break; | |
415 | case 59000: | |
416 | pca_data->i2c_clock = I2C_PCA_CON_59kHz; | |
417 | break; | |
418 | case 44000: | |
419 | pca_data->i2c_clock = I2C_PCA_CON_44kHz; | |
420 | break; | |
421 | case 36000: | |
422 | pca_data->i2c_clock = I2C_PCA_CON_36kHz; | |
423 | break; | |
424 | default: | |
425 | printk(KERN_WARNING | |
426 | "%s: Invalid I2C clock speed selected." | |
427 | " Using default 59kHz.\n", adap->name); | |
428 | pca_data->i2c_clock = I2C_PCA_CON_59kHz; | |
429 | } | |
430 | } else { | |
431 | printk(KERN_WARNING "%s: " | |
432 | "Choosing the clock frequency based on " | |
433 | "index is deprecated." | |
434 | " Use the nominal frequency.\n", adap->name); | |
435 | } | |
436 | ||
437 | pca_reset(pca_data); | |
438 | ||
439 | clock = pca_clock(pca_data); | |
440 | printk(KERN_INFO "%s: Clock frequency is %dkHz\n", | |
441 | adap->name, freqs[clock]); | |
442 | ||
443 | pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock); | |
444 | } else { | |
445 | int clock; | |
446 | int mode; | |
447 | int tlow, thi; | |
448 | /* Values can be found on PCA9665 datasheet section 7.3.2.6 */ | |
449 | int min_tlow, min_thi; | |
450 | /* These values are the maximum raise and fall values allowed | |
451 | * by the I2C operation mode (Standard, Fast or Fast+) | |
452 | * They are used (added) below to calculate the clock dividers | |
453 | * of PCA9665. Note that they are slightly different of the | |
454 | * real maximum, to allow the change on mode exactly on the | |
455 | * maximum clock rate for each mode | |
456 | */ | |
457 | int raise_fall_time; | |
458 | ||
eff9ec95 MAC |
459 | if (pca_data->i2c_clock > 1265800) { |
460 | printk(KERN_WARNING "%s: I2C clock speed too high." | |
461 | " Using 1265.8kHz.\n", adap->name); | |
462 | pca_data->i2c_clock = 1265800; | |
463 | } | |
464 | ||
465 | if (pca_data->i2c_clock < 60300) { | |
466 | printk(KERN_WARNING "%s: I2C clock speed too low." | |
467 | " Using 60.3kHz.\n", adap->name); | |
468 | pca_data->i2c_clock = 60300; | |
469 | } | |
470 | ||
471 | /* To avoid integer overflow, use clock/100 for calculations */ | |
472 | clock = pca_clock(pca_data) / 100; | |
473 | ||
5f71a3ef | 474 | if (pca_data->i2c_clock > 1000000) { |
eff9ec95 MAC |
475 | mode = I2C_PCA_MODE_TURBO; |
476 | min_tlow = 14; | |
477 | min_thi = 5; | |
478 | raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ | |
5f71a3ef | 479 | } else if (pca_data->i2c_clock > 400000) { |
eff9ec95 MAC |
480 | mode = I2C_PCA_MODE_FASTP; |
481 | min_tlow = 17; | |
482 | min_thi = 9; | |
483 | raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */ | |
5f71a3ef | 484 | } else if (pca_data->i2c_clock > 100000) { |
eff9ec95 MAC |
485 | mode = I2C_PCA_MODE_FAST; |
486 | min_tlow = 44; | |
487 | min_thi = 20; | |
488 | raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */ | |
489 | } else { | |
490 | mode = I2C_PCA_MODE_STD; | |
491 | min_tlow = 157; | |
492 | min_thi = 134; | |
493 | raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */ | |
494 | } | |
495 | ||
496 | /* The minimum clock that respects the thi/tlow = 134/157 is | |
497 | * 64800 Hz. Below that, we have to fix the tlow to 255 and | |
498 | * calculate the thi factor. | |
499 | */ | |
500 | if (clock < 648) { | |
501 | tlow = 255; | |
502 | thi = 1000000 - clock * raise_fall_time; | |
503 | thi /= (I2C_PCA_OSC_PER * clock) - tlow; | |
504 | } else { | |
505 | tlow = (1000000 - clock * raise_fall_time) * min_tlow; | |
506 | tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow); | |
507 | thi = tlow * min_thi / min_tlow; | |
508 | } | |
509 | ||
510 | pca_reset(pca_data); | |
1da177e4 | 511 | |
eff9ec95 MAC |
512 | printk(KERN_INFO |
513 | "%s: Clock frequency is %dHz\n", adap->name, clock * 100); | |
1da177e4 | 514 | |
eff9ec95 MAC |
515 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE); |
516 | pca_outw(pca_data, I2C_PCA_IND, mode); | |
517 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL); | |
518 | pca_outw(pca_data, I2C_PCA_IND, tlow); | |
519 | pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH); | |
520 | pca_outw(pca_data, I2C_PCA_IND, thi); | |
521 | ||
522 | pca_set_con(pca_data, I2C_PCA_CON_ENSIO); | |
523 | } | |
3d438291 | 524 | udelay(500); /* 500 us for oscilator to stabilise */ |
1da177e4 LT |
525 | |
526 | return 0; | |
527 | } | |
528 | ||
3d438291 WS |
529 | /* |
530 | * registering functions to load algorithms at runtime | |
1da177e4 LT |
531 | */ |
532 | int i2c_pca_add_bus(struct i2c_adapter *adap) | |
533 | { | |
1da177e4 LT |
534 | int rval; |
535 | ||
c01b0831 WS |
536 | rval = pca_init(adap); |
537 | if (rval) | |
538 | return rval; | |
1da177e4 | 539 | |
c01b0831 WS |
540 | return i2c_add_adapter(adap); |
541 | } | |
542 | EXPORT_SYMBOL(i2c_pca_add_bus); | |
1da177e4 | 543 | |
c01b0831 WS |
544 | int i2c_pca_add_numbered_bus(struct i2c_adapter *adap) |
545 | { | |
546 | int rval; | |
1da177e4 | 547 | |
c01b0831 WS |
548 | rval = pca_init(adap); |
549 | if (rval) | |
550 | return rval; | |
1da177e4 | 551 | |
c01b0831 | 552 | return i2c_add_numbered_adapter(adap); |
1da177e4 | 553 | } |
c01b0831 | 554 | EXPORT_SYMBOL(i2c_pca_add_numbered_bus); |
1da177e4 | 555 | |
c01b0831 WS |
556 | MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, " |
557 | "Wolfram Sang <w.sang@pengutronix.de>"); | |
eff9ec95 | 558 | MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm"); |
1da177e4 LT |
559 | MODULE_LICENSE("GPL"); |
560 | ||
561 | module_param(i2c_debug, int, 0); |