[mirror_ubuntu-hirsute-kernel.git] / drivers / i2c / algos / i2c-algo-pca.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 *  i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
 *    Copyright (C) 2004 Arcom Control Systems
 *    Copyright (C) 2008 Pengutronix
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/delay.h>
#include <linux/jiffies.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-pca.h>

#define DEB1(fmt, args...) do { if (i2c_debug >= 1)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)
#define DEB2(fmt, args...) do { if (i2c_debug >= 2)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)
#define DEB3(fmt, args...) do { if (i2c_debug >= 3)			\
				 printk(KERN_DEBUG fmt, ## args); } while (0)

static int i2c_debug;

#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)

#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
#define pca_clock(adap) adap->i2c_clock
#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
#define pca_wait(adap) adap->wait_for_completion(adap->data)

static void pca_reset(struct i2c_algo_pca_data *adap)
{
	if (adap->chip == I2C_PCA_CHIP_9665) {
		/* Ignore the reset function from the module,
		 * we can use the parallel bus reset.
		 */
		pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
		pca_outw(adap, I2C_PCA_IND, 0xA5);
		pca_outw(adap, I2C_PCA_IND, 0x5A);
	} else {
		adap->reset_chip(adap->data);
	}
}

/*
 * Generate a start condition on the i2c bus.
 *
 * returns after the start condition has occurred
 */
static int pca_start(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== START\n");
	sta |= I2C_PCA_CON_STA;
	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
	return pca_wait(adap);
}

/*
 * Generate a repeated start condition on the i2c bus
 *
 * return after the repeated start condition has occurred
 */
static int pca_repeated_start(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== REPEATED START\n");
	sta |= I2C_PCA_CON_STA;
	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
	return pca_wait(adap);
}

/*
 * Generate a stop condition on the i2c bus
 *
 * returns after the stop condition has been generated
 *
 * STOPs do not generate an interrupt or set the SI flag, since the
 * part returns the idle state (0xf8). Hence we don't need to
 * pca_wait here.
 */
static void pca_stop(struct i2c_algo_pca_data *adap)
{
	int sta = pca_get_con(adap);
	DEB2("=== STOP\n");
	sta |= I2C_PCA_CON_STO;
	sta &= ~(I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);
}

/*
 * Send the slave address and R/W bit
 *
 * returns after the address has been sent
 */
static int pca_address(struct i2c_algo_pca_data *adap,
		       struct i2c_msg *msg)
{
	int sta = pca_get_con(adap);
	int addr = i2c_8bit_addr_from_msg(msg);

	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
	     msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);

	pca_outw(adap, I2C_PCA_DAT, addr);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);

	return pca_wait(adap);
}

/*
 * Transmit a byte.
 *
 * Returns after the byte has been transmitted
 */
static int pca_tx_byte(struct i2c_algo_pca_data *adap,
		       __u8 b)
{
	int sta = pca_get_con(adap);
	DEB2("=== WRITE %#04x\n", b);
	pca_outw(adap, I2C_PCA_DAT, b);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI);
	pca_set_con(adap, sta);

	return pca_wait(adap);
}

/*
 * Receive a byte
 *
 * returns immediately.
 */
static void pca_rx_byte(struct i2c_algo_pca_data *adap,
			__u8 *b, int ack)
{
	*b = pca_inw(adap, I2C_PCA_DAT);
	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
}

/*
 * Setup ACK or NACK for next received byte and wait for it to arrive.
 *
 * Returns after next byte has arrived.
 */
static int pca_rx_ack(struct i2c_algo_pca_data *adap,
		      int ack)
{
	int sta = pca_get_con(adap);

	sta &= ~(I2C_PCA_CON_STO|I2C_PCA_CON_STA|I2C_PCA_CON_SI|I2C_PCA_CON_AA);

	if (ack)
		sta |= I2C_PCA_CON_AA;

	pca_set_con(adap, sta);
	return pca_wait(adap);
}

static int pca_xfer(struct i2c_adapter *i2c_adap,
		    struct i2c_msg *msgs,
		    int num)
{
	struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
	struct i2c_msg *msg = NULL;
	int curmsg;
	int numbytes = 0;
	int state;
	int ret;
	int completed = 1;
	unsigned long timeout = jiffies + i2c_adap->timeout;

	while ((state = pca_status(adap)) != 0xf8) {
		if (time_before(jiffies, timeout)) {
			msleep(10);
		} else {
			dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
				"%#04x\n", state);
			return -EBUSY;
		}
	}

	DEB1("{{{ XFER %d messages\n", num);

	if (i2c_debug >= 2) {
		for (curmsg = 0; curmsg < num; curmsg++) {
			int addr, i;
			msg = &msgs[curmsg];

			addr = (0x7f & msg->addr) ;

			if (msg->flags & I2C_M_RD)
				printk(KERN_INFO "    [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
				       curmsg, msg->len, addr, (addr << 1) | 1);
			else {
				printk(KERN_INFO "    [%02d] WR %d bytes to %#02x [%#02x%s",
				       curmsg, msg->len, addr, addr << 1,
				       msg->len == 0 ? "" : ", ");
				for (i = 0; i < msg->len; i++)
					printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
				printk("]\n");
			}
		}
	}

	curmsg = 0;
	ret = -EIO;
	while (curmsg < num) {
		state = pca_status(adap);

		DEB3("STATE is 0x%02x\n", state);
		msg = &msgs[curmsg];

		switch (state) {
		case 0xf8: /* On reset or stop the bus is idle */
			completed = pca_start(adap);
			break;

		case 0x08: /* A START condition has been transmitted */
		case 0x10: /* A repeated start condition has been transmitted */
			completed = pca_address(adap, msg);
			break;

		case 0x18: /* SLA+W has been transmitted; ACK has been received */
		case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
			if (numbytes < msg->len) {
				completed = pca_tx_byte(adap,
							msg->buf[numbytes]);
				numbytes++;
				break;
			}
			curmsg++; numbytes = 0;
			if (curmsg == num)
				pca_stop(adap);
			else
				completed = pca_repeated_start(adap);
			break;

		case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after SLA+W\n");
			pca_stop(adap);
			ret = -ENXIO;
			goto out;

		case 0x40: /* SLA+R has been transmitted; ACK has been received */
			completed = pca_rx_ack(adap, msg->len > 1);
			break;

		case 0x50: /* Data bytes has been received; ACK has been returned */
			if (numbytes < msg->len) {
				pca_rx_byte(adap, &msg->buf[numbytes], 1);
				numbytes++;
				completed = pca_rx_ack(adap,
						       numbytes < msg->len - 1);
				break;
			}
			curmsg++; numbytes = 0;
			if (curmsg == num)
				pca_stop(adap);
			else
				completed = pca_repeated_start(adap);
			break;

		case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after SLA+R\n");
			pca_stop(adap);
			ret = -ENXIO;
			goto out;

		case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
			DEB2("NOT ACK received after data byte\n");
			pca_stop(adap);
			goto out;

		case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
			DEB2("Arbitration lost\n");
			/*
			 * The PCA9564 data sheet (2006-09-01) says "A
			 * START condition will be transmitted when the
			 * bus becomes free (STOP or SCL and SDA high)"
			 * when the STA bit is set (p. 11).
			 *
			 * In case this won't work, try pca_reset()
			 * instead.
			 */
			pca_start(adap);
			goto out;

		case 0x58: /* Data byte has been received; NOT ACK has been returned */
			if (numbytes == msg->len - 1) {
				pca_rx_byte(adap, &msg->buf[numbytes], 0);
				curmsg++; numbytes = 0;
				if (curmsg == num)
					pca_stop(adap);
				else
					completed = pca_repeated_start(adap);
			} else {
				DEB2("NOT ACK sent after data byte received. "
				     "Not final byte. numbytes %d. len %d\n",
				     numbytes, msg->len);
				pca_stop(adap);
				goto out;
			}
			break;
		case 0x70: /* Bus error - SDA stuck low */
			DEB2("BUS ERROR - SDA Stuck low\n");
			pca_reset(adap);
			goto out;
		case 0x90: /* Bus error - SCL stuck low */
			DEB2("BUS ERROR - SCL Stuck low\n");
			pca_reset(adap);
			goto out;
		case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
			DEB2("BUS ERROR - Illegal START or STOP\n");
			pca_reset(adap);
			goto out;
		default:
			dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
			break;
		}

		if (!completed)
			goto out;
	}

	ret = curmsg;
 out:
	DEB1("}}} transferred %d/%d messages. "
	     "status is %#04x. control is %#04x\n",
	     curmsg, num, pca_status(adap),
	     pca_get_con(adap));
	return ret;
}

static u32 pca_func(struct i2c_adapter *adap)
{
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}

static const struct i2c_algorithm pca_algo = {
	.master_xfer	= pca_xfer,
	.functionality	= pca_func,
};

static unsigned int pca_probe_chip(struct i2c_adapter *adap)
{
	struct i2c_algo_pca_data *pca_data = adap->algo_data;
	/* The trick here is to check if there is an indirect register
	 * available. If there is one, we will read the value we first
	 * wrote on I2C_PCA_IADR. Otherwise, we will read the last value
	 * we wrote on I2C_PCA_ADR
	 */
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
	pca_outw(pca_data, I2C_PCA_IND, 0x00);
	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
		printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
		pca_data->chip = I2C_PCA_CHIP_9665;
	} else {
		printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
		pca_data->chip = I2C_PCA_CHIP_9564;
	}
	return pca_data->chip;
}

static int pca_init(struct i2c_adapter *adap)
{
	struct i2c_algo_pca_data *pca_data = adap->algo_data;

	adap->algo = &pca_algo;

	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
		static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
		int clock;

		if (pca_data->i2c_clock > 7) {
			switch (pca_data->i2c_clock) {
			case 330000:
				pca_data->i2c_clock = I2C_PCA_CON_330kHz;
				break;
			case 288000:
				pca_data->i2c_clock = I2C_PCA_CON_288kHz;
				break;
			case 217000:
				pca_data->i2c_clock = I2C_PCA_CON_217kHz;
				break;
			case 146000:
				pca_data->i2c_clock = I2C_PCA_CON_146kHz;
				break;
			case 88000:
				pca_data->i2c_clock = I2C_PCA_CON_88kHz;
				break;
			case 59000:
				pca_data->i2c_clock = I2C_PCA_CON_59kHz;
				break;
			case 44000:
				pca_data->i2c_clock = I2C_PCA_CON_44kHz;
				break;
			case 36000:
				pca_data->i2c_clock = I2C_PCA_CON_36kHz;
				break;
			default:
				printk(KERN_WARNING
					"%s: Invalid I2C clock speed selected."
					" Using default 59kHz.\n", adap->name);
			pca_data->i2c_clock = I2C_PCA_CON_59kHz;
			}
		} else {
			printk(KERN_WARNING "%s: "
				"Choosing the clock frequency based on "
				"index is deprecated."
				" Use the nominal frequency.\n", adap->name);
		}

		pca_reset(pca_data);

		clock = pca_clock(pca_data);
		printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
		     adap->name, freqs[clock]);

		pca_set_con(pca_data, I2C_PCA_CON_ENSIO | clock);
	} else {
		int clock;
		int mode;
		int tlow, thi;
		/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
		int min_tlow, min_thi;
		/* These values are the maximum raise and fall values allowed
		 * by the I2C operation mode (Standard, Fast or Fast+)
		 * They are used (added) below to calculate the clock dividers
		 * of PCA9665. Note that they are slightly different of the
		 * real maximum, to allow the change on mode exactly on the
		 * maximum clock rate for each mode
		 */
		int raise_fall_time;

		if (pca_data->i2c_clock > 1265800) {
			printk(KERN_WARNING "%s: I2C clock speed too high."
				" Using 1265.8kHz.\n", adap->name);
			pca_data->i2c_clock = 1265800;
		}

		if (pca_data->i2c_clock < 60300) {
			printk(KERN_WARNING "%s: I2C clock speed too low."
				" Using 60.3kHz.\n", adap->name);
			pca_data->i2c_clock = 60300;
		}

		/* To avoid integer overflow, use clock/100 for calculations */
		clock = pca_clock(pca_data) / 100;

		if (pca_data->i2c_clock > 1000000) {
			mode = I2C_PCA_MODE_TURBO;
			min_tlow = 14;
			min_thi  = 5;
			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
		} else if (pca_data->i2c_clock > 400000) {
			mode = I2C_PCA_MODE_FASTP;
			min_tlow = 17;
			min_thi  = 9;
			raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
		} else if (pca_data->i2c_clock > 100000) {
			mode = I2C_PCA_MODE_FAST;
			min_tlow = 44;
			min_thi  = 20;
			raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
		} else {
			mode = I2C_PCA_MODE_STD;
			min_tlow = 157;
			min_thi  = 134;
			raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
		}

		/* The minimum clock that respects the thi/tlow = 134/157 is
		 * 64800 Hz. Below that, we have to fix the tlow to 255 and
		 * calculate the thi factor.
		 */
		if (clock < 648) {
			tlow = 255;
			thi = 1000000 - clock * raise_fall_time;
			thi /= (I2C_PCA_OSC_PER * clock) - tlow;
		} else {
			tlow = (1000000 - clock * raise_fall_time) * min_tlow;
			tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
			thi = tlow * min_thi / min_tlow;
		}

		pca_reset(pca_data);

		printk(KERN_INFO
		     "%s: Clock frequency is %dHz\n", adap->name, clock * 100);

		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
		pca_outw(pca_data, I2C_PCA_IND, mode);
		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
		pca_outw(pca_data, I2C_PCA_IND, tlow);
		pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
		pca_outw(pca_data, I2C_PCA_IND, thi);

		pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
	}
	udelay(500); /* 500 us for oscillator to stabilise */

	return 0;
}

/*
 * registering functions to load algorithms at runtime
 */
int i2c_pca_add_bus(struct i2c_adapter *adap)
{
	int rval;

	rval = pca_init(adap);
	if (rval)
		return rval;

	return i2c_add_adapter(adap);
}
EXPORT_SYMBOL(i2c_pca_add_bus);

int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
{
	int rval;

	rval = pca_init(adap);
	if (rval)
		return rval;

	return i2c_add_numbered_adapter(adap);
}
EXPORT_SYMBOL(i2c_pca_add_numbered_bus);

MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
	"Wolfram Sang <w.sang@pengutronix.de>");
MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
MODULE_LICENSE("GPL");

module_param(i2c_debug, int, 0);
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4	2	/*
3d438291	3	* i2c-algo-pca.c i2c driver algorithms for PCA9564 adapters
1da177e4	4	* Copyright (C) 2004 Arcom Control Systems
c01b0831	5	* Copyright (C) 2008 Pengutronix
1da177e4 LT	6	*/
	7
	8	#include <linux/kernel.h>
	9	#include <linux/module.h>
	10	#include <linux/moduleparam.h>
	11	#include <linux/delay.h>
8e99ada8	12	#include <linux/jiffies.h>
1da177e4 LT	13	#include <linux/errno.h>
	14	#include <linux/i2c.h>
	15	#include <linux/i2c-algo-pca.h>
1da177e4	16
bac3e7c2 FS	17	#define DEB1(fmt, args...) do { if (i2c_debug >= 1) \
	18	printk(KERN_DEBUG fmt, ## args); } while (0)
	19	#define DEB2(fmt, args...) do { if (i2c_debug >= 2) \
	20	printk(KERN_DEBUG fmt, ## args); } while (0)
	21	#define DEB3(fmt, args...) do { if (i2c_debug >= 3) \
	22	printk(KERN_DEBUG fmt, ## args); } while (0)
1da177e4	23
60507095	24	static int i2c_debug;
1da177e4	25
c01b0831 WS	26	#define pca_outw(adap, reg, val) adap->write_byte(adap->data, reg, val)
c01b0831 WS	27	#define pca_inw(adap, reg) adap->read_byte(adap->data, reg)
1da177e4 LT	28
1da177e4 LT	29	#define pca_status(adap) pca_inw(adap, I2C_PCA_STA)
c01b0831	30	#define pca_clock(adap) adap->i2c_clock
1da177e4 LT	31	#define pca_set_con(adap, val) pca_outw(adap, I2C_PCA_CON, val)
1da177e4 LT	32	#define pca_get_con(adap) pca_inw(adap, I2C_PCA_CON)
c01b0831	33	#define pca_wait(adap) adap->wait_for_completion(adap->data)
1da177e4	34
a76e7c68	35	static void pca_reset(struct i2c_algo_pca_data *adap)
eff9ec95	36	{
a76e7c68 TK	37	if (adap->chip == I2C_PCA_CHIP_9665) {
	38	/* Ignore the reset function from the module,
	39	* we can use the parallel bus reset.
	40	*/
	41	pca_outw(adap, I2C_PCA_INDPTR, I2C_PCA_IPRESET);
	42	pca_outw(adap, I2C_PCA_IND, 0xA5);
	43	pca_outw(adap, I2C_PCA_IND, 0x5A);
	44	} else {
	45	adap->reset_chip(adap->data);
	46	}
eff9ec95 MAC	47	}
eff9ec95 MAC	48
1da177e4 LT	49	/*
	50	* Generate a start condition on the i2c bus.
	51	*
44bbe87e	52	* returns after the start condition has occurred
1da177e4	53	*/
2378bc09	54	static int pca_start(struct i2c_algo_pca_data *adap)
1da177e4 LT	55	{
	56	int sta = pca_get_con(adap);
	57	DEB2("=== START\n");
	58	sta \|= I2C_PCA_CON_STA;
	59	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_SI);
	60	pca_set_con(adap, sta);
2378bc09	61	return pca_wait(adap);
1da177e4 LT	62	}
	63
	64	/*
46b615f4	65	* Generate a repeated start condition on the i2c bus
1da177e4	66	*
44bbe87e	67	* return after the repeated start condition has occurred
1da177e4	68	*/
2378bc09	69	static int pca_repeated_start(struct i2c_algo_pca_data *adap)
1da177e4 LT	70	{
	71	int sta = pca_get_con(adap);
	72	DEB2("=== REPEATED START\n");
	73	sta \|= I2C_PCA_CON_STA;
	74	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_SI);
	75	pca_set_con(adap, sta);
2378bc09	76	return pca_wait(adap);
1da177e4 LT	77	}
	78
	79	/*
	80	* Generate a stop condition on the i2c bus
	81	*
	82	* returns after the stop condition has been generated
	83	*
	84	* STOPs do not generate an interrupt or set the SI flag, since the
46b615f4	85	* part returns the idle state (0xf8). Hence we don't need to
1da177e4 LT	86	* pca_wait here.
	87	*/
	88	static void pca_stop(struct i2c_algo_pca_data *adap)
	89	{
	90	int sta = pca_get_con(adap);
	91	DEB2("=== STOP\n");
	92	sta \|= I2C_PCA_CON_STO;
	93	sta &= ~(I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	94	pca_set_con(adap, sta);
	95	}
	96
	97	/*
	98	* Send the slave address and R/W bit
	99	*
	100	* returns after the address has been sent
	101	*/
2378bc09	102	static int pca_address(struct i2c_algo_pca_data *adap,
2086ca48	103	struct i2c_msg *msg)
1da177e4 LT	104	{
1da177e4 LT	105	int sta = pca_get_con(adap);
ac6d5298	106	int addr = i2c_8bit_addr_from_msg(msg);
1da177e4	107
3d438291	108	DEB2("=== SLAVE ADDRESS %#04x+%c=%#04x\n",
1da177e4	109	msg->addr, msg->flags & I2C_M_RD ? 'R' : 'W', addr);
3d438291	110
1da177e4 LT	111	pca_outw(adap, I2C_PCA_DAT, addr);
	112
	113	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	114	pca_set_con(adap, sta);
	115
2378bc09	116	return pca_wait(adap);
1da177e4 LT	117	}
	118
	119	/*
	120	* Transmit a byte.
	121	*
	122	* Returns after the byte has been transmitted
	123	*/
2378bc09	124	static int pca_tx_byte(struct i2c_algo_pca_data *adap,
2086ca48	125	__u8 b)
1da177e4 LT	126	{
	127	int sta = pca_get_con(adap);
	128	DEB2("=== WRITE %#04x\n", b);
	129	pca_outw(adap, I2C_PCA_DAT, b);
	130
	131	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI);
	132	pca_set_con(adap, sta);
	133
2378bc09	134	return pca_wait(adap);
1da177e4 LT	135	}
	136
	137	/*
	138	* Receive a byte
	139	*
	140	* returns immediately.
	141	*/
3d438291	142	static void pca_rx_byte(struct i2c_algo_pca_data *adap,
1da177e4 LT	143	__u8 *b, int ack)
	144	{
	145	*b = pca_inw(adap, I2C_PCA_DAT);
	146	DEB2("=== READ %#04x %s\n", *b, ack ? "ACK" : "NACK");
	147	}
	148
3d438291	149	/*
1da177e4 LT	150	* Setup ACK or NACK for next received byte and wait for it to arrive.
	151	*
	152	* Returns after next byte has arrived.
	153	*/
2378bc09	154	static int pca_rx_ack(struct i2c_algo_pca_data *adap,
2086ca48	155	int ack)
1da177e4 LT	156	{
	157	int sta = pca_get_con(adap);
	158
	159	sta &= ~(I2C_PCA_CON_STO\|I2C_PCA_CON_STA\|I2C_PCA_CON_SI\|I2C_PCA_CON_AA);
	160
2086ca48	161	if (ack)
1da177e4 LT	162	sta \|= I2C_PCA_CON_AA;
	163
	164	pca_set_con(adap, sta);
2378bc09	165	return pca_wait(adap);
1da177e4 LT	166	}
1da177e4 LT	167
1da177e4	168	static int pca_xfer(struct i2c_adapter *i2c_adap,
2086ca48 FH	169	struct i2c_msg *msgs,
2086ca48 FH	170	int num)
1da177e4	171	{
2086ca48 FH	172	struct i2c_algo_pca_data *adap = i2c_adap->algo_data;
	173	struct i2c_msg *msg = NULL;
	174	int curmsg;
1da177e4 LT	175	int numbytes = 0;
	176	int state;
	177	int ret;
2378bc09	178	int completed = 1;
8e99ada8 WS	179	unsigned long timeout = jiffies + i2c_adap->timeout;
8e99ada8 WS	180
c454dee2	181	while ((state = pca_status(adap)) != 0xf8) {
8e99ada8 WS	182	if (time_before(jiffies, timeout)) {
	183	msleep(10);
	184	} else {
	185	dev_dbg(&i2c_adap->dev, "bus is not idle. status is "
	186	"%#04x\n", state);
4403988a	187	return -EBUSY;
8e99ada8	188	}
1da177e4 LT	189	}
	190
	191	DEB1("{{{ XFER %d messages\n", num);
	192
2086ca48	193	if (i2c_debug >= 2) {
1da177e4 LT	194	for (curmsg = 0; curmsg < num; curmsg++) {
	195	int addr, i;
	196	msg = &msgs[curmsg];
3d438291	197
1da177e4	198	addr = (0x7f & msg->addr) ;
3d438291	199
2086ca48	200	if (msg->flags & I2C_M_RD)
3d438291	201	printk(KERN_INFO " [%02d] RD %d bytes from %#02x [%#02x, ...]\n",
2086ca48	202	curmsg, msg->len, addr, (addr << 1) \| 1);
1da177e4	203	else {
3d438291	204	printk(KERN_INFO " [%02d] WR %d bytes to %#02x [%#02x%s",
2086ca48	205	curmsg, msg->len, addr, addr << 1,
1da177e4	206	msg->len == 0 ? "" : ", ");
2086ca48	207	for (i = 0; i < msg->len; i++)
1da177e4 LT	208	printk("%#04x%s", msg->buf[i], i == msg->len - 1 ? "" : ", ");
	209	printk("]\n");
	210	}
	211	}
	212	}
	213
	214	curmsg = 0;
4403988a	215	ret = -EIO;
1da177e4 LT	216	while (curmsg < num) {
	217	state = pca_status(adap);
	218
	219	DEB3("STATE is 0x%02x\n", state);
	220	msg = &msgs[curmsg];
	221
	222	switch (state) {
	223	case 0xf8: /* On reset or stop the bus is idle */
2378bc09	224	completed = pca_start(adap);
1da177e4 LT	225	break;
	226
	227	case 0x08: /* A START condition has been transmitted */
	228	case 0x10: /* A repeated start condition has been transmitted */
2378bc09	229	completed = pca_address(adap, msg);
1da177e4	230	break;
3d438291	231
1da177e4 LT	232	case 0x18: /* SLA+W has been transmitted; ACK has been received */
	233	case 0x28: /* Data byte in I2CDAT has been transmitted; ACK has been received */
	234	if (numbytes < msg->len) {
2378bc09 WS	235	completed = pca_tx_byte(adap,
2378bc09 WS	236	msg->buf[numbytes]);
1da177e4 LT	237	numbytes++;
	238	break;
	239	}
	240	curmsg++; numbytes = 0;
	241	if (curmsg == num)
	242	pca_stop(adap);
	243	else
2378bc09	244	completed = pca_repeated_start(adap);
1da177e4 LT	245	break;
	246
	247	case 0x20: /* SLA+W has been transmitted; NOT ACK has been received */
	248	DEB2("NOT ACK received after SLA+W\n");
	249	pca_stop(adap);
4403988a	250	ret = -ENXIO;
1da177e4 LT	251	goto out;
	252
	253	case 0x40: /* SLA+R has been transmitted; ACK has been received */
2378bc09	254	completed = pca_rx_ack(adap, msg->len > 1);
1da177e4 LT	255	break;
	256
	257	case 0x50: /* Data bytes has been received; ACK has been returned */
	258	if (numbytes < msg->len) {
	259	pca_rx_byte(adap, &msg->buf[numbytes], 1);
	260	numbytes++;
2378bc09 WS	261	completed = pca_rx_ack(adap,
2378bc09 WS	262	numbytes < msg->len - 1);
1da177e4 LT	263	break;
	264	}
	265	curmsg++; numbytes = 0;
	266	if (curmsg == num)
	267	pca_stop(adap);
	268	else
2378bc09	269	completed = pca_repeated_start(adap);
1da177e4 LT	270	break;
	271
	272	case 0x48: /* SLA+R has been transmitted; NOT ACK has been received */
	273	DEB2("NOT ACK received after SLA+R\n");
	274	pca_stop(adap);
4403988a	275	ret = -ENXIO;
1da177e4 LT	276	goto out;
	277
	278	case 0x30: /* Data byte in I2CDAT has been transmitted; NOT ACK has been received */
	279	DEB2("NOT ACK received after data byte\n");
2196d1cf	280	pca_stop(adap);
1da177e4 LT	281	goto out;
	282
	283	case 0x38: /* Arbitration lost during SLA+W, SLA+R or data bytes */
	284	DEB2("Arbitration lost\n");
2196d1cf EB	285	/*
	286	* The PCA9564 data sheet (2006-09-01) says "A
	287	* START condition will be transmitted when the
	288	* bus becomes free (STOP or SCL and SDA high)"
	289	* when the STA bit is set (p. 11).
	290	*
	291	* In case this won't work, try pca_reset()
	292	* instead.
	293	*/
	294	pca_start(adap);
1da177e4	295	goto out;
3d438291	296
1da177e4	297	case 0x58: /* Data byte has been received; NOT ACK has been returned */
2086ca48	298	if (numbytes == msg->len - 1) {
1da177e4 LT	299	pca_rx_byte(adap, &msg->buf[numbytes], 0);
	300	curmsg++; numbytes = 0;
	301	if (curmsg == num)
	302	pca_stop(adap);
	303	else
2378bc09	304	completed = pca_repeated_start(adap);
1da177e4 LT	305	} else {
	306	DEB2("NOT ACK sent after data byte received. "
	307	"Not final byte. numbytes %d. len %d\n",
	308	numbytes, msg->len);
	309	pca_stop(adap);
	310	goto out;
	311	}
	312	break;
	313	case 0x70: /* Bus error - SDA stuck low */
	314	DEB2("BUS ERROR - SDA Stuck low\n");
	315	pca_reset(adap);
	316	goto out;
	317	case 0x90: /* Bus error - SCL stuck low */
	318	DEB2("BUS ERROR - SCL Stuck low\n");
	319	pca_reset(adap);
	320	goto out;
	321	case 0x00: /* Bus error during master or slave mode due to illegal START or STOP condition */
	322	DEB2("BUS ERROR - Illegal START or STOP\n");
	323	pca_reset(adap);
	324	goto out;
	325	default:
c01b0831	326	dev_err(&i2c_adap->dev, "unhandled SIO state 0x%02x\n", state);
1da177e4 LT	327	break;
1da177e4 LT	328	}
3d438291	329
2378bc09 WS	330	if (!completed)
2378bc09 WS	331	goto out;
1da177e4 LT	332	}
	333
	334	ret = curmsg;
	335	out:
25985edc	336	DEB1("}}} transferred %d/%d messages. "
3d438291	337	"status is %#04x. control is %#04x\n",
1da177e4 LT	338	curmsg, num, pca_status(adap),
	339	pca_get_con(adap));
	340	return ret;
	341	}
	342
	343	static u32 pca_func(struct i2c_adapter *adap)
	344	{
2086ca48	345	return I2C_FUNC_I2C \| I2C_FUNC_SMBUS_EMUL;
1da177e4 LT	346	}
1da177e4 LT	347
c01b0831 WS	348	static const struct i2c_algorithm pca_algo = {
	349	.master_xfer = pca_xfer,
	350	.functionality = pca_func,
	351	};
	352
eff9ec95	353	static unsigned int pca_probe_chip(struct i2c_adapter *adap)
1da177e4	354	{
c01b0831	355	struct i2c_algo_pca_data *pca_data = adap->algo_data;
eff9ec95 MAC	356	/* The trick here is to check if there is an indirect register
	357	* available. If there is one, we will read the value we first
	358	* wrote on I2C_PCA_IADR. Otherwise, we will read the last value
	359	* we wrote on I2C_PCA_ADR
	360	*/
	361	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	362	pca_outw(pca_data, I2C_PCA_IND, 0xAA);
	363	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ITO);
	364	pca_outw(pca_data, I2C_PCA_IND, 0x00);
	365	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IADR);
	366	if (pca_inw(pca_data, I2C_PCA_IND) == 0xAA) {
	367	printk(KERN_INFO "%s: PCA9665 detected.\n", adap->name);
a76e7c68	368	pca_data->chip = I2C_PCA_CHIP_9665;
eff9ec95 MAC	369	} else {
eff9ec95 MAC	370	printk(KERN_INFO "%s: PCA9564 detected.\n", adap->name);
a76e7c68	371	pca_data->chip = I2C_PCA_CHIP_9564;
c01b0831	372	}
a76e7c68	373	return pca_data->chip;
eff9ec95 MAC	374	}
	375
	376	static int pca_init(struct i2c_adapter *adap)
	377	{
	378	struct i2c_algo_pca_data *pca_data = adap->algo_data;
c01b0831 WS	379
c01b0831 WS	380	adap->algo = &pca_algo;
1da177e4	381
eff9ec95 MAC	382	if (pca_probe_chip(adap) == I2C_PCA_CHIP_9564) {
	383	static int freqs[] = {330, 288, 217, 146, 88, 59, 44, 36};
	384	int clock;
	385
	386	if (pca_data->i2c_clock > 7) {
	387	switch (pca_data->i2c_clock) {
	388	case 330000:
	389	pca_data->i2c_clock = I2C_PCA_CON_330kHz;
	390	break;
	391	case 288000:
	392	pca_data->i2c_clock = I2C_PCA_CON_288kHz;
	393	break;
	394	case 217000:
	395	pca_data->i2c_clock = I2C_PCA_CON_217kHz;
	396	break;
	397	case 146000:
	398	pca_data->i2c_clock = I2C_PCA_CON_146kHz;
	399	break;
	400	case 88000:
	401	pca_data->i2c_clock = I2C_PCA_CON_88kHz;
	402	break;
	403	case 59000:
	404	pca_data->i2c_clock = I2C_PCA_CON_59kHz;
	405	break;
	406	case 44000:
	407	pca_data->i2c_clock = I2C_PCA_CON_44kHz;
	408	break;
	409	case 36000:
	410	pca_data->i2c_clock = I2C_PCA_CON_36kHz;
	411	break;
	412	default:
	413	printk(KERN_WARNING
	414	"%s: Invalid I2C clock speed selected."
	415	" Using default 59kHz.\n", adap->name);
	416	pca_data->i2c_clock = I2C_PCA_CON_59kHz;
	417	}
	418	} else {
	419	printk(KERN_WARNING "%s: "
	420	"Choosing the clock frequency based on "
	421	"index is deprecated."
	422	" Use the nominal frequency.\n", adap->name);
	423	}
	424
	425	pca_reset(pca_data);
	426
	427	clock = pca_clock(pca_data);
	428	printk(KERN_INFO "%s: Clock frequency is %dkHz\n",
	429	adap->name, freqs[clock]);
	430
	431	pca_set_con(pca_data, I2C_PCA_CON_ENSIO \| clock);
	432	} else {
	433	int clock;
	434	int mode;
	435	int tlow, thi;
	436	/* Values can be found on PCA9665 datasheet section 7.3.2.6 */
	437	int min_tlow, min_thi;
	438	/* These values are the maximum raise and fall values allowed
	439	* by the I2C operation mode (Standard, Fast or Fast+)
	440	* They are used (added) below to calculate the clock dividers
	441	* of PCA9665. Note that they are slightly different of the
	442	* real maximum, to allow the change on mode exactly on the
	443	* maximum clock rate for each mode
	444	*/
	445	int raise_fall_time;
446
eff9ec95 MAC	447	if (pca_data->i2c_clock > 1265800) {
	448	printk(KERN_WARNING "%s: I2C clock speed too high."
	449	" Using 1265.8kHz.\n", adap->name);
	450	pca_data->i2c_clock = 1265800;
	451	}
	452
	453	if (pca_data->i2c_clock < 60300) {
	454	printk(KERN_WARNING "%s: I2C clock speed too low."
	455	" Using 60.3kHz.\n", adap->name);
	456	pca_data->i2c_clock = 60300;
	457	}
	458
	459	/* To avoid integer overflow, use clock/100 for calculations */
	460	clock = pca_clock(pca_data) / 100;
	461
5f71a3ef	462	if (pca_data->i2c_clock > 1000000) {
eff9ec95 MAC	463	mode = I2C_PCA_MODE_TURBO;
	464	min_tlow = 14;
	465	min_thi = 5;
	466	raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
5f71a3ef	467	} else if (pca_data->i2c_clock > 400000) {
eff9ec95 MAC	468	mode = I2C_PCA_MODE_FASTP;
	469	min_tlow = 17;
	470	min_thi = 9;
	471	raise_fall_time = 22; /* Raise 11e-8s, Fall 11e-8s */
5f71a3ef	472	} else if (pca_data->i2c_clock > 100000) {
eff9ec95 MAC	473	mode = I2C_PCA_MODE_FAST;
	474	min_tlow = 44;
	475	min_thi = 20;
	476	raise_fall_time = 58; /* Raise 29e-8s, Fall 29e-8s */
	477	} else {
	478	mode = I2C_PCA_MODE_STD;
	479	min_tlow = 157;
	480	min_thi = 134;
	481	raise_fall_time = 127; /* Raise 29e-8s, Fall 98e-8s */
	482	}
	483
	484	/* The minimum clock that respects the thi/tlow = 134/157 is
	485	* 64800 Hz. Below that, we have to fix the tlow to 255 and
	486	* calculate the thi factor.
	487	*/
	488	if (clock < 648) {
	489	tlow = 255;
	490	thi = 1000000 - clock * raise_fall_time;
	491	thi /= (I2C_PCA_OSC_PER * clock) - tlow;
	492	} else {
	493	tlow = (1000000 - clock * raise_fall_time) * min_tlow;
	494	tlow /= I2C_PCA_OSC_PER * clock * (min_thi + min_tlow);
	495	thi = tlow * min_thi / min_tlow;
	496	}
	497
	498	pca_reset(pca_data);
1da177e4	499
eff9ec95 MAC	500	printk(KERN_INFO
eff9ec95 MAC	501	"%s: Clock frequency is %dHz\n", adap->name, clock * 100);
1da177e4	502
eff9ec95 MAC	503	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_IMODE);
	504	pca_outw(pca_data, I2C_PCA_IND, mode);
	505	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLL);
	506	pca_outw(pca_data, I2C_PCA_IND, tlow);
	507	pca_outw(pca_data, I2C_PCA_INDPTR, I2C_PCA_ISCLH);
	508	pca_outw(pca_data, I2C_PCA_IND, thi);
	509
	510	pca_set_con(pca_data, I2C_PCA_CON_ENSIO);
	511	}
0e6dd6a2	512	udelay(500); /* 500 us for oscillator to stabilise */
1da177e4 LT	513
	514	return 0;
	515	}
	516
3d438291 WS	517	/*
3d438291 WS	518	* registering functions to load algorithms at runtime
1da177e4 LT	519	*/
	520	int i2c_pca_add_bus(struct i2c_adapter *adap)
	521	{
1da177e4 LT	522	int rval;
1da177e4 LT	523
c01b0831 WS	524	rval = pca_init(adap);
	525	if (rval)
	526	return rval;
1da177e4	527
c01b0831 WS	528	return i2c_add_adapter(adap);
	529	}
	530	EXPORT_SYMBOL(i2c_pca_add_bus);
1da177e4	531
c01b0831 WS	532	int i2c_pca_add_numbered_bus(struct i2c_adapter *adap)
	533	{
	534	int rval;
1da177e4	535
c01b0831 WS	536	rval = pca_init(adap);
	537	if (rval)
	538	return rval;
1da177e4	539
c01b0831	540	return i2c_add_numbered_adapter(adap);
1da177e4	541	}
c01b0831	542	EXPORT_SYMBOL(i2c_pca_add_numbered_bus);
1da177e4	543
c01b0831 WS	544	MODULE_AUTHOR("Ian Campbell <icampbell@arcom.com>, "
c01b0831 WS	545	"Wolfram Sang <w.sang@pengutronix.de>");
eff9ec95	546	MODULE_DESCRIPTION("I2C-Bus PCA9564/PCA9665 algorithm");
1da177e4 LT	547	MODULE_LICENSE("GPL");
	548
	549	module_param(i2c_debug, int, 0);