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1da177e4 | 1 | /* |
1da177e4 LT |
2 | Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and |
3 | Philip Edelbrock <phil@netroedge.com> and | |
4 | Mark D. Studebaker <mdsxyz123@yahoo.com> | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
1da177e4 LT |
15 | */ |
16 | ||
17 | /* | |
18 | This is the driver for the SMB Host controller on | |
19 | Acer Labs Inc. (ALI) M1541 and M1543C South Bridges. | |
20 | ||
21 | The M1543C is a South bridge for desktop systems. | |
22 | The M1533 is a South bridge for portable systems. | |
23 | They are part of the following ALI chipsets: | |
24 | "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge | |
25 | with AGP and 100MHz CPU Front Side bus | |
26 | "Aladdin V": Includes the M1541 Socket 7 North bridge | |
27 | with AGP and 100MHz CPU Front Side bus | |
28 | "Aladdin IV": Includes the M1541 Socket 7 North bridge | |
29 | with host bus up to 83.3 MHz. | |
30 | For an overview of these chips see http://www.acerlabs.com | |
31 | ||
32 | The M1533/M1543C devices appear as FOUR separate devices | |
33 | on the PCI bus. An output of lspci will show something similar | |
34 | to the following: | |
35 | ||
36 | 00:02.0 USB Controller: Acer Laboratories Inc. M5237 | |
37 | 00:03.0 Bridge: Acer Laboratories Inc. M7101 | |
38 | 00:07.0 ISA bridge: Acer Laboratories Inc. M1533 | |
39 | 00:0f.0 IDE interface: Acer Laboratories Inc. M5229 | |
40 | ||
41 | The SMB controller is part of the 7101 device, which is an | |
42 | ACPI-compliant Power Management Unit (PMU). | |
43 | ||
44 | The whole 7101 device has to be enabled for the SMB to work. | |
45 | You can't just enable the SMB alone. | |
46 | The SMB and the ACPI have separate I/O spaces. | |
47 | We make sure that the SMB is enabled. We leave the ACPI alone. | |
48 | ||
49 | This driver controls the SMB Host only. | |
50 | The SMB Slave controller on the M15X3 is not enabled. | |
51 | ||
52 | This driver does not use interrupts. | |
53 | */ | |
54 | ||
55 | /* Note: we assume there can only be one ALI15X3, with one SMBus interface */ | |
56 | ||
1da177e4 LT |
57 | #include <linux/module.h> |
58 | #include <linux/pci.h> | |
59 | #include <linux/kernel.h> | |
60 | #include <linux/stddef.h> | |
1da177e4 LT |
61 | #include <linux/ioport.h> |
62 | #include <linux/delay.h> | |
63 | #include <linux/i2c.h> | |
54fb4a05 | 64 | #include <linux/acpi.h> |
21782180 | 65 | #include <linux/io.h> |
1da177e4 LT |
66 | |
67 | /* ALI15X3 SMBus address offsets */ | |
68 | #define SMBHSTSTS (0 + ali15x3_smba) | |
69 | #define SMBHSTCNT (1 + ali15x3_smba) | |
70 | #define SMBHSTSTART (2 + ali15x3_smba) | |
71 | #define SMBHSTCMD (7 + ali15x3_smba) | |
72 | #define SMBHSTADD (3 + ali15x3_smba) | |
73 | #define SMBHSTDAT0 (4 + ali15x3_smba) | |
74 | #define SMBHSTDAT1 (5 + ali15x3_smba) | |
75 | #define SMBBLKDAT (6 + ali15x3_smba) | |
76 | ||
77 | /* PCI Address Constants */ | |
78 | #define SMBCOM 0x004 | |
79 | #define SMBBA 0x014 | |
80 | #define SMBATPC 0x05B /* used to unlock xxxBA registers */ | |
81 | #define SMBHSTCFG 0x0E0 | |
82 | #define SMBSLVC 0x0E1 | |
83 | #define SMBCLK 0x0E2 | |
84 | #define SMBREV 0x008 | |
85 | ||
86 | /* Other settings */ | |
87 | #define MAX_TIMEOUT 200 /* times 1/100 sec */ | |
88 | #define ALI15X3_SMB_IOSIZE 32 | |
89 | ||
90 | /* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB. | |
91 | We don't use these here. If the bases aren't set to some value we | |
92 | tell user to upgrade BIOS and we fail. | |
93 | */ | |
94 | #define ALI15X3_SMB_DEFAULTBASE 0xE800 | |
95 | ||
96 | /* ALI15X3 address lock bits */ | |
97 | #define ALI15X3_LOCK 0x06 | |
98 | ||
99 | /* ALI15X3 command constants */ | |
100 | #define ALI15X3_ABORT 0x02 | |
101 | #define ALI15X3_T_OUT 0x04 | |
102 | #define ALI15X3_QUICK 0x00 | |
103 | #define ALI15X3_BYTE 0x10 | |
104 | #define ALI15X3_BYTE_DATA 0x20 | |
105 | #define ALI15X3_WORD_DATA 0x30 | |
106 | #define ALI15X3_BLOCK_DATA 0x40 | |
107 | #define ALI15X3_BLOCK_CLR 0x80 | |
108 | ||
109 | /* ALI15X3 status register bits */ | |
110 | #define ALI15X3_STS_IDLE 0x04 | |
111 | #define ALI15X3_STS_BUSY 0x08 | |
112 | #define ALI15X3_STS_DONE 0x10 | |
113 | #define ALI15X3_STS_DEV 0x20 /* device error */ | |
114 | #define ALI15X3_STS_COLL 0x40 /* collision or no response */ | |
115 | #define ALI15X3_STS_TERM 0x80 /* terminated by abort */ | |
116 | #define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ | |
117 | ||
118 | ||
119 | /* If force_addr is set to anything different from 0, we forcibly enable | |
120 | the device at the given address. */ | |
60507095 | 121 | static u16 force_addr; |
1da177e4 LT |
122 | module_param(force_addr, ushort, 0); |
123 | MODULE_PARM_DESC(force_addr, | |
124 | "Initialize the base address of the i2c controller"); | |
125 | ||
d6072f84 | 126 | static struct pci_driver ali15x3_driver; |
60507095 | 127 | static unsigned short ali15x3_smba; |
1da177e4 | 128 | |
0b255e92 | 129 | static int ali15x3_setup(struct pci_dev *ALI15X3_dev) |
1da177e4 LT |
130 | { |
131 | u16 a; | |
132 | unsigned char temp; | |
133 | ||
134 | /* Check the following things: | |
135 | - SMB I/O address is initialized | |
136 | - Device is enabled | |
137 | - We can use the addresses | |
138 | */ | |
139 | ||
140 | /* Unlock the register. | |
141 | The data sheet says that the address registers are read-only | |
142 | if the lock bits are 1, but in fact the address registers | |
143 | are zero unless you clear the lock bits. | |
144 | */ | |
145 | pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp); | |
146 | if (temp & ALI15X3_LOCK) { | |
147 | temp &= ~ALI15X3_LOCK; | |
148 | pci_write_config_byte(ALI15X3_dev, SMBATPC, temp); | |
149 | } | |
150 | ||
151 | /* Determine the address of the SMBus area */ | |
152 | pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba); | |
153 | ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1)); | |
154 | if (ali15x3_smba == 0 && force_addr == 0) { | |
155 | dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized " | |
156 | "- upgrade BIOS or use force_addr=0xaddr\n"); | |
157 | return -ENODEV; | |
158 | } | |
159 | ||
160 | if(force_addr) | |
161 | ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1); | |
162 | ||
54fb4a05 JD |
163 | if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE, |
164 | ali15x3_driver.name)) | |
165 | return -EBUSY; | |
166 | ||
d6072f84 JD |
167 | if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE, |
168 | ali15x3_driver.name)) { | |
1da177e4 LT |
169 | dev_err(&ALI15X3_dev->dev, |
170 | "ALI15X3_smb region 0x%x already in use!\n", | |
171 | ali15x3_smba); | |
172 | return -ENODEV; | |
173 | } | |
174 | ||
175 | if(force_addr) { | |
176 | dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n", | |
177 | ali15x3_smba); | |
178 | if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev, | |
179 | SMBBA, | |
180 | ali15x3_smba)) | |
181 | goto error; | |
182 | if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev, | |
183 | SMBBA, &a)) | |
184 | goto error; | |
185 | if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) { | |
186 | /* make sure it works */ | |
187 | dev_err(&ALI15X3_dev->dev, | |
188 | "force address failed - not supported?\n"); | |
189 | goto error; | |
190 | } | |
191 | } | |
192 | /* check if whole device is enabled */ | |
193 | pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp); | |
194 | if ((temp & 1) == 0) { | |
195 | dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n"); | |
196 | pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01); | |
197 | } | |
198 | ||
199 | /* Is SMB Host controller enabled? */ | |
200 | pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp); | |
201 | if ((temp & 1) == 0) { | |
202 | dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n"); | |
203 | pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01); | |
204 | } | |
205 | ||
206 | /* set SMB clock to 74KHz as recommended in data sheet */ | |
207 | pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20); | |
208 | ||
209 | /* | |
210 | The interrupt routing for SMB is set up in register 0x77 in the | |
211 | 1533 ISA Bridge device, NOT in the 7101 device. | |
212 | Don't bother with finding the 1533 device and reading the register. | |
213 | if ((....... & 0x0F) == 1) | |
214 | dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n"); | |
215 | */ | |
216 | pci_read_config_byte(ALI15X3_dev, SMBREV, &temp); | |
217 | dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp); | |
218 | dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba); | |
219 | ||
220 | return 0; | |
221 | error: | |
222 | release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE); | |
223 | return -ENODEV; | |
224 | } | |
225 | ||
226 | /* Another internally used function */ | |
227 | static int ali15x3_transaction(struct i2c_adapter *adap) | |
228 | { | |
229 | int temp; | |
230 | int result = 0; | |
231 | int timeout = 0; | |
232 | ||
233 | dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, " | |
234 | "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS), | |
235 | inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), | |
236 | inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); | |
237 | ||
238 | /* get status */ | |
239 | temp = inb_p(SMBHSTSTS); | |
240 | ||
241 | /* Make sure the SMBus host is ready to start transmitting */ | |
242 | /* Check the busy bit first */ | |
243 | if (temp & ALI15X3_STS_BUSY) { | |
244 | /* | |
245 | If the host controller is still busy, it may have timed out in the | |
246 | previous transaction, resulting in a "SMBus Timeout" Dev. | |
247 | I've tried the following to reset a stuck busy bit. | |
248 | 1. Reset the controller with an ABORT command. | |
249 | (this doesn't seem to clear the controller if an external | |
250 | device is hung) | |
251 | 2. Reset the controller and the other SMBus devices with a | |
252 | T_OUT command. (this clears the host busy bit if an | |
253 | external device is hung, but it comes back upon a new access | |
254 | to a device) | |
255 | 3. Disable and reenable the controller in SMBHSTCFG | |
256 | Worst case, nothing seems to work except power reset. | |
257 | */ | |
258 | /* Abort - reset the host controller */ | |
259 | /* | |
260 | Try resetting entire SMB bus, including other devices - | |
261 | This may not work either - it clears the BUSY bit but | |
262 | then the BUSY bit may come back on when you try and use the chip again. | |
263 | If that's the case you are stuck. | |
264 | */ | |
265 | dev_info(&adap->dev, "Resetting entire SMB Bus to " | |
266 | "clear busy condition (%02x)\n", temp); | |
267 | outb_p(ALI15X3_T_OUT, SMBHSTCNT); | |
268 | temp = inb_p(SMBHSTSTS); | |
269 | } | |
270 | ||
271 | /* now check the error bits and the busy bit */ | |
272 | if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { | |
273 | /* do a clear-on-write */ | |
274 | outb_p(0xFF, SMBHSTSTS); | |
275 | if ((temp = inb_p(SMBHSTSTS)) & | |
276 | (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) { | |
277 | /* this is probably going to be correctable only by a power reset | |
278 | as one of the bits now appears to be stuck */ | |
279 | /* This may be a bus or device with electrical problems. */ | |
280 | dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - " | |
281 | "controller or device on bus is probably hung\n", | |
282 | temp); | |
97140342 | 283 | return -EBUSY; |
1da177e4 LT |
284 | } |
285 | } else { | |
286 | /* check and clear done bit */ | |
287 | if (temp & ALI15X3_STS_DONE) { | |
288 | outb_p(temp, SMBHSTSTS); | |
289 | } | |
290 | } | |
291 | ||
292 | /* start the transaction by writing anything to the start register */ | |
293 | outb_p(0xFF, SMBHSTSTART); | |
294 | ||
295 | /* We will always wait for a fraction of a second! */ | |
296 | timeout = 0; | |
297 | do { | |
298 | msleep(1); | |
299 | temp = inb_p(SMBHSTSTS); | |
300 | } while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE))) | |
301 | && (timeout++ < MAX_TIMEOUT)); | |
302 | ||
303 | /* If the SMBus is still busy, we give up */ | |
4ccc28f7 | 304 | if (timeout > MAX_TIMEOUT) { |
97140342 | 305 | result = -ETIMEDOUT; |
1da177e4 LT |
306 | dev_err(&adap->dev, "SMBus Timeout!\n"); |
307 | } | |
308 | ||
309 | if (temp & ALI15X3_STS_TERM) { | |
97140342 | 310 | result = -EIO; |
1da177e4 LT |
311 | dev_dbg(&adap->dev, "Error: Failed bus transaction\n"); |
312 | } | |
313 | ||
314 | /* | |
315 | Unfortunately the ALI SMB controller maps "no response" and "bus | |
25985edc | 316 | collision" into a single bit. No response is the usual case so don't |
1da177e4 LT |
317 | do a printk. |
318 | This means that bus collisions go unreported. | |
319 | */ | |
320 | if (temp & ALI15X3_STS_COLL) { | |
97140342 | 321 | result = -ENXIO; |
1da177e4 LT |
322 | dev_dbg(&adap->dev, |
323 | "Error: no response or bus collision ADD=%02x\n", | |
324 | inb_p(SMBHSTADD)); | |
325 | } | |
326 | ||
327 | /* haven't ever seen this */ | |
328 | if (temp & ALI15X3_STS_DEV) { | |
97140342 | 329 | result = -EIO; |
1da177e4 LT |
330 | dev_err(&adap->dev, "Error: device error\n"); |
331 | } | |
332 | dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, " | |
333 | "ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS), | |
334 | inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD), | |
335 | inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1)); | |
336 | return result; | |
337 | } | |
338 | ||
97140342 | 339 | /* Return negative errno on error. */ |
1da177e4 LT |
340 | static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr, |
341 | unsigned short flags, char read_write, u8 command, | |
342 | int size, union i2c_smbus_data * data) | |
343 | { | |
344 | int i, len; | |
345 | int temp; | |
346 | int timeout; | |
347 | ||
348 | /* clear all the bits (clear-on-write) */ | |
349 | outb_p(0xFF, SMBHSTSTS); | |
350 | /* make sure SMBus is idle */ | |
351 | temp = inb_p(SMBHSTSTS); | |
352 | for (timeout = 0; | |
353 | (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE); | |
354 | timeout++) { | |
355 | msleep(1); | |
356 | temp = inb_p(SMBHSTSTS); | |
357 | } | |
358 | if (timeout >= MAX_TIMEOUT) { | |
359 | dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp); | |
360 | } | |
361 | ||
362 | switch (size) { | |
1da177e4 LT |
363 | case I2C_SMBUS_QUICK: |
364 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
365 | SMBHSTADD); | |
366 | size = ALI15X3_QUICK; | |
367 | break; | |
368 | case I2C_SMBUS_BYTE: | |
369 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
370 | SMBHSTADD); | |
371 | if (read_write == I2C_SMBUS_WRITE) | |
372 | outb_p(command, SMBHSTCMD); | |
373 | size = ALI15X3_BYTE; | |
374 | break; | |
375 | case I2C_SMBUS_BYTE_DATA: | |
376 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
377 | SMBHSTADD); | |
378 | outb_p(command, SMBHSTCMD); | |
379 | if (read_write == I2C_SMBUS_WRITE) | |
380 | outb_p(data->byte, SMBHSTDAT0); | |
381 | size = ALI15X3_BYTE_DATA; | |
382 | break; | |
383 | case I2C_SMBUS_WORD_DATA: | |
384 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
385 | SMBHSTADD); | |
386 | outb_p(command, SMBHSTCMD); | |
387 | if (read_write == I2C_SMBUS_WRITE) { | |
388 | outb_p(data->word & 0xff, SMBHSTDAT0); | |
389 | outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); | |
390 | } | |
391 | size = ALI15X3_WORD_DATA; | |
392 | break; | |
393 | case I2C_SMBUS_BLOCK_DATA: | |
394 | outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), | |
395 | SMBHSTADD); | |
396 | outb_p(command, SMBHSTCMD); | |
397 | if (read_write == I2C_SMBUS_WRITE) { | |
398 | len = data->block[0]; | |
399 | if (len < 0) { | |
400 | len = 0; | |
401 | data->block[0] = len; | |
402 | } | |
403 | if (len > 32) { | |
404 | len = 32; | |
405 | data->block[0] = len; | |
406 | } | |
407 | outb_p(len, SMBHSTDAT0); | |
408 | /* Reset SMBBLKDAT */ | |
409 | outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT); | |
410 | for (i = 1; i <= len; i++) | |
411 | outb_p(data->block[i], SMBBLKDAT); | |
412 | } | |
413 | size = ALI15X3_BLOCK_DATA; | |
414 | break; | |
ac7fc4fb JD |
415 | default: |
416 | dev_warn(&adap->dev, "Unsupported transaction %d\n", size); | |
417 | return -EOPNOTSUPP; | |
1da177e4 LT |
418 | } |
419 | ||
420 | outb_p(size, SMBHSTCNT); /* output command */ | |
421 | ||
97140342 DB |
422 | temp = ali15x3_transaction(adap); |
423 | if (temp) | |
424 | return temp; | |
1da177e4 LT |
425 | |
426 | if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK)) | |
427 | return 0; | |
428 | ||
429 | ||
430 | switch (size) { | |
431 | case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */ | |
432 | data->byte = inb_p(SMBHSTDAT0); | |
433 | break; | |
434 | case ALI15X3_BYTE_DATA: | |
435 | data->byte = inb_p(SMBHSTDAT0); | |
436 | break; | |
437 | case ALI15X3_WORD_DATA: | |
438 | data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); | |
439 | break; | |
440 | case ALI15X3_BLOCK_DATA: | |
441 | len = inb_p(SMBHSTDAT0); | |
442 | if (len > 32) | |
443 | len = 32; | |
444 | data->block[0] = len; | |
445 | /* Reset SMBBLKDAT */ | |
446 | outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT); | |
447 | for (i = 1; i <= data->block[0]; i++) { | |
448 | data->block[i] = inb_p(SMBBLKDAT); | |
449 | dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n", | |
450 | len, i, data->block[i]); | |
451 | } | |
452 | break; | |
453 | } | |
454 | return 0; | |
455 | } | |
456 | ||
457 | static u32 ali15x3_func(struct i2c_adapter *adapter) | |
458 | { | |
459 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | |
460 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | |
461 | I2C_FUNC_SMBUS_BLOCK_DATA; | |
462 | } | |
463 | ||
8f9082c5 | 464 | static const struct i2c_algorithm smbus_algorithm = { |
1da177e4 LT |
465 | .smbus_xfer = ali15x3_access, |
466 | .functionality = ali15x3_func, | |
467 | }; | |
468 | ||
469 | static struct i2c_adapter ali15x3_adapter = { | |
470 | .owner = THIS_MODULE, | |
3401b2ff | 471 | .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, |
1da177e4 | 472 | .algo = &smbus_algorithm, |
1da177e4 LT |
473 | }; |
474 | ||
392debf1 | 475 | static const struct pci_device_id ali15x3_ids[] = { |
1da177e4 LT |
476 | { PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) }, |
477 | { 0, } | |
478 | }; | |
479 | ||
480 | MODULE_DEVICE_TABLE (pci, ali15x3_ids); | |
481 | ||
0b255e92 | 482 | static int ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id) |
1da177e4 LT |
483 | { |
484 | if (ali15x3_setup(dev)) { | |
485 | dev_err(&dev->dev, | |
486 | "ALI15X3 not detected, module not inserted.\n"); | |
487 | return -ENODEV; | |
488 | } | |
489 | ||
405ae7d3 | 490 | /* set up the sysfs linkage to our parent device */ |
1da177e4 LT |
491 | ali15x3_adapter.dev.parent = &dev->dev; |
492 | ||
2096b956 | 493 | snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name), |
1da177e4 LT |
494 | "SMBus ALI15X3 adapter at %04x", ali15x3_smba); |
495 | return i2c_add_adapter(&ali15x3_adapter); | |
496 | } | |
497 | ||
0b255e92 | 498 | static void ali15x3_remove(struct pci_dev *dev) |
1da177e4 LT |
499 | { |
500 | i2c_del_adapter(&ali15x3_adapter); | |
501 | release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE); | |
502 | } | |
503 | ||
504 | static struct pci_driver ali15x3_driver = { | |
505 | .name = "ali15x3_smbus", | |
506 | .id_table = ali15x3_ids, | |
507 | .probe = ali15x3_probe, | |
0b255e92 | 508 | .remove = ali15x3_remove, |
1da177e4 LT |
509 | }; |
510 | ||
56f21788 | 511 | module_pci_driver(ali15x3_driver); |
1da177e4 LT |
512 | |
513 | MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, " | |
514 | "Philip Edelbrock <phil@netroedge.com>, " | |
515 | "and Mark D. Studebaker <mdsxyz123@yahoo.com>"); | |
516 | MODULE_DESCRIPTION("ALI15X3 SMBus driver"); | |
517 | MODULE_LICENSE("GPL"); |