[mirror_ubuntu-artful-kernel.git] / drivers / i2c / busses / i2c-designware-core.h

/*
 * Synopsys DesignWare I2C adapter driver (master only).
 *
 * Based on the TI DAVINCI I2C adapter driver.
 *
 * Copyright (C) 2006 Texas Instruments.
 * Copyright (C) 2007 MontaVista Software Inc.
 * Copyright (C) 2009 Provigent Ltd.
 *
 * ----------------------------------------------------------------------------
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * ----------------------------------------------------------------------------
 *
 */

#include <linux/i2c.h>

#define DW_IC_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C |			\
					I2C_FUNC_SMBUS_BYTE |		\
					I2C_FUNC_SMBUS_BYTE_DATA |	\
					I2C_FUNC_SMBUS_WORD_DATA |	\
					I2C_FUNC_SMBUS_BLOCK_DATA |	\
					I2C_FUNC_SMBUS_I2C_BLOCK)

#define DW_IC_CON_MASTER		0x1
#define DW_IC_CON_SPEED_STD		0x2
#define DW_IC_CON_SPEED_FAST		0x4
#define DW_IC_CON_SPEED_HIGH		0x6
#define DW_IC_CON_SPEED_MASK		0x6
#define DW_IC_CON_10BITADDR_MASTER	0x10
#define DW_IC_CON_RESTART_EN		0x20
#define DW_IC_CON_SLAVE_DISABLE		0x40


/**
 * struct dw_i2c_dev - private i2c-designware data
 * @dev: driver model device node
 * @base: IO registers pointer
 * @cmd_complete: tx completion indicator
 * @clk: input reference clock
 * @cmd_err: run time hadware error code
 * @msgs: points to an array of messages currently being transfered
 * @msgs_num: the number of elements in msgs
 * @msg_write_idx: the element index of the current tx message in the msgs
 *	array
 * @tx_buf_len: the length of the current tx buffer
 * @tx_buf: the current tx buffer
 * @msg_read_idx: the element index of the current rx message in the msgs
 *	array
 * @rx_buf_len: the length of the current rx buffer
 * @rx_buf: the current rx buffer
 * @msg_err: error status of the current transfer
 * @status: i2c master status, one of STATUS_*
 * @abort_source: copy of the TX_ABRT_SOURCE register
 * @irq: interrupt number for the i2c master
 * @adapter: i2c subsystem adapter node
 * @tx_fifo_depth: depth of the hardware tx fifo
 * @rx_fifo_depth: depth of the hardware rx fifo
 * @rx_outstanding: current master-rx elements in tx fifo
 * @clk_freq: bus clock frequency
 * @ss_hcnt: standard speed HCNT value
 * @ss_lcnt: standard speed LCNT value
 * @fs_hcnt: fast speed HCNT value
 * @fs_lcnt: fast speed LCNT value
 * @fp_hcnt: fast plus HCNT value
 * @fp_lcnt: fast plus LCNT value
 * @hs_hcnt: high speed HCNT value
 * @hs_lcnt: high speed LCNT value
 * @acquire_lock: function to acquire a hardware lock on the bus
 * @release_lock: function to release a hardware lock on the bus
 * @pm_runtime_disabled: true if pm runtime is disabled
 *
 * HCNT and LCNT parameters can be used if the platform knows more accurate
 * values than the one computed based only on the input clock frequency.
 * Leave them to be %0 if not used.
 */
struct dw_i2c_dev {
	struct device		*dev;
	void __iomem		*base;
	struct completion	cmd_complete;
	struct clk		*clk;
	struct reset_control	*rst;
	u32			(*get_clk_rate_khz) (struct dw_i2c_dev *dev);
	struct dw_pci_controller *controller;
	int			cmd_err;
	struct i2c_msg		*msgs;
	int			msgs_num;
	int			msg_write_idx;
	u32			tx_buf_len;
	u8			*tx_buf;
	int			msg_read_idx;
	u32			rx_buf_len;
	u8			*rx_buf;
	int			msg_err;
	unsigned int		status;
	u32			abort_source;
	int			irq;
	u32			accessor_flags;
	struct i2c_adapter	adapter;
	u32			functionality;
	u32			master_cfg;
	unsigned int		tx_fifo_depth;
	unsigned int		rx_fifo_depth;
	int			rx_outstanding;
	u32			clk_freq;
	u32			sda_hold_time;
	u32			sda_falling_time;
	u32			scl_falling_time;
	u16			ss_hcnt;
	u16			ss_lcnt;
	u16			fs_hcnt;
	u16			fs_lcnt;
	u16			fp_hcnt;
	u16			fp_lcnt;
	u16			hs_hcnt;
	u16			hs_lcnt;
	int			(*acquire_lock)(struct dw_i2c_dev *dev);
	void			(*release_lock)(struct dw_i2c_dev *dev);
	bool			pm_runtime_disabled;
};

#define ACCESS_SWAP		0x00000001
#define ACCESS_16BIT		0x00000002
#define ACCESS_INTR_MASK	0x00000004

extern int i2c_dw_init(struct dw_i2c_dev *dev);
extern void i2c_dw_disable(struct dw_i2c_dev *dev);
extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
extern int i2c_dw_probe(struct dw_i2c_dev *dev);

#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL)
extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev);
#else
static inline int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) { return 0; }
#endif
Commit	Line	Data
2373f6b9 DB	1	/*
	2	* Synopsys DesignWare I2C adapter driver (master only).
	3	*
	4	* Based on the TI DAVINCI I2C adapter driver.
	5	*
	6	* Copyright (C) 2006 Texas Instruments.
	7	* Copyright (C) 2007 MontaVista Software Inc.
	8	* Copyright (C) 2009 Provigent Ltd.
	9	*
	10	* ----------------------------------------------------------------------------
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
2373f6b9 DB	21	* ----------------------------------------------------------------------------
	22	*
	23	*/
	24
f06122f0 AS	25	#include <linux/i2c.h>
	26
	27	#define DW_IC_DEFAULT_FUNCTIONALITY (I2C_FUNC_I2C \| \
	28	I2C_FUNC_SMBUS_BYTE \| \
	29	I2C_FUNC_SMBUS_BYTE_DATA \| \
	30	I2C_FUNC_SMBUS_WORD_DATA \| \
	31	I2C_FUNC_SMBUS_BLOCK_DATA \| \
	32	I2C_FUNC_SMBUS_I2C_BLOCK)
2373f6b9 DB	33
	34	#define DW_IC_CON_MASTER 0x1
	35	#define DW_IC_CON_SPEED_STD 0x2
	36	#define DW_IC_CON_SPEED_FAST 0x4
b6e67145	37	#define DW_IC_CON_SPEED_HIGH 0x6
ed1bf034	38	#define DW_IC_CON_SPEED_MASK 0x6
2373f6b9 DB	39	#define DW_IC_CON_10BITADDR_MASTER 0x10
	40	#define DW_IC_CON_RESTART_EN 0x20
	41	#define DW_IC_CON_SLAVE_DISABLE 0x40
	42
2373f6b9	43
2373f6b9 DB	44	/**
	45	* struct dw_i2c_dev - private i2c-designware data
	46	* @dev: driver model device node
	47	* @base: IO registers pointer
	48	* @cmd_complete: tx completion indicator
2373f6b9 DB	49	* @clk: input reference clock
	50	* @cmd_err: run time hadware error code
	51	* @msgs: points to an array of messages currently being transfered
	52	* @msgs_num: the number of elements in msgs
	53	* @msg_write_idx: the element index of the current tx message in the msgs
	54	* array
	55	* @tx_buf_len: the length of the current tx buffer
	56	* @tx_buf: the current tx buffer
	57	* @msg_read_idx: the element index of the current rx message in the msgs
	58	* array
	59	* @rx_buf_len: the length of the current rx buffer
	60	* @rx_buf: the current rx buffer
	61	* @msg_err: error status of the current transfer
	62	* @status: i2c master status, one of STATUS_*
	63	* @abort_source: copy of the TX_ABRT_SOURCE register
	64	* @irq: interrupt number for the i2c master
	65	* @adapter: i2c subsystem adapter node
	66	* @tx_fifo_depth: depth of the hardware tx fifo
	67	* @rx_fifo_depth: depth of the hardware rx fifo
e6f34cea	68	* @rx_outstanding: current master-rx elements in tx fifo
19c0a539	69	* @clk_freq: bus clock frequency
defc0b2f MW	70	* @ss_hcnt: standard speed HCNT value
	71	* @ss_lcnt: standard speed LCNT value
	72	* @fs_hcnt: fast speed HCNT value
	73	* @fs_lcnt: fast speed LCNT value
a92ec174 WV	74	* @fp_hcnt: fast plus HCNT value
	75	* @fp_lcnt: fast plus LCNT value
	76	* @hs_hcnt: high speed HCNT value
	77	* @hs_lcnt: high speed LCNT value
c0601d28 DB	78	* @acquire_lock: function to acquire a hardware lock on the bus
	79	* @release_lock: function to release a hardware lock on the bus
	80	* @pm_runtime_disabled: true if pm runtime is disabled
defc0b2f MW	81	*
	82	* HCNT and LCNT parameters can be used if the platform knows more accurate
	83	* values than the one computed based only on the input clock frequency.
	84	* Leave them to be %0 if not used.
2373f6b9 DB	85	*/
	86	struct dw_i2c_dev {
	87	struct device *dev;
	88	void __iomem *base;
	89	struct completion cmd_complete;
2373f6b9	90	struct clk *clk;
ab809fd8	91	struct reset_control *rst;
1d31b58f	92	u32 (get_clk_rate_khz) (struct dw_i2c_dev dev);
fe20ff5c	93	struct dw_pci_controller *controller;
2373f6b9 DB	94	int cmd_err;
	95	struct i2c_msg *msgs;
	96	int msgs_num;
	97	int msg_write_idx;
	98	u32 tx_buf_len;
	99	u8 *tx_buf;
	100	int msg_read_idx;
	101	u32 rx_buf_len;
	102	u8 *rx_buf;
	103	int msg_err;
	104	unsigned int status;
	105	u32 abort_source;
	106	int irq;
a8a9f3fe	107	u32 accessor_flags;
2373f6b9	108	struct i2c_adapter adapter;
2fa8326b	109	u32 functionality;
e18563fc	110	u32 master_cfg;
2373f6b9 DB	111	unsigned int tx_fifo_depth;
2373f6b9 DB	112	unsigned int rx_fifo_depth;
e6f34cea	113	int rx_outstanding;
19c0a539	114	u32 clk_freq;
9803f868	115	u32 sda_hold_time;
6468276b RB	116	u32 sda_falling_time;
6468276b RB	117	u32 scl_falling_time;
defc0b2f MW	118	u16 ss_hcnt;
	119	u16 ss_lcnt;
	120	u16 fs_hcnt;
	121	u16 fs_lcnt;
a92ec174 WV	122	u16 fp_hcnt;
	123	u16 fp_lcnt;
	124	u16 hs_hcnt;
	125	u16 hs_lcnt;
c0601d28 DB	126	int (acquire_lock)(struct dw_i2c_dev dev);
	127	void (release_lock)(struct dw_i2c_dev dev);
	128	bool pm_runtime_disabled;
2373f6b9 DB	129	};
2373f6b9 DB	130
a8a9f3fe SR	131	#define ACCESS_SWAP 0x00000001
a8a9f3fe SR	132	#define ACCESS_16BIT 0x00000002
2d244c81	133	#define ACCESS_INTR_MASK 0x00000004
a8a9f3fe	134
2373f6b9	135	extern int i2c_dw_init(struct dw_i2c_dev *dev);
f3fa9f3d	136	extern void i2c_dw_disable(struct dw_i2c_dev *dev);
f3fa9f3d DB	137	extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
f3fa9f3d DB	138	extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
d80d1341	139	extern int i2c_dw_probe(struct dw_i2c_dev *dev);
894acb2f DB	140
	141	#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL)
	142	extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev);
	143	#else
	144	static inline int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) { return 0; }
	145	#endif