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Commit | Line | Data |
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2373f6b9 DB |
1 | /* |
2 | * Synopsys DesignWare I2C adapter driver (master only). | |
3 | * | |
4 | * Based on the TI DAVINCI I2C adapter driver. | |
5 | * | |
6 | * Copyright (C) 2006 Texas Instruments. | |
7 | * Copyright (C) 2007 MontaVista Software Inc. | |
8 | * Copyright (C) 2009 Provigent Ltd. | |
9 | * | |
10 | * ---------------------------------------------------------------------------- | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or modify | |
13 | * it under the terms of the GNU General Public License as published by | |
14 | * the Free Software Foundation; either version 2 of the License, or | |
15 | * (at your option) any later version. | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
2373f6b9 DB |
21 | * ---------------------------------------------------------------------------- |
22 | * | |
23 | */ | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/i2c.h> | |
28 | #include <linux/clk.h> | |
a445900c | 29 | #include <linux/clk-provider.h> |
2373f6b9 DB |
30 | #include <linux/errno.h> |
31 | #include <linux/sched.h> | |
32 | #include <linux/err.h> | |
33 | #include <linux/interrupt.h> | |
9803f868 | 34 | #include <linux/of.h> |
2373f6b9 | 35 | #include <linux/platform_device.h> |
3bf3b289 | 36 | #include <linux/pm.h> |
7272194e | 37 | #include <linux/pm_runtime.h> |
2373f6b9 DB |
38 | #include <linux/io.h> |
39 | #include <linux/slab.h> | |
b61b1415 | 40 | #include <linux/acpi.h> |
4bcfda09 | 41 | #include <linux/platform_data/i2c-designware.h> |
2373f6b9 DB |
42 | #include "i2c-designware-core.h" |
43 | ||
1d31b58f DB |
44 | static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev) |
45 | { | |
46 | return clk_get_rate(dev->clk)/1000; | |
47 | } | |
2373f6b9 | 48 | |
b61b1415 | 49 | #ifdef CONFIG_ACPI |
57cd1e30 MW |
50 | static void dw_i2c_acpi_params(struct platform_device *pdev, char method[], |
51 | u16 *hcnt, u16 *lcnt, u32 *sda_hold) | |
52 | { | |
53 | struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER }; | |
54 | acpi_handle handle = ACPI_HANDLE(&pdev->dev); | |
55 | union acpi_object *obj; | |
56 | ||
57 | if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf))) | |
58 | return; | |
59 | ||
60 | obj = (union acpi_object *)buf.pointer; | |
61 | if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) { | |
62 | const union acpi_object *objs = obj->package.elements; | |
63 | ||
64 | *hcnt = (u16)objs[0].integer.value; | |
65 | *lcnt = (u16)objs[1].integer.value; | |
66 | if (sda_hold) | |
67 | *sda_hold = (u32)objs[2].integer.value; | |
68 | } | |
69 | ||
70 | kfree(buf.pointer); | |
71 | } | |
72 | ||
b61b1415 MW |
73 | static int dw_i2c_acpi_configure(struct platform_device *pdev) |
74 | { | |
75 | struct dw_i2c_dev *dev = platform_get_drvdata(pdev); | |
a445900c | 76 | const struct acpi_device_id *id; |
b61b1415 | 77 | |
b61b1415 | 78 | dev->adapter.nr = -1; |
b61b1415 MW |
79 | dev->tx_fifo_depth = 32; |
80 | dev->rx_fifo_depth = 32; | |
57cd1e30 MW |
81 | |
82 | /* | |
83 | * Try to get SDA hold time and *CNT values from an ACPI method if | |
84 | * it exists for both supported speed modes. | |
85 | */ | |
0b26c845 | 86 | dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, NULL); |
57cd1e30 | 87 | dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, |
0b26c845 | 88 | &dev->sda_hold_time); |
57cd1e30 | 89 | |
a445900c CP |
90 | /* |
91 | * Provide a way for Designware I2C host controllers that are not | |
92 | * based on Intel LPSS to specify their input clock frequency via | |
93 | * id->driver_data. | |
94 | */ | |
95 | id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); | |
96 | if (id && id->driver_data) | |
97 | clk_register_fixed_rate(&pdev->dev, dev_name(&pdev->dev), NULL, | |
98 | CLK_IS_ROOT, id->driver_data); | |
99 | ||
b61b1415 MW |
100 | return 0; |
101 | } | |
102 | ||
a445900c CP |
103 | static void dw_i2c_acpi_unconfigure(struct platform_device *pdev) |
104 | { | |
105 | struct dw_i2c_dev *dev = platform_get_drvdata(pdev); | |
106 | const struct acpi_device_id *id; | |
107 | ||
108 | id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); | |
109 | if (id && id->driver_data) | |
110 | clk_unregister(dev->clk); | |
111 | } | |
112 | ||
b61b1415 MW |
113 | static const struct acpi_device_id dw_i2c_acpi_match[] = { |
114 | { "INT33C2", 0 }, | |
115 | { "INT33C3", 0 }, | |
25b3dfc8 MW |
116 | { "INT3432", 0 }, |
117 | { "INT3433", 0 }, | |
5a7e6bd8 | 118 | { "80860F41", 0 }, |
0409516a | 119 | { "808622C1", 0 }, |
a445900c | 120 | { "AMD0010", 133 * 1000 * 1000 }, |
b61b1415 MW |
121 | { } |
122 | }; | |
123 | MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match); | |
124 | #else | |
125 | static inline int dw_i2c_acpi_configure(struct platform_device *pdev) | |
126 | { | |
127 | return -ENODEV; | |
128 | } | |
a445900c | 129 | static inline void dw_i2c_acpi_unconfigure(struct platform_device *pdev) { } |
b61b1415 MW |
130 | #endif |
131 | ||
6ad6fde3 | 132 | static int dw_i2c_plat_probe(struct platform_device *pdev) |
2373f6b9 DB |
133 | { |
134 | struct dw_i2c_dev *dev; | |
135 | struct i2c_adapter *adap; | |
1cb715ca | 136 | struct resource *mem; |
4bcfda09 | 137 | struct dw_i2c_platform_data *pdata; |
2373f6b9 | 138 | int irq, r; |
925ddb24 | 139 | u32 clk_freq, ht = 0; |
2373f6b9 | 140 | |
2373f6b9 | 141 | irq = platform_get_irq(pdev, 0); |
b20d3864 AB |
142 | if (irq < 0) |
143 | return irq; | |
2373f6b9 | 144 | |
1cb715ca AS |
145 | dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); |
146 | if (!dev) | |
147 | return -ENOMEM; | |
2373f6b9 | 148 | |
3cc2d009 | 149 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1cb715ca AS |
150 | dev->base = devm_ioremap_resource(&pdev->dev, mem); |
151 | if (IS_ERR(dev->base)) | |
152 | return PTR_ERR(dev->base); | |
2373f6b9 | 153 | |
1cb715ca | 154 | dev->dev = &pdev->dev; |
2373f6b9 DB |
155 | dev->irq = irq; |
156 | platform_set_drvdata(pdev, dev); | |
157 | ||
8e5f6b2a RB |
158 | /* fast mode by default because of legacy reasons */ |
159 | clk_freq = 400000; | |
160 | ||
ca5b74d2 | 161 | if (has_acpi_companion(&pdev->dev)) { |
925ddb24 MW |
162 | dw_i2c_acpi_configure(pdev); |
163 | } else if (pdev->dev.of_node) { | |
9803f868 CR |
164 | of_property_read_u32(pdev->dev.of_node, |
165 | "i2c-sda-hold-time-ns", &ht); | |
6468276b RB |
166 | |
167 | of_property_read_u32(pdev->dev.of_node, | |
168 | "i2c-sda-falling-time-ns", | |
169 | &dev->sda_falling_time); | |
170 | of_property_read_u32(pdev->dev.of_node, | |
171 | "i2c-scl-falling-time-ns", | |
172 | &dev->scl_falling_time); | |
8e5f6b2a RB |
173 | |
174 | of_property_read_u32(pdev->dev.of_node, "clock-frequency", | |
175 | &clk_freq); | |
176 | ||
177 | /* Only standard mode at 100kHz and fast mode at 400kHz | |
178 | * are supported. | |
179 | */ | |
180 | if (clk_freq != 100000 && clk_freq != 400000) { | |
181 | dev_err(&pdev->dev, "Only 100kHz and 400kHz supported"); | |
182 | return -EINVAL; | |
183 | } | |
4bcfda09 TR |
184 | } else { |
185 | pdata = dev_get_platdata(&pdev->dev); | |
186 | if (pdata) | |
187 | clk_freq = pdata->i2c_scl_freq; | |
9803f868 CR |
188 | } |
189 | ||
894acb2f DB |
190 | r = i2c_dw_eval_lock_support(dev); |
191 | if (r) | |
192 | return r; | |
193 | ||
2fa8326b DB |
194 | dev->functionality = |
195 | I2C_FUNC_I2C | | |
196 | I2C_FUNC_10BIT_ADDR | | |
197 | I2C_FUNC_SMBUS_BYTE | | |
198 | I2C_FUNC_SMBUS_BYTE_DATA | | |
199 | I2C_FUNC_SMBUS_WORD_DATA | | |
200 | I2C_FUNC_SMBUS_I2C_BLOCK; | |
8e5f6b2a RB |
201 | if (clk_freq == 100000) |
202 | dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | | |
203 | DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_STD; | |
204 | else | |
205 | dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | | |
206 | DW_IC_CON_RESTART_EN | DW_IC_CON_SPEED_FAST; | |
2fa8326b | 207 | |
925ddb24 MW |
208 | dev->clk = devm_clk_get(&pdev->dev, NULL); |
209 | dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; | |
210 | if (IS_ERR(dev->clk)) | |
211 | return PTR_ERR(dev->clk); | |
212 | clk_prepare_enable(dev->clk); | |
213 | ||
214 | if (!dev->sda_hold_time && ht) { | |
215 | u32 ic_clk = dev->get_clk_rate_khz(dev); | |
216 | ||
217 | dev->sda_hold_time = div_u64((u64)ic_clk * ht + 500000, | |
218 | 1000000); | |
219 | } | |
220 | ||
221 | if (!dev->tx_fifo_depth) { | |
f3fa9f3d | 222 | u32 param1 = i2c_dw_read_comp_param(dev); |
2373f6b9 DB |
223 | |
224 | dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; | |
225 | dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; | |
b61b1415 | 226 | dev->adapter.nr = pdev->id; |
2373f6b9 | 227 | } |
2373f6b9 DB |
228 | |
229 | adap = &dev->adapter; | |
2373f6b9 | 230 | adap->owner = THIS_MODULE; |
70fba830 | 231 | adap->class = I2C_CLASS_DEPRECATED; |
af71100c | 232 | adap->dev.of_node = pdev->dev.of_node; |
2373f6b9 | 233 | |
d80d1341 JN |
234 | r = i2c_dw_probe(dev); |
235 | if (r) | |
1cb715ca | 236 | return r; |
2373f6b9 | 237 | |
894acb2f DB |
238 | if (dev->pm_runtime_disabled) { |
239 | pm_runtime_forbid(&pdev->dev); | |
240 | } else { | |
241 | pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); | |
242 | pm_runtime_use_autosuspend(&pdev->dev); | |
243 | pm_runtime_set_active(&pdev->dev); | |
244 | pm_runtime_enable(&pdev->dev); | |
245 | } | |
7272194e | 246 | |
2373f6b9 | 247 | return 0; |
2373f6b9 DB |
248 | } |
249 | ||
6ad6fde3 | 250 | static int dw_i2c_plat_remove(struct platform_device *pdev) |
2373f6b9 DB |
251 | { |
252 | struct dw_i2c_dev *dev = platform_get_drvdata(pdev); | |
2373f6b9 | 253 | |
7272194e MW |
254 | pm_runtime_get_sync(&pdev->dev); |
255 | ||
2373f6b9 | 256 | i2c_del_adapter(&dev->adapter); |
2373f6b9 | 257 | |
f3fa9f3d | 258 | i2c_dw_disable(dev); |
2373f6b9 | 259 | |
edfc3901 MW |
260 | pm_runtime_dont_use_autosuspend(&pdev->dev); |
261 | pm_runtime_put_sync(&pdev->dev); | |
7272194e MW |
262 | pm_runtime_disable(&pdev->dev); |
263 | ||
ca5b74d2 | 264 | if (has_acpi_companion(&pdev->dev)) |
a445900c CP |
265 | dw_i2c_acpi_unconfigure(pdev); |
266 | ||
2373f6b9 DB |
267 | return 0; |
268 | } | |
269 | ||
af71100c RH |
270 | #ifdef CONFIG_OF |
271 | static const struct of_device_id dw_i2c_of_match[] = { | |
272 | { .compatible = "snps,designware-i2c", }, | |
273 | {}, | |
274 | }; | |
275 | MODULE_DEVICE_TABLE(of, dw_i2c_of_match); | |
276 | #endif | |
277 | ||
8503ff16 | 278 | #ifdef CONFIG_PM_SLEEP |
6ad6fde3 | 279 | static int dw_i2c_plat_prepare(struct device *dev) |
8503ff16 JZ |
280 | { |
281 | return pm_runtime_suspended(dev); | |
282 | } | |
283 | ||
6ad6fde3 | 284 | static void dw_i2c_plat_complete(struct device *dev) |
8503ff16 JZ |
285 | { |
286 | if (dev->power.direct_complete) | |
287 | pm_request_resume(dev); | |
288 | } | |
289 | #else | |
319d7f05 JN |
290 | #define dw_i2c_plat_prepare NULL |
291 | #define dw_i2c_plat_complete NULL | |
8503ff16 JZ |
292 | #endif |
293 | ||
1fc2fe20 | 294 | #ifdef CONFIG_PM |
6ad6fde3 | 295 | static int dw_i2c_plat_suspend(struct device *dev) |
3bf3b289 DS |
296 | { |
297 | struct platform_device *pdev = to_platform_device(dev); | |
298 | struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); | |
299 | ||
f537295a | 300 | i2c_dw_disable(i_dev); |
e1fac69f | 301 | clk_disable_unprepare(i_dev->clk); |
3bf3b289 DS |
302 | |
303 | return 0; | |
304 | } | |
305 | ||
6ad6fde3 | 306 | static int dw_i2c_plat_resume(struct device *dev) |
3bf3b289 DS |
307 | { |
308 | struct platform_device *pdev = to_platform_device(dev); | |
309 | struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); | |
310 | ||
e1fac69f | 311 | clk_prepare_enable(i_dev->clk); |
894acb2f DB |
312 | |
313 | if (!i_dev->pm_runtime_disabled) | |
314 | i2c_dw_init(i_dev); | |
3bf3b289 DS |
315 | |
316 | return 0; | |
317 | } | |
3bf3b289 | 318 | |
8503ff16 | 319 | static const struct dev_pm_ops dw_i2c_dev_pm_ops = { |
6ad6fde3 JN |
320 | .prepare = dw_i2c_plat_prepare, |
321 | .complete = dw_i2c_plat_complete, | |
322 | SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume) | |
323 | SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL) | |
8503ff16 JZ |
324 | }; |
325 | ||
326 | #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops) | |
327 | #else | |
328 | #define DW_I2C_DEV_PMOPS NULL | |
329 | #endif | |
1fc2fe20 | 330 | |
2373f6b9 DB |
331 | /* work with hotplug and coldplug */ |
332 | MODULE_ALIAS("platform:i2c_designware"); | |
333 | ||
334 | static struct platform_driver dw_i2c_driver = { | |
6ad6fde3 JN |
335 | .probe = dw_i2c_plat_probe, |
336 | .remove = dw_i2c_plat_remove, | |
2373f6b9 DB |
337 | .driver = { |
338 | .name = "i2c_designware", | |
af71100c | 339 | .of_match_table = of_match_ptr(dw_i2c_of_match), |
b61b1415 | 340 | .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match), |
8503ff16 | 341 | .pm = DW_I2C_DEV_PMOPS, |
2373f6b9 DB |
342 | }, |
343 | }; | |
344 | ||
345 | static int __init dw_i2c_init_driver(void) | |
346 | { | |
cccdcea1 | 347 | return platform_driver_register(&dw_i2c_driver); |
2373f6b9 | 348 | } |
10452280 | 349 | subsys_initcall(dw_i2c_init_driver); |
2373f6b9 DB |
350 | |
351 | static void __exit dw_i2c_exit_driver(void) | |
352 | { | |
353 | platform_driver_unregister(&dw_i2c_driver); | |
354 | } | |
355 | module_exit(dw_i2c_exit_driver); | |
356 | ||
357 | MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>"); | |
358 | MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter"); | |
359 | MODULE_LICENSE("GPL"); |