[mirror_ubuntu-artful-kernel.git] / drivers / i2c / busses / i2c-designware-platdrv.c

/*
 * Synopsys DesignWare I2C adapter driver (master only).
 *
 * Based on the TI DAVINCI I2C adapter driver.
 *
 * Copyright (C) 2006 Texas Instruments.
 * Copyright (C) 2007 MontaVista Software Inc.
 * Copyright (C) 2009 Provigent Ltd.
 *
 * ----------------------------------------------------------------------------
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * ----------------------------------------------------------------------------
 *
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/i2c.h>
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/errno.h>
#include <linux/sched.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/io.h>
#include <linux/reset.h>
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/platform_data/i2c-designware.h>
#include "i2c-designware-core.h"

static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
{
	return clk_get_rate(dev->clk)/1000;
}

#ifdef CONFIG_ACPI
/*
 * The HCNT/LCNT information coming from ACPI should be the most accurate
 * for given platform. However, some systems get it wrong. On such systems
 * we get better results by calculating those based on the input clock.
 */
static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
	{
		.ident = "Dell Inspiron 7348",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
		},
	},
	{ }
};

static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
			       u16 *hcnt, u16 *lcnt, u32 *sda_hold)
{
	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	union acpi_object *obj;

	if (dmi_check_system(dw_i2c_no_acpi_params))
		return;

	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
		return;

	obj = (union acpi_object *)buf.pointer;
	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
		const union acpi_object *objs = obj->package.elements;

		*hcnt = (u16)objs[0].integer.value;
		*lcnt = (u16)objs[1].integer.value;
		*sda_hold = (u32)objs[2].integer.value;
	}

	kfree(buf.pointer);
}

static int dw_i2c_acpi_configure(struct platform_device *pdev)
{
	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
	u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	const struct acpi_device_id *id;
	struct acpi_device *adev;
	const char *uid;

	dev->adapter.nr = -1;
	dev->tx_fifo_depth = 32;
	dev->rx_fifo_depth = 32;

	/*
	 * Try to get SDA hold time and *CNT values from an ACPI method for
	 * selected speed modes.
	 */
	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);

	switch (dev->clk_freq) {
	case 100000:
		dev->sda_hold_time = ss_ht;
		break;
	case 1000000:
		dev->sda_hold_time = fp_ht;
		break;
	case 3400000:
		dev->sda_hold_time = hs_ht;
		break;
	case 400000:
	default:
		dev->sda_hold_time = fs_ht;
		break;
	}

	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
	if (id && id->driver_data)
		dev->flags |= (u32)id->driver_data;

	if (acpi_bus_get_device(handle, &adev))
		return -ENODEV;

	/*
	 * Cherrytrail I2C7 gets used for the PMIC which gets accessed
	 * through ACPI opregions during late suspend / early resume
	 * disable pm for it.
	 */
	uid = adev->pnp.unique_id;
	if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
		dev->pm_disabled = true;

	return 0;
}

static const struct acpi_device_id dw_i2c_acpi_match[] = {
	{ "INT33C2", 0 },
	{ "INT33C3", 0 },
	{ "INT3432", 0 },
	{ "INT3433", 0 },
	{ "80860F41", 0 },
	{ "808622C1", MODEL_CHERRYTRAIL },
	{ "AMD0010", ACCESS_INTR_MASK },
	{ "AMDI0010", ACCESS_INTR_MASK },
	{ "AMDI0510", 0 },
	{ "APMC0D0F", 0 },
	{ "HISI02A1", 0 },
	{ "HISI02A2", 0 },
	{ }
};
MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
#else
static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
{
	return -ENODEV;
}
#endif

static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
{
	if (IS_ERR(i_dev->clk))
		return PTR_ERR(i_dev->clk);

	if (prepare)
		return clk_prepare_enable(i_dev->clk);

	clk_disable_unprepare(i_dev->clk);
	return 0;
}

static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
{
	u32 param, tx_fifo_depth, rx_fifo_depth;

	/*
	 * Try to detect the FIFO depth if not set by interface driver,
	 * the depth could be from 2 to 256 from HW spec.
	 */
	param = i2c_dw_read_comp_param(dev);
	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
	rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
	if (!dev->tx_fifo_depth) {
		dev->tx_fifo_depth = tx_fifo_depth;
		dev->rx_fifo_depth = rx_fifo_depth;
		dev->adapter.nr = id;
	} else if (tx_fifo_depth >= 2) {
		dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
				tx_fifo_depth);
		dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
				rx_fifo_depth);
	}
}

static int dw_i2c_plat_probe(struct platform_device *pdev)
{
	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
	struct dw_i2c_dev *dev;
	struct i2c_adapter *adap;
	struct resource *mem;
	int irq, r;
	u32 acpi_speed, ht = 0;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	dev->base = devm_ioremap_resource(&pdev->dev, mem);
	if (IS_ERR(dev->base))
		return PTR_ERR(dev->base);

	dev->dev = &pdev->dev;
	dev->irq = irq;
	platform_set_drvdata(pdev, dev);

	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
	if (IS_ERR(dev->rst)) {
		if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
			return -EPROBE_DEFER;
	} else {
		reset_control_deassert(dev->rst);
	}

	if (pdata) {
		dev->clk_freq = pdata->i2c_scl_freq;
	} else {
		device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
					 &ht);
		device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
					 &dev->sda_falling_time);
		device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
					 &dev->scl_falling_time);
		device_property_read_u32(&pdev->dev, "clock-frequency",
					 &dev->clk_freq);
	}

	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
	/*
	 * Find bus speed from the "clock-frequency" device property, ACPI
	 * or by using fast mode if neither is set.
	 */
	if (acpi_speed && dev->clk_freq)
		dev->clk_freq = min(dev->clk_freq, acpi_speed);
	else if (acpi_speed || dev->clk_freq)
		dev->clk_freq = max(dev->clk_freq, acpi_speed);
	else
		dev->clk_freq = 400000;

	if (has_acpi_companion(&pdev->dev))
		dw_i2c_acpi_configure(pdev);

	/*
	 * Only standard mode at 100kHz, fast mode at 400kHz,
	 * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
	 */
	if (dev->clk_freq != 100000 && dev->clk_freq != 400000
	    && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
		dev_err(&pdev->dev,
			"Only 100kHz, 400kHz, 1MHz and 3.4MHz supported");
		r = -EINVAL;
		goto exit_reset;
	}

	r = i2c_dw_probe_lock_support(dev);
	if (r)
		goto exit_reset;

	dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;

	dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
			  DW_IC_CON_RESTART_EN;

	switch (dev->clk_freq) {
	case 100000:
		dev->master_cfg |= DW_IC_CON_SPEED_STD;
		break;
	case 3400000:
		dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
		break;
	default:
		dev->master_cfg |= DW_IC_CON_SPEED_FAST;
	}

	dev->clk = devm_clk_get(&pdev->dev, NULL);
	if (!i2c_dw_plat_prepare_clk(dev, true)) {
		dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;

		if (!dev->sda_hold_time && ht)
			dev->sda_hold_time = div_u64(
				(u64)dev->get_clk_rate_khz(dev) * ht + 500000,
				1000000);
	}

	dw_i2c_set_fifo_size(dev, pdev->id);

	adap = &dev->adapter;
	adap->owner = THIS_MODULE;
	adap->class = I2C_CLASS_DEPRECATED;
	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
	adap->dev.of_node = pdev->dev.of_node;

	if (dev->pm_disabled) {
		pm_runtime_forbid(&pdev->dev);
	} else {
		pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
		pm_runtime_use_autosuspend(&pdev->dev);
		pm_runtime_set_active(&pdev->dev);
		pm_runtime_enable(&pdev->dev);
	}

	r = i2c_dw_probe(dev);
	if (r)
		goto exit_probe;

	return r;

exit_probe:
	if (!dev->pm_disabled)
		pm_runtime_disable(&pdev->dev);
exit_reset:
	if (!IS_ERR_OR_NULL(dev->rst))
		reset_control_assert(dev->rst);
	return r;
}

static int dw_i2c_plat_remove(struct platform_device *pdev)
{
	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);

	pm_runtime_get_sync(&pdev->dev);

	i2c_del_adapter(&dev->adapter);

	i2c_dw_disable(dev);

	pm_runtime_dont_use_autosuspend(&pdev->dev);
	pm_runtime_put_sync(&pdev->dev);
	if (!dev->pm_disabled)
		pm_runtime_disable(&pdev->dev);
	if (!IS_ERR_OR_NULL(dev->rst))
		reset_control_assert(dev->rst);

	i2c_dw_remove_lock_support(dev);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id dw_i2c_of_match[] = {
	{ .compatible = "snps,designware-i2c", },
	{},
};
MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
#endif

#ifdef CONFIG_PM_SLEEP
static int dw_i2c_plat_prepare(struct device *dev)
{
	return pm_runtime_suspended(dev);
}

static void dw_i2c_plat_complete(struct device *dev)
{
	if (dev->power.direct_complete)
		pm_request_resume(dev);
}
#else
#define dw_i2c_plat_prepare	NULL
#define dw_i2c_plat_complete	NULL
#endif

#ifdef CONFIG_PM
static int dw_i2c_plat_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);

	i2c_dw_disable(i_dev);
	i2c_dw_plat_prepare_clk(i_dev, false);

	return 0;
}

static int dw_i2c_plat_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);

	i2c_dw_plat_prepare_clk(i_dev, true);
	i2c_dw_init(i_dev);

	return 0;
}

static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
	.prepare = dw_i2c_plat_prepare,
	.complete = dw_i2c_plat_complete,
	SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
	SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
};

#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
#else
#define DW_I2C_DEV_PMOPS NULL
#endif

/* work with hotplug and coldplug */
MODULE_ALIAS("platform:i2c_designware");

static struct platform_driver dw_i2c_driver = {
	.probe = dw_i2c_plat_probe,
	.remove = dw_i2c_plat_remove,
	.driver		= {
		.name	= "i2c_designware",
		.of_match_table = of_match_ptr(dw_i2c_of_match),
		.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
		.pm	= DW_I2C_DEV_PMOPS,
	},
};

static int __init dw_i2c_init_driver(void)
{
	return platform_driver_register(&dw_i2c_driver);
}
subsys_initcall(dw_i2c_init_driver);

static void __exit dw_i2c_exit_driver(void)
{
	platform_driver_unregister(&dw_i2c_driver);
}
module_exit(dw_i2c_exit_driver);

MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
MODULE_LICENSE("GPL");
Commit	Line	Data
2373f6b9 DB	1	/*
	2	* Synopsys DesignWare I2C adapter driver (master only).
	3	*
	4	* Based on the TI DAVINCI I2C adapter driver.
	5	*
	6	* Copyright (C) 2006 Texas Instruments.
	7	* Copyright (C) 2007 MontaVista Software Inc.
	8	* Copyright (C) 2009 Provigent Ltd.
	9	*
	10	* ----------------------------------------------------------------------------
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
2373f6b9 DB	21	* ----------------------------------------------------------------------------
	22	*
	23	*/
	24	#include <linux/kernel.h>
	25	#include <linux/module.h>
	26	#include <linux/delay.h>
56d4b8a2	27	#include <linux/dmi.h>
2373f6b9 DB	28	#include <linux/i2c.h>
2373f6b9 DB	29	#include <linux/clk.h>
a445900c	30	#include <linux/clk-provider.h>
2373f6b9 DB	31	#include <linux/errno.h>
	32	#include <linux/sched.h>
	33	#include <linux/err.h>
	34	#include <linux/interrupt.h>
9803f868	35	#include <linux/of.h>
2373f6b9	36	#include <linux/platform_device.h>
3bf3b289	37	#include <linux/pm.h>
7272194e	38	#include <linux/pm_runtime.h>
4c5301ab	39	#include <linux/property.h>
2373f6b9	40	#include <linux/io.h>
ab809fd8	41	#include <linux/reset.h>
2373f6b9	42	#include <linux/slab.h>
b61b1415	43	#include <linux/acpi.h>
4bcfda09	44	#include <linux/platform_data/i2c-designware.h>
2373f6b9 DB	45	#include "i2c-designware-core.h"
2373f6b9 DB	46
1d31b58f DB	47	static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
	48	{
	49	return clk_get_rate(dev->clk)/1000;
	50	}
2373f6b9	51
b61b1415	52	#ifdef CONFIG_ACPI
56d4b8a2 MW	53	/*
	54	* The HCNT/LCNT information coming from ACPI should be the most accurate
	55	* for given platform. However, some systems get it wrong. On such systems
	56	* we get better results by calculating those based on the input clock.
	57	*/
	58	static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
	59	{
	60	.ident = "Dell Inspiron 7348",
	61	.matches = {
	62	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
	63	DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
	64	},
	65	},
	66	{ }
	67	};
	68
57cd1e30 MW	69	static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
	70	u16 hcnt, u16 lcnt, u32 *sda_hold)
	71	{
	72	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
	73	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	74	union acpi_object *obj;
	75
56d4b8a2 MW	76	if (dmi_check_system(dw_i2c_no_acpi_params))
	77	return;
	78
57cd1e30 MW	79	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
	80	return;
	81
	82	obj = (union acpi_object *)buf.pointer;
	83	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
	84	const union acpi_object *objs = obj->package.elements;
	85
	86	*hcnt = (u16)objs[0].integer.value;
	87	*lcnt = (u16)objs[1].integer.value;
bd698d24	88	*sda_hold = (u32)objs[2].integer.value;
57cd1e30 MW	89	}
	90
	91	kfree(buf.pointer);
	92	}
	93
b61b1415 MW	94	static int dw_i2c_acpi_configure(struct platform_device *pdev)
	95	{
	96	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
ad258fb9	97	u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
a3d411fb	98	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
2d244c81	99	const struct acpi_device_id *id;
a3d411fb HG	100	struct acpi_device *adev;
a3d411fb HG	101	const char *uid;
b61b1415	102
b61b1415	103	dev->adapter.nr = -1;
b61b1415 MW	104	dev->tx_fifo_depth = 32;
b61b1415 MW	105	dev->rx_fifo_depth = 32;
57cd1e30 MW	106
57cd1e30 MW	107	/*
bd698d24	108	* Try to get SDA hold time and *CNT values from an ACPI method for
bd698d24	109	* selected speed modes.
57cd1e30	110	*/
9d640843 AB	111	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
	112	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
	113	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
	114	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
	115
bd698d24	116	switch (dev->clk_freq) {
bd698d24	117	case 100000:
9d640843	118	dev->sda_hold_time = ss_ht;
bd698d24	119	break;
bd698d24	120	case 1000000:
9d640843	121	dev->sda_hold_time = fp_ht;
bd698d24	122	break;
bd698d24	123	case 3400000:
9d640843	124	dev->sda_hold_time = hs_ht;
bd698d24	125	break;
	126	case 400000:
	127	default:
9d640843	128	dev->sda_hold_time = fs_ht;
bd698d24	129	break;
bd698d24	130	}
57cd1e30	131
2d244c81 XY	132	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
2d244c81 XY	133	if (id && id->driver_data)
86524e54	134	dev->flags \|= (u32)id->driver_data;
2d244c81	135
a3d411fb HG	136	if (acpi_bus_get_device(handle, &adev))
	137	return -ENODEV;
	138
	139	/*
	140	* Cherrytrail I2C7 gets used for the PMIC which gets accessed
	141	* through ACPI opregions during late suspend / early resume
	142	* disable pm for it.
	143	*/
	144	uid = adev->pnp.unique_id;
	145	if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
	146	dev->pm_disabled = true;
	147
b61b1415 MW	148	return 0;
	149	}
	150
	151	static const struct acpi_device_id dw_i2c_acpi_match[] = {
	152	{ "INT33C2", 0 },
	153	{ "INT33C3", 0 },
25b3dfc8 MW	154	{ "INT3432", 0 },
25b3dfc8 MW	155	{ "INT3433", 0 },
5a7e6bd8	156	{ "80860F41", 0 },
fd476fa2	157	{ "808622C1", MODEL_CHERRYTRAIL },
2d244c81	158	{ "AMD0010", ACCESS_INTR_MASK },
e4e666ba	159	{ "AMDI0010", ACCESS_INTR_MASK },
90708ce2	160	{ "AMDI0510", 0 },
04a407f6	161	{ "APMC0D0F", 0 },
58dd8abf HG	162	{ "HISI02A1", 0 },
58dd8abf HG	163	{ "HISI02A2", 0 },
b61b1415 MW	164	{ }
	165	};
	166	MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
	167	#else
	168	static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
	169	{
	170	return -ENODEV;
	171	}
	172	#endif
	173
b33af11d SS	174	static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
	175	{
	176	if (IS_ERR(i_dev->clk))
	177	return PTR_ERR(i_dev->clk);
	178
	179	if (prepare)
	180	return clk_prepare_enable(i_dev->clk);
	181
	182	clk_disable_unprepare(i_dev->clk);
	183	return 0;
	184	}
	185
8e598769 TH	186	static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
	187	{
	188	u32 param, tx_fifo_depth, rx_fifo_depth;
	189
	190	/*
	191	* Try to detect the FIFO depth if not set by interface driver,
	192	* the depth could be from 2 to 256 from HW spec.
	193	*/
	194	param = i2c_dw_read_comp_param(dev);
	195	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
	196	rx_fifo_depth = ((param >> 8) & 0xff) + 1;
	197	if (!dev->tx_fifo_depth) {
	198	dev->tx_fifo_depth = tx_fifo_depth;
	199	dev->rx_fifo_depth = rx_fifo_depth;
	200	dev->adapter.nr = id;
	201	} else if (tx_fifo_depth >= 2) {
	202	dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
	203	tx_fifo_depth);
	204	dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
	205	rx_fifo_depth);
	206	}
	207	}
	208
6ad6fde3	209	static int dw_i2c_plat_probe(struct platform_device *pdev)
2373f6b9	210	{
4c5301ab	211	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
2373f6b9 DB	212	struct dw_i2c_dev *dev;
2373f6b9 DB	213	struct i2c_adapter *adap;
1cb715ca	214	struct resource *mem;
2373f6b9	215	int irq, r;
10f8e7fb	216	u32 acpi_speed, ht = 0;
2373f6b9	217
2373f6b9	218	irq = platform_get_irq(pdev, 0);
b20d3864 AB	219	if (irq < 0)
b20d3864 AB	220	return irq;
2373f6b9	221
1cb715ca AS	222	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
	223	if (!dev)
	224	return -ENOMEM;
2373f6b9	225
3cc2d009	226	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1cb715ca AS	227	dev->base = devm_ioremap_resource(&pdev->dev, mem);
	228	if (IS_ERR(dev->base))
	229	return PTR_ERR(dev->base);
2373f6b9	230
1cb715ca	231	dev->dev = &pdev->dev;
2373f6b9 DB	232	dev->irq = irq;
	233	platform_set_drvdata(pdev, dev);
	234
ab809fd8 ZG	235	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
	236	if (IS_ERR(dev->rst)) {
	237	if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
	238	return -EPROBE_DEFER;
	239	} else {
	240	reset_control_deassert(dev->rst);
	241	}
	242
4c5301ab	243	if (pdata) {
19c0a539	244	dev->clk_freq = pdata->i2c_scl_freq;
4bcfda09	245	} else {
4c5301ab MW	246	device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
	247	&ht);
	248	device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
	249	&dev->sda_falling_time);
	250	device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
	251	&dev->scl_falling_time);
	252	device_property_read_u32(&pdev->dev, "clock-frequency",
19c0a539	253	&dev->clk_freq);
4c5301ab MW	254	}
4c5301ab MW	255
10f8e7fb	256	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
973652db JN	257	/*
	258	* Find bus speed from the "clock-frequency" device property, ACPI
	259	* or by using fast mode if neither is set.
	260	*/
	261	if (acpi_speed && dev->clk_freq)
	262	dev->clk_freq = min(dev->clk_freq, acpi_speed);
	263	else if (acpi_speed \|\| dev->clk_freq)
	264	dev->clk_freq = max(dev->clk_freq, acpi_speed);
	265	else
	266	dev->clk_freq = 400000;
10f8e7fb	267
4c5301ab MW	268	if (has_acpi_companion(&pdev->dev))
	269	dw_i2c_acpi_configure(pdev);
	270
	271	/*
d608c3d9	272	* Only standard mode at 100kHz, fast mode at 400kHz,
b6e67145	273	* fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
4c5301ab	274	*/
d608c3d9	275	if (dev->clk_freq != 100000 && dev->clk_freq != 400000
b6e67145	276	&& dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
d608c3d9	277	dev_err(&pdev->dev,
b6e67145	278	"Only 100kHz, 400kHz, 1MHz and 3.4MHz supported");
ab809fd8 ZG	279	r = -EINVAL;
ab809fd8 ZG	280	goto exit_reset;
9803f868 CR	281	}
9803f868 CR	282
086cb4af	283	r = i2c_dw_probe_lock_support(dev);
894acb2f	284	if (r)
ab809fd8	285	goto exit_reset;
894acb2f	286
f06122f0	287	dev->functionality = I2C_FUNC_10BIT_ADDR \| DW_IC_DEFAULT_FUNCTIONALITY;
548e6695 WV	288
	289	dev->master_cfg = DW_IC_CON_MASTER \| DW_IC_CON_SLAVE_DISABLE \|
	290	DW_IC_CON_RESTART_EN;
	291
b6e67145 WV	292	switch (dev->clk_freq) {
b6e67145 WV	293	case 100000:
548e6695	294	dev->master_cfg \|= DW_IC_CON_SPEED_STD;
b6e67145 WV	295	break;
	296	case 3400000:
	297	dev->master_cfg \|= DW_IC_CON_SPEED_HIGH;
	298	break;
	299	default:
548e6695	300	dev->master_cfg \|= DW_IC_CON_SPEED_FAST;
b6e67145	301	}
2fa8326b	302
925ddb24	303	dev->clk = devm_clk_get(&pdev->dev, NULL);
b33af11d SS	304	if (!i2c_dw_plat_prepare_clk(dev, true)) {
b33af11d SS	305	dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
925ddb24	306
b33af11d SS	307	if (!dev->sda_hold_time && ht)
	308	dev->sda_hold_time = div_u64(
	309	(u64)dev->get_clk_rate_khz(dev) * ht + 500000,
	310	1000000);
925ddb24 MW	311	}
925ddb24 MW	312
8e598769	313	dw_i2c_set_fifo_size(dev, pdev->id);
2373f6b9 DB	314
2373f6b9 DB	315	adap = &dev->adapter;
2373f6b9	316	adap->owner = THIS_MODULE;
70fba830	317	adap->class = I2C_CLASS_DEPRECATED;
8eb5c87a	318	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
af71100c	319	adap->dev.of_node = pdev->dev.of_node;
2373f6b9	320
41c80b8a	321	if (dev->pm_disabled) {
894acb2f DB	322	pm_runtime_forbid(&pdev->dev);
	323	} else {
	324	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
	325	pm_runtime_use_autosuspend(&pdev->dev);
	326	pm_runtime_set_active(&pdev->dev);
	327	pm_runtime_enable(&pdev->dev);
	328	}
7272194e	329
d55fc378	330	r = i2c_dw_probe(dev);
ab809fd8 ZG	331	if (r)
ab809fd8 ZG	332	goto exit_probe;
36d48fb5	333
e79e72c5	334	return r;
ab809fd8 ZG	335
ab809fd8 ZG	336	exit_probe:
41c80b8a	337	if (!dev->pm_disabled)
ab809fd8 ZG	338	pm_runtime_disable(&pdev->dev);
	339	exit_reset:
	340	if (!IS_ERR_OR_NULL(dev->rst))
	341	reset_control_assert(dev->rst);
	342	return r;
2373f6b9 DB	343	}
2373f6b9 DB	344
6ad6fde3	345	static int dw_i2c_plat_remove(struct platform_device *pdev)
2373f6b9 DB	346	{
2373f6b9 DB	347	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
2373f6b9	348
7272194e MW	349	pm_runtime_get_sync(&pdev->dev);
7272194e MW	350
2373f6b9	351	i2c_del_adapter(&dev->adapter);
2373f6b9	352
f3fa9f3d	353	i2c_dw_disable(dev);
2373f6b9	354
edfc3901 MW	355	pm_runtime_dont_use_autosuspend(&pdev->dev);
edfc3901 MW	356	pm_runtime_put_sync(&pdev->dev);
41c80b8a	357	if (!dev->pm_disabled)
e79e72c5	358	pm_runtime_disable(&pdev->dev);
ab809fd8 ZG	359	if (!IS_ERR_OR_NULL(dev->rst))
ab809fd8 ZG	360	reset_control_assert(dev->rst);
7272194e	361
086cb4af HG	362	i2c_dw_remove_lock_support(dev);
086cb4af HG	363
2373f6b9 DB	364	return 0;
	365	}
	366
af71100c RH	367	#ifdef CONFIG_OF
	368	static const struct of_device_id dw_i2c_of_match[] = {
	369	{ .compatible = "snps,designware-i2c", },
	370	{},
	371	};
	372	MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
	373	#endif
	374
8503ff16	375	#ifdef CONFIG_PM_SLEEP
6ad6fde3	376	static int dw_i2c_plat_prepare(struct device *dev)
8503ff16 JZ	377	{
	378	return pm_runtime_suspended(dev);
	379	}
	380
6ad6fde3	381	static void dw_i2c_plat_complete(struct device *dev)
8503ff16 JZ	382	{
	383	if (dev->power.direct_complete)
	384	pm_request_resume(dev);
	385	}
	386	#else
319d7f05 JN	387	#define dw_i2c_plat_prepare NULL
319d7f05 JN	388	#define dw_i2c_plat_complete NULL
8503ff16 JZ	389	#endif
8503ff16 JZ	390
1fc2fe20	391	#ifdef CONFIG_PM
6ad6fde3	392	static int dw_i2c_plat_suspend(struct device *dev)
3bf3b289 DS	393	{
	394	struct platform_device *pdev = to_platform_device(dev);
	395	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
	396
f537295a	397	i2c_dw_disable(i_dev);
b33af11d	398	i2c_dw_plat_prepare_clk(i_dev, false);
3bf3b289 DS	399
	400	return 0;
	401	}
	402
6ad6fde3	403	static int dw_i2c_plat_resume(struct device *dev)
3bf3b289 DS	404	{
	405	struct platform_device *pdev = to_platform_device(dev);
	406	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
	407
b33af11d	408	i2c_dw_plat_prepare_clk(i_dev, true);
41c80b8a	409	i2c_dw_init(i_dev);
3bf3b289 DS	410
	411	return 0;
	412	}
3bf3b289	413
8503ff16	414	static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
6ad6fde3 JN	415	.prepare = dw_i2c_plat_prepare,
	416	.complete = dw_i2c_plat_complete,
	417	SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
	418	SET_RUNTIME_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume, NULL)
8503ff16 JZ	419	};
	420
	421	#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
	422	#else
	423	#define DW_I2C_DEV_PMOPS NULL
	424	#endif
1fc2fe20	425
2373f6b9 DB	426	/* work with hotplug and coldplug */
	427	MODULE_ALIAS("platform:i2c_designware");
	428
	429	static struct platform_driver dw_i2c_driver = {
6ad6fde3 JN	430	.probe = dw_i2c_plat_probe,
6ad6fde3 JN	431	.remove = dw_i2c_plat_remove,
2373f6b9 DB	432	.driver = {
2373f6b9 DB	433	.name = "i2c_designware",
af71100c	434	.of_match_table = of_match_ptr(dw_i2c_of_match),
b61b1415	435	.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
8503ff16	436	.pm = DW_I2C_DEV_PMOPS,
2373f6b9 DB	437	},
	438	};
	439
	440	static int __init dw_i2c_init_driver(void)
	441	{
cccdcea1	442	return platform_driver_register(&dw_i2c_driver);
2373f6b9	443	}
10452280	444	subsys_initcall(dw_i2c_init_driver);
2373f6b9 DB	445
	446	static void __exit dw_i2c_exit_driver(void)
	447	{
	448	platform_driver_unregister(&dw_i2c_driver);
	449	}
	450	module_exit(dw_i2c_exit_driver);
	451
	452	MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
	453	MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
	454	MODULE_LICENSE("GPL");