[mirror_ubuntu-artful-kernel.git] / drivers / i2c / busses / i2c-designware-platdrv.c

/*
 * Synopsys DesignWare I2C adapter driver.
 *
 * Based on the TI DAVINCI I2C adapter driver.
 *
 * Copyright (C) 2006 Texas Instruments.
 * Copyright (C) 2007 MontaVista Software Inc.
 * Copyright (C) 2009 Provigent Ltd.
 *
 * ----------------------------------------------------------------------------
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 * ----------------------------------------------------------------------------
 *
 */
#include <linux/acpi.h>
#include <linux/clk-provider.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/err.h>
#include <linux/errno.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_data/i2c-designware.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/property.h>
#include <linux/reset.h>
#include <linux/sched.h>
#include <linux/slab.h>

#include "i2c-designware-core.h"

static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
{
	return clk_get_rate(dev->clk)/1000;
}

#ifdef CONFIG_ACPI
/*
 * The HCNT/LCNT information coming from ACPI should be the most accurate
 * for given platform. However, some systems get it wrong. On such systems
 * we get better results by calculating those based on the input clock.
 */
static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
	{
		.ident = "Dell Inspiron 7348",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
			DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
		},
	},
	{ }
};

static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
			       u16 *hcnt, u16 *lcnt, u32 *sda_hold)
{
	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	union acpi_object *obj;

	if (dmi_check_system(dw_i2c_no_acpi_params))
		return;

	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
		return;

	obj = (union acpi_object *)buf.pointer;
	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
		const union acpi_object *objs = obj->package.elements;

		*hcnt = (u16)objs[0].integer.value;
		*lcnt = (u16)objs[1].integer.value;
		*sda_hold = (u32)objs[2].integer.value;
	}

	kfree(buf.pointer);
}

static int dw_i2c_acpi_configure(struct platform_device *pdev)
{
	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
	u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	const struct acpi_device_id *id;
	struct acpi_device *adev;
	const char *uid;

	dev->adapter.nr = -1;
	dev->tx_fifo_depth = 32;
	dev->rx_fifo_depth = 32;

	/*
	 * Try to get SDA hold time and *CNT values from an ACPI method for
	 * selected speed modes.
	 */
	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);

	switch (dev->clk_freq) {
	case 100000:
		dev->sda_hold_time = ss_ht;
		break;
	case 1000000:
		dev->sda_hold_time = fp_ht;
		break;
	case 3400000:
		dev->sda_hold_time = hs_ht;
		break;
	case 400000:
	default:
		dev->sda_hold_time = fs_ht;
		break;
	}

	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
	if (id && id->driver_data)
		dev->flags |= (u32)id->driver_data;

	if (acpi_bus_get_device(handle, &adev))
		return -ENODEV;

	/*
	 * Cherrytrail I2C7 gets used for the PMIC which gets accessed
	 * through ACPI opregions during late suspend / early resume
	 * disable pm for it.
	 */
	uid = adev->pnp.unique_id;
	if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
		dev->pm_disabled = true;

	return 0;
}

static const struct acpi_device_id dw_i2c_acpi_match[] = {
	{ "INT33C2", 0 },
	{ "INT33C3", 0 },
	{ "INT3432", 0 },
	{ "INT3433", 0 },
	{ "80860F41", 0 },
	{ "808622C1", MODEL_CHERRYTRAIL },
	{ "AMD0010", ACCESS_INTR_MASK },
	{ "AMDI0010", ACCESS_INTR_MASK },
	{ "AMDI0510", 0 },
	{ "APMC0D0F", 0 },
	{ "HISI02A1", 0 },
	{ "HISI02A2", 0 },
	{ }
};
MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
#else
static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
{
	return -ENODEV;
}
#endif

static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
{
	dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;

	dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
			  DW_IC_CON_RESTART_EN;

	dev->mode = DW_IC_MASTER;

	switch (dev->clk_freq) {
	case 100000:
		dev->master_cfg |= DW_IC_CON_SPEED_STD;
		break;
	case 3400000:
		dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
		break;
	default:
		dev->master_cfg |= DW_IC_CON_SPEED_FAST;
	}
}

static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
{
	dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;

	dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
			 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;

	dev->mode = DW_IC_SLAVE;

	switch (dev->clk_freq) {
	case 100000:
		dev->slave_cfg |= DW_IC_CON_SPEED_STD;
		break;
	case 3400000:
		dev->slave_cfg |= DW_IC_CON_SPEED_HIGH;
		break;
	default:
		dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
	}
}

static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
{
	if (IS_ERR(i_dev->clk))
		return PTR_ERR(i_dev->clk);

	if (prepare)
		return clk_prepare_enable(i_dev->clk);

	clk_disable_unprepare(i_dev->clk);
	return 0;
}

static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
{
	u32 param, tx_fifo_depth, rx_fifo_depth;

	/*
	 * Try to detect the FIFO depth if not set by interface driver,
	 * the depth could be from 2 to 256 from HW spec.
	 */
	param = i2c_dw_read_comp_param(dev);
	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
	rx_fifo_depth = ((param >> 8)  & 0xff) + 1;
	if (!dev->tx_fifo_depth) {
		dev->tx_fifo_depth = tx_fifo_depth;
		dev->rx_fifo_depth = rx_fifo_depth;
		dev->adapter.nr = id;
	} else if (tx_fifo_depth >= 2) {
		dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
				tx_fifo_depth);
		dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
				rx_fifo_depth);
	}
}

static int dw_i2c_plat_probe(struct platform_device *pdev)
{
	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
	struct i2c_adapter *adap;
	struct dw_i2c_dev *dev;
	u32 acpi_speed, ht = 0;
	struct resource *mem;
	int irq, ret;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return irq;

	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	dev->base = devm_ioremap_resource(&pdev->dev, mem);
	if (IS_ERR(dev->base))
		return PTR_ERR(dev->base);

	dev->dev = &pdev->dev;
	dev->irq = irq;
	platform_set_drvdata(pdev, dev);

	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
	if (IS_ERR(dev->rst)) {
		if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
			return -EPROBE_DEFER;
	} else {
		reset_control_deassert(dev->rst);
	}

	if (pdata) {
		dev->clk_freq = pdata->i2c_scl_freq;
	} else {
		device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
					 &ht);
		device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
					 &dev->sda_falling_time);
		device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
					 &dev->scl_falling_time);
		device_property_read_u32(&pdev->dev, "clock-frequency",
					 &dev->clk_freq);
	}

	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
	/* Some broken DSTDs use 1MiHz instead of 1MHz */
	if (acpi_speed == 1048576)
		acpi_speed = 1000000;
	/*
	 * Find bus speed from the "clock-frequency" device property, ACPI
	 * or by using fast mode if neither is set.
	 */
	if (acpi_speed && dev->clk_freq)
		dev->clk_freq = min(dev->clk_freq, acpi_speed);
	else if (acpi_speed || dev->clk_freq)
		dev->clk_freq = max(dev->clk_freq, acpi_speed);
	else
		dev->clk_freq = 400000;

	if (has_acpi_companion(&pdev->dev))
		dw_i2c_acpi_configure(pdev);

	/*
	 * Only standard mode at 100kHz, fast mode at 400kHz,
	 * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
	 */
	if (dev->clk_freq != 100000 && dev->clk_freq != 400000
	    && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
		dev_err(&pdev->dev,
			"%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
			dev->clk_freq);
		ret = -EINVAL;
		goto exit_reset;
	}

	ret = i2c_dw_probe_lock_support(dev);
	if (ret)
		goto exit_reset;

	if (i2c_detect_slave_mode(&pdev->dev))
		i2c_dw_configure_slave(dev);
	else
		i2c_dw_configure_master(dev);

	dev->clk = devm_clk_get(&pdev->dev, NULL);
	if (!i2c_dw_plat_prepare_clk(dev, true)) {
		dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;

		if (!dev->sda_hold_time && ht)
			dev->sda_hold_time = div_u64(
				(u64)dev->get_clk_rate_khz(dev) * ht + 500000,
				1000000);
	}

	dw_i2c_set_fifo_size(dev, pdev->id);

	adap = &dev->adapter;
	adap->owner = THIS_MODULE;
	adap->class = I2C_CLASS_DEPRECATED;
	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
	adap->dev.of_node = pdev->dev.of_node;

	if (dev->pm_disabled) {
		pm_runtime_forbid(&pdev->dev);
	} else {
		pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
		pm_runtime_use_autosuspend(&pdev->dev);
		pm_runtime_set_active(&pdev->dev);
		pm_runtime_enable(&pdev->dev);
	}

	if (dev->mode == DW_IC_SLAVE)
		ret = i2c_dw_probe_slave(dev);
	else
		ret = i2c_dw_probe(dev);

	if (ret)
		goto exit_probe;

	return ret;

exit_probe:
	if (!dev->pm_disabled)
		pm_runtime_disable(&pdev->dev);
exit_reset:
	if (!IS_ERR_OR_NULL(dev->rst))
		reset_control_assert(dev->rst);
	return ret;
}

static int dw_i2c_plat_remove(struct platform_device *pdev)
{
	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);

	pm_runtime_get_sync(&pdev->dev);

	i2c_del_adapter(&dev->adapter);

	dev->disable(dev);

	pm_runtime_dont_use_autosuspend(&pdev->dev);
	pm_runtime_put_sync(&pdev->dev);
	if (!dev->pm_disabled)
		pm_runtime_disable(&pdev->dev);
	if (!IS_ERR_OR_NULL(dev->rst))
		reset_control_assert(dev->rst);

	i2c_dw_remove_lock_support(dev);

	return 0;
}

#ifdef CONFIG_OF
static const struct of_device_id dw_i2c_of_match[] = {
	{ .compatible = "snps,designware-i2c", },
	{},
};
MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
#endif

#ifdef CONFIG_PM_SLEEP
static int dw_i2c_plat_prepare(struct device *dev)
{
	return pm_runtime_suspended(dev);
}

static void dw_i2c_plat_complete(struct device *dev)
{
	if (dev->power.direct_complete)
		pm_request_resume(dev);
}
#else
#define dw_i2c_plat_prepare	NULL
#define dw_i2c_plat_complete	NULL
#endif

#ifdef CONFIG_PM
static int dw_i2c_plat_runtime_suspend(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);

	i_dev->disable(i_dev);
	i2c_dw_plat_prepare_clk(i_dev, false);

	return 0;
}

static int dw_i2c_plat_resume(struct device *dev)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);

	i2c_dw_plat_prepare_clk(i_dev, true);
	i_dev->init(i_dev);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int dw_i2c_plat_suspend(struct device *dev)
{
	pm_runtime_resume(dev);
	return dw_i2c_plat_runtime_suspend(dev);
}
#endif

static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
	.prepare = dw_i2c_plat_prepare,
	.complete = dw_i2c_plat_complete,
	SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
	SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend,
			   dw_i2c_plat_resume,
			   NULL)
};

#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
#else
#define DW_I2C_DEV_PMOPS NULL
#endif

/* Work with hotplug and coldplug */
MODULE_ALIAS("platform:i2c_designware");

static struct platform_driver dw_i2c_driver = {
	.probe = dw_i2c_plat_probe,
	.remove = dw_i2c_plat_remove,
	.driver		= {
		.name	= "i2c_designware",
		.of_match_table = of_match_ptr(dw_i2c_of_match),
		.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
		.pm	= DW_I2C_DEV_PMOPS,
	},
};

static int __init dw_i2c_init_driver(void)
{
	return platform_driver_register(&dw_i2c_driver);
}
subsys_initcall(dw_i2c_init_driver);

static void __exit dw_i2c_exit_driver(void)
{
	platform_driver_unregister(&dw_i2c_driver);
}
module_exit(dw_i2c_exit_driver);

MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
MODULE_LICENSE("GPL");
Commit	Line	Data
2373f6b9	1	/*
5b6d721b	2	* Synopsys DesignWare I2C adapter driver.
2373f6b9 DB	3	*
	4	* Based on the TI DAVINCI I2C adapter driver.
	5	*
	6	* Copyright (C) 2006 Texas Instruments.
	7	* Copyright (C) 2007 MontaVista Software Inc.
	8	* Copyright (C) 2009 Provigent Ltd.
	9	*
	10	* ----------------------------------------------------------------------------
	11	*
	12	* This program is free software; you can redistribute it and/or modify
	13	* it under the terms of the GNU General Public License as published by
	14	* the Free Software Foundation; either version 2 of the License, or
	15	* (at your option) any later version.
	16	*
	17	* This program is distributed in the hope that it will be useful,
	18	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	* GNU General Public License for more details.
2373f6b9 DB	21	* ----------------------------------------------------------------------------
	22	*
	23	*/
e393f674 LO	24	#include <linux/acpi.h>
	25	#include <linux/clk-provider.h>
	26	#include <linux/clk.h>
2373f6b9	27	#include <linux/delay.h>
56d4b8a2	28	#include <linux/dmi.h>
2373f6b9	29	#include <linux/err.h>
e393f674 LO	30	#include <linux/errno.h>
e393f674 LO	31	#include <linux/i2c.h>
2373f6b9	32	#include <linux/interrupt.h>
e393f674 LO	33	#include <linux/io.h>
	34	#include <linux/kernel.h>
	35	#include <linux/module.h>
9803f868	36	#include <linux/of.h>
e393f674	37	#include <linux/platform_data/i2c-designware.h>
2373f6b9	38	#include <linux/platform_device.h>
3bf3b289	39	#include <linux/pm.h>
7272194e	40	#include <linux/pm_runtime.h>
4c5301ab	41	#include <linux/property.h>
ab809fd8	42	#include <linux/reset.h>
e393f674	43	#include <linux/sched.h>
2373f6b9	44	#include <linux/slab.h>
e393f674	45
2373f6b9 DB	46	#include "i2c-designware-core.h"
2373f6b9 DB	47
1d31b58f DB	48	static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
	49	{
	50	return clk_get_rate(dev->clk)/1000;
	51	}
2373f6b9	52
b61b1415	53	#ifdef CONFIG_ACPI
56d4b8a2 MW	54	/*
	55	* The HCNT/LCNT information coming from ACPI should be the most accurate
	56	* for given platform. However, some systems get it wrong. On such systems
	57	* we get better results by calculating those based on the input clock.
	58	*/
	59	static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
	60	{
	61	.ident = "Dell Inspiron 7348",
	62	.matches = {
	63	DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
	64	DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
	65	},
	66	},
	67	{ }
	68	};
	69
57cd1e30 MW	70	static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
	71	u16 hcnt, u16 lcnt, u32 *sda_hold)
	72	{
	73	struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
	74	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
	75	union acpi_object *obj;
	76
56d4b8a2 MW	77	if (dmi_check_system(dw_i2c_no_acpi_params))
	78	return;
	79
57cd1e30 MW	80	if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
	81	return;
	82
	83	obj = (union acpi_object *)buf.pointer;
	84	if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
	85	const union acpi_object *objs = obj->package.elements;
	86
	87	*hcnt = (u16)objs[0].integer.value;
	88	*lcnt = (u16)objs[1].integer.value;
bd698d24	89	*sda_hold = (u32)objs[2].integer.value;
57cd1e30 MW	90	}
	91
	92	kfree(buf.pointer);
	93	}
	94
b61b1415 MW	95	static int dw_i2c_acpi_configure(struct platform_device *pdev)
	96	{
	97	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
ad258fb9	98	u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
a3d411fb	99	acpi_handle handle = ACPI_HANDLE(&pdev->dev);
2d244c81	100	const struct acpi_device_id *id;
a3d411fb HG	101	struct acpi_device *adev;
a3d411fb HG	102	const char *uid;
b61b1415	103
b61b1415	104	dev->adapter.nr = -1;
b61b1415 MW	105	dev->tx_fifo_depth = 32;
b61b1415 MW	106	dev->rx_fifo_depth = 32;
57cd1e30 MW	107
57cd1e30 MW	108	/*
bd698d24	109	* Try to get SDA hold time and *CNT values from an ACPI method for
bd698d24	110	* selected speed modes.
57cd1e30	111	*/
9d640843 AB	112	dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
	113	dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
	114	dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
	115	dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
	116
bd698d24	117	switch (dev->clk_freq) {
bd698d24	118	case 100000:
9d640843	119	dev->sda_hold_time = ss_ht;
bd698d24	120	break;
bd698d24	121	case 1000000:
9d640843	122	dev->sda_hold_time = fp_ht;
bd698d24	123	break;
bd698d24	124	case 3400000:
9d640843	125	dev->sda_hold_time = hs_ht;
bd698d24	126	break;
	127	case 400000:
	128	default:
9d640843	129	dev->sda_hold_time = fs_ht;
bd698d24	130	break;
bd698d24	131	}
57cd1e30	132
2d244c81 XY	133	id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
2d244c81 XY	134	if (id && id->driver_data)
86524e54	135	dev->flags \|= (u32)id->driver_data;
2d244c81	136
a3d411fb HG	137	if (acpi_bus_get_device(handle, &adev))
	138	return -ENODEV;
	139
	140	/*
	141	* Cherrytrail I2C7 gets used for the PMIC which gets accessed
	142	* through ACPI opregions during late suspend / early resume
	143	* disable pm for it.
	144	*/
	145	uid = adev->pnp.unique_id;
	146	if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
	147	dev->pm_disabled = true;
	148
b61b1415 MW	149	return 0;
	150	}
	151
	152	static const struct acpi_device_id dw_i2c_acpi_match[] = {
	153	{ "INT33C2", 0 },
	154	{ "INT33C3", 0 },
25b3dfc8 MW	155	{ "INT3432", 0 },
25b3dfc8 MW	156	{ "INT3433", 0 },
5a7e6bd8	157	{ "80860F41", 0 },
fd476fa2	158	{ "808622C1", MODEL_CHERRYTRAIL },
2d244c81	159	{ "AMD0010", ACCESS_INTR_MASK },
e4e666ba	160	{ "AMDI0010", ACCESS_INTR_MASK },
90708ce2	161	{ "AMDI0510", 0 },
04a407f6	162	{ "APMC0D0F", 0 },
58dd8abf HG	163	{ "HISI02A1", 0 },
58dd8abf HG	164	{ "HISI02A2", 0 },
b61b1415 MW	165	{ }
	166	};
	167	MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
	168	#else
	169	static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
	170	{
	171	return -ENODEV;
	172	}
	173	#endif
	174
89a1e1bd LO	175	static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
89a1e1bd LO	176	{
5b6d721b LO	177	dev->functionality = I2C_FUNC_10BIT_ADDR \| DW_IC_DEFAULT_FUNCTIONALITY;
5b6d721b LO	178
89a1e1bd LO	179	dev->master_cfg = DW_IC_CON_MASTER \| DW_IC_CON_SLAVE_DISABLE \|
	180	DW_IC_CON_RESTART_EN;
	181
5b6d721b LO	182	dev->mode = DW_IC_MASTER;
5b6d721b LO	183
89a1e1bd LO	184	switch (dev->clk_freq) {
	185	case 100000:
	186	dev->master_cfg \|= DW_IC_CON_SPEED_STD;
	187	break;
	188	case 3400000:
	189	dev->master_cfg \|= DW_IC_CON_SPEED_HIGH;
	190	break;
	191	default:
	192	dev->master_cfg \|= DW_IC_CON_SPEED_FAST;
	193	}
	194	}
	195
5b6d721b LO	196	static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
	197	{
	198	dev->functionality = I2C_FUNC_SLAVE \| DW_IC_DEFAULT_FUNCTIONALITY;
	199
	200	dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL \|
4e2d93de	201	DW_IC_CON_RESTART_EN \| DW_IC_CON_STOP_DET_IFADDRESSED;
5b6d721b LO	202
	203	dev->mode = DW_IC_SLAVE;
	204
	205	switch (dev->clk_freq) {
	206	case 100000:
	207	dev->slave_cfg \|= DW_IC_CON_SPEED_STD;
	208	break;
	209	case 3400000:
	210	dev->slave_cfg \|= DW_IC_CON_SPEED_HIGH;
	211	break;
	212	default:
	213	dev->slave_cfg \|= DW_IC_CON_SPEED_FAST;
	214	}
	215	}
	216
b33af11d SS	217	static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
	218	{
	219	if (IS_ERR(i_dev->clk))
	220	return PTR_ERR(i_dev->clk);
	221
	222	if (prepare)
	223	return clk_prepare_enable(i_dev->clk);
	224
	225	clk_disable_unprepare(i_dev->clk);
	226	return 0;
	227	}
	228
8e598769 TH	229	static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
	230	{
	231	u32 param, tx_fifo_depth, rx_fifo_depth;
	232
	233	/*
	234	* Try to detect the FIFO depth if not set by interface driver,
	235	* the depth could be from 2 to 256 from HW spec.
	236	*/
	237	param = i2c_dw_read_comp_param(dev);
	238	tx_fifo_depth = ((param >> 16) & 0xff) + 1;
	239	rx_fifo_depth = ((param >> 8) & 0xff) + 1;
	240	if (!dev->tx_fifo_depth) {
	241	dev->tx_fifo_depth = tx_fifo_depth;
	242	dev->rx_fifo_depth = rx_fifo_depth;
	243	dev->adapter.nr = id;
	244	} else if (tx_fifo_depth >= 2) {
	245	dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
	246	tx_fifo_depth);
	247	dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
	248	rx_fifo_depth);
	249	}
	250	}
	251
6ad6fde3	252	static int dw_i2c_plat_probe(struct platform_device *pdev)
2373f6b9	253	{
4c5301ab	254	struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
2373f6b9	255	struct i2c_adapter *adap;
e393f674	256	struct dw_i2c_dev *dev;
10f8e7fb	257	u32 acpi_speed, ht = 0;
e393f674 LO	258	struct resource *mem;
e393f674 LO	259	int irq, ret;
2373f6b9	260
2373f6b9	261	irq = platform_get_irq(pdev, 0);
b20d3864 AB	262	if (irq < 0)
b20d3864 AB	263	return irq;
2373f6b9	264
1cb715ca AS	265	dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
	266	if (!dev)
	267	return -ENOMEM;
2373f6b9	268
3cc2d009	269	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1cb715ca AS	270	dev->base = devm_ioremap_resource(&pdev->dev, mem);
	271	if (IS_ERR(dev->base))
	272	return PTR_ERR(dev->base);
2373f6b9	273
1cb715ca	274	dev->dev = &pdev->dev;
2373f6b9 DB	275	dev->irq = irq;
	276	platform_set_drvdata(pdev, dev);
	277
ab809fd8 ZG	278	dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
	279	if (IS_ERR(dev->rst)) {
	280	if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
	281	return -EPROBE_DEFER;
	282	} else {
	283	reset_control_deassert(dev->rst);
	284	}
	285
4c5301ab	286	if (pdata) {
19c0a539	287	dev->clk_freq = pdata->i2c_scl_freq;
4bcfda09	288	} else {
4c5301ab MW	289	device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
	290	&ht);
	291	device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
	292	&dev->sda_falling_time);
	293	device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
	294	&dev->scl_falling_time);
	295	device_property_read_u32(&pdev->dev, "clock-frequency",
19c0a539	296	&dev->clk_freq);
4c5301ab MW	297	}
4c5301ab MW	298
10f8e7fb	299	acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
682c6c21 HG	300	/* Some broken DSTDs use 1MiHz instead of 1MHz */
	301	if (acpi_speed == 1048576)
	302	acpi_speed = 1000000;
973652db JN	303	/*
	304	* Find bus speed from the "clock-frequency" device property, ACPI
	305	* or by using fast mode if neither is set.
	306	*/
	307	if (acpi_speed && dev->clk_freq)
	308	dev->clk_freq = min(dev->clk_freq, acpi_speed);
	309	else if (acpi_speed \|\| dev->clk_freq)
	310	dev->clk_freq = max(dev->clk_freq, acpi_speed);
	311	else
	312	dev->clk_freq = 400000;
10f8e7fb	313
4c5301ab MW	314	if (has_acpi_companion(&pdev->dev))
	315	dw_i2c_acpi_configure(pdev);
	316
	317	/*
d608c3d9	318	* Only standard mode at 100kHz, fast mode at 400kHz,
b6e67145	319	* fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
4c5301ab	320	*/
d608c3d9	321	if (dev->clk_freq != 100000 && dev->clk_freq != 400000
b6e67145	322	&& dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
d608c3d9	323	dev_err(&pdev->dev,
22acc37b HG	324	"%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
22acc37b HG	325	dev->clk_freq);
e393f674	326	ret = -EINVAL;
ab809fd8	327	goto exit_reset;
9803f868 CR	328	}
9803f868 CR	329
e393f674 LO	330	ret = i2c_dw_probe_lock_support(dev);
e393f674 LO	331	if (ret)
ab809fd8	332	goto exit_reset;
894acb2f	333
5b6d721b LO	334	if (i2c_detect_slave_mode(&pdev->dev))
	335	i2c_dw_configure_slave(dev);
	336	else
	337	i2c_dw_configure_master(dev);
2fa8326b	338
925ddb24	339	dev->clk = devm_clk_get(&pdev->dev, NULL);
b33af11d SS	340	if (!i2c_dw_plat_prepare_clk(dev, true)) {
b33af11d SS	341	dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
925ddb24	342
b33af11d SS	343	if (!dev->sda_hold_time && ht)
	344	dev->sda_hold_time = div_u64(
	345	(u64)dev->get_clk_rate_khz(dev) * ht + 500000,
	346	1000000);
925ddb24 MW	347	}
925ddb24 MW	348
8e598769	349	dw_i2c_set_fifo_size(dev, pdev->id);
2373f6b9 DB	350
2373f6b9 DB	351	adap = &dev->adapter;
2373f6b9	352	adap->owner = THIS_MODULE;
70fba830	353	adap->class = I2C_CLASS_DEPRECATED;
8eb5c87a	354	ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
af71100c	355	adap->dev.of_node = pdev->dev.of_node;
2373f6b9	356
41c80b8a	357	if (dev->pm_disabled) {
894acb2f DB	358	pm_runtime_forbid(&pdev->dev);
	359	} else {
	360	pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
	361	pm_runtime_use_autosuspend(&pdev->dev);
	362	pm_runtime_set_active(&pdev->dev);
	363	pm_runtime_enable(&pdev->dev);
	364	}
7272194e	365
5b6d721b LO	366	if (dev->mode == DW_IC_SLAVE)
	367	ret = i2c_dw_probe_slave(dev);
	368	else
	369	ret = i2c_dw_probe(dev);
	370
e393f674	371	if (ret)
ab809fd8	372	goto exit_probe;
36d48fb5	373
e393f674	374	return ret;
ab809fd8 ZG	375
ab809fd8 ZG	376	exit_probe:
41c80b8a	377	if (!dev->pm_disabled)
ab809fd8 ZG	378	pm_runtime_disable(&pdev->dev);
	379	exit_reset:
	380	if (!IS_ERR_OR_NULL(dev->rst))
	381	reset_control_assert(dev->rst);
e393f674	382	return ret;
2373f6b9 DB	383	}
2373f6b9 DB	384
6ad6fde3	385	static int dw_i2c_plat_remove(struct platform_device *pdev)
2373f6b9 DB	386	{
2373f6b9 DB	387	struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
2373f6b9	388
7272194e MW	389	pm_runtime_get_sync(&pdev->dev);
7272194e MW	390
2373f6b9	391	i2c_del_adapter(&dev->adapter);
2373f6b9	392
90312351	393	dev->disable(dev);
2373f6b9	394
edfc3901 MW	395	pm_runtime_dont_use_autosuspend(&pdev->dev);
edfc3901 MW	396	pm_runtime_put_sync(&pdev->dev);
41c80b8a	397	if (!dev->pm_disabled)
e79e72c5	398	pm_runtime_disable(&pdev->dev);
ab809fd8 ZG	399	if (!IS_ERR_OR_NULL(dev->rst))
ab809fd8 ZG	400	reset_control_assert(dev->rst);
7272194e	401
086cb4af HG	402	i2c_dw_remove_lock_support(dev);
086cb4af HG	403
2373f6b9 DB	404	return 0;
	405	}
	406
af71100c RH	407	#ifdef CONFIG_OF
	408	static const struct of_device_id dw_i2c_of_match[] = {
	409	{ .compatible = "snps,designware-i2c", },
	410	{},
	411	};
	412	MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
	413	#endif
	414
8503ff16	415	#ifdef CONFIG_PM_SLEEP
6ad6fde3	416	static int dw_i2c_plat_prepare(struct device *dev)
8503ff16 JZ	417	{
	418	return pm_runtime_suspended(dev);
	419	}
	420
6ad6fde3	421	static void dw_i2c_plat_complete(struct device *dev)
8503ff16 JZ	422	{
	423	if (dev->power.direct_complete)
	424	pm_request_resume(dev);
	425	}
	426	#else
319d7f05 JN	427	#define dw_i2c_plat_prepare NULL
319d7f05 JN	428	#define dw_i2c_plat_complete NULL
8503ff16 JZ	429	#endif
8503ff16 JZ	430
1fc2fe20	431	#ifdef CONFIG_PM
a23318fe	432	static int dw_i2c_plat_runtime_suspend(struct device *dev)
3bf3b289 DS	433	{
	434	struct platform_device *pdev = to_platform_device(dev);
	435	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
	436
90312351	437	i_dev->disable(i_dev);
b33af11d	438	i2c_dw_plat_prepare_clk(i_dev, false);
3bf3b289 DS	439
	440	return 0;
	441	}
	442
6ad6fde3	443	static int dw_i2c_plat_resume(struct device *dev)
3bf3b289 DS	444	{
	445	struct platform_device *pdev = to_platform_device(dev);
	446	struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
	447
b33af11d	448	i2c_dw_plat_prepare_clk(i_dev, true);
90312351	449	i_dev->init(i_dev);
3bf3b289 DS	450
	451	return 0;
	452	}
3bf3b289	453
a23318fe UH	454	#ifdef CONFIG_PM_SLEEP
	455	static int dw_i2c_plat_suspend(struct device *dev)
	456	{
	457	pm_runtime_resume(dev);
	458	return dw_i2c_plat_runtime_suspend(dev);
	459	}
	460	#endif
	461
8503ff16	462	static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
6ad6fde3 JN	463	.prepare = dw_i2c_plat_prepare,
	464	.complete = dw_i2c_plat_complete,
	465	SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
a23318fe UH	466	SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend,
	467	dw_i2c_plat_resume,
	468	NULL)
8503ff16 JZ	469	};
	470
	471	#define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
	472	#else
	473	#define DW_I2C_DEV_PMOPS NULL
	474	#endif
1fc2fe20	475
e393f674	476	/* Work with hotplug and coldplug */
2373f6b9 DB	477	MODULE_ALIAS("platform:i2c_designware");
	478
	479	static struct platform_driver dw_i2c_driver = {
6ad6fde3 JN	480	.probe = dw_i2c_plat_probe,
6ad6fde3 JN	481	.remove = dw_i2c_plat_remove,
2373f6b9 DB	482	.driver = {
2373f6b9 DB	483	.name = "i2c_designware",
af71100c	484	.of_match_table = of_match_ptr(dw_i2c_of_match),
b61b1415	485	.acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
8503ff16	486	.pm = DW_I2C_DEV_PMOPS,
2373f6b9 DB	487	},
	488	};
	489
	490	static int __init dw_i2c_init_driver(void)
	491	{
cccdcea1	492	return platform_driver_register(&dw_i2c_driver);
2373f6b9	493	}
10452280	494	subsys_initcall(dw_i2c_init_driver);
2373f6b9 DB	495
	496	static void __exit dw_i2c_exit_driver(void)
	497	{
	498	platform_driver_unregister(&dw_i2c_driver);
	499	}
	500	module_exit(dw_i2c_exit_driver);
	501
	502	MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
	503	MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
	504	MODULE_LICENSE("GPL");