[mirror_ubuntu-bionic-kernel.git] / drivers / i2c / busses / i2c-imx.c

/*
 *	Copyright (C) 2002 Motorola GSG-China
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License
 *	as published by the Free Software Foundation; either version 2
 *	of the License, or (at your option) any later version.
 *
 *	This program is distributed in the hope that it will be useful,
 *	but WITHOUT ANY WARRANTY; without even the implied warranty of
 *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *	GNU General Public License for more details.
 *
 *	You should have received a copy of the GNU General Public License
 *	along with this program; if not, write to the Free Software
 *	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307,
 *	USA.
 *
 * Author:
 *	Darius Augulis, Teltonika Inc.
 *
 * Desc.:
 *	Implementation of I2C Adapter/Algorithm Driver
 *	for I2C Bus integrated in Freescale i.MX/MXC processors
 *
 *	Derived from Motorola GSG China I2C example driver
 *
 *	Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de
 *	Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de
 *	Copyright (C) 2007 RightHand Technologies, Inc.
 *	Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
 *
 */

/** Includes *******************************************************************
*******************************************************************************/

#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/sched.h>
#include <linux/platform_device.h>
#include <linux/clk.h>

#include <mach/irqs.h>
#include <mach/hardware.h>
#include <mach/i2c.h>

/** Defines ********************************************************************
*******************************************************************************/

/* This will be the driver name the kernel reports */
#define DRIVER_NAME "imx-i2c"

/* Default value */
#define IMX_I2C_BIT_RATE	100000	/* 100kHz */

/* IMX I2C registers */
#define IMX_I2C_IADR	0x00	/* i2c slave address */
#define IMX_I2C_IFDR	0x04	/* i2c frequency divider */
#define IMX_I2C_I2CR	0x08	/* i2c control */
#define IMX_I2C_I2SR	0x0C	/* i2c status */
#define IMX_I2C_I2DR	0x10	/* i2c transfer data */

/* Bits of IMX I2C registers */
#define I2SR_RXAK	0x01
#define I2SR_IIF	0x02
#define I2SR_SRW	0x04
#define I2SR_IAL	0x10
#define I2SR_IBB	0x20
#define I2SR_IAAS	0x40
#define I2SR_ICF	0x80
#define I2CR_RSTA	0x04
#define I2CR_TXAK	0x08
#define I2CR_MTX	0x10
#define I2CR_MSTA	0x20
#define I2CR_IIEN	0x40
#define I2CR_IEN	0x80

/** Variables ******************************************************************
*******************************************************************************/

/*
 * sorted list of clock divider, register value pairs
 * taken from table 26-5, p.26-9, Freescale i.MX
 * Integrated Portable System Processor Reference Manual
 * Document Number: MC9328MXLRM, Rev. 5.1, 06/2007
 *
 * Duplicated divider values removed from list
 */

static u16 __initdata i2c_clk_div[50][2] = {
	{ 22,	0x20 }, { 24,	0x21 }, { 26,	0x22 }, { 28,	0x23 },
	{ 30,	0x00 },	{ 32,	0x24 }, { 36,	0x25 }, { 40,	0x26 },
	{ 42,	0x03 }, { 44,	0x27 },	{ 48,	0x28 }, { 52,	0x05 },
	{ 56,	0x29 }, { 60,	0x06 }, { 64,	0x2A },	{ 72,	0x2B },
	{ 80,	0x2C }, { 88,	0x09 }, { 96,	0x2D }, { 104,	0x0A },
	{ 112,	0x2E }, { 128,	0x2F }, { 144,	0x0C }, { 160,	0x30 },
	{ 192,	0x31 },	{ 224,	0x32 }, { 240,	0x0F }, { 256,	0x33 },
	{ 288,	0x10 }, { 320,	0x34 },	{ 384,	0x35 }, { 448,	0x36 },
	{ 480,	0x13 }, { 512,	0x37 }, { 576,	0x14 },	{ 640,	0x38 },
	{ 768,	0x39 }, { 896,	0x3A }, { 960,	0x17 }, { 1024,	0x3B },
	{ 1152,	0x18 }, { 1280,	0x3C }, { 1536,	0x3D }, { 1792,	0x3E },
	{ 1920,	0x1B },	{ 2048,	0x3F }, { 2304,	0x1C }, { 2560,	0x1D },
	{ 3072,	0x1E }, { 3840,	0x1F }
};

struct imx_i2c_struct {
	struct i2c_adapter	adapter;
	struct resource		*res;
	struct clk		*clk;
	void __iomem		*base;
	int			irq;
	wait_queue_head_t	queue;
	unsigned long		i2csr;
	unsigned int 		disable_delay;
	int			stopped;
	unsigned int		ifdr; /* IMX_I2C_IFDR */
};

/** Functions for IMX I2C adapter driver ***************************************
*******************************************************************************/

static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
{
	unsigned long orig_jiffies = jiffies;
	unsigned int temp;

	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);

	while (1) {
		temp = readb(i2c_imx->base + IMX_I2C_I2SR);
		if (for_busy && (temp & I2SR_IBB))
			break;
		if (!for_busy && !(temp & I2SR_IBB))
			break;
		if (signal_pending(current)) {
			dev_dbg(&i2c_imx->adapter.dev,
				"<%s> I2C Interrupted\n", __func__);
			return -EINTR;
		}
		if (time_after(jiffies, orig_jiffies + HZ / 1000)) {
			dev_dbg(&i2c_imx->adapter.dev,
				"<%s> I2C bus is busy\n", __func__);
			return -EIO;
		}
		schedule();
	}

	return 0;
}

static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
{
	int result;

	result = wait_event_interruptible_timeout(i2c_imx->queue,
		i2c_imx->i2csr & I2SR_IIF, HZ / 10);

	if (unlikely(result < 0)) {
		dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
		return result;
	} else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
		dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
		return -ETIMEDOUT;
	}
	dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__);
	i2c_imx->i2csr = 0;
	return 0;
}

static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
{
	if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
		dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
		return -EIO;  /* No ACK */
	}

	dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
	return 0;
}

static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
{
	unsigned int temp = 0;
	int result;

	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);

	clk_enable(i2c_imx->clk);
	writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
	/* Enable I2C controller */
	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
	writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);

	/* Wait controller to be stable */
	udelay(50);

	/* Start I2C transaction */
	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	temp |= I2CR_MSTA;
	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
	result = i2c_imx_bus_busy(i2c_imx, 1);
	if (result)
		return result;
	i2c_imx->stopped = 0;

	temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
	return result;
}

static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
{
	unsigned int temp = 0;

	if (!i2c_imx->stopped) {
		/* Stop I2C transaction */
		dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
		temp = readb(i2c_imx->base + IMX_I2C_I2CR);
		temp &= ~(I2CR_MSTA | I2CR_MTX);
		writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
	}
	if (cpu_is_mx1()) {
		/*
		 * This delay caused by an i.MXL hardware bug.
		 * If no (or too short) delay, no "STOP" bit will be generated.
		 */
		udelay(i2c_imx->disable_delay);
	}

	if (!i2c_imx->stopped) {
		i2c_imx_bus_busy(i2c_imx, 0);
		i2c_imx->stopped = 1;
	}

	/* Disable I2C controller */
	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
	clk_disable(i2c_imx->clk);
}

static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
							unsigned int rate)
{
	unsigned int i2c_clk_rate;
	unsigned int div;
	int i;

	/* Divider value calculation */
	i2c_clk_rate = clk_get_rate(i2c_imx->clk);
	div = (i2c_clk_rate + rate - 1) / rate;
	if (div < i2c_clk_div[0][0])
		i = 0;
	else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
		i = ARRAY_SIZE(i2c_clk_div) - 1;
	else
		for (i = 0; i2c_clk_div[i][0] < div; i++);

	/* Store divider value */
	i2c_imx->ifdr = i2c_clk_div[i][1];

	/*
	 * There dummy delay is calculated.
	 * It should be about one I2C clock period long.
	 * This delay is used in I2C bus disable function
	 * to fix chip hardware bug.
	 */
	i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0]
		+ (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);

	/* dev_dbg() can't be used, because adapter is not yet registered */
#ifdef CONFIG_I2C_DEBUG_BUS
	printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n",
		__func__, i2c_clk_rate, div);
	printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
		__func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
#endif
}

static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
{
	struct imx_i2c_struct *i2c_imx = dev_id;
	unsigned int temp;

	temp = readb(i2c_imx->base + IMX_I2C_I2SR);
	if (temp & I2SR_IIF) {
		/* save status register */
		i2c_imx->i2csr = temp;
		temp &= ~I2SR_IIF;
		writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
		wake_up_interruptible(&i2c_imx->queue);
		return IRQ_HANDLED;
	}

	return IRQ_NONE;
}

static int i2c_imx_write(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
{
	int i, result;

	dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n",
		__func__, msgs->addr << 1);

	/* write slave address */
	writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR);
	result = i2c_imx_trx_complete(i2c_imx);
	if (result)
		return result;
	result = i2c_imx_acked(i2c_imx);
	if (result)
		return result;
	dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__);

	/* write data */
	for (i = 0; i < msgs->len; i++) {
		dev_dbg(&i2c_imx->adapter.dev,
			"<%s> write byte: B%d=0x%X\n",
			__func__, i, msgs->buf[i]);
		writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR);
		result = i2c_imx_trx_complete(i2c_imx);
		if (result)
			return result;
		result = i2c_imx_acked(i2c_imx);
		if (result)
			return result;
	}
	return 0;
}

static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
{
	int i, result;
	unsigned int temp;

	dev_dbg(&i2c_imx->adapter.dev,
		"<%s> write slave address: addr=0x%x\n",
		__func__, (msgs->addr << 1) | 0x01);

	/* write slave address */
	writeb((msgs->addr << 1) | 0x01, i2c_imx->base + IMX_I2C_I2DR);
	result = i2c_imx_trx_complete(i2c_imx);
	if (result)
		return result;
	result = i2c_imx_acked(i2c_imx);
	if (result)
		return result;

	dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);

	/* setup bus to read data */
	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	temp &= ~I2CR_MTX;
	if (msgs->len - 1)
		temp &= ~I2CR_TXAK;
	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
	readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */

	dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);

	/* read data */
	for (i = 0; i < msgs->len; i++) {
		result = i2c_imx_trx_complete(i2c_imx);
		if (result)
			return result;
		if (i == (msgs->len - 1)) {
			/* It must generate STOP before read I2DR to prevent
			   controller from generating another clock cycle */
			dev_dbg(&i2c_imx->adapter.dev,
				"<%s> clear MSTA\n", __func__);
			temp = readb(i2c_imx->base + IMX_I2C_I2CR);
			temp &= ~(I2CR_MSTA | I2CR_MTX);
			writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
			i2c_imx_bus_busy(i2c_imx, 0);
			i2c_imx->stopped = 1;
		} else if (i == (msgs->len - 2)) {
			dev_dbg(&i2c_imx->adapter.dev,
				"<%s> set TXAK\n", __func__);
			temp = readb(i2c_imx->base + IMX_I2C_I2CR);
			temp |= I2CR_TXAK;
			writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
		}
		msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR);
		dev_dbg(&i2c_imx->adapter.dev,
			"<%s> read byte: B%d=0x%X\n",
			__func__, i, msgs->buf[i]);
	}
	return 0;
}

static int i2c_imx_xfer(struct i2c_adapter *adapter,
						struct i2c_msg *msgs, int num)
{
	unsigned int i, temp;
	int result;
	struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);

	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);

	/* Start I2C transfer */
	result = i2c_imx_start(i2c_imx);
	if (result)
		goto fail0;

	/* read/write data */
	for (i = 0; i < num; i++) {
		if (i) {
			dev_dbg(&i2c_imx->adapter.dev,
				"<%s> repeated start\n", __func__);
			temp = readb(i2c_imx->base + IMX_I2C_I2CR);
			temp |= I2CR_RSTA;
			writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
			result =  i2c_imx_bus_busy(i2c_imx, 1);
			if (result)
				goto fail0;
		}
		dev_dbg(&i2c_imx->adapter.dev,
			"<%s> transfer message: %d\n", __func__, i);
		/* write/read data */
#ifdef CONFIG_I2C_DEBUG_BUS
		temp = readb(i2c_imx->base + IMX_I2C_I2CR);
		dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
			"MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
			(temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
			(temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
			(temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
		temp = readb(i2c_imx->base + IMX_I2C_I2SR);
		dev_dbg(&i2c_imx->adapter.dev,
			"<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
			"IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
			(temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
			(temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
			(temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
			(temp & I2SR_RXAK ? 1 : 0));
#endif
		if (msgs[i].flags & I2C_M_RD)
			result = i2c_imx_read(i2c_imx, &msgs[i]);
		else
			result = i2c_imx_write(i2c_imx, &msgs[i]);
	}

fail0:
	/* Stop I2C transfer */
	i2c_imx_stop(i2c_imx);

	dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
		(result < 0) ? "error" : "success msg",
			(result < 0) ? result : num);
	return (result < 0) ? result : num;
}

static u32 i2c_imx_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
}

static struct i2c_algorithm i2c_imx_algo = {
	.master_xfer	= i2c_imx_xfer,
	.functionality	= i2c_imx_func,
};

static int __init i2c_imx_probe(struct platform_device *pdev)
{
	struct imx_i2c_struct *i2c_imx;
	struct resource *res;
	struct imxi2c_platform_data *pdata;
	void __iomem *base;
	resource_size_t res_size;
	int irq;
	int ret;

	dev_dbg(&pdev->dev, "<%s>\n", __func__);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res) {
		dev_err(&pdev->dev, "can't get device resources\n");
		return -ENOENT;
	}
	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(&pdev->dev, "can't get irq number\n");
		return -ENOENT;
	}

	pdata = pdev->dev.platform_data;

	if (pdata && pdata->init) {
		ret = pdata->init(&pdev->dev);
		if (ret)
			return ret;
	}

	res_size = resource_size(res);
	base = ioremap(res->start, res_size);
	if (!base) {
		dev_err(&pdev->dev, "ioremap failed\n");
		ret = -EIO;
		goto fail0;
	}

	i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL);
	if (!i2c_imx) {
		dev_err(&pdev->dev, "can't allocate interface\n");
		ret = -ENOMEM;
		goto fail1;
	}

	if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
		ret = -EBUSY;
		goto fail2;
	}

	/* Setup i2c_imx driver structure */
	strcpy(i2c_imx->adapter.name, pdev->name);
	i2c_imx->adapter.owner		= THIS_MODULE;
	i2c_imx->adapter.algo		= &i2c_imx_algo;
	i2c_imx->adapter.dev.parent	= &pdev->dev;
	i2c_imx->adapter.nr 		= pdev->id;
	i2c_imx->irq			= irq;
	i2c_imx->base			= base;
	i2c_imx->res			= res;

	/* Get I2C clock */
	i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk");
	if (IS_ERR(i2c_imx->clk)) {
		ret = PTR_ERR(i2c_imx->clk);
		dev_err(&pdev->dev, "can't get I2C clock\n");
		goto fail3;
	}

	/* Request IRQ */
	ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx);
	if (ret) {
		dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq);
		goto fail4;
	}

	/* Init queue */
	init_waitqueue_head(&i2c_imx->queue);

	/* Set up adapter data */
	i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);

	/* Set up clock divider */
	if (pdata && pdata->bitrate)
		i2c_imx_set_clk(i2c_imx, pdata->bitrate);
	else
		i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE);

	/* Set up chip registers to defaults */
	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
	writeb(0, i2c_imx->base + IMX_I2C_I2SR);

	/* Add I2C adapter */
	ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
	if (ret < 0) {
		dev_err(&pdev->dev, "registration failed\n");
		goto fail5;
	}

	/* Set up platform driver data */
	platform_set_drvdata(pdev, i2c_imx);

	dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq);
	dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
		i2c_imx->res->start, i2c_imx->res->end);
	dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n",
		res_size, i2c_imx->res->start);
	dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n",
		i2c_imx->adapter.name);
	dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");

	return 0;   /* Return OK */

fail5:
	free_irq(i2c_imx->irq, i2c_imx);
fail4:
	clk_put(i2c_imx->clk);
fail3:
	release_mem_region(i2c_imx->res->start, resource_size(res));
fail2:
	kfree(i2c_imx);
fail1:
	iounmap(base);
fail0:
	if (pdata && pdata->exit)
		pdata->exit(&pdev->dev);
	return ret; /* Return error number */
}

static int __exit i2c_imx_remove(struct platform_device *pdev)
{
	struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
	struct imxi2c_platform_data *pdata = pdev->dev.platform_data;

	/* remove adapter */
	dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
	i2c_del_adapter(&i2c_imx->adapter);
	platform_set_drvdata(pdev, NULL);

	/* free interrupt */
	free_irq(i2c_imx->irq, i2c_imx);

	/* setup chip registers to defaults */
	writeb(0, i2c_imx->base + IMX_I2C_IADR);
	writeb(0, i2c_imx->base + IMX_I2C_IFDR);
	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
	writeb(0, i2c_imx->base + IMX_I2C_I2SR);

	/* Shut down hardware */
	if (pdata && pdata->exit)
		pdata->exit(&pdev->dev);

	clk_put(i2c_imx->clk);

	release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
	iounmap(i2c_imx->base);
	kfree(i2c_imx);
	return 0;
}

static struct platform_driver i2c_imx_driver = {
	.probe		= i2c_imx_probe,
	.remove		= __exit_p(i2c_imx_remove),
	.driver	= {
		.name	= DRIVER_NAME,
		.owner	= THIS_MODULE,
	}
};

static int __init i2c_adap_imx_init(void)
{
	return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
}
subsys_initcall(i2c_adap_imx_init);

static void __exit i2c_adap_imx_exit(void)
{
	platform_driver_unregister(&i2c_imx_driver);
}
module_exit(i2c_adap_imx_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Darius Augulis");
MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");
MODULE_ALIAS("platform:" DRIVER_NAME);
Commit	Line	Data
aa11e38c DA	1	/*
	2	* Copyright (C) 2002 Motorola GSG-China
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version 2
	7	* of the License, or (at your option) any later version.
	8	*
	9	* This program is distributed in the hope that it will be useful,
	10	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	* GNU General Public License for more details.
	13	*
	14	* You should have received a copy of the GNU General Public License
	15	* along with this program; if not, write to the Free Software
	16	* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
	17	* USA.
	18	*
	19	* Author:
	20	* Darius Augulis, Teltonika Inc.
	21	*
	22	* Desc.:
	23	* Implementation of I2C Adapter/Algorithm Driver
	24	* for I2C Bus integrated in Freescale i.MX/MXC processors
	25	*
	26	* Derived from Motorola GSG China I2C example driver
	27	*
	28	* Copyright (C) 2005 Torsten Koschorrek <koschorrek at synertronixx.de
	29	* Copyright (C) 2005 Matthias Blaschke <blaschke at synertronixx.de
	30	* Copyright (C) 2007 RightHand Technologies, Inc.
	31	* Copyright (C) 2008 Darius Augulis <darius.augulis at teltonika.lt>
	32	*
	33	*/
	34
	35	/ Includes *****************************************************************
	36	*******************************************************************************/
	37
	38	#include <linux/init.h>
	39	#include <linux/kernel.h>
	40	#include <linux/module.h>
	41	#include <linux/errno.h>
	42	#include <linux/err.h>
	43	#include <linux/interrupt.h>
	44	#include <linux/delay.h>
	45	#include <linux/i2c.h>
	46	#include <linux/io.h>
	47	#include <linux/sched.h>
	48	#include <linux/platform_device.h>
	49	#include <linux/clk.h>
	50
	51	#include <mach/irqs.h>
	52	#include <mach/hardware.h>
	53	#include <mach/i2c.h>
	54
	55	/ Defines ******************************************************************
	56	*******************************************************************************/
	57
	58	/* This will be the driver name the kernel reports */
	59	#define DRIVER_NAME "imx-i2c"
	60
	61	/* Default value */
	62	#define IMX_I2C_BIT_RATE 100000 /* 100kHz */
	63
	64	/* IMX I2C registers */
65	#define IMX_I2C_IADR 0x00 /* i2c slave address */
66	#define IMX_I2C_IFDR 0x04 /* i2c frequency divider */
67	#define IMX_I2C_I2CR 0x08 /* i2c control */
68	#define IMX_I2C_I2SR 0x0C /* i2c status */
69	#define IMX_I2C_I2DR 0x10 /* i2c transfer data */
70
71	/* Bits of IMX I2C registers */
72	#define I2SR_RXAK 0x01
73	#define I2SR_IIF 0x02
74	#define I2SR_SRW 0x04
75	#define I2SR_IAL 0x10
76	#define I2SR_IBB 0x20
77	#define I2SR_IAAS 0x40
78	#define I2SR_ICF 0x80
79	#define I2CR_RSTA 0x04
80	#define I2CR_TXAK 0x08
81	#define I2CR_MTX 0x10
82	#define I2CR_MSTA 0x20
83	#define I2CR_IIEN 0x40
84	#define I2CR_IEN 0x80
85
86	/ Variables ****************************************************************
87	*******************************************************************************/
88
aa11e38c DA	89	/*
	90	* sorted list of clock divider, register value pairs
	91	* taken from table 26-5, p.26-9, Freescale i.MX
	92	* Integrated Portable System Processor Reference Manual
	93	* Document Number: MC9328MXLRM, Rev. 5.1, 06/2007
	94	*
	95	* Duplicated divider values removed from list
	96	*/
	97
	98	static u16 __initdata i2c_clk_div[50][2] = {
	99	{ 22, 0x20 }, { 24, 0x21 }, { 26, 0x22 }, { 28, 0x23 },
	100	{ 30, 0x00 }, { 32, 0x24 }, { 36, 0x25 }, { 40, 0x26 },
	101	{ 42, 0x03 }, { 44, 0x27 }, { 48, 0x28 }, { 52, 0x05 },
	102	{ 56, 0x29 }, { 60, 0x06 }, { 64, 0x2A }, { 72, 0x2B },
	103	{ 80, 0x2C }, { 88, 0x09 }, { 96, 0x2D }, { 104, 0x0A },
	104	{ 112, 0x2E }, { 128, 0x2F }, { 144, 0x0C }, { 160, 0x30 },
	105	{ 192, 0x31 }, { 224, 0x32 }, { 240, 0x0F }, { 256, 0x33 },
	106	{ 288, 0x10 }, { 320, 0x34 }, { 384, 0x35 }, { 448, 0x36 },
	107	{ 480, 0x13 }, { 512, 0x37 }, { 576, 0x14 }, { 640, 0x38 },
	108	{ 768, 0x39 }, { 896, 0x3A }, { 960, 0x17 }, { 1024, 0x3B },
	109	{ 1152, 0x18 }, { 1280, 0x3C }, { 1536, 0x3D }, { 1792, 0x3E },
	110	{ 1920, 0x1B }, { 2048, 0x3F }, { 2304, 0x1C }, { 2560, 0x1D },
	111	{ 3072, 0x1E }, { 3840, 0x1F }
	112	};
	113
	114	struct imx_i2c_struct {
	115	struct i2c_adapter adapter;
	116	struct resource *res;
	117	struct clk *clk;
	118	void __iomem *base;
	119	int irq;
	120	wait_queue_head_t queue;
	121	unsigned long i2csr;
65de394d	122	unsigned int disable_delay;
43309f3b	123	int stopped;
db3a3d4e	124	unsigned int ifdr; /* IMX_I2C_IFDR */
aa11e38c DA	125	};
	126
	127	/ Functions for IMX I2C adapter driver *************************************
	128	*******************************************************************************/
	129
43309f3b	130	static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
aa11e38c DA	131	{
aa11e38c DA	132	unsigned long orig_jiffies = jiffies;
43309f3b	133	unsigned int temp;
aa11e38c DA	134
	135	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
	136
43309f3b RZ	137	while (1) {
	138	temp = readb(i2c_imx->base + IMX_I2C_I2SR);
	139	if (for_busy && (temp & I2SR_IBB))
	140	break;
	141	if (!for_busy && !(temp & I2SR_IBB))
	142	break;
aa11e38c DA	143	if (signal_pending(current)) {
	144	dev_dbg(&i2c_imx->adapter.dev,
	145	"<%s> I2C Interrupted\n", __func__);
	146	return -EINTR;
	147	}
	148	if (time_after(jiffies, orig_jiffies + HZ / 1000)) {
	149	dev_dbg(&i2c_imx->adapter.dev,
	150	"<%s> I2C bus is busy\n", __func__);
	151	return -EIO;
	152	}
	153	schedule();
	154	}
	155
	156	return 0;
	157	}
	158
	159	static int i2c_imx_trx_complete(struct imx_i2c_struct *i2c_imx)
	160	{
	161	int result;
	162
	163	result = wait_event_interruptible_timeout(i2c_imx->queue,
	164	i2c_imx->i2csr & I2SR_IIF, HZ / 10);
	165
	166	if (unlikely(result < 0)) {
	167	dev_dbg(&i2c_imx->adapter.dev, "<%s> result < 0\n", __func__);
	168	return result;
	169	} else if (unlikely(!(i2c_imx->i2csr & I2SR_IIF))) {
	170	dev_dbg(&i2c_imx->adapter.dev, "<%s> Timeout\n", __func__);
	171	return -ETIMEDOUT;
	172	}
	173	dev_dbg(&i2c_imx->adapter.dev, "<%s> TRX complete\n", __func__);
	174	i2c_imx->i2csr = 0;
	175	return 0;
	176	}
	177
	178	static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
	179	{
	180	if (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_RXAK) {
	181	dev_dbg(&i2c_imx->adapter.dev, "<%s> No ACK\n", __func__);
	182	return -EIO; /* No ACK */
	183	}
	184
	185	dev_dbg(&i2c_imx->adapter.dev, "<%s> ACK received\n", __func__);
	186	return 0;
	187	}
	188
43309f3b	189	static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
aa11e38c DA	190	{
aa11e38c DA	191	unsigned int temp = 0;
43309f3b	192	int result;
aa11e38c DA	193
	194	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
	195
db3a3d4e RZ	196	clk_enable(i2c_imx->clk);
db3a3d4e RZ	197	writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
aa11e38c	198	/* Enable I2C controller */
43309f3b	199	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
aa11e38c	200	writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
43309f3b RZ	201
	202	/* Wait controller to be stable */
	203	udelay(50);
	204
aa11e38c DA	205	/* Start I2C transaction */
	206	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	207	temp \|= I2CR_MSTA;
	208	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
43309f3b RZ	209	result = i2c_imx_bus_busy(i2c_imx, 1);
	210	if (result)
	211	return result;
	212	i2c_imx->stopped = 0;
	213
aa11e38c DA	214	temp \|= I2CR_IIEN \| I2CR_MTX \| I2CR_TXAK;
aa11e38c DA	215	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
43309f3b	216	return result;
aa11e38c DA	217	}
	218
	219	static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
	220	{
	221	unsigned int temp = 0;
	222
43309f3b RZ	223	if (!i2c_imx->stopped) {
	224	/* Stop I2C transaction */
	225	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
	226	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	227	temp &= ~(I2CR_MSTA \| I2CR_MTX);
	228	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
43309f3b	229	}
a4094a76 RZ	230	if (cpu_is_mx1()) {
	231	/*
	232	* This delay caused by an i.MXL hardware bug.
	233	* If no (or too short) delay, no "STOP" bit will be generated.
	234	*/
	235	udelay(i2c_imx->disable_delay);
	236	}
43309f3b	237
a1ee06b7	238	if (!i2c_imx->stopped) {
43309f3b	239	i2c_imx_bus_busy(i2c_imx, 0);
a1ee06b7 VL	240	i2c_imx->stopped = 1;
a1ee06b7 VL	241	}
43309f3b	242
aa11e38c DA	243	/* Disable I2C controller */
aa11e38c DA	244	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
db3a3d4e	245	clk_disable(i2c_imx->clk);
aa11e38c DA	246	}
	247
	248	static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
	249	unsigned int rate)
	250	{
	251	unsigned int i2c_clk_rate;
	252	unsigned int div;
	253	int i;
	254
	255	/* Divider value calculation */
	256	i2c_clk_rate = clk_get_rate(i2c_imx->clk);
	257	div = (i2c_clk_rate + rate - 1) / rate;
	258	if (div < i2c_clk_div[0][0])
	259	i = 0;
	260	else if (div > i2c_clk_div[ARRAY_SIZE(i2c_clk_div) - 1][0])
	261	i = ARRAY_SIZE(i2c_clk_div) - 1;
	262	else
	263	for (i = 0; i2c_clk_div[i][0] < div; i++);
	264
db3a3d4e RZ	265	/* Store divider value */
db3a3d4e RZ	266	i2c_imx->ifdr = i2c_clk_div[i][1];
aa11e38c DA	267
	268	/*
	269	* There dummy delay is calculated.
	270	* It should be about one I2C clock period long.
	271	* This delay is used in I2C bus disable function
	272	* to fix chip hardware bug.
	273	*/
65de394d	274	i2c_imx->disable_delay = (500000U * i2c_clk_div[i][0]
aa11e38c DA	275	+ (i2c_clk_rate / 2) - 1) / (i2c_clk_rate / 2);
	276
	277	/* dev_dbg() can't be used, because adapter is not yet registered */
	278	#ifdef CONFIG_I2C_DEBUG_BUS
	279	printk(KERN_DEBUG "I2C: <%s> I2C_CLK=%d, REQ DIV=%d\n",
	280	__func__, i2c_clk_rate, div);
	281	printk(KERN_DEBUG "I2C: <%s> IFDR[IC]=0x%x, REAL DIV=%d\n",
	282	__func__, i2c_clk_div[i][1], i2c_clk_div[i][0]);
	283	#endif
	284	}
	285
	286	static irqreturn_t i2c_imx_isr(int irq, void *dev_id)
	287	{
	288	struct imx_i2c_struct *i2c_imx = dev_id;
	289	unsigned int temp;
	290
	291	temp = readb(i2c_imx->base + IMX_I2C_I2SR);
	292	if (temp & I2SR_IIF) {
	293	/* save status register */
	294	i2c_imx->i2csr = temp;
	295	temp &= ~I2SR_IIF;
	296	writeb(temp, i2c_imx->base + IMX_I2C_I2SR);
	297	wake_up_interruptible(&i2c_imx->queue);
	298	return IRQ_HANDLED;
	299	}
	300
	301	return IRQ_NONE;
	302	}
	303
	304	static int i2c_imx_write(struct imx_i2c_struct i2c_imx, struct i2c_msg msgs)
	305	{
	306	int i, result;
	307
	308	dev_dbg(&i2c_imx->adapter.dev, "<%s> write slave address: addr=0x%x\n",
	309	__func__, msgs->addr << 1);
	310
	311	/* write slave address */
	312	writeb(msgs->addr << 1, i2c_imx->base + IMX_I2C_I2DR);
	313	result = i2c_imx_trx_complete(i2c_imx);
	314	if (result)
	315	return result;
	316	result = i2c_imx_acked(i2c_imx);
	317	if (result)
	318	return result;
	319	dev_dbg(&i2c_imx->adapter.dev, "<%s> write data\n", __func__);
	320
	321	/* write data */
	322	for (i = 0; i < msgs->len; i++) {
	323	dev_dbg(&i2c_imx->adapter.dev,
	324	"<%s> write byte: B%d=0x%X\n",
	325	__func__, i, msgs->buf[i]);
	326	writeb(msgs->buf[i], i2c_imx->base + IMX_I2C_I2DR);
	327	result = i2c_imx_trx_complete(i2c_imx);
	328	if (result)
	329	return result;
	330	result = i2c_imx_acked(i2c_imx);
	331	if (result)
	332	return result;
	333	}
	334	return 0;
	335	}
	336
	337	static int i2c_imx_read(struct imx_i2c_struct i2c_imx, struct i2c_msg msgs)
	338	{
339	int i, result;
340	unsigned int temp;
341
342	dev_dbg(&i2c_imx->adapter.dev,
343	"<%s> write slave address: addr=0x%x\n",
344	__func__, (msgs->addr << 1) \| 0x01);
345
346	/* write slave address */
347	writeb((msgs->addr << 1) \| 0x01, i2c_imx->base + IMX_I2C_I2DR);
348	result = i2c_imx_trx_complete(i2c_imx);
349	if (result)
350	return result;
351	result = i2c_imx_acked(i2c_imx);
352	if (result)
353	return result;
354
355	dev_dbg(&i2c_imx->adapter.dev, "<%s> setup bus\n", __func__);
356
357	/* setup bus to read data */
358	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
359	temp &= ~I2CR_MTX;
360	if (msgs->len - 1)
361	temp &= ~I2CR_TXAK;
362	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
363	readb(i2c_imx->base + IMX_I2C_I2DR); /* dummy read */
364
365	dev_dbg(&i2c_imx->adapter.dev, "<%s> read data\n", __func__);
366
367	/* read data */
368	for (i = 0; i < msgs->len; i++) {
369	result = i2c_imx_trx_complete(i2c_imx);
370	if (result)
371	return result;
372	if (i == (msgs->len - 1)) {
43309f3b RZ	373	/* It must generate STOP before read I2DR to prevent
43309f3b RZ	374	controller from generating another clock cycle */
aa11e38c DA	375	dev_dbg(&i2c_imx->adapter.dev,
	376	"<%s> clear MSTA\n", __func__);
	377	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
43309f3b	378	temp &= ~(I2CR_MSTA \| I2CR_MTX);
aa11e38c	379	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
43309f3b RZ	380	i2c_imx_bus_busy(i2c_imx, 0);
43309f3b RZ	381	i2c_imx->stopped = 1;
aa11e38c DA	382	} else if (i == (msgs->len - 2)) {
	383	dev_dbg(&i2c_imx->adapter.dev,
	384	"<%s> set TXAK\n", __func__);
	385	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	386	temp \|= I2CR_TXAK;
	387	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
	388	}
	389	msgs->buf[i] = readb(i2c_imx->base + IMX_I2C_I2DR);
	390	dev_dbg(&i2c_imx->adapter.dev,
	391	"<%s> read byte: B%d=0x%X\n",
	392	__func__, i, msgs->buf[i]);
	393	}
	394	return 0;
	395	}
	396
	397	static int i2c_imx_xfer(struct i2c_adapter *adapter,
	398	struct i2c_msg *msgs, int num)
	399	{
	400	unsigned int i, temp;
	401	int result;
	402	struct imx_i2c_struct *i2c_imx = i2c_get_adapdata(adapter);
	403
	404	dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
	405
43309f3b RZ	406	/* Start I2C transfer */
43309f3b RZ	407	result = i2c_imx_start(i2c_imx);
aa11e38c DA	408	if (result)
	409	goto fail0;
	410
aa11e38c DA	411	/* read/write data */
	412	for (i = 0; i < num; i++) {
	413	if (i) {
	414	dev_dbg(&i2c_imx->adapter.dev,
	415	"<%s> repeated start\n", __func__);
	416	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	417	temp \|= I2CR_RSTA;
	418	writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
43309f3b RZ	419	result = i2c_imx_bus_busy(i2c_imx, 1);
	420	if (result)
	421	goto fail0;
aa11e38c DA	422	}
	423	dev_dbg(&i2c_imx->adapter.dev,
	424	"<%s> transfer message: %d\n", __func__, i);
	425	/* write/read data */
	426	#ifdef CONFIG_I2C_DEBUG_BUS
	427	temp = readb(i2c_imx->base + IMX_I2C_I2CR);
	428	dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, "
	429	"MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__,
	430	(temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
	431	(temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
	432	(temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
	433	temp = readb(i2c_imx->base + IMX_I2C_I2SR);
	434	dev_dbg(&i2c_imx->adapter.dev,
	435	"<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, "
	436	"IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__,
	437	(temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
	438	(temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
	439	(temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
	440	(temp & I2SR_RXAK ? 1 : 0));
	441	#endif
	442	if (msgs[i].flags & I2C_M_RD)
	443	result = i2c_imx_read(i2c_imx, &msgs[i]);
	444	else
	445	result = i2c_imx_write(i2c_imx, &msgs[i]);
	446	}
	447
	448	fail0:
	449	/* Stop I2C transfer */
	450	i2c_imx_stop(i2c_imx);
	451
	452	dev_dbg(&i2c_imx->adapter.dev, "<%s> exit with: %s: %d\n", __func__,
	453	(result < 0) ? "error" : "success msg",
	454	(result < 0) ? result : num);
	455	return (result < 0) ? result : num;
	456	}
	457
	458	static u32 i2c_imx_func(struct i2c_adapter *adapter)
	459	{
	460	return I2C_FUNC_I2C \| I2C_FUNC_SMBUS_EMUL;
	461	}
	462
	463	static struct i2c_algorithm i2c_imx_algo = {
	464	.master_xfer = i2c_imx_xfer,
	465	.functionality = i2c_imx_func,
	466	};
	467
	468	static int __init i2c_imx_probe(struct platform_device *pdev)
	469	{
	470	struct imx_i2c_struct *i2c_imx;
	471	struct resource *res;
	472	struct imxi2c_platform_data *pdata;
	473	void __iomem *base;
	474	resource_size_t res_size;
	475	int irq;
	476	int ret;
	477
	478	dev_dbg(&pdev->dev, "<%s>\n", __func__);
	479
	480	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	481	if (!res) {
	482	dev_err(&pdev->dev, "can't get device resources\n");
	483	return -ENOENT;
	484	}
	485	irq = platform_get_irq(pdev, 0);
486	if (irq < 0) {
487	dev_err(&pdev->dev, "can't get irq number\n");
488	return -ENOENT;
489	}
490
491	pdata = pdev->dev.platform_data;
492
493	if (pdata && pdata->init) {
494	ret = pdata->init(&pdev->dev);
495	if (ret)
496	return ret;
497	}
498
499	res_size = resource_size(res);
500	base = ioremap(res->start, res_size);
501	if (!base) {
502	dev_err(&pdev->dev, "ioremap failed\n");
503	ret = -EIO;
504	goto fail0;
505	}
506
507	i2c_imx = kzalloc(sizeof(struct imx_i2c_struct), GFP_KERNEL);
508	if (!i2c_imx) {
509	dev_err(&pdev->dev, "can't allocate interface\n");
510	ret = -ENOMEM;
511	goto fail1;
512	}
513
309c18d2 DA	514	if (!request_mem_region(res->start, res_size, DRIVER_NAME)) {
	515	ret = -EBUSY;
	516	goto fail2;
	517	}
	518
aa11e38c DA	519	/* Setup i2c_imx driver structure */
	520	strcpy(i2c_imx->adapter.name, pdev->name);
	521	i2c_imx->adapter.owner = THIS_MODULE;
	522	i2c_imx->adapter.algo = &i2c_imx_algo;
	523	i2c_imx->adapter.dev.parent = &pdev->dev;
	524	i2c_imx->adapter.nr = pdev->id;
	525	i2c_imx->irq = irq;
	526	i2c_imx->base = base;
	527	i2c_imx->res = res;
	528
	529	/* Get I2C clock */
	530	i2c_imx->clk = clk_get(&pdev->dev, "i2c_clk");
	531	if (IS_ERR(i2c_imx->clk)) {
	532	ret = PTR_ERR(i2c_imx->clk);
	533	dev_err(&pdev->dev, "can't get I2C clock\n");
309c18d2	534	goto fail3;
aa11e38c	535	}
aa11e38c DA	536
	537	/* Request IRQ */
	538	ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx);
	539	if (ret) {
	540	dev_err(&pdev->dev, "can't claim irq %d\n", i2c_imx->irq);
309c18d2	541	goto fail4;
aa11e38c DA	542	}
	543
	544	/* Init queue */
	545	init_waitqueue_head(&i2c_imx->queue);
	546
	547	/* Set up adapter data */
	548	i2c_set_adapdata(&i2c_imx->adapter, i2c_imx);
	549
	550	/* Set up clock divider */
	551	if (pdata && pdata->bitrate)
	552	i2c_imx_set_clk(i2c_imx, pdata->bitrate);
	553	else
	554	i2c_imx_set_clk(i2c_imx, IMX_I2C_BIT_RATE);
	555
	556	/* Set up chip registers to defaults */
	557	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
	558	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
	559
	560	/* Add I2C adapter */
	561	ret = i2c_add_numbered_adapter(&i2c_imx->adapter);
	562	if (ret < 0) {
	563	dev_err(&pdev->dev, "registration failed\n");
309c18d2	564	goto fail5;
aa11e38c DA	565	}
	566
	567	/* Set up platform driver data */
	568	platform_set_drvdata(pdev, i2c_imx);
	569
	570	dev_dbg(&i2c_imx->adapter.dev, "claimed irq %d\n", i2c_imx->irq);
	571	dev_dbg(&i2c_imx->adapter.dev, "device resources from 0x%x to 0x%x\n",
	572	i2c_imx->res->start, i2c_imx->res->end);
	573	dev_dbg(&i2c_imx->adapter.dev, "allocated %d bytes at 0x%x \n",
	574	res_size, i2c_imx->res->start);
	575	dev_dbg(&i2c_imx->adapter.dev, "adapter name: \"%s\"\n",
	576	i2c_imx->adapter.name);
	577	dev_dbg(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");
	578
	579	return 0; /* Return OK */
	580
309c18d2	581	fail5:
aa11e38c	582	free_irq(i2c_imx->irq, i2c_imx);
309c18d2	583	fail4:
aa11e38c	584	clk_put(i2c_imx->clk);
309c18d2 DA	585	fail3:
309c18d2 DA	586	release_mem_region(i2c_imx->res->start, resource_size(res));
aa11e38c DA	587	fail2:
	588	kfree(i2c_imx);
	589	fail1:
	590	iounmap(base);
	591	fail0:
	592	if (pdata && pdata->exit)
	593	pdata->exit(&pdev->dev);
	594	return ret; /* Return error number */
	595	}
	596
	597	static int __exit i2c_imx_remove(struct platform_device *pdev)
	598	{
	599	struct imx_i2c_struct *i2c_imx = platform_get_drvdata(pdev);
	600	struct imxi2c_platform_data *pdata = pdev->dev.platform_data;
	601
	602	/* remove adapter */
	603	dev_dbg(&i2c_imx->adapter.dev, "adapter removed\n");
	604	i2c_del_adapter(&i2c_imx->adapter);
	605	platform_set_drvdata(pdev, NULL);
	606
	607	/* free interrupt */
	608	free_irq(i2c_imx->irq, i2c_imx);
	609
	610	/* setup chip registers to defaults */
	611	writeb(0, i2c_imx->base + IMX_I2C_IADR);
	612	writeb(0, i2c_imx->base + IMX_I2C_IFDR);
	613	writeb(0, i2c_imx->base + IMX_I2C_I2CR);
	614	writeb(0, i2c_imx->base + IMX_I2C_I2SR);
	615
	616	/* Shut down hardware */
	617	if (pdata && pdata->exit)
	618	pdata->exit(&pdev->dev);
	619
aa11e38c DA	620	clk_put(i2c_imx->clk);
aa11e38c DA	621
309c18d2	622	release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
aa11e38c DA	623	iounmap(i2c_imx->base);
	624	kfree(i2c_imx);
	625	return 0;
	626	}
	627
	628	static struct platform_driver i2c_imx_driver = {
	629	.probe = i2c_imx_probe,
	630	.remove = __exit_p(i2c_imx_remove),
	631	.driver = {
	632	.name = DRIVER_NAME,
	633	.owner = THIS_MODULE,
	634	}
	635	};
	636
	637	static int __init i2c_adap_imx_init(void)
	638	{
	639	return platform_driver_probe(&i2c_imx_driver, i2c_imx_probe);
	640	}
5d3f3331	641	subsys_initcall(i2c_adap_imx_init);
aa11e38c DA	642
	643	static void __exit i2c_adap_imx_exit(void)
	644	{
	645	platform_driver_unregister(&i2c_imx_driver);
	646	}
aa11e38c DA	647	module_exit(i2c_adap_imx_exit);
	648
	649	MODULE_LICENSE("GPL");
	650	MODULE_AUTHOR("Darius Augulis");
	651	MODULE_DESCRIPTION("I2C adapter driver for IMX I2C bus");
	652	MODULE_ALIAS("platform:" DRIVER_NAME);