[mirror_ubuntu-zesty-kernel.git] / drivers / i2c / busses / i2c-nforce2.c

/*
    SMBus driver for nVidia nForce2 MCP

    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
    Based on
    SMBus 2.0 driver for AMD-8111 IO-Hub
    Copyright (c) 2002 Vojtech Pavlik

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

/*
    SUPPORTED DEVICES		PCI ID
    nForce2 MCP			0064
    nForce2 Ultra 400 MCP	0084
    nForce3 Pro150 MCP		00D4
    nForce3 250Gb MCP		00E4
    nForce4 MCP			0052
    nForce4 MCP-04		0034
    nForce4 MCP51		0264
    nForce4 MCP55		0368
    nForce MCP61		03EB
    nForce MCP65		0446

    This driver supports the 2 SMBuses that are included in the MCP of the
    nForce2/3/4/5xx chipsets.
*/

/* Note: we assume there can only be one nForce2, with two SMBus interfaces */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/delay.h>
#include <linux/dmi.h>
#include <linux/acpi.h>
#include <asm/io.h>

MODULE_LICENSE("GPL");
MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");


struct nforce2_smbus {
	struct i2c_adapter adapter;
	int base;
	int size;
	int blockops;
	int can_abort;
};


/*
 * nVidia nForce2 SMBus control register definitions
 * (Newer incarnations use standard BARs 4 and 5 instead)
 */
#define NFORCE_PCI_SMB1	0x50
#define NFORCE_PCI_SMB2	0x54


/*
 * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
 */
#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */
#define NVIDIA_SMB_BCNT		(smbus->base + 0x24)	/* number of data
							   bytes */
#define NVIDIA_SMB_STATUS_ABRT	(smbus->base + 0x3c)	/* register used to
							   check the status of
							   the abort command */
#define NVIDIA_SMB_CTRL		(smbus->base + 0x3e)	/* control register */

#define NVIDIA_SMB_STATUS_ABRT_STS	0x01		/* Bit to notify that
							   abort succeeded */
#define NVIDIA_SMB_CTRL_ABORT	0x20
#define NVIDIA_SMB_STS_DONE	0x80
#define NVIDIA_SMB_STS_ALRM	0x40
#define NVIDIA_SMB_STS_RES	0x20
#define NVIDIA_SMB_STS_STATUS	0x1f

#define NVIDIA_SMB_PRTCL_WRITE			0x00
#define NVIDIA_SMB_PRTCL_READ			0x01
#define NVIDIA_SMB_PRTCL_QUICK			0x02
#define NVIDIA_SMB_PRTCL_BYTE			0x04
#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
#define NVIDIA_SMB_PRTCL_BLOCK_DATA		0x0a
#define NVIDIA_SMB_PRTCL_PEC			0x80

/* Misc definitions */
#define MAX_TIMEOUT	100

/* We disable the second SMBus channel on these boards */
static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
	{
		.ident = "DFI Lanparty NF4 Expert",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
			DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
		},
	},
	{ }
};

static struct pci_driver nforce2_driver;

/* For multiplexing support, we need a global reference to the 1st
   SMBus channel */
#if defined CONFIG_I2C_NFORCE2_S4985 || defined CONFIG_I2C_NFORCE2_S4985_MODULE
struct i2c_adapter *nforce2_smbus;
EXPORT_SYMBOL_GPL(nforce2_smbus);

static void nforce2_set_reference(struct i2c_adapter *adap)
{
	nforce2_smbus = adap;
}
#else
static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
#endif

static void nforce2_abort(struct i2c_adapter *adap)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	int timeout = 0;
	unsigned char temp;

	dev_dbg(&adap->dev, "Aborting current transaction\n");

	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
	do {
		msleep(1);
		temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
			(timeout++ < MAX_TIMEOUT));
	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
		dev_err(&adap->dev, "Can't reset the smbus\n");
	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
}

static int nforce2_check_status(struct i2c_adapter *adap)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	int timeout = 0;
	unsigned char temp;

	do {
		msleep(1);
		temp = inb_p(NVIDIA_SMB_STS);
	} while ((!temp) && (timeout++ < MAX_TIMEOUT));

	if (timeout >= MAX_TIMEOUT) {
		dev_dbg(&adap->dev, "SMBus Timeout!\n");
		if (smbus->can_abort)
			nforce2_abort(adap);
		return -ETIMEDOUT;
	}
	if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
		dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
		return -EIO;
	}
	return 0;
}

/* Return negative errno on error */
static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
		unsigned short flags, char read_write,
		u8 command, int size, union i2c_smbus_data * data)
{
	struct nforce2_smbus *smbus = adap->algo_data;
	unsigned char protocol, pec;
	u8 len;
	int i, status;

	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
		NVIDIA_SMB_PRTCL_WRITE;
	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;

	switch (size) {

		case I2C_SMBUS_QUICK:
			protocol |= NVIDIA_SMB_PRTCL_QUICK;
			read_write = I2C_SMBUS_WRITE;
			break;

		case I2C_SMBUS_BYTE:
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(command, NVIDIA_SMB_CMD);
			protocol |= NVIDIA_SMB_PRTCL_BYTE;
			break;

		case I2C_SMBUS_BYTE_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE)
				outb_p(data->byte, NVIDIA_SMB_DATA);
			protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
			break;

		case I2C_SMBUS_WORD_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE) {
				 outb_p(data->word, NVIDIA_SMB_DATA);
				 outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
			}
			protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
			break;

		case I2C_SMBUS_BLOCK_DATA:
			outb_p(command, NVIDIA_SMB_CMD);
			if (read_write == I2C_SMBUS_WRITE) {
				len = data->block[0];
				if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
					dev_err(&adap->dev,
						"Transaction failed "
						"(requested block size: %d)\n",
						len);
					return -EINVAL;
				}
				outb_p(len, NVIDIA_SMB_BCNT);
				for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
					outb_p(data->block[i + 1],
					       NVIDIA_SMB_DATA+i);
			}
			protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
			break;

		default:
			dev_err(&adap->dev, "Unsupported transaction %d\n", size);
			return -EOPNOTSUPP;
	}

	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	outb_p(protocol, NVIDIA_SMB_PRTCL);

	status = nforce2_check_status(adap);
	if (status)
		return status;

	if (read_write == I2C_SMBUS_WRITE)
		return 0;

	switch (size) {

		case I2C_SMBUS_BYTE:
		case I2C_SMBUS_BYTE_DATA:
			data->byte = inb_p(NVIDIA_SMB_DATA);
			break;

		case I2C_SMBUS_WORD_DATA:
			data->word = inb_p(NVIDIA_SMB_DATA) | (inb_p(NVIDIA_SMB_DATA+1) << 8);
			break;

		case I2C_SMBUS_BLOCK_DATA:
			len = inb_p(NVIDIA_SMB_BCNT);
			if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
				dev_err(&adap->dev, "Transaction failed "
					"(received block size: 0x%02x)\n",
					len);
				return -EPROTO;
			}
			for (i = 0; i < len; i++)
				data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
			data->block[0] = len;
			break;
	}

	return 0;
}


static u32 nforce2_func(struct i2c_adapter *adapter)
{
	/* other functionality might be possible, but is not tested */
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_PEC |
	       (((struct nforce2_smbus*)adapter->algo_data)->blockops ?
		I2C_FUNC_SMBUS_BLOCK_DATA : 0);
}

static struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= nforce2_access,
	.functionality	= nforce2_func,
};


static struct pci_device_id nforce2_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
	{ 0 }
};

MODULE_DEVICE_TABLE (pci, nforce2_ids);


static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
	int alt_reg, struct nforce2_smbus *smbus, const char *name)
{
	int error;

	smbus->base = pci_resource_start(dev, bar);
	if (smbus->base) {
		smbus->size = pci_resource_len(dev, bar);
	} else {
		/* Older incarnations of the device used non-standard BARs */
		u16 iobase;

		if (pci_read_config_word(dev, alt_reg, &iobase)
		    != PCIBIOS_SUCCESSFUL) {
			dev_err(&dev->dev, "Error reading PCI config for %s\n",
				name);
			return -EIO;
		}

		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
		smbus->size = 64;
	}

	error = acpi_check_region(smbus->base, smbus->size,
				  nforce2_driver.name);
	if (error)
		return -1;

	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
			smbus->base, smbus->base+smbus->size-1, name);
		return -EBUSY;
	}
	smbus->adapter.owner = THIS_MODULE;
	smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
	smbus->adapter.algo = &smbus_algorithm;
	smbus->adapter.algo_data = smbus;
	smbus->adapter.dev.parent = &dev->dev;
	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
		"SMBus nForce2 adapter at %04x", smbus->base);

	error = i2c_add_adapter(&smbus->adapter);
	if (error) {
		dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
		release_region(smbus->base, smbus->size);
		return error;
	}
	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	return 0;
}


static int __devinit nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct nforce2_smbus *smbuses;
	int res1, res2;

	/* we support 2 SMBus adapters */
	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
		return -ENOMEM;
	pci_set_drvdata(dev, smbuses);

	switch(dev->device) {
	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
		smbuses[0].blockops = 1;
		smbuses[1].blockops = 1;
		smbuses[0].can_abort = 1;
		smbuses[1].can_abort = 1;
	}

	/* SMBus adapter 1 */
	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
	if (res1 < 0) {
		dev_err(&dev->dev, "Error probing SMB1.\n");
		smbuses[0].base = 0;	/* to have a check value */
	}
	/* SMBus adapter 2 */
	if (dmi_check_system(nforce2_dmi_blacklist2)) {
		dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
		res2 = -EPERM;
		smbuses[1].base = 0;
	} else {
		res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
					 "SMB2");
		if (res2 < 0) {
			dev_err(&dev->dev, "Error probing SMB2.\n");
			smbuses[1].base = 0;	/* to have a check value */
		}
	}
	if ((res1 < 0) && (res2 < 0)) {
		/* we did not find even one of the SMBuses, so we give up */
		kfree(smbuses);
		return -ENODEV;
	}

	nforce2_set_reference(&smbuses[0].adapter);
	return 0;
}


static void __devexit nforce2_remove(struct pci_dev *dev)
{
	struct nforce2_smbus *smbuses = (void*) pci_get_drvdata(dev);

	nforce2_set_reference(NULL);
	if (smbuses[0].base) {
		i2c_del_adapter(&smbuses[0].adapter);
		release_region(smbuses[0].base, smbuses[0].size);
	}
	if (smbuses[1].base) {
		i2c_del_adapter(&smbuses[1].adapter);
		release_region(smbuses[1].base, smbuses[1].size);
	}
	kfree(smbuses);
}

static struct pci_driver nforce2_driver = {
	.name		= "nForce2_smbus",
	.id_table	= nforce2_ids,
	.probe		= nforce2_probe,
	.remove		= __devexit_p(nforce2_remove),
};

static int __init nforce2_init(void)
{
	return pci_register_driver(&nforce2_driver);
}

static void __exit nforce2_exit(void)
{
	pci_unregister_driver(&nforce2_driver);
}

module_init(nforce2_init);
module_exit(nforce2_exit);
Commit	Line	Data
1da177e4 LT	1	/*
	2	SMBus driver for nVidia nForce2 MCP
	3
	4	Added nForce3 Pro 150 Thomas Leibold <thomas@plx.com>,
	5	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
	6	Copyright (c) 2003 Hans-Frieder Vogt <hfvogt@arcor.de>,
	7	Based on
	8	SMBus 2.0 driver for AMD-8111 IO-Hub
	9	Copyright (c) 2002 Vojtech Pavlik
	10
	11	This program is free software; you can redistribute it and/or modify
	12	it under the terms of the GNU General Public License as published by
	13	the Free Software Foundation; either version 2 of the License, or
	14	(at your option) any later version.
	15
	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	GNU General Public License for more details.
	20
	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	24	*/
	25
	26	/*
	27	SUPPORTED DEVICES PCI ID
	28	nForce2 MCP 0064
	29	nForce2 Ultra 400 MCP 0084
	30	nForce3 Pro150 MCP 00D4
	31	nForce3 250Gb MCP 00E4
	32	nForce4 MCP 0052
7c72ccf0	33	nForce4 MCP-04 0034
5c7ae658 JD	34	nForce4 MCP51 0264
5c7ae658 JD	35	nForce4 MCP55 0368
f75803de JD	36	nForce MCP61 03EB
f75803de JD	37	nForce MCP65 0446
1da177e4 LT	38
1da177e4 LT	39	This driver supports the 2 SMBuses that are included in the MCP of the
ad04d5c3	40	nForce2/3/4/5xx chipsets.
1da177e4 LT	41	*/
	42
	43	/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
	44
1da177e4 LT	45	#include <linux/module.h>
	46	#include <linux/pci.h>
	47	#include <linux/kernel.h>
	48	#include <linux/stddef.h>
1da177e4 LT	49	#include <linux/ioport.h>
	50	#include <linux/init.h>
	51	#include <linux/i2c.h>
	52	#include <linux/delay.h>
08851d6e	53	#include <linux/dmi.h>
54fb4a05	54	#include <linux/acpi.h>
1da177e4 LT	55	#include <asm/io.h>
	56
	57	MODULE_LICENSE("GPL");
ad04d5c3 HFV	58	MODULE_AUTHOR ("Hans-Frieder Vogt <hfvogt@gmx.net>");
ad04d5c3 HFV	59	MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
1da177e4 LT	60
	61
	62	struct nforce2_smbus {
1da177e4 LT	63	struct i2c_adapter adapter;
	64	int base;
	65	int size;
b53c8221	66	int blockops;
d49584c4	67	int can_abort;
1da177e4 LT	68	};
	69
	70
	71	/*
	72	* nVidia nForce2 SMBus control register definitions
5c7ae658	73	* (Newer incarnations use standard BARs 4 and 5 instead)
1da177e4 LT	74	*/
	75	#define NFORCE_PCI_SMB1 0x50
	76	#define NFORCE_PCI_SMB2 0x54
	77
	78
	79	/*
	80	* ACPI 2.0 chapter 13 SMBus 2.0 EC register model
	81	*/
	82	#define NVIDIA_SMB_PRTCL (smbus->base + 0x00) /* protocol, PEC */
	83	#define NVIDIA_SMB_STS (smbus->base + 0x01) /* status */
	84	#define NVIDIA_SMB_ADDR (smbus->base + 0x02) /* address */
	85	#define NVIDIA_SMB_CMD (smbus->base + 0x03) /* command */
	86	#define NVIDIA_SMB_DATA (smbus->base + 0x04) /* 32 data registers */
b53c8221 OR	87	#define NVIDIA_SMB_BCNT (smbus->base + 0x24) /* number of data
b53c8221 OR	88	bytes */
d49584c4 OR	89	#define NVIDIA_SMB_STATUS_ABRT (smbus->base + 0x3c) /* register used to
	90	check the status of
	91	the abort command */
	92	#define NVIDIA_SMB_CTRL (smbus->base + 0x3e) /* control register */
	93
	94	#define NVIDIA_SMB_STATUS_ABRT_STS 0x01 /* Bit to notify that
	95	abort succeeded */
	96	#define NVIDIA_SMB_CTRL_ABORT 0x20
1da177e4 LT	97	#define NVIDIA_SMB_STS_DONE 0x80
	98	#define NVIDIA_SMB_STS_ALRM 0x40
	99	#define NVIDIA_SMB_STS_RES 0x20
	100	#define NVIDIA_SMB_STS_STATUS 0x1f
	101
	102	#define NVIDIA_SMB_PRTCL_WRITE 0x00
	103	#define NVIDIA_SMB_PRTCL_READ 0x01
	104	#define NVIDIA_SMB_PRTCL_QUICK 0x02
	105	#define NVIDIA_SMB_PRTCL_BYTE 0x04
	106	#define NVIDIA_SMB_PRTCL_BYTE_DATA 0x06
	107	#define NVIDIA_SMB_PRTCL_WORD_DATA 0x08
b53c8221	108	#define NVIDIA_SMB_PRTCL_BLOCK_DATA 0x0a
1da177e4 LT	109	#define NVIDIA_SMB_PRTCL_PEC 0x80
1da177e4 LT	110
41535497 OR	111	/* Misc definitions */
	112	#define MAX_TIMEOUT 100
	113
08851d6e JD	114	/* We disable the second SMBus channel on these boards */
	115	static struct dmi_system_id __devinitdata nforce2_dmi_blacklist2[] = {
	116	{
	117	.ident = "DFI Lanparty NF4 Expert",
	118	.matches = {
	119	DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
	120	DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
	121	},
	122	},
	123	{ }
	124	};
	125
d6072f84	126	static struct pci_driver nforce2_driver;
1da177e4	127
279e9024 JD	128	/* For multiplexing support, we need a global reference to the 1st
	129	SMBus channel */
	130	#if defined CONFIG_I2C_NFORCE2_S4985 \|\| defined CONFIG_I2C_NFORCE2_S4985_MODULE
	131	struct i2c_adapter *nforce2_smbus;
	132	EXPORT_SYMBOL_GPL(nforce2_smbus);
	133
	134	static void nforce2_set_reference(struct i2c_adapter *adap)
	135	{
	136	nforce2_smbus = adap;
	137	}
	138	#else
	139	static inline void nforce2_set_reference(struct i2c_adapter *adap) { }
	140	#endif
	141
d49584c4 OR	142	static void nforce2_abort(struct i2c_adapter *adap)
	143	{
	144	struct nforce2_smbus *smbus = adap->algo_data;
	145	int timeout = 0;
	146	unsigned char temp;
	147
	148	dev_dbg(&adap->dev, "Aborting current transaction\n");
	149
	150	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
	151	do {
	152	msleep(1);
	153	temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
	154	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
	155	(timeout++ < MAX_TIMEOUT));
	156	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
	157	dev_err(&adap->dev, "Can't reset the smbus\n");
	158	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
	159	}
	160
41535497 OR	161	static int nforce2_check_status(struct i2c_adapter *adap)
	162	{
	163	struct nforce2_smbus *smbus = adap->algo_data;
	164	int timeout = 0;
	165	unsigned char temp;
	166
	167	do {
	168	msleep(1);
	169	temp = inb_p(NVIDIA_SMB_STS);
	170	} while ((!temp) && (timeout++ < MAX_TIMEOUT));
	171
	172	if (timeout >= MAX_TIMEOUT) {
	173	dev_dbg(&adap->dev, "SMBus Timeout!\n");
d49584c4 OR	174	if (smbus->can_abort)
d49584c4 OR	175	nforce2_abort(adap);
97140342	176	return -ETIMEDOUT;
41535497 OR	177	}
	178	if (!(temp & NVIDIA_SMB_STS_DONE) \|\| (temp & NVIDIA_SMB_STS_STATUS)) {
	179	dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
97140342	180	return -EIO;
41535497 OR	181	}
	182	return 0;
	183	}
	184
97140342	185	/* Return negative errno on error */
1da177e4 LT	186	static s32 nforce2_access(struct i2c_adapter * adap, u16 addr,
	187	unsigned short flags, char read_write,
	188	u8 command, int size, union i2c_smbus_data * data)
	189	{
	190	struct nforce2_smbus *smbus = adap->algo_data;
41535497	191	unsigned char protocol, pec;
b53c8221	192	u8 len;
97140342	193	int i, status;
1da177e4 LT	194
	195	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
	196	NVIDIA_SMB_PRTCL_WRITE;
	197	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
	198
	199	switch (size) {
	200
	201	case I2C_SMBUS_QUICK:
	202	protocol \|= NVIDIA_SMB_PRTCL_QUICK;
	203	read_write = I2C_SMBUS_WRITE;
	204	break;
	205
	206	case I2C_SMBUS_BYTE:
	207	if (read_write == I2C_SMBUS_WRITE)
	208	outb_p(command, NVIDIA_SMB_CMD);
	209	protocol \|= NVIDIA_SMB_PRTCL_BYTE;
	210	break;
	211
	212	case I2C_SMBUS_BYTE_DATA:
	213	outb_p(command, NVIDIA_SMB_CMD);
	214	if (read_write == I2C_SMBUS_WRITE)
	215	outb_p(data->byte, NVIDIA_SMB_DATA);
	216	protocol \|= NVIDIA_SMB_PRTCL_BYTE_DATA;
	217	break;
	218
	219	case I2C_SMBUS_WORD_DATA:
	220	outb_p(command, NVIDIA_SMB_CMD);
	221	if (read_write == I2C_SMBUS_WRITE) {
	222	outb_p(data->word, NVIDIA_SMB_DATA);
	223	outb_p(data->word >> 8, NVIDIA_SMB_DATA+1);
	224	}
	225	protocol \|= NVIDIA_SMB_PRTCL_WORD_DATA \| pec;
	226	break;
	227
b53c8221 OR	228	case I2C_SMBUS_BLOCK_DATA:
	229	outb_p(command, NVIDIA_SMB_CMD);
	230	if (read_write == I2C_SMBUS_WRITE) {
	231	len = data->block[0];
	232	if ((len == 0) \|\| (len > I2C_SMBUS_BLOCK_MAX)) {
	233	dev_err(&adap->dev,
	234	"Transaction failed "
	235	"(requested block size: %d)\n",
	236	len);
97140342	237	return -EINVAL;
b53c8221 OR	238	}
	239	outb_p(len, NVIDIA_SMB_BCNT);
	240	for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
	241	outb_p(data->block[i + 1],
	242	NVIDIA_SMB_DATA+i);
	243	}
	244	protocol \|= NVIDIA_SMB_PRTCL_BLOCK_DATA \| pec;
	245	break;
	246
1da177e4 LT	247	default:
1da177e4 LT	248	dev_err(&adap->dev, "Unsupported transaction %d\n", size);
97140342	249	return -EOPNOTSUPP;
1da177e4 LT	250	}
	251
	252	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
	253	outb_p(protocol, NVIDIA_SMB_PRTCL);
	254
97140342 DB	255	status = nforce2_check_status(adap);
	256	if (status)
	257	return status;
1da177e4 LT	258
	259	if (read_write == I2C_SMBUS_WRITE)
	260	return 0;
	261
	262	switch (size) {
	263
	264	case I2C_SMBUS_BYTE:
	265	case I2C_SMBUS_BYTE_DATA:
	266	data->byte = inb_p(NVIDIA_SMB_DATA);
	267	break;
	268
	269	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	270	data->word = inb_p(NVIDIA_SMB_DATA) \| (inb_p(NVIDIA_SMB_DATA+1) << 8);
1da177e4 LT	271	break;
b53c8221 OR	272
	273	case I2C_SMBUS_BLOCK_DATA:
	274	len = inb_p(NVIDIA_SMB_BCNT);
41535497 OR	275	if ((len <= 0) \|\| (len > I2C_SMBUS_BLOCK_MAX)) {
	276	dev_err(&adap->dev, "Transaction failed "
	277	"(received block size: 0x%02x)\n",
	278	len);
97140342	279	return -EPROTO;
41535497	280	}
b53c8221 OR	281	for (i = 0; i < len; i++)
	282	data->block[i+1] = inb_p(NVIDIA_SMB_DATA + i);
	283	data->block[0] = len;
	284	break;
1da177e4 LT	285	}
	286
	287	return 0;
	288	}
	289
	290
	291	static u32 nforce2_func(struct i2c_adapter *adapter)
	292	{
	293	/* other functionality might be possible, but is not tested */
	294	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
b53c8221	295	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
ac3f5753	296	I2C_FUNC_SMBUS_PEC \|
b53c8221 OR	297	(((struct nforce2_smbus*)adapter->algo_data)->blockops ?
b53c8221 OR	298	I2C_FUNC_SMBUS_BLOCK_DATA : 0);
1da177e4 LT	299	}
1da177e4 LT	300
ad04d5c3 HFV	301	static struct i2c_algorithm smbus_algorithm = {
	302	.smbus_xfer = nforce2_access,
	303	.functionality = nforce2_func,
	304	};
	305
1da177e4 LT	306
	307	static struct pci_device_id nforce2_ids[] = {
	308	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
	309	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
	310	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
	311	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
	312	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
7c72ccf0	313	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
5c7ae658 JD	314	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
5c7ae658 JD	315	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
f75803de JD	316	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
f75803de JD	317	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
1da177e4 LT	318	{ 0 }
	319	};
	320
1da177e4 LT	321	MODULE_DEVICE_TABLE (pci, nforce2_ids);
	322
	323
5c7ae658 JD	324	static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar,
5c7ae658 JD	325	int alt_reg, struct nforce2_smbus smbus, const char name)
1da177e4	326	{
1da177e4 LT	327	int error;
1da177e4 LT	328
5c7ae658 JD	329	smbus->base = pci_resource_start(dev, bar);
	330	if (smbus->base) {
	331	smbus->size = pci_resource_len(dev, bar);
	332	} else {
	333	/* Older incarnations of the device used non-standard BARs */
	334	u16 iobase;
	335
	336	if (pci_read_config_word(dev, alt_reg, &iobase)
	337	!= PCIBIOS_SUCCESSFUL) {
	338	dev_err(&dev->dev, "Error reading PCI config for %s\n",
	339	name);
97140342	340	return -EIO;
5c7ae658 JD	341	}
	342
	343	smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
ad04d5c3	344	smbus->size = 64;
1da177e4	345	}
1da177e4	346
54fb4a05 JD	347	error = acpi_check_region(smbus->base, smbus->size,
	348	nforce2_driver.name);
	349	if (error)
	350	return -1;
	351
d6072f84	352	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
1da177e4 LT	353	dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
1da177e4 LT	354	smbus->base, smbus->base+smbus->size-1, name);
97140342	355	return -EBUSY;
1da177e4	356	}
ad04d5c3	357	smbus->adapter.owner = THIS_MODULE;
3401b2ff	358	smbus->adapter.class = I2C_CLASS_HWMON \| I2C_CLASS_SPD;
ad04d5c3	359	smbus->adapter.algo = &smbus_algorithm;
1da177e4 LT	360	smbus->adapter.algo_data = smbus;
1da177e4 LT	361	smbus->adapter.dev.parent = &dev->dev;
2096b956	362	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
1da177e4 LT	363	"SMBus nForce2 adapter at %04x", smbus->base);
	364
	365	error = i2c_add_adapter(&smbus->adapter);
	366	if (error) {
	367	dev_err(&smbus->adapter.dev, "Failed to register adapter.\n");
	368	release_region(smbus->base, smbus->size);
97140342	369	return error;
1da177e4 LT	370	}
	371	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n", smbus->base);
	372	return 0;
	373	}
	374
	375
	376	static int __devinit nforce2_probe(struct pci_dev dev, const struct pci_device_id id)
	377	{
	378	struct nforce2_smbus *smbuses;
	379	int res1, res2;
	380
	381	/* we support 2 SMBus adapters */
078d9fe4	382	if (!(smbuses = kzalloc(2*sizeof(struct nforce2_smbus), GFP_KERNEL)))
1da177e4	383	return -ENOMEM;
1da177e4 LT	384	pci_set_drvdata(dev, smbuses);
1da177e4 LT	385
b53c8221	386	switch(dev->device) {
541b6a7a	387	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
b53c8221 OR	388	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
	389	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
	390	smbuses[0].blockops = 1;
	391	smbuses[1].blockops = 1;
d49584c4 OR	392	smbuses[0].can_abort = 1;
d49584c4 OR	393	smbuses[1].can_abort = 1;
b53c8221 OR	394	}
b53c8221 OR	395
1da177e4	396	/* SMBus adapter 1 */
5c7ae658	397	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
1da177e4 LT	398	if (res1 < 0) {
	399	dev_err(&dev->dev, "Error probing SMB1.\n");
	400	smbuses[0].base = 0; /* to have a check value */
	401	}
5c7ae658	402	/* SMBus adapter 2 */
08851d6e JD	403	if (dmi_check_system(nforce2_dmi_blacklist2)) {
	404	dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
	405	res2 = -EPERM;
	406	smbuses[1].base = 0;
	407	} else {
	408	res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
	409	"SMB2");
	410	if (res2 < 0) {
	411	dev_err(&dev->dev, "Error probing SMB2.\n");
	412	smbuses[1].base = 0; /* to have a check value */
	413	}
1da177e4 LT	414	}
	415	if ((res1 < 0) && (res2 < 0)) {
	416	/* we did not find even one of the SMBuses, so we give up */
	417	kfree(smbuses);
	418	return -ENODEV;
	419	}
	420
279e9024	421	nforce2_set_reference(&smbuses[0].adapter);
1da177e4 LT	422	return 0;
	423	}
	424
	425
	426	static void __devexit nforce2_remove(struct pci_dev *dev)
	427	{
	428	struct nforce2_smbus smbuses = (void) pci_get_drvdata(dev);
	429
279e9024	430	nforce2_set_reference(NULL);
1da177e4 LT	431	if (smbuses[0].base) {
	432	i2c_del_adapter(&smbuses[0].adapter);
	433	release_region(smbuses[0].base, smbuses[0].size);
	434	}
	435	if (smbuses[1].base) {
	436	i2c_del_adapter(&smbuses[1].adapter);
	437	release_region(smbuses[1].base, smbuses[1].size);
	438	}
	439	kfree(smbuses);
	440	}
	441
	442	static struct pci_driver nforce2_driver = {
	443	.name = "nForce2_smbus",
	444	.id_table = nforce2_ids,
	445	.probe = nforce2_probe,
	446	.remove = __devexit_p(nforce2_remove),
	447	};
	448
	449	static int __init nforce2_init(void)
	450	{
	451	return pci_register_driver(&nforce2_driver);
	452	}
	453
	454	static void __exit nforce2_exit(void)
	455	{
	456	pci_unregister_driver(&nforce2_driver);
	457	}
	458
	459	module_init(nforce2_init);
	460	module_exit(nforce2_exit);
	461