[mirror_ubuntu-zesty-kernel.git] / drivers / i2c / busses / i2c-powermac.c

/*
    i2c Support for Apple SMU Controller

    Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
                       <benh@kernel.crashing.org>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/i2c.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <asm/prom.h>
#include <asm/pmac_low_i2c.h>

MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
MODULE_LICENSE("GPL");

/*
 * SMBUS-type transfer entrypoint
 */
static s32 i2c_powermac_smbus_xfer(	struct i2c_adapter*	adap,
					u16			addr,
					unsigned short		flags,
					char			read_write,
					u8			command,
					int			size,
					union i2c_smbus_data*	data)
{
	struct pmac_i2c_bus	*bus = i2c_get_adapdata(adap);
	int			rc = 0;
	int			read = (read_write == I2C_SMBUS_READ);
	int			addrdir = (addr << 1) | read;
	int			mode, subsize, len;
	u32			subaddr;
	u8			*buf;
	u8			local[2];

	if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE) {
		mode = pmac_i2c_mode_std;
		subsize = 0;
		subaddr = 0;
	} else {
		mode = read ? pmac_i2c_mode_combined : pmac_i2c_mode_stdsub;
		subsize = 1;
		subaddr = command;
	}

	switch (size) {
        case I2C_SMBUS_QUICK:
		buf = NULL;
		len = 0;
	    	break;
        case I2C_SMBUS_BYTE:
        case I2C_SMBUS_BYTE_DATA:
		buf = &data->byte;
		len = 1;
	    	break;
        case I2C_SMBUS_WORD_DATA:
		if (!read) {
			local[0] = data->word & 0xff;
			local[1] = (data->word >> 8) & 0xff;
		}
		buf = local;
		len = 2;
	    	break;

	/* Note that these are broken vs. the expected smbus API where
	 * on reads, the length is actually returned from the function,
	 * but I think the current API makes no sense and I don't want
	 * any driver that I haven't verified for correctness to go
	 * anywhere near a pmac i2c bus anyway ...
	 *
	 * I'm also not completely sure what kind of phases to do between
	 * the actual command and the data (what I am _supposed_ to do that
	 * is). For now, I assume writes are a single stream and reads have
	 * a repeat start/addr phase (but not stop in between)
	 */
        case I2C_SMBUS_BLOCK_DATA:
		buf = data->block;
		len = data->block[0] + 1;
		break;
	case I2C_SMBUS_I2C_BLOCK_DATA:
		buf = &data->block[1];
		len = data->block[0];
		break;

        default:
		return -EINVAL;
	}

	rc = pmac_i2c_open(bus, 0);
	if (rc) {
		dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
		return rc;
	}

	rc = pmac_i2c_setmode(bus, mode);
	if (rc) {
		dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
			mode, rc);
		goto bail;
	}

	rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
	if (rc) {
		if (rc == -ENXIO)
			dev_dbg(&adap->dev,
				"I2C transfer at 0x%02x failed, size %d, "
				"err %d\n", addrdir >> 1, size, rc);
		else
			dev_err(&adap->dev,
				"I2C transfer at 0x%02x failed, size %d, "
				"err %d\n", addrdir >> 1, size, rc);
		goto bail;
	}

	if (size == I2C_SMBUS_WORD_DATA && read) {
		data->word = ((u16)local[1]) << 8;
		data->word |= local[0];
	}

 bail:
	pmac_i2c_close(bus);
	return rc;
}

/*
 * Generic i2c master transfer entrypoint. This driver only support single
 * messages (for "lame i2c" transfers). Anything else should use the smbus
 * entry point
 */
static int i2c_powermac_master_xfer(	struct i2c_adapter *adap,
					struct i2c_msg *msgs,
					int num)
{
	struct pmac_i2c_bus	*bus = i2c_get_adapdata(adap);
	int			rc = 0;
	int			read;
	int			addrdir;

	if (num != 1) {
		dev_err(&adap->dev,
			"Multi-message I2C transactions not supported\n");
		return -EOPNOTSUPP;
	}

	if (msgs->flags & I2C_M_TEN)
		return -EINVAL;
	read = (msgs->flags & I2C_M_RD) != 0;
	addrdir = (msgs->addr << 1) | read;

	rc = pmac_i2c_open(bus, 0);
	if (rc) {
		dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
		return rc;
	}
	rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
	if (rc) {
		dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
			pmac_i2c_mode_std, rc);
		goto bail;
	}
	rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
	if (rc < 0) {
		if (rc == -ENXIO)
			dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
				addrdir & 1 ? "read from" : "write to",
				addrdir >> 1, rc);
		else
			dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
				addrdir & 1 ? "read from" : "write to",
				addrdir >> 1, rc);
	}
 bail:
	pmac_i2c_close(bus);
	return rc < 0 ? rc : 1;
}

static u32 i2c_powermac_func(struct i2c_adapter * adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
		I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
		I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C;
}

/* For now, we only handle smbus */
static const struct i2c_algorithm i2c_powermac_algorithm = {
	.smbus_xfer	= i2c_powermac_smbus_xfer,
	.master_xfer	= i2c_powermac_master_xfer,
	.functionality	= i2c_powermac_func,
};


static int __devexit i2c_powermac_remove(struct platform_device *dev)
{
	struct i2c_adapter	*adapter = platform_get_drvdata(dev);
	int			rc;

	rc = i2c_del_adapter(adapter);
	/* We aren't that prepared to deal with this... */
	if (rc)
		printk(KERN_WARNING
		       "i2c-powermac.c: Failed to remove bus %s !\n",
		       adapter->name);
	platform_set_drvdata(dev, NULL);
	memset(adapter, 0, sizeof(*adapter));

	return 0;
}


static int __devinit i2c_powermac_probe(struct platform_device *dev)
{
	struct pmac_i2c_bus *bus = dev->dev.platform_data;
	struct device_node *parent = NULL;
	struct i2c_adapter *adapter;
	const char *basename;
	int rc;

	if (bus == NULL)
		return -EINVAL;
	adapter = pmac_i2c_get_adapter(bus);

	/* Ok, now we need to make up a name for the interface that will
	 * match what we used to do in the past, that is basically the
	 * controller's parent device node for keywest. PMU didn't have a
	 * naming convention and SMU has a different one
	 */
	switch(pmac_i2c_get_type(bus)) {
	case pmac_i2c_bus_keywest:
		parent = of_get_parent(pmac_i2c_get_controller(bus));
		if (parent == NULL)
			return -EINVAL;
		basename = parent->name;
		break;
	case pmac_i2c_bus_pmu:
		basename = "pmu";
		break;
	case pmac_i2c_bus_smu:
		/* This is not what we used to do but I'm fixing drivers at
		 * the same time as this change
		 */
		basename = "smu";
		break;
	default:
		return -EINVAL;
	}
	snprintf(adapter->name, sizeof(adapter->name), "%s %d", basename,
		 pmac_i2c_get_channel(bus));
	of_node_put(parent);

	platform_set_drvdata(dev, adapter);
	adapter->algo = &i2c_powermac_algorithm;
	i2c_set_adapdata(adapter, bus);
	adapter->dev.parent = &dev->dev;
	rc = i2c_add_adapter(adapter);
	if (rc) {
		printk(KERN_ERR "i2c-powermac: Adapter %s registration "
		       "failed\n", adapter->name);
		memset(adapter, 0, sizeof(*adapter));
	}

	printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);

	if (!strncmp(basename, "uni-n", 5)) {
		struct device_node *np;
		const u32 *prop;
		struct i2c_board_info info;

		/* Instantiate I2C motion sensor if present */
		np = of_find_node_by_name(NULL, "accelerometer");
		if (np && of_device_is_compatible(np, "AAPL,accelerometer_1") &&
		    (prop = of_get_property(np, "reg", NULL))) {
			int i2c_bus;
			const char *tmp_bus;

			/* look for bus either using "reg" or by path */
			tmp_bus = strstr(np->full_name, "/i2c-bus@");
			if (tmp_bus)
				i2c_bus = *(tmp_bus + 9) - '0';
			else
				i2c_bus = ((*prop) >> 8) & 0x0f;

			if (pmac_i2c_get_channel(bus) == i2c_bus) {
				memset(&info, 0, sizeof(struct i2c_board_info));
				info.addr = ((*prop) & 0xff) >> 1;
				strlcpy(info.type, "ams", I2C_NAME_SIZE);
				i2c_new_device(adapter, &info);
			}
		}
	}

	return rc;
}


/* work with hotplug and coldplug */
MODULE_ALIAS("platform:i2c-powermac");

static struct platform_driver i2c_powermac_driver = {
	.probe = i2c_powermac_probe,
	.remove = __devexit_p(i2c_powermac_remove),
	.driver = {
		.name = "i2c-powermac",
		.bus = &platform_bus_type,
	},
};

static int __init i2c_powermac_init(void)
{
	platform_driver_register(&i2c_powermac_driver);
	return 0;
}


static void __exit i2c_powermac_cleanup(void)
{
	platform_driver_unregister(&i2c_powermac_driver);
}

module_init(i2c_powermac_init);
module_exit(i2c_powermac_cleanup);
Commit	Line	Data
a28d3af2 BH	1	/*
	2	i2c Support for Apple SMU Controller
	3
	4	Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp.
	5	<benh@kernel.crashing.org>
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2 of the License, or
	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
	18	along with this program; if not, write to the Free Software
	19	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	20
	21	*/
	22
a28d3af2 BH	23	#include <linux/module.h>
	24	#include <linux/kernel.h>
	25	#include <linux/types.h>
	26	#include <linux/i2c.h>
	27	#include <linux/init.h>
a28d3af2 BH	28	#include <linux/device.h>
	29	#include <linux/platform_device.h>
	30	#include <asm/prom.h>
	31	#include <asm/pmac_low_i2c.h>
	32
	33	MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
	34	MODULE_DESCRIPTION("I2C driver for Apple PowerMac");
	35	MODULE_LICENSE("GPL");
	36
	37	/*
	38	* SMBUS-type transfer entrypoint
	39	*/
	40	static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap,
	41	u16 addr,
	42	unsigned short flags,
	43	char read_write,
	44	u8 command,
	45	int size,
	46	union i2c_smbus_data* data)
	47	{
	48	struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
	49	int rc = 0;
	50	int read = (read_write == I2C_SMBUS_READ);
	51	int addrdir = (addr << 1) \| read;
02864d58 JD	52	int mode, subsize, len;
	53	u32 subaddr;
	54	u8 *buf;
a28d3af2 BH	55	u8 local[2];
a28d3af2 BH	56
02864d58 JD	57	if (size == I2C_SMBUS_QUICK \|\| size == I2C_SMBUS_BYTE) {
	58	mode = pmac_i2c_mode_std;
	59	subsize = 0;
	60	subaddr = 0;
	61	} else {
	62	mode = read ? pmac_i2c_mode_combined : pmac_i2c_mode_stdsub;
	63	subsize = 1;
	64	subaddr = command;
	65	}
a28d3af2 BH	66
	67	switch (size) {
	68	case I2C_SMBUS_QUICK:
02864d58 JD	69	buf = NULL;
02864d58 JD	70	len = 0;
a28d3af2 BH	71	break;
a28d3af2 BH	72	case I2C_SMBUS_BYTE:
a28d3af2	73	case I2C_SMBUS_BYTE_DATA:
02864d58 JD	74	buf = &data->byte;
02864d58 JD	75	len = 1;
a28d3af2 BH	76	break;
a28d3af2 BH	77	case I2C_SMBUS_WORD_DATA:
a28d3af2 BH	78	if (!read) {
	79	local[0] = data->word & 0xff;
	80	local[1] = (data->word >> 8) & 0xff;
	81	}
02864d58 JD	82	buf = local;
02864d58 JD	83	len = 2;
a28d3af2 BH	84	break;
	85
	86	/* Note that these are broken vs. the expected smbus API where
96acafe0	87	* on reads, the length is actually returned from the function,
a28d3af2 BH	88	* but I think the current API makes no sense and I don't want
	89	* any driver that I haven't verified for correctness to go
	90	* anywhere near a pmac i2c bus anyway ...
	91	*
	92	* I'm also not completely sure what kind of phases to do between
	93	* the actual command and the data (what I am _supposed_ to do that
	94	* is). For now, I assume writes are a single stream and reads have
	95	* a repeat start/addr phase (but not stop in between)
	96	*/
	97	case I2C_SMBUS_BLOCK_DATA:
02864d58 JD	98	buf = data->block;
02864d58 JD	99	len = data->block[0] + 1;
a28d3af2 BH	100	break;
a28d3af2 BH	101	case I2C_SMBUS_I2C_BLOCK_DATA:
02864d58 JD	102	buf = &data->block[1];
02864d58 JD	103	len = data->block[0];
a28d3af2 BH	104	break;
	105
	106	default:
02864d58	107	return -EINVAL;
a28d3af2	108	}
02864d58 JD	109
02864d58 JD	110	rc = pmac_i2c_open(bus, 0);
d7d838a6 JD	111	if (rc) {
d7d838a6 JD	112	dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
02864d58	113	return rc;
d7d838a6	114	}
02864d58 JD	115
02864d58 JD	116	rc = pmac_i2c_setmode(bus, mode);
d7d838a6 JD	117	if (rc) {
	118	dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
	119	mode, rc);
02864d58	120	goto bail;
d7d838a6	121	}
02864d58 JD	122
02864d58 JD	123	rc = pmac_i2c_xfer(bus, addrdir, subsize, subaddr, buf, len);
d7d838a6	124	if (rc) {
8e4b980c JD	125	if (rc == -ENXIO)
	126	dev_dbg(&adap->dev,
	127	"I2C transfer at 0x%02x failed, size %d, "
	128	"err %d\n", addrdir >> 1, size, rc);
	129	else
	130	dev_err(&adap->dev,
	131	"I2C transfer at 0x%02x failed, size %d, "
	132	"err %d\n", addrdir >> 1, size, rc);
02864d58	133	goto bail;
d7d838a6	134	}
02864d58 JD	135
	136	if (size == I2C_SMBUS_WORD_DATA && read) {
	137	data->word = ((u16)local[1]) << 8;
	138	data->word \|= local[0];
	139	}
	140
a28d3af2 BH	141	bail:
	142	pmac_i2c_close(bus);
	143	return rc;
	144	}
	145
	146	/*
	147	* Generic i2c master transfer entrypoint. This driver only support single
	148	* messages (for "lame i2c" transfers). Anything else should use the smbus
	149	* entry point
	150	*/
	151	static int i2c_powermac_master_xfer( struct i2c_adapter *adap,
	152	struct i2c_msg *msgs,
	153	int num)
	154	{
	155	struct pmac_i2c_bus *bus = i2c_get_adapdata(adap);
	156	int rc = 0;
	157	int read;
	158	int addrdir;
	159
6f7e549f JD	160	if (num != 1) {
	161	dev_err(&adap->dev,
	162	"Multi-message I2C transactions not supported\n");
	163	return -EOPNOTSUPP;
	164	}
	165
a28d3af2 BH	166	if (msgs->flags & I2C_M_TEN)
	167	return -EINVAL;
	168	read = (msgs->flags & I2C_M_RD) != 0;
	169	addrdir = (msgs->addr << 1) \| read;
a28d3af2 BH	170
a28d3af2 BH	171	rc = pmac_i2c_open(bus, 0);
d7d838a6 JD	172	if (rc) {
d7d838a6 JD	173	dev_err(&adap->dev, "Failed to open I2C, err %d\n", rc);
a28d3af2	174	return rc;
d7d838a6	175	}
a28d3af2	176	rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std);
d7d838a6 JD	177	if (rc) {
	178	dev_err(&adap->dev, "Failed to set I2C mode %d, err %d\n",
	179	pmac_i2c_mode_std, rc);
a28d3af2	180	goto bail;
d7d838a6	181	}
a28d3af2	182	rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len);
8e4b980c JD	183	if (rc < 0) {
	184	if (rc == -ENXIO)
	185	dev_dbg(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
	186	addrdir & 1 ? "read from" : "write to",
	187	addrdir >> 1, rc);
	188	else
	189	dev_err(&adap->dev, "I2C %s 0x%02x failed, err %d\n",
	190	addrdir & 1 ? "read from" : "write to",
	191	addrdir >> 1, rc);
	192	}
a28d3af2 BH	193	bail:
a28d3af2 BH	194	pmac_i2c_close(bus);
8ced8eee	195	return rc < 0 ? rc : 1;
a28d3af2 BH	196	}
	197
	198	static u32 i2c_powermac_func(struct i2c_adapter * adapter)
	199	{
	200	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	201	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	202	I2C_FUNC_SMBUS_BLOCK_DATA \| I2C_FUNC_I2C;
	203	}
	204
	205	/* For now, we only handle smbus */
8f9082c5	206	static const struct i2c_algorithm i2c_powermac_algorithm = {
a28d3af2 BH	207	.smbus_xfer = i2c_powermac_smbus_xfer,
	208	.master_xfer = i2c_powermac_master_xfer,
	209	.functionality = i2c_powermac_func,
	210	};
	211
	212
4ebb52d3	213	static int __devexit i2c_powermac_remove(struct platform_device *dev)
a28d3af2	214	{
9f2545c1	215	struct i2c_adapter *adapter = platform_get_drvdata(dev);
a28d3af2 BH	216	int rc;
	217
	218	rc = i2c_del_adapter(adapter);
a28d3af2 BH	219	/* We aren't that prepared to deal with this... */
a28d3af2 BH	220	if (rc)
154d22b0 FS	221	printk(KERN_WARNING
154d22b0 FS	222	"i2c-powermac.c: Failed to remove bus %s !\n",
a28d3af2	223	adapter->name);
9f2545c1	224	platform_set_drvdata(dev, NULL);
6dfa5ca3	225	memset(adapter, 0, sizeof(*adapter));
a28d3af2 BH	226
	227	return 0;
	228	}
	229
	230
4ebb52d3	231	static int __devinit i2c_powermac_probe(struct platform_device *dev)
a28d3af2	232	{
9f2545c1	233	struct pmac_i2c_bus *bus = dev->dev.platform_data;
a28d3af2 BH	234	struct device_node *parent = NULL;
a28d3af2 BH	235	struct i2c_adapter *adapter;
018a3d1d	236	const char *basename;
a28d3af2 BH	237	int rc;
	238
	239	if (bus == NULL)
	240	return -EINVAL;
bc6286e5	241	adapter = pmac_i2c_get_adapter(bus);
a28d3af2 BH	242
	243	/* Ok, now we need to make up a name for the interface that will
	244	* match what we used to do in the past, that is basically the
	245	* controller's parent device node for keywest. PMU didn't have a
	246	* naming convention and SMU has a different one
	247	*/
	248	switch(pmac_i2c_get_type(bus)) {
	249	case pmac_i2c_bus_keywest:
	250	parent = of_get_parent(pmac_i2c_get_controller(bus));
	251	if (parent == NULL)
	252	return -EINVAL;
	253	basename = parent->name;
	254	break;
	255	case pmac_i2c_bus_pmu:
	256	basename = "pmu";
	257	break;
	258	case pmac_i2c_bus_smu:
	259	/* This is not what we used to do but I'm fixing drivers at
	260	* the same time as this change
	261	*/
	262	basename = "smu";
	263	break;
	264	default:
	265	return -EINVAL;
	266	}
bc6286e5 JD	267	snprintf(adapter->name, sizeof(adapter->name), "%s %d", basename,
bc6286e5 JD	268	pmac_i2c_get_channel(bus));
a28d3af2 BH	269	of_node_put(parent);
a28d3af2 BH	270
9f2545c1	271	platform_set_drvdata(dev, adapter);
a28d3af2 BH	272	adapter->algo = &i2c_powermac_algorithm;
a28d3af2 BH	273	i2c_set_adapdata(adapter, bus);
9f2545c1	274	adapter->dev.parent = &dev->dev;
a28d3af2 BH	275	rc = i2c_add_adapter(adapter);
	276	if (rc) {
	277	printk(KERN_ERR "i2c-powermac: Adapter %s registration "
bc6286e5	278	"failed\n", adapter->name);
6dfa5ca3	279	memset(adapter, 0, sizeof(*adapter));
a28d3af2 BH	280	}
a28d3af2 BH	281
bc6286e5	282	printk(KERN_INFO "PowerMac i2c bus %s registered\n", adapter->name);
810ad7b6 JD	283
	284	if (!strncmp(basename, "uni-n", 5)) {
	285	struct device_node *np;
	286	const u32 *prop;
	287	struct i2c_board_info info;
	288
	289	/* Instantiate I2C motion sensor if present */
	290	np = of_find_node_by_name(NULL, "accelerometer");
	291	if (np && of_device_is_compatible(np, "AAPL,accelerometer_1") &&
	292	(prop = of_get_property(np, "reg", NULL))) {
	293	int i2c_bus;
	294	const char *tmp_bus;
	295
	296	/* look for bus either using "reg" or by path */
	297	tmp_bus = strstr(np->full_name, "/i2c-bus@");
	298	if (tmp_bus)
	299	i2c_bus = *(tmp_bus + 9) - '0';
	300	else
	301	i2c_bus = ((*prop) >> 8) & 0x0f;
	302
	303	if (pmac_i2c_get_channel(bus) == i2c_bus) {
	304	memset(&info, 0, sizeof(struct i2c_board_info));
	305	info.addr = ((*prop) & 0xff) >> 1;
	306	strlcpy(info.type, "ams", I2C_NAME_SIZE);
	307	i2c_new_device(adapter, &info);
	308	}
	309	}
	310	}
	311
a28d3af2 BH	312	return rc;
	313	}
	314
	315
add8eda7 KS	316	/* work with hotplug and coldplug */
	317	MODULE_ALIAS("platform:i2c-powermac");
	318
9f2545c1	319	static struct platform_driver i2c_powermac_driver = {
a28d3af2	320	.probe = i2c_powermac_probe,
9f2545c1 BH	321	.remove = __devexit_p(i2c_powermac_remove),
	322	.driver = {
	323	.name = "i2c-powermac",
	324	.bus = &platform_bus_type,
	325	},
a28d3af2 BH	326	};
	327
	328	static int __init i2c_powermac_init(void)
	329	{
9f2545c1	330	platform_driver_register(&i2c_powermac_driver);
a28d3af2 BH	331	return 0;
	332	}
	333
	334
	335	static void __exit i2c_powermac_cleanup(void)
	336	{
9f2545c1	337	platform_driver_unregister(&i2c_powermac_driver);
a28d3af2 BH	338	}
	339
	340	module_init(i2c_powermac_init);
	341	module_exit(i2c_powermac_cleanup);