[mirror_ubuntu-zesty-kernel.git] / drivers / i2c / busses / scx200_acb.c

/*
    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>

    National Semiconductor SCx200 ACCESS.bus support
    Also supports the AMD CS5535 and AMD CS5536

    Based on i2c-keywest.c which is:
        Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
        Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>

    This program is free software; you can redistribute it and/or
    modify it under the terms of the GNU General Public License as
    published by the Free Software Foundation; either version 2 of the
    License, or (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/smp_lock.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <asm/io.h>
#include <asm/msr.h>

#include <linux/scx200.h>

#define NAME "scx200_acb"

MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
MODULE_LICENSE("GPL");

#define MAX_DEVICES 4
static int base[MAX_DEVICES] = { 0x820, 0x840 };
module_param_array(base, int, NULL, 0);
MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");

#define POLL_TIMEOUT	(HZ/5)

enum scx200_acb_state {
	state_idle,
	state_address,
	state_command,
	state_repeat_start,
	state_quick,
	state_read,
	state_write,
};

static const char *scx200_acb_state_name[] = {
	"idle",
	"address",
	"command",
	"repeat_start",
	"quick",
	"read",
	"write",
};

/* Physical interface */
struct scx200_acb_iface {
	struct scx200_acb_iface *next;
	struct i2c_adapter adapter;
	unsigned base;
	struct semaphore sem;

	/* State machine data */
	enum scx200_acb_state state;
	int result;
	u8 address_byte;
	u8 command;
	u8 *ptr;
	char needs_reset;
	unsigned len;
};

/* Register Definitions */
#define ACBSDA		(iface->base + 0)
#define ACBST		(iface->base + 1)
#define    ACBST_SDAST		0x40 /* SDA Status */
#define    ACBST_BER		0x20
#define    ACBST_NEGACK		0x10 /* Negative Acknowledge */
#define    ACBST_STASTR		0x08 /* Stall After Start */
#define    ACBST_MASTER		0x02
#define ACBCST		(iface->base + 2)
#define    ACBCST_BB		0x02
#define ACBCTL1		(iface->base + 3)
#define    ACBCTL1_STASTRE	0x80
#define    ACBCTL1_NMINTE	0x40
#define    ACBCTL1_ACK		0x10
#define    ACBCTL1_STOP		0x02
#define    ACBCTL1_START	0x01
#define ACBADDR		(iface->base + 4)
#define ACBCTL2		(iface->base + 5)
#define    ACBCTL2_ENABLE	0x01

/************************************************************************/

static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
{
	const char *errmsg;

	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
		scx200_acb_state_name[iface->state], status);

	if (status & ACBST_BER) {
		errmsg = "bus error";
		goto error;
	}
	if (!(status & ACBST_MASTER)) {
		errmsg = "not master";
		goto error;
	}
	if (status & ACBST_NEGACK) {
		dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
			scx200_acb_state_name[iface->state]);

		iface->state = state_idle;
		iface->result = -ENXIO;

		outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
		return;
	}

	switch (iface->state) {
	case state_idle:
		dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
		break;

	case state_address:
		/* Do a pointer write first */
		outb(iface->address_byte & ~1, ACBSDA);

		iface->state = state_command;
		break;

	case state_command:
		outb(iface->command, ACBSDA);

		if (iface->address_byte & 1)
			iface->state = state_repeat_start;
		else
			iface->state = state_write;
		break;

	case state_repeat_start:
		outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
		/* fallthrough */

	case state_quick:
		if (iface->address_byte & 1) {
			if (iface->len == 1)
				outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
			else
				outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
			outb(iface->address_byte, ACBSDA);

			iface->state = state_read;
		} else {
			outb(iface->address_byte, ACBSDA);

			iface->state = state_write;
		}
		break;

	case state_read:
		/* Set ACK if receiving the last byte */
		if (iface->len == 1)
			outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
		else
			outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);

		*iface->ptr++ = inb(ACBSDA);
		--iface->len;

		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		}

		break;

	case state_write:
		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
			break;
		}

		outb(*iface->ptr++, ACBSDA);
		--iface->len;

		break;
	}

	return;

 error:
	dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_poll(struct scx200_acb_iface *iface)
{
	u8 status;
	unsigned long timeout;

	timeout = jiffies + POLL_TIMEOUT;
	while (time_before(jiffies, timeout)) {
		status = inb(ACBST);
		if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
			scx200_acb_machine(iface, status);
			return;
		}
		yield();
	}

	dev_err(&iface->adapter.dev, "timeout in state %s\n",
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_reset(struct scx200_acb_iface *iface)
{
	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);
	/* Polling mode */
	outb(0, ACBCTL1);
	/* Disable slave address */
	outb(0, ACBADDR);
	/* Enable the ACCESS.bus device */
	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
	/* Free STALL after START */
	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
	/* Send a STOP */
	outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
	/* Clear BER, NEGACK and STASTR bits */
	outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
	/* Clear BB bit */
	outb(inb(ACBCST) | ACBCST_BB, ACBCST);
}

static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
				 u16 address, unsigned short flags,
				 char rw, u8 command, int size,
				 union i2c_smbus_data *data)
{
	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	int len;
	u8 *buffer;
	u16 cur_word;
	int rc;

	switch (size) {
	case I2C_SMBUS_QUICK:
		len = 0;
		buffer = NULL;
		break;

	case I2C_SMBUS_BYTE:
		len = 1;
		buffer = rw ? &data->byte : &command;
		break;

	case I2C_SMBUS_BYTE_DATA:
		len = 1;
		buffer = &data->byte;
		break;

	case I2C_SMBUS_WORD_DATA:
		len = 2;
		cur_word = cpu_to_le16(data->word);
		buffer = (u8 *)&cur_word;
		break;

	case I2C_SMBUS_BLOCK_DATA:
		len = data->block[0];
		buffer = &data->block[1];
		break;

	default:
		return -EINVAL;
	}

	dev_dbg(&adapter->dev,
		"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
		size, address, command, len, rw);

	if (!len && rw == I2C_SMBUS_READ) {
		dev_dbg(&adapter->dev, "zero length read\n");
		return -EINVAL;
	}

	down(&iface->sem);

	iface->address_byte = (address << 1) | rw;
	iface->command = command;
	iface->ptr = buffer;
	iface->len = len;
	iface->result = -EINVAL;
	iface->needs_reset = 0;

	outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);

	if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
		iface->state = state_quick;
	else
		iface->state = state_address;

	while (iface->state != state_idle)
		scx200_acb_poll(iface);

	if (iface->needs_reset)
		scx200_acb_reset(iface);

	rc = iface->result;

	up(&iface->sem);

	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
		data->word = le16_to_cpu(cur_word);

#ifdef DEBUG
	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
	if (buffer) {
		int i;
		printk(" data:");
		for (i = 0; i < len; ++i)
			printk(" %02x", buffer[i]);
	}
	printk("\n");
#endif

	return rc;
}

static u32 scx200_acb_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_BLOCK_DATA;
}

/* For now, we only handle combined mode (smbus) */
static struct i2c_algorithm scx200_acb_algorithm = {
	.smbus_xfer	= scx200_acb_smbus_xfer,
	.functionality	= scx200_acb_func,
};

static struct scx200_acb_iface *scx200_acb_list;
static DECLARE_MUTEX(scx200_acb_list_mutex);

static int scx200_acb_probe(struct scx200_acb_iface *iface)
{
	u8 val;

	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);

	if (inb(ACBCTL2) != 0x70) {
		pr_debug(NAME ": ACBCTL2 readback failed\n");
		return -ENXIO;
	}

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if (val) {
		pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
			val);
		return -ENXIO;
	}

	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
		pr_debug(NAME ": enabled, but NMINTE won't be set, "
			 "ACBCTL1=0x%02x\n", val);
		return -ENXIO;
	}

	return 0;
}

static int  __init scx200_acb_create(const char *text, int base, int index)
{
	struct scx200_acb_iface *iface;
	struct i2c_adapter *adapter;
	int rc;
	char description[64];

	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
	if (!iface) {
		printk(KERN_ERR NAME ": can't allocate memory\n");
		rc = -ENOMEM;
		goto errout;
	}

	adapter = &iface->adapter;
	i2c_set_adapdata(adapter, iface);
	snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index);
	adapter->owner = THIS_MODULE;
	adapter->id = I2C_HW_SMBUS_SCX200;
	adapter->algo = &scx200_acb_algorithm;
	adapter->class = I2C_CLASS_HWMON;

	init_MUTEX(&iface->sem);

	snprintf(description, sizeof(description), "%s ACCESS.bus [%s]",
		 text, adapter->name);

	if (request_region(base, 8, description) == 0) {
		printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
			base, base + 8-1);
		rc = -EBUSY;
		goto errout_free;
	}
	iface->base = base;

	rc = scx200_acb_probe(iface);
	if (rc) {
		printk(KERN_WARNING NAME ": probe failed\n");
		goto errout_release;
	}

	scx200_acb_reset(iface);

	if (i2c_add_adapter(adapter) < 0) {
		printk(KERN_ERR NAME ": failed to register\n");
		rc = -ENODEV;
		goto errout_release;
	}

	down(&scx200_acb_list_mutex);
	iface->next = scx200_acb_list;
	scx200_acb_list = iface;
	up(&scx200_acb_list_mutex);

	return 0;

 errout_release:
	release_region(iface->base, 8);
 errout_free:
	kfree(iface);
 errout:
	return rc;
}

static struct pci_device_id scx200[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	{ },
};

static struct pci_device_id divil_pci[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS,  PCI_DEVICE_ID_NS_CS5535_ISA) },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
	{ } /* NULL entry */
};

#define MSR_LBAR_SMB		0x5140000B

static int scx200_add_cs553x(void)
{
	u32	low, hi;
	u32	smb_base;

	/* Grab & reserve the SMB I/O range */
	rdmsr(MSR_LBAR_SMB, low, hi);

	/* Check the IO mask and whether SMB is enabled */
	if (hi != 0x0000F001) {
		printk(KERN_WARNING NAME ": SMBus not enabled\n");
		return -ENODEV;
	}

	/* SMBus IO size is 8 bytes */
	smb_base = low & 0x0000FFF8;

	return scx200_acb_create("CS5535", smb_base, 0);
}

static int __init scx200_acb_init(void)
{
	int i;
	int	rc = -ENODEV;

	pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");

	/* Verify that this really is a SCx200 processor */
	if (pci_dev_present(scx200)) {
		for (i = 0; i < MAX_DEVICES; ++i) {
			if (base[i] > 0)
				rc = scx200_acb_create("SCx200", base[i], i);
		}
	} else if (pci_dev_present(divil_pci))
		rc = scx200_add_cs553x();

	return rc;
}

static void __exit scx200_acb_cleanup(void)
{
	struct scx200_acb_iface *iface;

	down(&scx200_acb_list_mutex);
	while ((iface = scx200_acb_list) != NULL) {
		scx200_acb_list = iface->next;
		up(&scx200_acb_list_mutex);

		i2c_del_adapter(&iface->adapter);
		release_region(iface->base, 8);
		kfree(iface);
		down(&scx200_acb_list_mutex);
	}
	up(&scx200_acb_list_mutex);
}

module_init(scx200_acb_init);
module_exit(scx200_acb_cleanup);
Commit	Line	Data
99c3adb4	1	/*
1da177e4 LT	2	Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
	3
	4	National Semiconductor SCx200 ACCESS.bus support
16ffc5c9	5	Also supports the AMD CS5535 and AMD CS5536
99c3adb4	6
1da177e4 LT	7	Based on i2c-keywest.c which is:
	8	Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
	9	Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
99c3adb4	10
1da177e4 LT	11	This program is free software; you can redistribute it and/or
	12	modify it under the terms of the GNU General Public License as
	13	published by the Free Software Foundation; either version 2 of the
	14	License, or (at your option) any later version.
99c3adb4	15
1da177e4 LT	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	19	General Public License for more details.
99c3adb4	20
1da177e4 LT	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4 LT	24	*/
1da177e4 LT	25
1da177e4 LT	26	#include <linux/module.h>
	27	#include <linux/errno.h>
	28	#include <linux/kernel.h>
	29	#include <linux/init.h>
	30	#include <linux/i2c.h>
	31	#include <linux/smp_lock.h>
	32	#include <linux/pci.h>
	33	#include <linux/delay.h>
	34	#include <asm/io.h>
16ffc5c9	35	#include <asm/msr.h>
1da177e4 LT	36
	37	#include <linux/scx200.h>
	38
	39	#define NAME "scx200_acb"
	40
	41	MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
	42	MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
	43	MODULE_LICENSE("GPL");
	44
	45	#define MAX_DEVICES 4
	46	static int base[MAX_DEVICES] = { 0x820, 0x840 };
	47	module_param_array(base, int, NULL, 0);
	48	MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
	49
f933ff50	50	#define POLL_TIMEOUT (HZ/5)
1da177e4 LT	51
	52	enum scx200_acb_state {
	53	state_idle,
	54	state_address,
	55	state_command,
	56	state_repeat_start,
	57	state_quick,
	58	state_read,
	59	state_write,
	60	};
	61
	62	static const char *scx200_acb_state_name[] = {
	63	"idle",
	64	"address",
	65	"command",
	66	"repeat_start",
	67	"quick",
	68	"read",
	69	"write",
	70	};
	71
	72	/* Physical interface */
99c3adb4	73	struct scx200_acb_iface {
1da177e4 LT	74	struct scx200_acb_iface *next;
	75	struct i2c_adapter adapter;
	76	unsigned base;
	77	struct semaphore sem;
	78
	79	/* State machine data */
	80	enum scx200_acb_state state;
	81	int result;
	82	u8 address_byte;
	83	u8 command;
	84	u8 *ptr;
	85	char needs_reset;
	86	unsigned len;
	87	};
	88
	89	/* Register Definitions */
	90	#define ACBSDA (iface->base + 0)
	91	#define ACBST (iface->base + 1)
	92	#define ACBST_SDAST 0x40 /* SDA Status */
99c3adb4	93	#define ACBST_BER 0x20
1da177e4 LT	94	#define ACBST_NEGACK 0x10 /* Negative Acknowledge */
	95	#define ACBST_STASTR 0x08 /* Stall After Start */
	96	#define ACBST_MASTER 0x02
	97	#define ACBCST (iface->base + 2)
	98	#define ACBCST_BB 0x02
	99	#define ACBCTL1 (iface->base + 3)
	100	#define ACBCTL1_STASTRE 0x80
	101	#define ACBCTL1_NMINTE 0x40
99c3adb4 BG	102	#define ACBCTL1_ACK 0x10
	103	#define ACBCTL1_STOP 0x02
	104	#define ACBCTL1_START 0x01
1da177e4 LT	105	#define ACBADDR (iface->base + 4)
	106	#define ACBCTL2 (iface->base + 5)
	107	#define ACBCTL2_ENABLE 0x01
	108
	109	/************************************************************************/
	110
	111	static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
	112	{
	113	const char *errmsg;
	114
ef4d9275 BG	115	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
ef4d9275 BG	116	scx200_acb_state_name[iface->state], status);
1da177e4 LT	117
	118	if (status & ACBST_BER) {
	119	errmsg = "bus error";
	120	goto error;
	121	}
	122	if (!(status & ACBST_MASTER)) {
	123	errmsg = "not master";
	124	goto error;
	125	}
9b7b6d3b BG	126	if (status & ACBST_NEGACK) {
	127	dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
	128	scx200_acb_state_name[iface->state]);
	129
	130	iface->state = state_idle;
	131	iface->result = -ENXIO;
	132
	133	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	134	outb(ACBST_STASTR \| ACBST_NEGACK, ACBST);
	135	return;
	136	}
1da177e4 LT	137
	138	switch (iface->state) {
	139	case state_idle:
	140	dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
	141	break;
	142
	143	case state_address:
	144	/* Do a pointer write first */
	145	outb(iface->address_byte & ~1, ACBSDA);
	146
	147	iface->state = state_command;
	148	break;
	149
	150	case state_command:
	151	outb(iface->command, ACBSDA);
	152
	153	if (iface->address_byte & 1)
	154	iface->state = state_repeat_start;
	155	else
	156	iface->state = state_write;
	157	break;
	158
	159	case state_repeat_start:
	160	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	161	/* fallthrough */
99c3adb4	162
1da177e4 LT	163	case state_quick:
1da177e4 LT	164	if (iface->address_byte & 1) {
99c3adb4	165	if (iface->len == 1)
1da177e4 LT	166	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	167	else
	168	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	169	outb(iface->address_byte, ACBSDA);
	170
	171	iface->state = state_read;
	172	} else {
	173	outb(iface->address_byte, ACBSDA);
	174
	175	iface->state = state_write;
	176	}
	177	break;
	178
	179	case state_read:
	180	/* Set ACK if receiving the last byte */
	181	if (iface->len == 1)
	182	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	183	else
	184	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	185
	186	*iface->ptr++ = inb(ACBSDA);
	187	--iface->len;
	188
	189	if (iface->len == 0) {
	190	iface->result = 0;
	191	iface->state = state_idle;
	192	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	193	}
	194
	195	break;
	196
	197	case state_write:
	198	if (iface->len == 0) {
	199	iface->result = 0;
	200	iface->state = state_idle;
	201	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	202	break;
	203	}
99c3adb4	204
1da177e4 LT	205	outb(*iface->ptr++, ACBSDA);
1da177e4 LT	206	--iface->len;
99c3adb4	207
1da177e4 LT	208	break;
	209	}
	210
	211	return;
	212
1da177e4 LT	213	error:
	214	dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
	215	scx200_acb_state_name[iface->state]);
	216
	217	iface->state = state_idle;
	218	iface->result = -EIO;
	219	iface->needs_reset = 1;
	220	}
	221
1da177e4 LT	222	static void scx200_acb_poll(struct scx200_acb_iface *iface)
1da177e4 LT	223	{
9b7b6d3b	224	u8 status;
1da177e4 LT	225	unsigned long timeout;
	226
	227	timeout = jiffies + POLL_TIMEOUT;
	228	while (time_before(jiffies, timeout)) {
	229	status = inb(ACBST);
	230	if ((status & (ACBST_SDAST\|ACBST_BER\|ACBST_NEGACK)) != 0) {
	231	scx200_acb_machine(iface, status);
	232	return;
	233	}
f933ff50	234	yield();
1da177e4 LT	235	}
1da177e4 LT	236
9b7b6d3b BG	237	dev_err(&iface->adapter.dev, "timeout in state %s\n",
	238	scx200_acb_state_name[iface->state]);
	239
	240	iface->state = state_idle;
	241	iface->result = -EIO;
	242	iface->needs_reset = 1;
1da177e4	243	}
1da177e4 LT	244
	245	static void scx200_acb_reset(struct scx200_acb_iface *iface)
	246	{
	247	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	248	frequency: 16 clock cycles */
1da177e4 LT	249	outb(0x70, ACBCTL2);
	250	/* Polling mode */
	251	outb(0, ACBCTL1);
	252	/* Disable slave address */
	253	outb(0, ACBADDR);
	254	/* Enable the ACCESS.bus device */
	255	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	256	/* Free STALL after START */
	257	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE \| ACBCTL1_NMINTE), ACBCTL1);
	258	/* Send a STOP */
	259	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	260	/* Clear BER, NEGACK and STASTR bits */
	261	outb(ACBST_BER \| ACBST_NEGACK \| ACBST_STASTR, ACBST);
	262	/* Clear BB bit */
	263	outb(inb(ACBCST) \| ACBCST_BB, ACBCST);
	264	}
	265
	266	static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
99c3adb4 BG	267	u16 address, unsigned short flags,
	268	char rw, u8 command, int size,
	269	union i2c_smbus_data *data)
1da177e4 LT	270	{
	271	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	272	int len;
	273	u8 *buffer;
	274	u16 cur_word;
	275	int rc;
	276
	277	switch (size) {
	278	case I2C_SMBUS_QUICK:
99c3adb4 BG	279	len = 0;
	280	buffer = NULL;
	281	break;
	282
1da177e4	283	case I2C_SMBUS_BYTE:
9b7b6d3b BG	284	len = 1;
9b7b6d3b BG	285	buffer = rw ? &data->byte : &command;
99c3adb4 BG	286	break;
99c3adb4 BG	287
1da177e4	288	case I2C_SMBUS_BYTE_DATA:
99c3adb4 BG	289	len = 1;
	290	buffer = &data->byte;
	291	break;
	292
1da177e4 LT	293	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	294	len = 2;
99c3adb4 BG	295	cur_word = cpu_to_le16(data->word);
99c3adb4 BG	296	buffer = (u8 *)&cur_word;
1da177e4	297	break;
99c3adb4	298
1da177e4	299	case I2C_SMBUS_BLOCK_DATA:
99c3adb4 BG	300	len = data->block[0];
99c3adb4 BG	301	buffer = &data->block[1];
1da177e4	302	break;
99c3adb4	303
1da177e4	304	default:
99c3adb4	305	return -EINVAL;
1da177e4 LT	306	}
1da177e4 LT	307
ef4d9275 BG	308	dev_dbg(&adapter->dev,
	309	"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
	310	size, address, command, len, rw);
1da177e4 LT	311
1da177e4 LT	312	if (!len && rw == I2C_SMBUS_READ) {
ef4d9275	313	dev_dbg(&adapter->dev, "zero length read\n");
1da177e4 LT	314	return -EINVAL;
	315	}
	316
1da177e4 LT	317	down(&iface->sem);
1da177e4 LT	318
9b7b6d3b	319	iface->address_byte = (address << 1) \| rw;
1da177e4 LT	320	iface->command = command;
	321	iface->ptr = buffer;
	322	iface->len = len;
	323	iface->result = -EINVAL;
	324	iface->needs_reset = 0;
	325
	326	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	327
	328	if (size == I2C_SMBUS_QUICK \|\| size == I2C_SMBUS_BYTE)
	329	iface->state = state_quick;
	330	else
	331	iface->state = state_address;
	332
1da177e4 LT	333	while (iface->state != state_idle)
1da177e4 LT	334	scx200_acb_poll(iface);
1da177e4 LT	335
	336	if (iface->needs_reset)
	337	scx200_acb_reset(iface);
	338
	339	rc = iface->result;
	340
	341	up(&iface->sem);
	342
	343	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
99c3adb4	344	data->word = le16_to_cpu(cur_word);
1da177e4 LT	345
1da177e4 LT	346	#ifdef DEBUG
ef4d9275	347	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
1da177e4 LT	348	if (buffer) {
	349	int i;
	350	printk(" data:");
	351	for (i = 0; i < len; ++i)
	352	printk(" %02x", buffer[i]);
	353	}
	354	printk("\n");
	355	#endif
	356
	357	return rc;
	358	}
	359
	360	static u32 scx200_acb_func(struct i2c_adapter *adapter)
	361	{
	362	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	363	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	364	I2C_FUNC_SMBUS_BLOCK_DATA;
	365	}
	366
	367	/* For now, we only handle combined mode (smbus) */
	368	static struct i2c_algorithm scx200_acb_algorithm = {
1da177e4 LT	369	.smbus_xfer = scx200_acb_smbus_xfer,
	370	.functionality = scx200_acb_func,
	371	};
	372
	373	static struct scx200_acb_iface *scx200_acb_list;
8a05940d	374	static DECLARE_MUTEX(scx200_acb_list_mutex);
1da177e4 LT	375
	376	static int scx200_acb_probe(struct scx200_acb_iface *iface)
	377	{
	378	u8 val;
	379
	380	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	381	frequency: 16 clock cycles */
1da177e4 LT	382	outb(0x70, ACBCTL2);
	383
	384	if (inb(ACBCTL2) != 0x70) {
ef4d9275	385	pr_debug(NAME ": ACBCTL2 readback failed\n");
1da177e4 LT	386	return -ENXIO;
	387	}
	388
	389	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	390
	391	val = inb(ACBCTL1);
	392	if (val) {
ef4d9275 BG	393	pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
ef4d9275 BG	394	val);
1da177e4 LT	395	return -ENXIO;
	396	}
	397
	398	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	399
	400	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	401
	402	val = inb(ACBCTL1);
	403	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
ef4d9275 BG	404	pr_debug(NAME ": enabled, but NMINTE won't be set, "
ef4d9275 BG	405	"ACBCTL1=0x%02x\n", val);
1da177e4 LT	406	return -ENXIO;
	407	}
	408
	409	return 0;
	410	}
	411
16ffc5c9	412	static int __init scx200_acb_create(const char *text, int base, int index)
1da177e4 LT	413	{
	414	struct scx200_acb_iface *iface;
	415	struct i2c_adapter *adapter;
9b7b6d3b	416	int rc;
1da177e4 LT	417	char description[64];
1da177e4 LT	418
5263ebb5	419	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
1da177e4 LT	420	if (!iface) {
	421	printk(KERN_ERR NAME ": can't allocate memory\n");
	422	rc = -ENOMEM;
	423	goto errout;
	424	}
	425
1da177e4 LT	426	adapter = &iface->adapter;
1da177e4 LT	427	i2c_set_adapdata(adapter, iface);
16ffc5c9	428	snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index);
1da177e4	429	adapter->owner = THIS_MODULE;
1684a984	430	adapter->id = I2C_HW_SMBUS_SCX200;
1da177e4 LT	431	adapter->algo = &scx200_acb_algorithm;
	432	adapter->class = I2C_CLASS_HWMON;
	433
	434	init_MUTEX(&iface->sem);
	435
16ffc5c9 BG	436	snprintf(description, sizeof(description), "%s ACCESS.bus [%s]",
	437	text, adapter->name);
	438
1da177e4	439	if (request_region(base, 8, description) == 0) {
ef4d9275	440	printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
1da177e4 LT	441	base, base + 8-1);
1da177e4 LT	442	rc = -EBUSY;
9b7b6d3b	443	goto errout_free;
1da177e4 LT	444	}
	445	iface->base = base;
	446
	447	rc = scx200_acb_probe(iface);
	448	if (rc) {
ef4d9275	449	printk(KERN_WARNING NAME ": probe failed\n");
9b7b6d3b	450	goto errout_release;
1da177e4 LT	451	}
	452
	453	scx200_acb_reset(iface);
	454
	455	if (i2c_add_adapter(adapter) < 0) {
ef4d9275	456	printk(KERN_ERR NAME ": failed to register\n");
1da177e4	457	rc = -ENODEV;
9b7b6d3b	458	goto errout_release;
1da177e4 LT	459	}
1da177e4 LT	460
8a05940d	461	down(&scx200_acb_list_mutex);
1da177e4 LT	462	iface->next = scx200_acb_list;
1da177e4 LT	463	scx200_acb_list = iface;
8a05940d	464	up(&scx200_acb_list_mutex);
1da177e4 LT	465
	466	return 0;
	467
9b7b6d3b BG	468	errout_release:
	469	release_region(iface->base, 8);
	470	errout_free:
	471	kfree(iface);
1da177e4	472	errout:
1da177e4 LT	473	return rc;
	474	}
	475
	476	static struct pci_device_id scx200[] = {
	477	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	478	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	479	{ },
	480	};
	481
16ffc5c9 BG	482	static struct pci_device_id divil_pci[] = {
	483	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
	484	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
	485	{ } /* NULL entry */
	486	};
	487
	488	#define MSR_LBAR_SMB 0x5140000B
	489
	490	static int scx200_add_cs553x(void)
	491	{
	492	u32 low, hi;
	493	u32 smb_base;
	494
	495	/* Grab & reserve the SMB I/O range */
	496	rdmsr(MSR_LBAR_SMB, low, hi);
	497
	498	/* Check the IO mask and whether SMB is enabled */
	499	if (hi != 0x0000F001) {
	500	printk(KERN_WARNING NAME ": SMBus not enabled\n");
	501	return -ENODEV;
	502	}
	503
	504	/* SMBus IO size is 8 bytes */
	505	smb_base = low & 0x0000FFF8;
	506
	507	return scx200_acb_create("CS5535", smb_base, 0);
	508	}
	509
1da177e4 LT	510	static int __init scx200_acb_init(void)
	511	{
	512	int i;
16ffc5c9	513	int rc = -ENODEV;
1da177e4 LT	514
	515	pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
	516
	517	/* Verify that this really is a SCx200 processor */
16ffc5c9 BG	518	if (pci_dev_present(scx200)) {
	519	for (i = 0; i < MAX_DEVICES; ++i) {
	520	if (base[i] > 0)
	521	rc = scx200_acb_create("SCx200", base[i], i);
	522	}
	523	} else if (pci_dev_present(divil_pci))
	524	rc = scx200_add_cs553x();
1da177e4	525
1da177e4 LT	526	return rc;
	527	}
	528
	529	static void __exit scx200_acb_cleanup(void)
	530	{
	531	struct scx200_acb_iface *iface;
99c3adb4	532
8a05940d	533	down(&scx200_acb_list_mutex);
1da177e4 LT	534	while ((iface = scx200_acb_list) != NULL) {
1da177e4 LT	535	scx200_acb_list = iface->next;
8a05940d	536	up(&scx200_acb_list_mutex);
1da177e4 LT	537
	538	i2c_del_adapter(&iface->adapter);
	539	release_region(iface->base, 8);
	540	kfree(iface);
8a05940d	541	down(&scx200_acb_list_mutex);
1da177e4	542	}
8a05940d	543	up(&scx200_acb_list_mutex);
1da177e4 LT	544	}
	545
	546	module_init(scx200_acb_init);
	547	module_exit(scx200_acb_cleanup);