[mirror_ubuntu-zesty-kernel.git] / drivers / i2c / busses / scx200_acb.c

/*
    Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>

    National Semiconductor SCx200 ACCESS.bus support
    Also supports the AMD CS5535 and AMD CS5536

    Based on i2c-keywest.c which is:
        Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
        Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>

    This program is free software; you can redistribute it and/or
    modify it under the terms of the GNU General Public License as
    published by the Free Software Foundation; either version 2 of the
    License, or (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
    General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/

#include <linux/module.h>
#include <linux/errno.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/smp_lock.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <asm/io.h>
#include <asm/msr.h>

#include <linux/scx200.h>

#define NAME "scx200_acb"

MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
MODULE_LICENSE("GPL");

#define MAX_DEVICES 4
static int base[MAX_DEVICES] = { 0x820, 0x840 };
module_param_array(base, int, NULL, 0);
MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");

#define POLL_TIMEOUT	(HZ/5)

enum scx200_acb_state {
	state_idle,
	state_address,
	state_command,
	state_repeat_start,
	state_quick,
	state_read,
	state_write,
};

static const char *scx200_acb_state_name[] = {
	"idle",
	"address",
	"command",
	"repeat_start",
	"quick",
	"read",
	"write",
};

/* Physical interface */
struct scx200_acb_iface {
	struct scx200_acb_iface *next;
	struct i2c_adapter adapter;
	unsigned base;
	struct mutex mutex;

	/* State machine data */
	enum scx200_acb_state state;
	int result;
	u8 address_byte;
	u8 command;
	u8 *ptr;
	char needs_reset;
	unsigned len;
};

/* Register Definitions */
#define ACBSDA		(iface->base + 0)
#define ACBST		(iface->base + 1)
#define    ACBST_SDAST		0x40 /* SDA Status */
#define    ACBST_BER		0x20
#define    ACBST_NEGACK		0x10 /* Negative Acknowledge */
#define    ACBST_STASTR		0x08 /* Stall After Start */
#define    ACBST_MASTER		0x02
#define ACBCST		(iface->base + 2)
#define    ACBCST_BB		0x02
#define ACBCTL1		(iface->base + 3)
#define    ACBCTL1_STASTRE	0x80
#define    ACBCTL1_NMINTE	0x40
#define    ACBCTL1_ACK		0x10
#define    ACBCTL1_STOP		0x02
#define    ACBCTL1_START	0x01
#define ACBADDR		(iface->base + 4)
#define ACBCTL2		(iface->base + 5)
#define    ACBCTL2_ENABLE	0x01

/************************************************************************/

static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
{
	const char *errmsg;

	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
		scx200_acb_state_name[iface->state], status);

	if (status & ACBST_BER) {
		errmsg = "bus error";
		goto error;
	}
	if (!(status & ACBST_MASTER)) {
		errmsg = "not master";
		goto error;
	}
	if (status & ACBST_NEGACK) {
		dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
			scx200_acb_state_name[iface->state]);

		iface->state = state_idle;
		iface->result = -ENXIO;

		outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
		return;
	}

	switch (iface->state) {
	case state_idle:
		dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
		break;

	case state_address:
		/* Do a pointer write first */
		outb(iface->address_byte & ~1, ACBSDA);

		iface->state = state_command;
		break;

	case state_command:
		outb(iface->command, ACBSDA);

		if (iface->address_byte & 1)
			iface->state = state_repeat_start;
		else
			iface->state = state_write;
		break;

	case state_repeat_start:
		outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
		/* fallthrough */

	case state_quick:
		if (iface->address_byte & 1) {
			if (iface->len == 1)
				outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
			else
				outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
			outb(iface->address_byte, ACBSDA);

			iface->state = state_read;
		} else {
			outb(iface->address_byte, ACBSDA);

			iface->state = state_write;
		}
		break;

	case state_read:
		/* Set ACK if receiving the last byte */
		if (iface->len == 1)
			outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
		else
			outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);

		*iface->ptr++ = inb(ACBSDA);
		--iface->len;

		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
		}

		break;

	case state_write:
		if (iface->len == 0) {
			iface->result = 0;
			iface->state = state_idle;
			outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
			break;
		}

		outb(*iface->ptr++, ACBSDA);
		--iface->len;

		break;
	}

	return;

 error:
	dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_poll(struct scx200_acb_iface *iface)
{
	u8 status;
	unsigned long timeout;

	timeout = jiffies + POLL_TIMEOUT;
	while (time_before(jiffies, timeout)) {
		status = inb(ACBST);
		if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
			scx200_acb_machine(iface, status);
			return;
		}
		yield();
	}

	dev_err(&iface->adapter.dev, "timeout in state %s\n",
		scx200_acb_state_name[iface->state]);

	iface->state = state_idle;
	iface->result = -EIO;
	iface->needs_reset = 1;
}

static void scx200_acb_reset(struct scx200_acb_iface *iface)
{
	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);
	/* Polling mode */
	outb(0, ACBCTL1);
	/* Disable slave address */
	outb(0, ACBADDR);
	/* Enable the ACCESS.bus device */
	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
	/* Free STALL after START */
	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
	/* Send a STOP */
	outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
	/* Clear BER, NEGACK and STASTR bits */
	outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
	/* Clear BB bit */
	outb(inb(ACBCST) | ACBCST_BB, ACBCST);
}

static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
				 u16 address, unsigned short flags,
				 char rw, u8 command, int size,
				 union i2c_smbus_data *data)
{
	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	int len;
	u8 *buffer;
	u16 cur_word;
	int rc;

	switch (size) {
	case I2C_SMBUS_QUICK:
		len = 0;
		buffer = NULL;
		break;

	case I2C_SMBUS_BYTE:
		len = 1;
		buffer = rw ? &data->byte : &command;
		break;

	case I2C_SMBUS_BYTE_DATA:
		len = 1;
		buffer = &data->byte;
		break;

	case I2C_SMBUS_WORD_DATA:
		len = 2;
		cur_word = cpu_to_le16(data->word);
		buffer = (u8 *)&cur_word;
		break;

	case I2C_SMBUS_BLOCK_DATA:
		len = data->block[0];
		buffer = &data->block[1];
		break;

	default:
		return -EINVAL;
	}

	dev_dbg(&adapter->dev,
		"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
		size, address, command, len, rw);

	if (!len && rw == I2C_SMBUS_READ) {
		dev_dbg(&adapter->dev, "zero length read\n");
		return -EINVAL;
	}

	mutex_lock(&iface->mutex);

	iface->address_byte = (address << 1) | rw;
	iface->command = command;
	iface->ptr = buffer;
	iface->len = len;
	iface->result = -EINVAL;
	iface->needs_reset = 0;

	outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);

	if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
		iface->state = state_quick;
	else
		iface->state = state_address;

	while (iface->state != state_idle)
		scx200_acb_poll(iface);

	if (iface->needs_reset)
		scx200_acb_reset(iface);

	rc = iface->result;

	mutex_unlock(&iface->mutex);

	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
		data->word = le16_to_cpu(cur_word);

#ifdef DEBUG
	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
	if (buffer) {
		int i;
		printk(" data:");
		for (i = 0; i < len; ++i)
			printk(" %02x", buffer[i]);
	}
	printk("\n");
#endif

	return rc;
}

static u32 scx200_acb_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	       I2C_FUNC_SMBUS_BLOCK_DATA;
}

/* For now, we only handle combined mode (smbus) */
static struct i2c_algorithm scx200_acb_algorithm = {
	.smbus_xfer	= scx200_acb_smbus_xfer,
	.functionality	= scx200_acb_func,
};

static struct scx200_acb_iface *scx200_acb_list;
static DECLARE_MUTEX(scx200_acb_list_mutex);

static int scx200_acb_probe(struct scx200_acb_iface *iface)
{
	u8 val;

	/* Disable the ACCESS.bus device and Configure the SCL
	   frequency: 16 clock cycles */
	outb(0x70, ACBCTL2);

	if (inb(ACBCTL2) != 0x70) {
		pr_debug(NAME ": ACBCTL2 readback failed\n");
		return -ENXIO;
	}

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if (val) {
		pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
			val);
		return -ENXIO;
	}

	outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);

	outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);

	val = inb(ACBCTL1);
	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
		pr_debug(NAME ": enabled, but NMINTE won't be set, "
			 "ACBCTL1=0x%02x\n", val);
		return -ENXIO;
	}

	return 0;
}

static int  __init scx200_acb_create(const char *text, int base, int index)
{
	struct scx200_acb_iface *iface;
	struct i2c_adapter *adapter;
	int rc;
	char description[64];

	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
	if (!iface) {
		printk(KERN_ERR NAME ": can't allocate memory\n");
		rc = -ENOMEM;
		goto errout;
	}

	adapter = &iface->adapter;
	i2c_set_adapdata(adapter, iface);
	snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index);
	adapter->owner = THIS_MODULE;
	adapter->id = I2C_HW_SMBUS_SCX200;
	adapter->algo = &scx200_acb_algorithm;
	adapter->class = I2C_CLASS_HWMON;

	mutex_init(&iface->mutex);

	snprintf(description, sizeof(description), "%s ACCESS.bus [%s]",
		 text, adapter->name);

	if (request_region(base, 8, description) == 0) {
		printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
			base, base + 8-1);
		rc = -EBUSY;
		goto errout_free;
	}
	iface->base = base;

	rc = scx200_acb_probe(iface);
	if (rc) {
		printk(KERN_WARNING NAME ": probe failed\n");
		goto errout_release;
	}

	scx200_acb_reset(iface);

	if (i2c_add_adapter(adapter) < 0) {
		printk(KERN_ERR NAME ": failed to register\n");
		rc = -ENODEV;
		goto errout_release;
	}

	down(&scx200_acb_list_mutex);
	iface->next = scx200_acb_list;
	scx200_acb_list = iface;
	up(&scx200_acb_list_mutex);

	return 0;

 errout_release:
	release_region(iface->base, 8);
 errout_free:
	kfree(iface);
 errout:
	return rc;
}

static struct pci_device_id scx200[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	{ },
};

static struct pci_device_id divil_pci[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS,  PCI_DEVICE_ID_NS_CS5535_ISA) },
	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
	{ } /* NULL entry */
};

#define MSR_LBAR_SMB		0x5140000B

static int scx200_add_cs553x(void)
{
	u32	low, hi;
	u32	smb_base;

	/* Grab & reserve the SMB I/O range */
	rdmsr(MSR_LBAR_SMB, low, hi);

	/* Check the IO mask and whether SMB is enabled */
	if (hi != 0x0000F001) {
		printk(KERN_WARNING NAME ": SMBus not enabled\n");
		return -ENODEV;
	}

	/* SMBus IO size is 8 bytes */
	smb_base = low & 0x0000FFF8;

	return scx200_acb_create("CS5535", smb_base, 0);
}

static int __init scx200_acb_init(void)
{
	int i;
	int	rc = -ENODEV;

	pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");

	/* Verify that this really is a SCx200 processor */
	if (pci_dev_present(scx200)) {
		for (i = 0; i < MAX_DEVICES; ++i) {
			if (base[i] > 0)
				rc = scx200_acb_create("SCx200", base[i], i);
		}
	} else if (pci_dev_present(divil_pci))
		rc = scx200_add_cs553x();

	return rc;
}

static void __exit scx200_acb_cleanup(void)
{
	struct scx200_acb_iface *iface;

	down(&scx200_acb_list_mutex);
	while ((iface = scx200_acb_list) != NULL) {
		scx200_acb_list = iface->next;
		up(&scx200_acb_list_mutex);

		i2c_del_adapter(&iface->adapter);
		release_region(iface->base, 8);
		kfree(iface);
		down(&scx200_acb_list_mutex);
	}
	up(&scx200_acb_list_mutex);
}

module_init(scx200_acb_init);
module_exit(scx200_acb_cleanup);
Commit	Line	Data
99c3adb4	1	/*
1da177e4 LT	2	Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
	3
	4	National Semiconductor SCx200 ACCESS.bus support
16ffc5c9	5	Also supports the AMD CS5535 and AMD CS5536
99c3adb4	6
1da177e4 LT	7	Based on i2c-keywest.c which is:
	8	Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
	9	Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
99c3adb4	10
1da177e4 LT	11	This program is free software; you can redistribute it and/or
	12	modify it under the terms of the GNU General Public License as
	13	published by the Free Software Foundation; either version 2 of the
	14	License, or (at your option) any later version.
99c3adb4	15
1da177e4 LT	16	This program is distributed in the hope that it will be useful,
	17	but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	19	General Public License for more details.
99c3adb4	20
1da177e4 LT	21	You should have received a copy of the GNU General Public License
	22	along with this program; if not, write to the Free Software
	23	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4 LT	24	*/
1da177e4 LT	25
1da177e4 LT	26	#include <linux/module.h>
	27	#include <linux/errno.h>
	28	#include <linux/kernel.h>
	29	#include <linux/init.h>
	30	#include <linux/i2c.h>
	31	#include <linux/smp_lock.h>
	32	#include <linux/pci.h>
	33	#include <linux/delay.h>
3fb9a655	34	#include <linux/mutex.h>
1da177e4	35	#include <asm/io.h>
16ffc5c9	36	#include <asm/msr.h>
1da177e4 LT	37
	38	#include <linux/scx200.h>
	39
	40	#define NAME "scx200_acb"
	41
	42	MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
	43	MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
	44	MODULE_LICENSE("GPL");
	45
	46	#define MAX_DEVICES 4
	47	static int base[MAX_DEVICES] = { 0x820, 0x840 };
	48	module_param_array(base, int, NULL, 0);
	49	MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
	50
f933ff50	51	#define POLL_TIMEOUT (HZ/5)
1da177e4 LT	52
	53	enum scx200_acb_state {
	54	state_idle,
	55	state_address,
	56	state_command,
	57	state_repeat_start,
	58	state_quick,
	59	state_read,
	60	state_write,
	61	};
	62
	63	static const char *scx200_acb_state_name[] = {
	64	"idle",
	65	"address",
	66	"command",
	67	"repeat_start",
	68	"quick",
	69	"read",
	70	"write",
	71	};
	72
	73	/* Physical interface */
99c3adb4	74	struct scx200_acb_iface {
1da177e4 LT	75	struct scx200_acb_iface *next;
	76	struct i2c_adapter adapter;
	77	unsigned base;
3fb9a655	78	struct mutex mutex;
1da177e4 LT	79
	80	/* State machine data */
	81	enum scx200_acb_state state;
	82	int result;
	83	u8 address_byte;
	84	u8 command;
	85	u8 *ptr;
	86	char needs_reset;
	87	unsigned len;
	88	};
	89
	90	/* Register Definitions */
	91	#define ACBSDA (iface->base + 0)
	92	#define ACBST (iface->base + 1)
	93	#define ACBST_SDAST 0x40 /* SDA Status */
99c3adb4	94	#define ACBST_BER 0x20
1da177e4 LT	95	#define ACBST_NEGACK 0x10 /* Negative Acknowledge */
	96	#define ACBST_STASTR 0x08 /* Stall After Start */
	97	#define ACBST_MASTER 0x02
	98	#define ACBCST (iface->base + 2)
	99	#define ACBCST_BB 0x02
	100	#define ACBCTL1 (iface->base + 3)
	101	#define ACBCTL1_STASTRE 0x80
	102	#define ACBCTL1_NMINTE 0x40
99c3adb4 BG	103	#define ACBCTL1_ACK 0x10
	104	#define ACBCTL1_STOP 0x02
	105	#define ACBCTL1_START 0x01
1da177e4 LT	106	#define ACBADDR (iface->base + 4)
	107	#define ACBCTL2 (iface->base + 5)
	108	#define ACBCTL2_ENABLE 0x01
	109
	110	/************************************************************************/
	111
	112	static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
	113	{
	114	const char *errmsg;
	115
ef4d9275 BG	116	dev_dbg(&iface->adapter.dev, "state %s, status = 0x%02x\n",
ef4d9275 BG	117	scx200_acb_state_name[iface->state], status);
1da177e4 LT	118
	119	if (status & ACBST_BER) {
	120	errmsg = "bus error";
	121	goto error;
	122	}
	123	if (!(status & ACBST_MASTER)) {
	124	errmsg = "not master";
	125	goto error;
	126	}
9b7b6d3b BG	127	if (status & ACBST_NEGACK) {
	128	dev_dbg(&iface->adapter.dev, "negative ack in state %s\n",
	129	scx200_acb_state_name[iface->state]);
	130
	131	iface->state = state_idle;
	132	iface->result = -ENXIO;
	133
	134	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	135	outb(ACBST_STASTR \| ACBST_NEGACK, ACBST);
	136	return;
	137	}
1da177e4 LT	138
	139	switch (iface->state) {
	140	case state_idle:
	141	dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
	142	break;
	143
	144	case state_address:
	145	/* Do a pointer write first */
	146	outb(iface->address_byte & ~1, ACBSDA);
	147
	148	iface->state = state_command;
	149	break;
	150
	151	case state_command:
	152	outb(iface->command, ACBSDA);
	153
	154	if (iface->address_byte & 1)
	155	iface->state = state_repeat_start;
	156	else
	157	iface->state = state_write;
	158	break;
	159
	160	case state_repeat_start:
	161	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	162	/* fallthrough */
99c3adb4	163
1da177e4 LT	164	case state_quick:
1da177e4 LT	165	if (iface->address_byte & 1) {
99c3adb4	166	if (iface->len == 1)
1da177e4 LT	167	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	168	else
	169	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	170	outb(iface->address_byte, ACBSDA);
	171
	172	iface->state = state_read;
	173	} else {
	174	outb(iface->address_byte, ACBSDA);
	175
	176	iface->state = state_write;
	177	}
	178	break;
	179
	180	case state_read:
	181	/* Set ACK if receiving the last byte */
	182	if (iface->len == 1)
	183	outb(inb(ACBCTL1) \| ACBCTL1_ACK, ACBCTL1);
	184	else
	185	outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
	186
	187	*iface->ptr++ = inb(ACBSDA);
	188	--iface->len;
	189
	190	if (iface->len == 0) {
	191	iface->result = 0;
	192	iface->state = state_idle;
	193	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	194	}
	195
	196	break;
	197
	198	case state_write:
	199	if (iface->len == 0) {
	200	iface->result = 0;
	201	iface->state = state_idle;
	202	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	203	break;
	204	}
99c3adb4	205
1da177e4 LT	206	outb(*iface->ptr++, ACBSDA);
1da177e4 LT	207	--iface->len;
99c3adb4	208
1da177e4 LT	209	break;
	210	}
	211
	212	return;
	213
1da177e4 LT	214	error:
	215	dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
	216	scx200_acb_state_name[iface->state]);
	217
	218	iface->state = state_idle;
	219	iface->result = -EIO;
	220	iface->needs_reset = 1;
	221	}
	222
1da177e4 LT	223	static void scx200_acb_poll(struct scx200_acb_iface *iface)
1da177e4 LT	224	{
9b7b6d3b	225	u8 status;
1da177e4 LT	226	unsigned long timeout;
	227
	228	timeout = jiffies + POLL_TIMEOUT;
	229	while (time_before(jiffies, timeout)) {
	230	status = inb(ACBST);
	231	if ((status & (ACBST_SDAST\|ACBST_BER\|ACBST_NEGACK)) != 0) {
	232	scx200_acb_machine(iface, status);
	233	return;
	234	}
f933ff50	235	yield();
1da177e4 LT	236	}
1da177e4 LT	237
9b7b6d3b BG	238	dev_err(&iface->adapter.dev, "timeout in state %s\n",
	239	scx200_acb_state_name[iface->state]);
	240
	241	iface->state = state_idle;
	242	iface->result = -EIO;
	243	iface->needs_reset = 1;
1da177e4	244	}
1da177e4 LT	245
	246	static void scx200_acb_reset(struct scx200_acb_iface *iface)
	247	{
	248	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	249	frequency: 16 clock cycles */
1da177e4 LT	250	outb(0x70, ACBCTL2);
	251	/* Polling mode */
	252	outb(0, ACBCTL1);
	253	/* Disable slave address */
	254	outb(0, ACBADDR);
	255	/* Enable the ACCESS.bus device */
	256	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	257	/* Free STALL after START */
	258	outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE \| ACBCTL1_NMINTE), ACBCTL1);
	259	/* Send a STOP */
	260	outb(inb(ACBCTL1) \| ACBCTL1_STOP, ACBCTL1);
	261	/* Clear BER, NEGACK and STASTR bits */
	262	outb(ACBST_BER \| ACBST_NEGACK \| ACBST_STASTR, ACBST);
	263	/* Clear BB bit */
	264	outb(inb(ACBCST) \| ACBCST_BB, ACBCST);
	265	}
	266
	267	static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
99c3adb4 BG	268	u16 address, unsigned short flags,
	269	char rw, u8 command, int size,
	270	union i2c_smbus_data *data)
1da177e4 LT	271	{
	272	struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
	273	int len;
	274	u8 *buffer;
	275	u16 cur_word;
	276	int rc;
	277
	278	switch (size) {
	279	case I2C_SMBUS_QUICK:
99c3adb4 BG	280	len = 0;
	281	buffer = NULL;
	282	break;
	283
1da177e4	284	case I2C_SMBUS_BYTE:
9b7b6d3b BG	285	len = 1;
9b7b6d3b BG	286	buffer = rw ? &data->byte : &command;
99c3adb4 BG	287	break;
99c3adb4 BG	288
1da177e4	289	case I2C_SMBUS_BYTE_DATA:
99c3adb4 BG	290	len = 1;
	291	buffer = &data->byte;
	292	break;
	293
1da177e4 LT	294	case I2C_SMBUS_WORD_DATA:
1da177e4 LT	295	len = 2;
99c3adb4 BG	296	cur_word = cpu_to_le16(data->word);
99c3adb4 BG	297	buffer = (u8 *)&cur_word;
1da177e4	298	break;
99c3adb4	299
1da177e4	300	case I2C_SMBUS_BLOCK_DATA:
99c3adb4 BG	301	len = data->block[0];
99c3adb4 BG	302	buffer = &data->block[1];
1da177e4	303	break;
99c3adb4	304
1da177e4	305	default:
99c3adb4	306	return -EINVAL;
1da177e4 LT	307	}
1da177e4 LT	308
ef4d9275 BG	309	dev_dbg(&adapter->dev,
	310	"size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
	311	size, address, command, len, rw);
1da177e4 LT	312
1da177e4 LT	313	if (!len && rw == I2C_SMBUS_READ) {
ef4d9275	314	dev_dbg(&adapter->dev, "zero length read\n");
1da177e4 LT	315	return -EINVAL;
	316	}
	317
3fb9a655	318	mutex_lock(&iface->mutex);
1da177e4	319
9b7b6d3b	320	iface->address_byte = (address << 1) \| rw;
1da177e4 LT	321	iface->command = command;
	322	iface->ptr = buffer;
	323	iface->len = len;
	324	iface->result = -EINVAL;
	325	iface->needs_reset = 0;
	326
	327	outb(inb(ACBCTL1) \| ACBCTL1_START, ACBCTL1);
	328
	329	if (size == I2C_SMBUS_QUICK \|\| size == I2C_SMBUS_BYTE)
	330	iface->state = state_quick;
	331	else
	332	iface->state = state_address;
	333
1da177e4 LT	334	while (iface->state != state_idle)
1da177e4 LT	335	scx200_acb_poll(iface);
1da177e4 LT	336
	337	if (iface->needs_reset)
	338	scx200_acb_reset(iface);
	339
	340	rc = iface->result;
	341
3fb9a655	342	mutex_unlock(&iface->mutex);
1da177e4 LT	343
1da177e4 LT	344	if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
99c3adb4	345	data->word = le16_to_cpu(cur_word);
1da177e4 LT	346
1da177e4 LT	347	#ifdef DEBUG
ef4d9275	348	dev_dbg(&adapter->dev, "transfer done, result: %d", rc);
1da177e4 LT	349	if (buffer) {
	350	int i;
	351	printk(" data:");
	352	for (i = 0; i < len; ++i)
	353	printk(" %02x", buffer[i]);
	354	}
	355	printk("\n");
	356	#endif
	357
	358	return rc;
	359	}
	360
	361	static u32 scx200_acb_func(struct i2c_adapter *adapter)
	362	{
	363	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	364	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	365	I2C_FUNC_SMBUS_BLOCK_DATA;
	366	}
	367
	368	/* For now, we only handle combined mode (smbus) */
	369	static struct i2c_algorithm scx200_acb_algorithm = {
1da177e4 LT	370	.smbus_xfer = scx200_acb_smbus_xfer,
	371	.functionality = scx200_acb_func,
	372	};
	373
	374	static struct scx200_acb_iface *scx200_acb_list;
8a05940d	375	static DECLARE_MUTEX(scx200_acb_list_mutex);
1da177e4 LT	376
	377	static int scx200_acb_probe(struct scx200_acb_iface *iface)
	378	{
	379	u8 val;
	380
	381	/* Disable the ACCESS.bus device and Configure the SCL
99c3adb4	382	frequency: 16 clock cycles */
1da177e4 LT	383	outb(0x70, ACBCTL2);
	384
	385	if (inb(ACBCTL2) != 0x70) {
ef4d9275	386	pr_debug(NAME ": ACBCTL2 readback failed\n");
1da177e4 LT	387	return -ENXIO;
	388	}
	389
	390	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	391
	392	val = inb(ACBCTL1);
	393	if (val) {
ef4d9275 BG	394	pr_debug(NAME ": disabled, but ACBCTL1=0x%02x\n",
ef4d9275 BG	395	val);
1da177e4 LT	396	return -ENXIO;
	397	}
	398
	399	outb(inb(ACBCTL2) \| ACBCTL2_ENABLE, ACBCTL2);
	400
	401	outb(inb(ACBCTL1) \| ACBCTL1_NMINTE, ACBCTL1);
	402
	403	val = inb(ACBCTL1);
	404	if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
ef4d9275 BG	405	pr_debug(NAME ": enabled, but NMINTE won't be set, "
ef4d9275 BG	406	"ACBCTL1=0x%02x\n", val);
1da177e4 LT	407	return -ENXIO;
	408	}
	409
	410	return 0;
	411	}
	412
16ffc5c9	413	static int __init scx200_acb_create(const char *text, int base, int index)
1da177e4 LT	414	{
	415	struct scx200_acb_iface *iface;
	416	struct i2c_adapter *adapter;
9b7b6d3b	417	int rc;
1da177e4 LT	418	char description[64];
1da177e4 LT	419
5263ebb5	420	iface = kzalloc(sizeof(*iface), GFP_KERNEL);
1da177e4 LT	421	if (!iface) {
	422	printk(KERN_ERR NAME ": can't allocate memory\n");
	423	rc = -ENOMEM;
	424	goto errout;
	425	}
	426
1da177e4 LT	427	adapter = &iface->adapter;
1da177e4 LT	428	i2c_set_adapdata(adapter, iface);
16ffc5c9	429	snprintf(adapter->name, I2C_NAME_SIZE, "%s ACB%d", text, index);
1da177e4	430	adapter->owner = THIS_MODULE;
1684a984	431	adapter->id = I2C_HW_SMBUS_SCX200;
1da177e4 LT	432	adapter->algo = &scx200_acb_algorithm;
	433	adapter->class = I2C_CLASS_HWMON;
	434
3fb9a655	435	mutex_init(&iface->mutex);
1da177e4	436
16ffc5c9 BG	437	snprintf(description, sizeof(description), "%s ACCESS.bus [%s]",
	438	text, adapter->name);
	439
1da177e4	440	if (request_region(base, 8, description) == 0) {
ef4d9275	441	printk(KERN_ERR NAME ": can't allocate io 0x%x-0x%x\n",
1da177e4 LT	442	base, base + 8-1);
1da177e4 LT	443	rc = -EBUSY;
9b7b6d3b	444	goto errout_free;
1da177e4 LT	445	}
	446	iface->base = base;
	447
	448	rc = scx200_acb_probe(iface);
	449	if (rc) {
ef4d9275	450	printk(KERN_WARNING NAME ": probe failed\n");
9b7b6d3b	451	goto errout_release;
1da177e4 LT	452	}
	453
	454	scx200_acb_reset(iface);
	455
	456	if (i2c_add_adapter(adapter) < 0) {
ef4d9275	457	printk(KERN_ERR NAME ": failed to register\n");
1da177e4	458	rc = -ENODEV;
9b7b6d3b	459	goto errout_release;
1da177e4 LT	460	}
1da177e4 LT	461
8a05940d	462	down(&scx200_acb_list_mutex);
1da177e4 LT	463	iface->next = scx200_acb_list;
1da177e4 LT	464	scx200_acb_list = iface;
8a05940d	465	up(&scx200_acb_list_mutex);
1da177e4 LT	466
	467	return 0;
	468
9b7b6d3b BG	469	errout_release:
	470	release_region(iface->base, 8);
	471	errout_free:
	472	kfree(iface);
1da177e4	473	errout:
1da177e4 LT	474	return rc;
	475	}
	476
	477	static struct pci_device_id scx200[] = {
	478	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
	479	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
	480	{ },
	481	};
	482
16ffc5c9 BG	483	static struct pci_device_id divil_pci[] = {
	484	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) },
	485	{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
	486	{ } /* NULL entry */
	487	};
	488
	489	#define MSR_LBAR_SMB 0x5140000B
	490
	491	static int scx200_add_cs553x(void)
	492	{
	493	u32 low, hi;
	494	u32 smb_base;
	495
	496	/* Grab & reserve the SMB I/O range */
	497	rdmsr(MSR_LBAR_SMB, low, hi);
	498
	499	/* Check the IO mask and whether SMB is enabled */
	500	if (hi != 0x0000F001) {
	501	printk(KERN_WARNING NAME ": SMBus not enabled\n");
	502	return -ENODEV;
	503	}
	504
	505	/* SMBus IO size is 8 bytes */
	506	smb_base = low & 0x0000FFF8;
	507
	508	return scx200_acb_create("CS5535", smb_base, 0);
	509	}
	510
1da177e4 LT	511	static int __init scx200_acb_init(void)
	512	{
	513	int i;
16ffc5c9	514	int rc = -ENODEV;
1da177e4 LT	515
	516	pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
	517
	518	/* Verify that this really is a SCx200 processor */
16ffc5c9 BG	519	if (pci_dev_present(scx200)) {
	520	for (i = 0; i < MAX_DEVICES; ++i) {
	521	if (base[i] > 0)
	522	rc = scx200_acb_create("SCx200", base[i], i);
	523	}
	524	} else if (pci_dev_present(divil_pci))
	525	rc = scx200_add_cs553x();
1da177e4	526
1da177e4 LT	527	return rc;
	528	}
	529
	530	static void __exit scx200_acb_cleanup(void)
	531	{
	532	struct scx200_acb_iface *iface;
99c3adb4	533
8a05940d	534	down(&scx200_acb_list_mutex);
1da177e4 LT	535	while ((iface = scx200_acb_list) != NULL) {
1da177e4 LT	536	scx200_acb_list = iface->next;
8a05940d	537	up(&scx200_acb_list_mutex);
1da177e4 LT	538
	539	i2c_del_adapter(&iface->adapter);
	540	release_region(iface->base, 8);
	541	kfree(iface);
8a05940d	542	down(&scx200_acb_list_mutex);
1da177e4	543	}
8a05940d	544	up(&scx200_acb_list_mutex);
1da177e4 LT	545	}
	546
	547	module_init(scx200_acb_init);
	548	module_exit(scx200_acb_cleanup);