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7f528135 ML |
1 | /* |
2 | * I2C multiplexer | |
3 | * | |
4 | * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it> | |
5 | * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it> | |
6 | * | |
7 | * This module supports the PCA954x series of I2C multiplexer/switch chips | |
8 | * made by Philips Semiconductors. | |
9 | * This includes the: | |
10 | * PCA9540, PCA9542, PCA9543, PCA9544, PCA9545, PCA9546, PCA9547 | |
11 | * and PCA9548. | |
12 | * | |
13 | * These chips are all controlled via the I2C bus itself, and all have a | |
14 | * single 8-bit register. The upstream "parent" bus fans out to two, | |
15 | * four, or eight downstream busses or channels; which of these | |
16 | * are selected is determined by the chip type and register contents. A | |
17 | * mux can select only one sub-bus at a time; a switch can select any | |
18 | * combination simultaneously. | |
19 | * | |
20 | * Based on: | |
21 | * pca954x.c from Kumar Gala <galak@kernel.crashing.org> | |
22 | * Copyright (C) 2006 | |
23 | * | |
24 | * Based on: | |
25 | * pca954x.c from Ken Harrenstien | |
26 | * Copyright (C) 2004 Google, Inc. (Ken Harrenstien) | |
27 | * | |
28 | * Based on: | |
29 | * i2c-virtual_cb.c from Brian Kuschak <bkuschak@yahoo.com> | |
30 | * and | |
7c81c60f | 31 | * pca9540.c from Jean Delvare <jdelvare@suse.de>. |
7f528135 ML |
32 | * |
33 | * This file is licensed under the terms of the GNU General Public | |
34 | * License version 2. This program is licensed "as is" without any | |
35 | * warranty of any kind, whether express or implied. | |
36 | */ | |
37 | ||
7f528135 | 38 | #include <linux/device.h> |
642653d1 | 39 | #include <linux/gpio/consumer.h> |
7f528135 ML |
40 | #include <linux/i2c.h> |
41 | #include <linux/i2c-mux.h> | |
7f528135 | 42 | #include <linux/i2c/pca954x.h> |
f2114795 PR |
43 | #include <linux/interrupt.h> |
44 | #include <linux/irq.h> | |
4b9b0073 | 45 | #include <linux/module.h> |
72f02715 | 46 | #include <linux/of.h> |
8a191a7a | 47 | #include <linux/of_device.h> |
f2114795 | 48 | #include <linux/of_irq.h> |
f5e596cd | 49 | #include <linux/pm.h> |
4b9b0073 | 50 | #include <linux/slab.h> |
f2114795 | 51 | #include <linux/spinlock.h> |
7f528135 ML |
52 | |
53 | #define PCA954X_MAX_NCHANS 8 | |
54 | ||
f2114795 PR |
55 | #define PCA954X_IRQ_OFFSET 4 |
56 | ||
7f528135 ML |
57 | enum pca_type { |
58 | pca_9540, | |
59 | pca_9542, | |
60 | pca_9543, | |
61 | pca_9544, | |
62 | pca_9545, | |
63 | pca_9546, | |
64 | pca_9547, | |
65 | pca_9548, | |
66 | }; | |
67 | ||
7f528135 ML |
68 | struct chip_desc { |
69 | u8 nchans; | |
70 | u8 enable; /* used for muxes only */ | |
f2114795 | 71 | u8 has_irq; |
7f528135 ML |
72 | enum muxtype { |
73 | pca954x_ismux = 0, | |
74 | pca954x_isswi | |
75 | } muxtype; | |
76 | }; | |
77 | ||
8a191a7a PR |
78 | struct pca954x { |
79 | const struct chip_desc *chip; | |
80 | ||
81 | u8 last_chan; /* last register value */ | |
82 | u8 deselect; | |
83 | struct i2c_client *client; | |
f2114795 PR |
84 | |
85 | struct irq_domain *irq; | |
86 | unsigned int irq_mask; | |
743cc375 | 87 | raw_spinlock_t lock; |
8a191a7a PR |
88 | }; |
89 | ||
7f528135 ML |
90 | /* Provide specs for the PCA954x types we know about */ |
91 | static const struct chip_desc chips[] = { | |
92 | [pca_9540] = { | |
93 | .nchans = 2, | |
94 | .enable = 0x4, | |
95 | .muxtype = pca954x_ismux, | |
96 | }, | |
f8251f1d PR |
97 | [pca_9542] = { |
98 | .nchans = 2, | |
99 | .enable = 0x4, | |
f2114795 | 100 | .has_irq = 1, |
f8251f1d PR |
101 | .muxtype = pca954x_ismux, |
102 | }, | |
7f528135 ML |
103 | [pca_9543] = { |
104 | .nchans = 2, | |
f2114795 | 105 | .has_irq = 1, |
7f528135 ML |
106 | .muxtype = pca954x_isswi, |
107 | }, | |
108 | [pca_9544] = { | |
109 | .nchans = 4, | |
110 | .enable = 0x4, | |
f2114795 | 111 | .has_irq = 1, |
7f528135 ML |
112 | .muxtype = pca954x_ismux, |
113 | }, | |
114 | [pca_9545] = { | |
115 | .nchans = 4, | |
f2114795 | 116 | .has_irq = 1, |
7f528135 ML |
117 | .muxtype = pca954x_isswi, |
118 | }, | |
dbe4d69d ML |
119 | [pca_9546] = { |
120 | .nchans = 4, | |
121 | .muxtype = pca954x_isswi, | |
122 | }, | |
7f528135 ML |
123 | [pca_9547] = { |
124 | .nchans = 8, | |
125 | .enable = 0x8, | |
126 | .muxtype = pca954x_ismux, | |
127 | }, | |
128 | [pca_9548] = { | |
129 | .nchans = 8, | |
130 | .muxtype = pca954x_isswi, | |
131 | }, | |
132 | }; | |
133 | ||
134 | static const struct i2c_device_id pca954x_id[] = { | |
135 | { "pca9540", pca_9540 }, | |
f8251f1d | 136 | { "pca9542", pca_9542 }, |
7f528135 ML |
137 | { "pca9543", pca_9543 }, |
138 | { "pca9544", pca_9544 }, | |
139 | { "pca9545", pca_9545 }, | |
dbe4d69d | 140 | { "pca9546", pca_9546 }, |
7f528135 ML |
141 | { "pca9547", pca_9547 }, |
142 | { "pca9548", pca_9548 }, | |
143 | { } | |
144 | }; | |
145 | MODULE_DEVICE_TABLE(i2c, pca954x_id); | |
146 | ||
8a191a7a PR |
147 | #ifdef CONFIG_OF |
148 | static const struct of_device_id pca954x_of_match[] = { | |
149 | { .compatible = "nxp,pca9540", .data = &chips[pca_9540] }, | |
150 | { .compatible = "nxp,pca9542", .data = &chips[pca_9542] }, | |
151 | { .compatible = "nxp,pca9543", .data = &chips[pca_9543] }, | |
152 | { .compatible = "nxp,pca9544", .data = &chips[pca_9544] }, | |
153 | { .compatible = "nxp,pca9545", .data = &chips[pca_9545] }, | |
154 | { .compatible = "nxp,pca9546", .data = &chips[pca_9546] }, | |
155 | { .compatible = "nxp,pca9547", .data = &chips[pca_9547] }, | |
156 | { .compatible = "nxp,pca9548", .data = &chips[pca_9548] }, | |
157 | {} | |
158 | }; | |
acf6ef1d | 159 | MODULE_DEVICE_TABLE(of, pca954x_of_match); |
8a191a7a PR |
160 | #endif |
161 | ||
7f528135 ML |
162 | /* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer() |
163 | for this as they will try to lock adapter a second time */ | |
164 | static int pca954x_reg_write(struct i2c_adapter *adap, | |
165 | struct i2c_client *client, u8 val) | |
166 | { | |
167 | int ret = -ENODEV; | |
168 | ||
169 | if (adap->algo->master_xfer) { | |
170 | struct i2c_msg msg; | |
171 | char buf[1]; | |
172 | ||
173 | msg.addr = client->addr; | |
174 | msg.flags = 0; | |
175 | msg.len = 1; | |
176 | buf[0] = val; | |
177 | msg.buf = buf; | |
0a8237ae | 178 | ret = __i2c_transfer(adap, &msg, 1); |
7f638c1c RK |
179 | |
180 | if (ret >= 0 && ret != 1) | |
181 | ret = -EREMOTEIO; | |
7f528135 ML |
182 | } else { |
183 | union i2c_smbus_data data; | |
184 | ret = adap->algo->smbus_xfer(adap, client->addr, | |
185 | client->flags, | |
186 | I2C_SMBUS_WRITE, | |
187 | val, I2C_SMBUS_BYTE, &data); | |
188 | } | |
189 | ||
190 | return ret; | |
191 | } | |
192 | ||
7fcac980 | 193 | static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan) |
7f528135 | 194 | { |
7fcac980 PR |
195 | struct pca954x *data = i2c_mux_priv(muxc); |
196 | struct i2c_client *client = data->client; | |
8a191a7a | 197 | const struct chip_desc *chip = data->chip; |
7f528135 ML |
198 | u8 regval; |
199 | int ret = 0; | |
200 | ||
201 | /* we make switches look like muxes, not sure how to be smarter */ | |
202 | if (chip->muxtype == pca954x_ismux) | |
203 | regval = chan | chip->enable; | |
204 | else | |
205 | regval = 1 << chan; | |
206 | ||
207 | /* Only select the channel if its different from the last channel */ | |
208 | if (data->last_chan != regval) { | |
7fcac980 | 209 | ret = pca954x_reg_write(muxc->parent, client, regval); |
7f638c1c | 210 | data->last_chan = ret < 0 ? 0 : regval; |
7f528135 ML |
211 | } |
212 | ||
213 | return ret; | |
214 | } | |
215 | ||
7fcac980 | 216 | static int pca954x_deselect_mux(struct i2c_mux_core *muxc, u32 chan) |
7f528135 | 217 | { |
7fcac980 PR |
218 | struct pca954x *data = i2c_mux_priv(muxc); |
219 | struct i2c_client *client = data->client; | |
220 | ||
221 | if (!(data->deselect & (1 << chan))) | |
222 | return 0; | |
7f528135 ML |
223 | |
224 | /* Deselect active channel */ | |
225 | data->last_chan = 0; | |
7fcac980 | 226 | return pca954x_reg_write(muxc->parent, client, data->last_chan); |
7f528135 ML |
227 | } |
228 | ||
f2114795 PR |
229 | static irqreturn_t pca954x_irq_handler(int irq, void *dev_id) |
230 | { | |
231 | struct pca954x *data = dev_id; | |
232 | unsigned int child_irq; | |
233 | int ret, i, handled = 0; | |
234 | ||
235 | ret = i2c_smbus_read_byte(data->client); | |
236 | if (ret < 0) | |
237 | return IRQ_NONE; | |
238 | ||
239 | for (i = 0; i < data->chip->nchans; i++) { | |
240 | if (ret & BIT(PCA954X_IRQ_OFFSET + i)) { | |
241 | child_irq = irq_linear_revmap(data->irq, i); | |
242 | handle_nested_irq(child_irq); | |
243 | handled++; | |
244 | } | |
245 | } | |
246 | return handled ? IRQ_HANDLED : IRQ_NONE; | |
247 | } | |
248 | ||
249 | static void pca954x_irq_mask(struct irq_data *idata) | |
250 | { | |
251 | struct pca954x *data = irq_data_get_irq_chip_data(idata); | |
252 | unsigned int pos = idata->hwirq; | |
253 | unsigned long flags; | |
254 | ||
743cc375 | 255 | raw_spin_lock_irqsave(&data->lock, flags); |
f2114795 PR |
256 | |
257 | data->irq_mask &= ~BIT(pos); | |
258 | if (!data->irq_mask) | |
259 | disable_irq(data->client->irq); | |
260 | ||
743cc375 | 261 | raw_spin_unlock_irqrestore(&data->lock, flags); |
f2114795 PR |
262 | } |
263 | ||
264 | static void pca954x_irq_unmask(struct irq_data *idata) | |
265 | { | |
266 | struct pca954x *data = irq_data_get_irq_chip_data(idata); | |
267 | unsigned int pos = idata->hwirq; | |
268 | unsigned long flags; | |
269 | ||
743cc375 | 270 | raw_spin_lock_irqsave(&data->lock, flags); |
f2114795 PR |
271 | |
272 | if (!data->irq_mask) | |
273 | enable_irq(data->client->irq); | |
274 | data->irq_mask |= BIT(pos); | |
275 | ||
743cc375 | 276 | raw_spin_unlock_irqrestore(&data->lock, flags); |
f2114795 PR |
277 | } |
278 | ||
279 | static int pca954x_irq_set_type(struct irq_data *idata, unsigned int type) | |
280 | { | |
281 | if ((type & IRQ_TYPE_SENSE_MASK) != IRQ_TYPE_LEVEL_LOW) | |
282 | return -EINVAL; | |
283 | return 0; | |
284 | } | |
285 | ||
286 | static struct irq_chip pca954x_irq_chip = { | |
287 | .name = "i2c-mux-pca954x", | |
288 | .irq_mask = pca954x_irq_mask, | |
289 | .irq_unmask = pca954x_irq_unmask, | |
290 | .irq_set_type = pca954x_irq_set_type, | |
291 | }; | |
292 | ||
293 | static int pca954x_irq_setup(struct i2c_mux_core *muxc) | |
294 | { | |
295 | struct pca954x *data = i2c_mux_priv(muxc); | |
296 | struct i2c_client *client = data->client; | |
297 | int c, err, irq; | |
298 | ||
299 | if (!data->chip->has_irq || client->irq <= 0) | |
300 | return 0; | |
301 | ||
743cc375 | 302 | raw_spin_lock_init(&data->lock); |
f2114795 PR |
303 | |
304 | data->irq = irq_domain_add_linear(client->dev.of_node, | |
305 | data->chip->nchans, | |
306 | &irq_domain_simple_ops, data); | |
307 | if (!data->irq) | |
308 | return -ENODEV; | |
309 | ||
310 | for (c = 0; c < data->chip->nchans; c++) { | |
311 | irq = irq_create_mapping(data->irq, c); | |
312 | irq_set_chip_data(irq, data); | |
313 | irq_set_chip_and_handler(irq, &pca954x_irq_chip, | |
314 | handle_simple_irq); | |
315 | } | |
316 | ||
317 | err = devm_request_threaded_irq(&client->dev, data->client->irq, NULL, | |
318 | pca954x_irq_handler, | |
319 | IRQF_ONESHOT | IRQF_SHARED, | |
320 | "pca954x", data); | |
321 | if (err) | |
322 | goto err_req_irq; | |
323 | ||
324 | disable_irq(data->client->irq); | |
325 | ||
326 | return 0; | |
327 | err_req_irq: | |
328 | for (c = 0; c < data->chip->nchans; c++) { | |
329 | irq = irq_find_mapping(data->irq, c); | |
330 | irq_dispose_mapping(irq); | |
331 | } | |
332 | irq_domain_remove(data->irq); | |
333 | ||
334 | return err; | |
335 | } | |
336 | ||
7f528135 ML |
337 | /* |
338 | * I2C init/probing/exit functions | |
339 | */ | |
db79f2a1 GR |
340 | static int pca954x_probe(struct i2c_client *client, |
341 | const struct i2c_device_id *id) | |
7f528135 ML |
342 | { |
343 | struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); | |
6d4028c6 | 344 | struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); |
72f02715 AS |
345 | struct device_node *of_node = client->dev.of_node; |
346 | bool idle_disconnect_dt; | |
4807e845 | 347 | struct gpio_desc *gpio; |
eee543e8 | 348 | int num, force, class; |
7fcac980 | 349 | struct i2c_mux_core *muxc; |
7f528135 | 350 | struct pca954x *data; |
8a191a7a | 351 | const struct of_device_id *match; |
bc12cfc8 | 352 | int ret; |
7f528135 ML |
353 | |
354 | if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE)) | |
bc12cfc8 | 355 | return -ENODEV; |
7f528135 | 356 | |
7fcac980 PR |
357 | muxc = i2c_mux_alloc(adap, &client->dev, |
358 | PCA954X_MAX_NCHANS, sizeof(*data), 0, | |
359 | pca954x_select_chan, pca954x_deselect_mux); | |
360 | if (!muxc) | |
bc12cfc8 | 361 | return -ENOMEM; |
7fcac980 | 362 | data = i2c_mux_priv(muxc); |
7f528135 | 363 | |
7fcac980 PR |
364 | i2c_set_clientdata(client, muxc); |
365 | data->client = client; | |
7f528135 | 366 | |
4807e845 | 367 | /* Get the mux out of reset if a reset GPIO is specified. */ |
58b59e0f UKK |
368 | gpio = devm_gpiod_get_optional(&client->dev, "reset", GPIOD_OUT_LOW); |
369 | if (IS_ERR(gpio)) | |
370 | return PTR_ERR(gpio); | |
12097957 | 371 | |
cd823db8 PG |
372 | /* Write the mux register at addr to verify |
373 | * that the mux is in fact present. This also | |
374 | * initializes the mux to disconnected state. | |
7f528135 | 375 | */ |
cd823db8 | 376 | if (i2c_smbus_write_byte(client, 0) < 0) { |
7f528135 | 377 | dev_warn(&client->dev, "probe failed\n"); |
bc12cfc8 | 378 | return -ENODEV; |
7f528135 ML |
379 | } |
380 | ||
8a191a7a PR |
381 | match = of_match_device(of_match_ptr(pca954x_of_match), &client->dev); |
382 | if (match) | |
383 | data->chip = of_device_get_match_data(&client->dev); | |
e88162f9 | 384 | else |
8a191a7a PR |
385 | data->chip = &chips[id->driver_data]; |
386 | ||
7f528135 ML |
387 | data->last_chan = 0; /* force the first selection */ |
388 | ||
72f02715 AS |
389 | idle_disconnect_dt = of_node && |
390 | of_property_read_bool(of_node, "i2c-mux-idle-disconnect"); | |
391 | ||
f2114795 PR |
392 | ret = pca954x_irq_setup(muxc); |
393 | if (ret) | |
394 | goto fail_del_adapters; | |
395 | ||
7f528135 | 396 | /* Now create an adapter for each channel */ |
8a191a7a | 397 | for (num = 0; num < data->chip->nchans; num++) { |
72f02715 AS |
398 | bool idle_disconnect_pd = false; |
399 | ||
7f528135 | 400 | force = 0; /* dynamic adap number */ |
eee543e8 | 401 | class = 0; /* no class by default */ |
7f528135 | 402 | if (pdata) { |
eee543e8 | 403 | if (num < pdata->num_modes) { |
7f528135 ML |
404 | /* force static number */ |
405 | force = pdata->modes[num].adap_id; | |
eee543e8 JD |
406 | class = pdata->modes[num].class; |
407 | } else | |
7f528135 ML |
408 | /* discard unconfigured channels */ |
409 | break; | |
72f02715 | 410 | idle_disconnect_pd = pdata->modes[num].deselect_on_exit; |
7f528135 | 411 | } |
ad092de6 AH |
412 | data->deselect |= (idle_disconnect_pd || |
413 | idle_disconnect_dt) << num; | |
7f528135 | 414 | |
7fcac980 | 415 | ret = i2c_mux_add_adapter(muxc, force, num, class); |
0756ac32 | 416 | if (ret) |
f2114795 | 417 | goto fail_del_adapters; |
7f528135 ML |
418 | } |
419 | ||
420 | dev_info(&client->dev, | |
421 | "registered %d multiplexed busses for I2C %s %s\n", | |
8a191a7a | 422 | num, data->chip->muxtype == pca954x_ismux |
7f528135 ML |
423 | ? "mux" : "switch", client->name); |
424 | ||
425 | return 0; | |
426 | ||
f2114795 | 427 | fail_del_adapters: |
7fcac980 | 428 | i2c_mux_del_adapters(muxc); |
7f528135 ML |
429 | return ret; |
430 | } | |
431 | ||
db79f2a1 | 432 | static int pca954x_remove(struct i2c_client *client) |
7f528135 | 433 | { |
7fcac980 | 434 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); |
f2114795 PR |
435 | struct pca954x *data = i2c_mux_priv(muxc); |
436 | int c, irq; | |
437 | ||
438 | if (data->irq) { | |
439 | for (c = 0; c < data->chip->nchans; c++) { | |
440 | irq = irq_find_mapping(data->irq, c); | |
441 | irq_dispose_mapping(irq); | |
442 | } | |
443 | irq_domain_remove(data->irq); | |
444 | } | |
7f528135 | 445 | |
7fcac980 | 446 | i2c_mux_del_adapters(muxc); |
7f528135 ML |
447 | return 0; |
448 | } | |
449 | ||
f5e596cd JZ |
450 | #ifdef CONFIG_PM_SLEEP |
451 | static int pca954x_resume(struct device *dev) | |
452 | { | |
453 | struct i2c_client *client = to_i2c_client(dev); | |
7fcac980 PR |
454 | struct i2c_mux_core *muxc = i2c_get_clientdata(client); |
455 | struct pca954x *data = i2c_mux_priv(muxc); | |
f5e596cd JZ |
456 | |
457 | data->last_chan = 0; | |
458 | return i2c_smbus_write_byte(client, 0); | |
459 | } | |
460 | #endif | |
461 | ||
462 | static SIMPLE_DEV_PM_OPS(pca954x_pm, NULL, pca954x_resume); | |
463 | ||
7f528135 ML |
464 | static struct i2c_driver pca954x_driver = { |
465 | .driver = { | |
466 | .name = "pca954x", | |
f5e596cd | 467 | .pm = &pca954x_pm, |
8a191a7a | 468 | .of_match_table = of_match_ptr(pca954x_of_match), |
7f528135 ML |
469 | }, |
470 | .probe = pca954x_probe, | |
db79f2a1 | 471 | .remove = pca954x_remove, |
7f528135 ML |
472 | .id_table = pca954x_id, |
473 | }; | |
474 | ||
de05497a | 475 | module_i2c_driver(pca954x_driver); |
7f528135 ML |
476 | |
477 | MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); | |
478 | MODULE_DESCRIPTION("PCA954x I2C mux/switch driver"); | |
479 | MODULE_LICENSE("GPL v2"); |