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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer |
3 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
4 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
5 | * | |
6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
7 | * May be copied or modified under the terms of the GNU General Public License | |
ccd32e22 | 8 | * Copyright (C) 2002 Alan Cox |
1da177e4 | 9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> |
21b82477 | 10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> |
95ba8c17 | 11 | * Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> |
1da177e4 LT |
12 | * |
13 | * (U)DMA capable version of ali 1533/1543(C), 1535(D) | |
14 | * | |
15 | ********************************************************************** | |
16 | * 9/7/99 --Parts from the above author are included and need to be | |
17 | * converted into standard interface, once I finish the thought. | |
18 | * | |
19 | * Recent changes | |
20 | * Don't use LBA48 mode on ALi <= 0xC4 | |
21 | * Don't poke 0x79 with a non ALi northbridge | |
22 | * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) | |
23 | * Allow UDMA6 on revisions > 0xC4 | |
24 | * | |
25 | * Documentation | |
26 | * Chipset documentation available under NDA only | |
27 | * | |
28 | */ | |
29 | ||
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/types.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/pci.h> | |
1da177e4 LT |
34 | #include <linux/ide.h> |
35 | #include <linux/init.h> | |
95ba8c17 | 36 | #include <linux/dmi.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | ||
ced3ec8a BZ |
40 | #define DRV_NAME "alim15x3" |
41 | ||
1da177e4 LT |
42 | /* |
43 | * ALi devices are not plug in. Otherwise these static values would | |
44 | * need to go. They ought to go away anyway | |
45 | */ | |
46 | ||
47 | static u8 m5229_revision; | |
48 | static u8 chip_is_1543c_e; | |
49 | static struct pci_dev *isa_dev; | |
50 | ||
1da177e4 | 51 | /** |
88b2b32b | 52 | * ali_set_pio_mode - set host controller for PIO mode |
26bcb879 BZ |
53 | * @drive: drive |
54 | * @pio: PIO mode number | |
21b82477 | 55 | * |
26bcb879 | 56 | * Program the controller for the given PIO mode. |
1da177e4 | 57 | */ |
26bcb879 | 58 | |
88b2b32b | 59 | static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 | 60 | { |
898ec223 | 61 | ide_hwif_t *hwif = drive->hwif; |
36501650 | 62 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
288911af BZ |
63 | struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio); |
64 | int s_time = t->setup, a_time = t->active, c_time = t->cycle; | |
1da177e4 LT |
65 | u8 s_clc, a_clc, r_clc; |
66 | unsigned long flags; | |
30e5ee4d | 67 | int bus_speed = ide_pci_clk ? ide_pci_clk : 33; |
1da177e4 LT |
68 | int port = hwif->channel ? 0x5c : 0x58; |
69 | int portFIFO = hwif->channel ? 0x55 : 0x54; | |
123995b9 | 70 | u8 cd_dma_fifo = 0, unit = drive->dn & 1; |
1da177e4 | 71 | |
1da177e4 LT |
72 | if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8) |
73 | s_clc = 0; | |
74 | if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8) | |
75 | a_clc = 0; | |
1da177e4 | 76 | |
1da177e4 LT |
77 | if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) { |
78 | r_clc = 1; | |
79 | } else { | |
80 | if (r_clc >= 16) | |
81 | r_clc = 0; | |
82 | } | |
83 | local_irq_save(flags); | |
84 | ||
85 | /* | |
86 | * PIO mode => ATA FIFO on, ATAPI FIFO off | |
87 | */ | |
88 | pci_read_config_byte(dev, portFIFO, &cd_dma_fifo); | |
89 | if (drive->media==ide_disk) { | |
90 | if (unit) { | |
91 | pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50); | |
92 | } else { | |
93 | pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05); | |
94 | } | |
95 | } else { | |
96 | if (unit) { | |
97 | pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F); | |
98 | } else { | |
99 | pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0); | |
100 | } | |
101 | } | |
102 | ||
103 | pci_write_config_byte(dev, port, s_clc); | |
123995b9 | 104 | pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc); |
1da177e4 | 105 | local_irq_restore(flags); |
21b82477 SS |
106 | } |
107 | ||
1da177e4 | 108 | /** |
2d5eaa6d BZ |
109 | * ali_udma_filter - compute UDMA mask |
110 | * @drive: IDE device | |
1da177e4 | 111 | * |
2d5eaa6d BZ |
112 | * Return available UDMA modes. |
113 | * | |
114 | * The actual rules for the ALi are: | |
1da177e4 LT |
115 | * No UDMA on revisions <= 0x20 |
116 | * Disk only for revisions < 0xC2 | |
63b1623e | 117 | * Not WDC drives on M1543C-E (?) |
1da177e4 | 118 | */ |
1da177e4 | 119 | |
2d5eaa6d | 120 | static u8 ali_udma_filter(ide_drive_t *drive) |
1da177e4 | 121 | { |
2d5eaa6d BZ |
122 | if (m5229_revision > 0x20 && m5229_revision < 0xC2) { |
123 | if (drive->media != ide_disk) | |
124 | return 0; | |
2db3dae5 | 125 | if (chip_is_1543c_e && |
4dde4492 | 126 | strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) |
2d5eaa6d | 127 | return 0; |
1da177e4 LT |
128 | } |
129 | ||
2d5eaa6d | 130 | return drive->hwif->ultra_mask; |
1da177e4 LT |
131 | } |
132 | ||
133 | /** | |
88b2b32b BZ |
134 | * ali_set_dma_mode - set host controller for DMA mode |
135 | * @drive: drive | |
136 | * @speed: DMA mode | |
1da177e4 LT |
137 | * |
138 | * Configure the hardware for the desired IDE transfer mode. | |
1da177e4 | 139 | */ |
f212ff28 | 140 | |
88b2b32b | 141 | static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed) |
1da177e4 | 142 | { |
898ec223 | 143 | ide_hwif_t *hwif = drive->hwif; |
36501650 | 144 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 145 | u8 speed1 = speed; |
123995b9 | 146 | u8 unit = drive->dn & 1; |
1da177e4 LT |
147 | u8 tmpbyte = 0x00; |
148 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; | |
149 | ||
150 | if (speed == XFER_UDMA_6) | |
151 | speed1 = 0x47; | |
152 | ||
153 | if (speed < XFER_UDMA_0) { | |
154 | u8 ultra_enable = (unit) ? 0x7f : 0xf7; | |
155 | /* | |
156 | * clear "ultra enable" bit | |
157 | */ | |
158 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
159 | tmpbyte &= ultra_enable; | |
160 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
161 | ||
a6fe837e BZ |
162 | /* |
163 | * FIXME: Oh, my... DMA timings are never set. | |
164 | */ | |
1da177e4 LT |
165 | } else { |
166 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
167 | tmpbyte &= (0x0f << ((1-unit) << 2)); | |
168 | /* | |
169 | * enable ultra dma and set timing | |
170 | */ | |
171 | tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); | |
172 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
173 | if (speed >= XFER_UDMA_3) { | |
174 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
175 | tmpbyte |= 1; | |
176 | pci_write_config_byte(dev, 0x4b, tmpbyte); | |
177 | } | |
178 | } | |
1da177e4 LT |
179 | } |
180 | ||
1da177e4 | 181 | /** |
8a4a5738 | 182 | * ali_dma_check - DMA check |
1da177e4 | 183 | * @drive: target device |
22981694 | 184 | * @cmd: command |
1da177e4 LT |
185 | * |
186 | * Returns 1 if the DMA cannot be performed, zero on success. | |
187 | */ | |
188 | ||
8a4a5738 | 189 | static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd) |
1da177e4 LT |
190 | { |
191 | if (m5229_revision < 0xC2 && drive->media != ide_disk) { | |
22981694 | 192 | if (cmd->tf_flags & IDE_TFLAG_WRITE) |
1da177e4 LT |
193 | return 1; /* try PIO instead of DMA */ |
194 | } | |
8a4a5738 | 195 | return 0; |
1da177e4 LT |
196 | } |
197 | ||
198 | /** | |
199 | * init_chipset_ali15x3 - Initialise an ALi IDE controller | |
200 | * @dev: PCI device | |
1da177e4 LT |
201 | * |
202 | * This function initializes the ALI IDE controller and where | |
203 | * appropriate also sets up the 1533 southbridge. | |
204 | */ | |
a326b02b | 205 | |
2ed0ef54 | 206 | static int init_chipset_ali15x3(struct pci_dev *dev) |
1da177e4 LT |
207 | { |
208 | unsigned long flags; | |
209 | u8 tmpbyte; | |
b1489009 | 210 | struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); |
1da177e4 | 211 | |
44c10138 | 212 | m5229_revision = dev->revision; |
1da177e4 | 213 | |
b1489009 | 214 | isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
1da177e4 | 215 | |
1da177e4 LT |
216 | local_irq_save(flags); |
217 | ||
218 | if (m5229_revision < 0xC2) { | |
219 | /* | |
220 | * revision 0x20 (1543-E, 1543-F) | |
221 | * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) | |
222 | * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 | |
223 | */ | |
224 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
225 | /* | |
226 | * clear bit 7 | |
227 | */ | |
228 | pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); | |
cad221aa BZ |
229 | /* |
230 | * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 | |
231 | */ | |
232 | if (m5229_revision >= 0x20 && isa_dev) { | |
233 | pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); | |
234 | chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; | |
235 | } | |
b1489009 | 236 | goto out; |
1da177e4 LT |
237 | } |
238 | ||
239 | /* | |
240 | * 1543C-B?, 1535, 1535D, 1553 | |
241 | * Note 1: not all "motherboard" support this detection | |
242 | * Note 2: if no udma 66 device, the detection may "error". | |
243 | * but in this case, we will not set the device to | |
244 | * ultra 66, the detection result is not important | |
245 | */ | |
246 | ||
247 | /* | |
248 | * enable "Cable Detection", m5229, 0x4b, bit3 | |
249 | */ | |
250 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
251 | pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); | |
252 | ||
253 | /* | |
254 | * We should only tune the 1533 enable if we are using an ALi | |
255 | * North bridge. We might have no north found on some zany | |
256 | * box without a device at 0:0.0. The ALi bridge will be at | |
257 | * 0:0.0 so if we didn't find one we know what is cooking. | |
258 | */ | |
b1489009 AC |
259 | if (north && north->vendor != PCI_VENDOR_ID_AL) |
260 | goto out; | |
1da177e4 LT |
261 | |
262 | if (m5229_revision < 0xC5 && isa_dev) | |
263 | { | |
264 | /* | |
265 | * set south-bridge's enable bit, m1533, 0x79 | |
266 | */ | |
267 | ||
268 | pci_read_config_byte(isa_dev, 0x79, &tmpbyte); | |
269 | if (m5229_revision == 0xC2) { | |
270 | /* | |
271 | * 1543C-B0 (m1533, 0x79, bit 2) | |
272 | */ | |
273 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); | |
274 | } else if (m5229_revision >= 0xC3) { | |
275 | /* | |
276 | * 1553/1535 (m1533, 0x79, bit 1) | |
277 | */ | |
278 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); | |
279 | } | |
280 | } | |
cad221aa | 281 | |
b1489009 | 282 | out: |
cad221aa BZ |
283 | /* |
284 | * CD_ROM DMA on (m5229, 0x53, bit0) | |
285 | * Enable this bit even if we want to use PIO. | |
286 | * PIO FIFO off (m5229, 0x53, bit1) | |
287 | * The hardware will use 0x54h and 0x55h to control PIO FIFO. | |
288 | * (Not on later devices it seems) | |
289 | * | |
290 | * 0x53 changes meaning on later revs - we must no touch | |
291 | * bit 1 on them. Need to check if 0x20 is the right break. | |
292 | */ | |
293 | if (m5229_revision >= 0x20) { | |
294 | pci_read_config_byte(dev, 0x53, &tmpbyte); | |
295 | ||
296 | if (m5229_revision <= 0x20) | |
297 | tmpbyte = (tmpbyte & (~0x02)) | 0x01; | |
298 | else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) | |
299 | tmpbyte |= 0x03; | |
300 | else | |
301 | tmpbyte |= 0x01; | |
302 | ||
303 | pci_write_config_byte(dev, 0x53, tmpbyte); | |
304 | } | |
b1489009 AC |
305 | pci_dev_put(north); |
306 | pci_dev_put(isa_dev); | |
1da177e4 LT |
307 | local_irq_restore(flags); |
308 | return 0; | |
309 | } | |
310 | ||
95ba8c17 BZ |
311 | /* |
312 | * Cable special cases | |
313 | */ | |
314 | ||
1855256c | 315 | static const struct dmi_system_id cable_dmi_table[] = { |
95ba8c17 BZ |
316 | { |
317 | .ident = "HP Pavilion N5430", | |
318 | .matches = { | |
319 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
8663fd6d | 320 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
95ba8c17 BZ |
321 | }, |
322 | }, | |
03e6f489 DE |
323 | { |
324 | .ident = "Toshiba Satellite S1800-814", | |
325 | .matches = { | |
326 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
327 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
328 | }, | |
329 | }, | |
95ba8c17 BZ |
330 | { } |
331 | }; | |
332 | ||
333 | static int ali_cable_override(struct pci_dev *pdev) | |
334 | { | |
335 | /* Fujitsu P2000 */ | |
336 | if (pdev->subsystem_vendor == 0x10CF && | |
337 | pdev->subsystem_device == 0x10AF) | |
338 | return 1; | |
339 | ||
d151456a BZ |
340 | /* Mitac 8317 (Winbook-A) and relatives */ |
341 | if (pdev->subsystem_vendor == 0x1071 && | |
342 | pdev->subsystem_device == 0x8317) | |
343 | return 1; | |
344 | ||
95ba8c17 BZ |
345 | /* Systems by DMI */ |
346 | if (dmi_check_system(cable_dmi_table)) | |
347 | return 1; | |
348 | ||
349 | return 0; | |
350 | } | |
351 | ||
1da177e4 | 352 | /** |
ac95beed | 353 | * ali_cable_detect - cable detection |
1da177e4 LT |
354 | * @hwif: IDE interface |
355 | * | |
356 | * This checks if the controller and the cable are capable | |
357 | * of UDMA66 transfers. It doesn't check the drives. | |
358 | * But see note 2 below! | |
359 | * | |
360 | * FIXME: frobs bits that are not defined on newer ALi devicea | |
361 | */ | |
362 | ||
f454cbe8 | 363 | static u8 ali_cable_detect(ide_hwif_t *hwif) |
1da177e4 | 364 | { |
36501650 | 365 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
1da177e4 | 366 | unsigned long flags; |
95ba8c17 | 367 | u8 cbl = ATA_CBL_PATA40, tmpbyte; |
1da177e4 LT |
368 | |
369 | local_irq_save(flags); | |
370 | ||
371 | if (m5229_revision >= 0xC2) { | |
372 | /* | |
95ba8c17 BZ |
373 | * m5229 80-pin cable detection (from Host View) |
374 | * | |
375 | * 0x4a bit0 is 0 => primary channel has 80-pin | |
376 | * 0x4a bit1 is 0 => secondary channel has 80-pin | |
377 | * | |
378 | * Certain laptops use short but suitable cables | |
379 | * and don't implement the detect logic. | |
1da177e4 | 380 | */ |
95ba8c17 BZ |
381 | if (ali_cable_override(dev)) |
382 | cbl = ATA_CBL_PATA40_SHORT; | |
383 | else { | |
384 | pci_read_config_byte(dev, 0x4a, &tmpbyte); | |
385 | if ((tmpbyte & (1 << hwif->channel)) == 0) | |
386 | cbl = ATA_CBL_PATA80; | |
387 | } | |
1da177e4 LT |
388 | } |
389 | ||
1da177e4 LT |
390 | local_irq_restore(flags); |
391 | ||
95ba8c17 | 392 | return cbl; |
1da177e4 LT |
393 | } |
394 | ||
03682411 | 395 | #ifndef CONFIG_SPARC64 |
1da177e4 LT |
396 | /** |
397 | * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff | |
398 | * @hwif: interface to configure | |
399 | * | |
400 | * Obtain the IRQ tables for an ALi based IDE solution on the PC | |
401 | * class platforms. This part of the code isn't applicable to the | |
03682411 | 402 | * Sparc systems. |
1da177e4 LT |
403 | */ |
404 | ||
c2f12589 | 405 | static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) |
1da177e4 LT |
406 | { |
407 | u8 ideic, inmir; | |
408 | s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, | |
409 | 1, 11, 0, 12, 0, 14, 0, 15 }; | |
410 | int irq = -1; | |
411 | ||
1da177e4 LT |
412 | if (isa_dev) { |
413 | /* | |
414 | * read IDE interface control | |
415 | */ | |
416 | pci_read_config_byte(isa_dev, 0x58, &ideic); | |
417 | ||
418 | /* bit0, bit1 */ | |
419 | ideic = ideic & 0x03; | |
420 | ||
421 | /* get IRQ for IDE Controller */ | |
422 | if ((hwif->channel && ideic == 0x03) || | |
423 | (!hwif->channel && !ideic)) { | |
424 | /* | |
425 | * get SIRQ1 routing table | |
426 | */ | |
427 | pci_read_config_byte(isa_dev, 0x44, &inmir); | |
428 | inmir = inmir & 0x0f; | |
429 | irq = irq_routing_table[inmir]; | |
430 | } else if (hwif->channel && !(ideic & 0x01)) { | |
431 | /* | |
432 | * get SIRQ2 routing table | |
433 | */ | |
434 | pci_read_config_byte(isa_dev, 0x75, &inmir); | |
435 | inmir = inmir & 0x0f; | |
436 | irq = irq_routing_table[inmir]; | |
437 | } | |
438 | if(irq >= 0) | |
439 | hwif->irq = irq; | |
440 | } | |
1da177e4 | 441 | } |
6d1cee44 AV |
442 | #else |
443 | #define init_hwif_ali15x3 NULL | |
03682411 | 444 | #endif /* CONFIG_SPARC64 */ |
1da177e4 LT |
445 | |
446 | /** | |
447 | * init_dma_ali15x3 - set up DMA on ALi15x3 | |
448 | * @hwif: IDE interface | |
b123f56e | 449 | * @d: IDE port info |
1da177e4 | 450 | * |
b123f56e | 451 | * Set up the DMA functionality on the ALi 15x3. |
1da177e4 LT |
452 | */ |
453 | ||
b123f56e BZ |
454 | static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, |
455 | const struct ide_port_info *d) | |
1da177e4 | 456 | { |
b123f56e BZ |
457 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
458 | unsigned long base = ide_pci_dma_base(hwif, d); | |
459 | ||
ebb00fb5 BZ |
460 | if (base == 0) |
461 | return -1; | |
462 | ||
463 | hwif->dma_base = base; | |
464 | ||
465 | if (ide_pci_check_simplex(hwif, d) < 0) | |
466 | return -1; | |
467 | ||
468 | if (ide_pci_set_master(dev, d->name) < 0) | |
b123f56e BZ |
469 | return -1; |
470 | ||
0ecdca26 | 471 | if (!hwif->channel) |
b123f56e BZ |
472 | outb(inb(base + 2) & 0x60, base + 2); |
473 | ||
474 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
475 | hwif->name, base, base + 7); | |
476 | ||
477 | if (ide_allocate_dma_engine(hwif)) | |
478 | return -1; | |
479 | ||
b123f56e | 480 | return 0; |
1da177e4 LT |
481 | } |
482 | ||
ac95beed BZ |
483 | static const struct ide_port_ops ali_port_ops = { |
484 | .set_pio_mode = ali_set_pio_mode, | |
485 | .set_dma_mode = ali_set_dma_mode, | |
486 | .udma_filter = ali_udma_filter, | |
487 | .cable_detect = ali_cable_detect, | |
488 | }; | |
489 | ||
f37afdac BZ |
490 | static const struct ide_dma_ops ali_dma_ops = { |
491 | .dma_host_set = ide_dma_host_set, | |
8a4a5738 | 492 | .dma_setup = ide_dma_setup, |
f37afdac | 493 | .dma_start = ide_dma_start, |
653bcf52 | 494 | .dma_end = ide_dma_end, |
f37afdac BZ |
495 | .dma_test_irq = ide_dma_test_irq, |
496 | .dma_lost_irq = ide_dma_lost_irq, | |
8a4a5738 | 497 | .dma_check = ali_dma_check, |
22117d6e | 498 | .dma_timer_expiry = ide_dma_sff_timer_expiry, |
592b5315 | 499 | .dma_sff_read_status = ide_dma_sff_read_status, |
5e37bdc0 BZ |
500 | }; |
501 | ||
85620436 | 502 | static const struct ide_port_info ali15x3_chipset __devinitdata = { |
ced3ec8a | 503 | .name = DRV_NAME, |
1da177e4 LT |
504 | .init_chipset = init_chipset_ali15x3, |
505 | .init_hwif = init_hwif_ali15x3, | |
506 | .init_dma = init_dma_ali15x3, | |
ac95beed | 507 | .port_ops = &ali_port_ops, |
3f023b01 | 508 | .dma_ops = &sff_dma_ops, |
4099d143 | 509 | .pio_mask = ATA_PIO5, |
5f8b6c34 BZ |
510 | .swdma_mask = ATA_SWDMA2, |
511 | .mwdma_mask = ATA_MWDMA2, | |
1da177e4 LT |
512 | }; |
513 | ||
514 | /** | |
515 | * alim15x3_init_one - set up an ALi15x3 IDE controller | |
516 | * @dev: PCI device to set up | |
517 | * | |
518 | * Perform the actual set up for an ALi15x3 that has been found by the | |
519 | * hot plug layer. | |
520 | */ | |
521 | ||
522 | static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
523 | { | |
039788e1 | 524 | struct ide_port_info d = ali15x3_chipset; |
8ac2b42a | 525 | u8 rev = dev->revision, idx = id->driver_data; |
1da177e4 | 526 | |
28328307 BZ |
527 | /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ |
528 | if (rev <= 0xC4) | |
529 | d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; | |
530 | ||
531 | if (rev >= 0x20) { | |
532 | if (rev == 0x20) | |
533 | d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; | |
534 | ||
535 | if (rev < 0xC2) | |
536 | d.udma_mask = ATA_UDMA2; | |
537 | else if (rev == 0xC2 || rev == 0xC3) | |
538 | d.udma_mask = ATA_UDMA4; | |
539 | else if (rev == 0xC4) | |
540 | d.udma_mask = ATA_UDMA5; | |
541 | else | |
542 | d.udma_mask = ATA_UDMA6; | |
5e37bdc0 BZ |
543 | |
544 | d.dma_ops = &ali_dma_ops; | |
6d36b95f BZ |
545 | } else { |
546 | d.host_flags |= IDE_HFLAG_NO_DMA; | |
547 | ||
548 | d.mwdma_mask = d.swdma_mask = 0; | |
28328307 BZ |
549 | } |
550 | ||
8ac2b42a BZ |
551 | if (idx == 0) |
552 | d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; | |
553 | ||
6cdf6eb3 | 554 | return ide_pci_init_one(dev, &d, NULL); |
1da177e4 LT |
555 | } |
556 | ||
557 | ||
9cbcc5e3 BZ |
558 | static const struct pci_device_id alim15x3_pci_tbl[] = { |
559 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, | |
8ac2b42a | 560 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, |
1da177e4 LT |
561 | { 0, }, |
562 | }; | |
563 | MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); | |
564 | ||
a9ab09e2 | 565 | static struct pci_driver alim15x3_pci_driver = { |
1da177e4 LT |
566 | .name = "ALI15x3_IDE", |
567 | .id_table = alim15x3_pci_tbl, | |
568 | .probe = alim15x3_init_one, | |
8ee3f3b6 | 569 | .remove = ide_pci_remove, |
feb22b7f BZ |
570 | .suspend = ide_pci_suspend, |
571 | .resume = ide_pci_resume, | |
1da177e4 LT |
572 | }; |
573 | ||
82ab1eec | 574 | static int __init ali15x3_ide_init(void) |
1da177e4 | 575 | { |
a9ab09e2 | 576 | return ide_pci_register_driver(&alim15x3_pci_driver); |
1da177e4 LT |
577 | } |
578 | ||
8ee3f3b6 BZ |
579 | static void __exit ali15x3_ide_exit(void) |
580 | { | |
95964018 | 581 | pci_unregister_driver(&alim15x3_pci_driver); |
8ee3f3b6 BZ |
582 | } |
583 | ||
1da177e4 | 584 | module_init(ali15x3_ide_init); |
8ee3f3b6 | 585 | module_exit(ali15x3_ide_exit); |
1da177e4 LT |
586 | |
587 | MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox"); | |
588 | MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); | |
589 | MODULE_LICENSE("GPL"); |