[mirror_ubuntu-artful-kernel.git] / drivers / ide / alim15x3.c

/*
 *  Copyright (C) 1998-2000 Michel Aubry, Maintainer
 *  Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
 *  Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
 *
 *  Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
 *  May be copied or modified under the terms of the GNU General Public License
 *  Copyright (C) 2002 Alan Cox
 *  ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
 *  Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
 *  Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
 *
 *  (U)DMA capable version of ali 1533/1543(C), 1535(D)
 *
 **********************************************************************
 *  9/7/99 --Parts from the above author are included and need to be
 *  converted into standard interface, once I finish the thought.
 *
 *  Recent changes
 *	Don't use LBA48 mode on ALi <= 0xC4
 *	Don't poke 0x79 with a non ALi northbridge
 *	Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
 *	Allow UDMA6 on revisions > 0xC4
 *
 *  Documentation
 *	Chipset documentation available under NDA only
 *
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/dmi.h>

#include <asm/io.h>

#define DRV_NAME "alim15x3"

/*
 * Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
 * (this is DANGEROUS and could result in data corruption).
 */
static int wdc_udma;

module_param(wdc_udma, bool, 0);
MODULE_PARM_DESC(wdc_udma,
		 "allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");

/*
 *	ALi devices are not plug in. Otherwise these static values would
 *	need to go. They ought to go away anyway
 */
 
static u8 m5229_revision;
static u8 chip_is_1543c_e;
static struct pci_dev *isa_dev;

/**
 *	ali_set_pio_mode	-	set host controller for PIO mode
 *	@drive: drive
 *	@pio: PIO mode number
 *
 *	Program the controller for the given PIO mode.
 */

static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif = drive->hwif;
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	int s_time = t->setup, a_time = t->active, c_time = t->cycle;
	u8 s_clc, a_clc, r_clc;
	unsigned long flags;
	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
	int port = hwif->channel ? 0x5c : 0x58;
	int portFIFO = hwif->channel ? 0x55 : 0x54;
	u8 cd_dma_fifo = 0, unit = drive->dn & 1;

	if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
		s_clc = 0;
	if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
		a_clc = 0;

	if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
		r_clc = 1;
	} else {
		if (r_clc >= 16)
			r_clc = 0;
	}
	local_irq_save(flags);
	
	/* 
	 * PIO mode => ATA FIFO on, ATAPI FIFO off
	 */
	pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
	if (drive->media==ide_disk) {
		if (unit) {
			pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) | 0x50);
		} else {
			pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) | 0x05);
		}
	} else {
		if (unit) {
			pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
		} else {
			pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
		}
	}
	
	pci_write_config_byte(dev, port, s_clc);
	pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) | r_clc);
	local_irq_restore(flags);
}

/**
 *	ali_udma_filter		-	compute UDMA mask
 *	@drive: IDE device
 *
 *	Return available UDMA modes.
 *
 *	The actual rules for the ALi are:
 *		No UDMA on revisions <= 0x20
 *		Disk only for revisions < 0xC2
 *		Not WDC drives on M1543C-E (?)
 */

static u8 ali_udma_filter(ide_drive_t *drive)
{
	if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
		if (drive->media != ide_disk)
			return 0;
		if (wdc_udma == 0 && chip_is_1543c_e &&
		    strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
			return 0;
	}

	return drive->hwif->ultra_mask;
}

/**
 *	ali_set_dma_mode	-	set host controller for DMA mode
 *	@drive: drive
 *	@speed: DMA mode
 *
 *	Configure the hardware for the desired IDE transfer mode.
 */

static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
{
	ide_hwif_t *hwif	= drive->hwif;
	struct pci_dev *dev	= to_pci_dev(hwif->dev);
	u8 speed1		= speed;
	u8 unit			= drive->dn & 1;
	u8 tmpbyte		= 0x00;
	int m5229_udma		= (hwif->channel) ? 0x57 : 0x56;

	if (speed == XFER_UDMA_6)
		speed1 = 0x47;

	if (speed < XFER_UDMA_0) {
		u8 ultra_enable	= (unit) ? 0x7f : 0xf7;
		/*
		 * clear "ultra enable" bit
		 */
		pci_read_config_byte(dev, m5229_udma, &tmpbyte);
		tmpbyte &= ultra_enable;
		pci_write_config_byte(dev, m5229_udma, tmpbyte);

		/*
		 * FIXME: Oh, my... DMA timings are never set.
		 */
	} else {
		pci_read_config_byte(dev, m5229_udma, &tmpbyte);
		tmpbyte &= (0x0f << ((1-unit) << 2));
		/*
		 * enable ultra dma and set timing
		 */
		tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2));
		pci_write_config_byte(dev, m5229_udma, tmpbyte);
		if (speed >= XFER_UDMA_3) {
			pci_read_config_byte(dev, 0x4b, &tmpbyte);
			tmpbyte |= 1;
			pci_write_config_byte(dev, 0x4b, tmpbyte);
		}
	}
}

/**
 *	ali15x3_dma_setup	-	begin a DMA phase
 *	@drive:	target device
 *	@cmd: command
 *
 *	Returns 1 if the DMA cannot be performed, zero on success.
 */

static int ali15x3_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
{
	if (m5229_revision < 0xC2 && drive->media != ide_disk) {
		if (cmd->tf_flags & IDE_TFLAG_WRITE)
			return 1;	/* try PIO instead of DMA */
	}
	return ide_dma_setup(drive, cmd);
}

/**
 *	init_chipset_ali15x3	-	Initialise an ALi IDE controller
 *	@dev: PCI device
 *
 *	This function initializes the ALI IDE controller and where 
 *	appropriate also sets up the 1533 southbridge.
 */

static int init_chipset_ali15x3(struct pci_dev *dev)
{
	unsigned long flags;
	u8 tmpbyte;
	struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));

	m5229_revision = dev->revision;

	isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);

	local_irq_save(flags);

	if (m5229_revision < 0xC2) {
		/*
		 * revision 0x20 (1543-E, 1543-F)
		 * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
		 * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
		 */
		pci_read_config_byte(dev, 0x4b, &tmpbyte);
		/*
		 * clear bit 7
		 */
		pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
		/*
		 * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
		 */
		if (m5229_revision >= 0x20 && isa_dev) {
			pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
			chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
		}
		goto out;
	}

	/*
	 * 1543C-B?, 1535, 1535D, 1553
	 * Note 1: not all "motherboard" support this detection
	 * Note 2: if no udma 66 device, the detection may "error".
	 *         but in this case, we will not set the device to
	 *         ultra 66, the detection result is not important
	 */

	/*
	 * enable "Cable Detection", m5229, 0x4b, bit3
	 */
	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);

	/*
	 * We should only tune the 1533 enable if we are using an ALi
	 * North bridge. We might have no north found on some zany
	 * box without a device at 0:0.0. The ALi bridge will be at
	 * 0:0.0 so if we didn't find one we know what is cooking.
	 */
	if (north && north->vendor != PCI_VENDOR_ID_AL)
		goto out;

	if (m5229_revision < 0xC5 && isa_dev)
	{	
		/*
		 * set south-bridge's enable bit, m1533, 0x79
		 */

		pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
		if (m5229_revision == 0xC2) {
			/*
			 * 1543C-B0 (m1533, 0x79, bit 2)
			 */
			pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
		} else if (m5229_revision >= 0xC3) {
			/*
			 * 1553/1535 (m1533, 0x79, bit 1)
			 */
			pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
		}
	}

out:
	/*
	 * CD_ROM DMA on (m5229, 0x53, bit0)
	 *      Enable this bit even if we want to use PIO.
	 * PIO FIFO off (m5229, 0x53, bit1)
	 *      The hardware will use 0x54h and 0x55h to control PIO FIFO.
	 *	(Not on later devices it seems)
	 *
	 *	0x53 changes meaning on later revs - we must no touch
	 *	bit 1 on them.  Need to check if 0x20 is the right break.
	 */
	if (m5229_revision >= 0x20) {
		pci_read_config_byte(dev, 0x53, &tmpbyte);

		if (m5229_revision <= 0x20)
			tmpbyte = (tmpbyte & (~0x02)) | 0x01;
		else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
			tmpbyte |= 0x03;
		else
			tmpbyte |= 0x01;

		pci_write_config_byte(dev, 0x53, tmpbyte);
	}
	pci_dev_put(north);
	pci_dev_put(isa_dev);
	local_irq_restore(flags);
	return 0;
}

/*
 *	Cable special cases
 */

static const struct dmi_system_id cable_dmi_table[] = {
	{
		.ident = "HP Pavilion N5430",
		.matches = {
			DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
			DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
		},
	},
	{
		.ident = "Toshiba Satellite S1800-814",
		.matches = {
			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
			DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
		},
	},
	{ }
};

static int ali_cable_override(struct pci_dev *pdev)
{
	/* Fujitsu P2000 */
	if (pdev->subsystem_vendor == 0x10CF &&
	    pdev->subsystem_device == 0x10AF)
		return 1;

	/* Mitac 8317 (Winbook-A) and relatives */
	if (pdev->subsystem_vendor == 0x1071 &&
	    pdev->subsystem_device == 0x8317)
		return 1;

	/* Systems by DMI */
	if (dmi_check_system(cable_dmi_table))
		return 1;

	return 0;
}

/**
 *	ali_cable_detect	-	cable detection
 *	@hwif: IDE interface
 *
 *	This checks if the controller and the cable are capable
 *	of UDMA66 transfers. It doesn't check the drives.
 *	But see note 2 below!
 *
 *	FIXME: frobs bits that are not defined on newer ALi devicea
 */

static u8 ali_cable_detect(ide_hwif_t *hwif)
{
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	unsigned long flags;
	u8 cbl = ATA_CBL_PATA40, tmpbyte;

	local_irq_save(flags);

	if (m5229_revision >= 0xC2) {
		/*
		 * m5229 80-pin cable detection (from Host View)
		 *
		 * 0x4a bit0 is 0 => primary channel has 80-pin
		 * 0x4a bit1 is 0 => secondary channel has 80-pin
		 *
		 * Certain laptops use short but suitable cables
		 * and don't implement the detect logic.
		 */
		if (ali_cable_override(dev))
			cbl = ATA_CBL_PATA40_SHORT;
		else {
			pci_read_config_byte(dev, 0x4a, &tmpbyte);
			if ((tmpbyte & (1 << hwif->channel)) == 0)
				cbl = ATA_CBL_PATA80;
		}
	}

	local_irq_restore(flags);

	return cbl;
}

#if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
/**
 *	init_hwif_ali15x3	-	Initialize the ALI IDE x86 stuff
 *	@hwif: interface to configure
 *
 *	Obtain the IRQ tables for an ALi based IDE solution on the PC
 *	class platforms. This part of the code isn't applicable to the
 *	Sparc and PowerPC systems.
 */

static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
{
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	u8 ideic, inmir;
	s8 irq_routing_table[] = { -1,  9, 3, 10, 4,  5, 7,  6,
				      1, 11, 0, 12, 0, 14, 0, 15 };
	int irq = -1;

	if (dev->device == PCI_DEVICE_ID_AL_M5229)
		hwif->irq = hwif->channel ? 15 : 14;

	if (isa_dev) {
		/*
		 * read IDE interface control
		 */
		pci_read_config_byte(isa_dev, 0x58, &ideic);

		/* bit0, bit1 */
		ideic = ideic & 0x03;

		/* get IRQ for IDE Controller */
		if ((hwif->channel && ideic == 0x03) ||
		    (!hwif->channel && !ideic)) {
			/*
			 * get SIRQ1 routing table
			 */
			pci_read_config_byte(isa_dev, 0x44, &inmir);
			inmir = inmir & 0x0f;
			irq = irq_routing_table[inmir];
		} else if (hwif->channel && !(ideic & 0x01)) {
			/*
			 * get SIRQ2 routing table
			 */
			pci_read_config_byte(isa_dev, 0x75, &inmir);
			inmir = inmir & 0x0f;
			irq = irq_routing_table[inmir];
		}
		if(irq >= 0)
			hwif->irq = irq;
	}
}
#else
#define init_hwif_ali15x3 NULL
#endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */

/**
 *	init_dma_ali15x3	-	set up DMA on ALi15x3
 *	@hwif: IDE interface
 *	@d: IDE port info
 *
 *	Set up the DMA functionality on the ALi 15x3.
 */

static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
				      const struct ide_port_info *d)
{
	struct pci_dev *dev = to_pci_dev(hwif->dev);
	unsigned long base = ide_pci_dma_base(hwif, d);

	if (base == 0)
		return -1;

	hwif->dma_base = base;

	if (ide_pci_check_simplex(hwif, d) < 0)
		return -1;

	if (ide_pci_set_master(dev, d->name) < 0)
		return -1;

	if (!hwif->channel)
		outb(inb(base + 2) & 0x60, base + 2);

	printk(KERN_INFO "    %s: BM-DMA at 0x%04lx-0x%04lx\n",
			 hwif->name, base, base + 7);

	if (ide_allocate_dma_engine(hwif))
		return -1;

	return 0;
}

static const struct ide_port_ops ali_port_ops = {
	.set_pio_mode		= ali_set_pio_mode,
	.set_dma_mode		= ali_set_dma_mode,
	.udma_filter		= ali_udma_filter,
	.cable_detect		= ali_cable_detect,
};

static const struct ide_dma_ops ali_dma_ops = {
	.dma_host_set		= ide_dma_host_set,
	.dma_setup		= ali15x3_dma_setup,
	.dma_exec_cmd		= ide_dma_exec_cmd,
	.dma_start		= ide_dma_start,
	.dma_end		= ide_dma_end,
	.dma_test_irq		= ide_dma_test_irq,
	.dma_lost_irq		= ide_dma_lost_irq,
	.dma_timeout		= ide_dma_timeout,
	.dma_sff_read_status	= ide_dma_sff_read_status,
};

static const struct ide_port_info ali15x3_chipset __devinitdata = {
	.name		= DRV_NAME,
	.init_chipset	= init_chipset_ali15x3,
	.init_hwif	= init_hwif_ali15x3,
	.init_dma	= init_dma_ali15x3,
	.port_ops	= &ali_port_ops,
	.dma_ops	= &sff_dma_ops,
	.pio_mask	= ATA_PIO5,
	.swdma_mask	= ATA_SWDMA2,
	.mwdma_mask	= ATA_MWDMA2,
};

/**
 *	alim15x3_init_one	-	set up an ALi15x3 IDE controller
 *	@dev: PCI device to set up
 *
 *	Perform the actual set up for an ALi15x3 that has been found by the
 *	hot plug layer.
 */
 
static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct ide_port_info d = ali15x3_chipset;
	u8 rev = dev->revision, idx = id->driver_data;

	/* don't use LBA48 DMA on ALi devices before rev 0xC5 */
	if (rev <= 0xC4)
		d.host_flags |= IDE_HFLAG_NO_LBA48_DMA;

	if (rev >= 0x20) {
		if (rev == 0x20)
			d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA;

		if (rev < 0xC2)
			d.udma_mask = ATA_UDMA2;
		else if (rev == 0xC2 || rev == 0xC3)
			d.udma_mask = ATA_UDMA4;
		else if (rev == 0xC4)
			d.udma_mask = ATA_UDMA5;
		else
			d.udma_mask = ATA_UDMA6;

		d.dma_ops = &ali_dma_ops;
	} else {
		d.host_flags |= IDE_HFLAG_NO_DMA;

		d.mwdma_mask = d.swdma_mask = 0;
	}

	if (idx == 0)
		d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;

	return ide_pci_init_one(dev, &d, NULL);
}


static const struct pci_device_id alim15x3_pci_tbl[] = {
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);

static struct pci_driver alim15x3_pci_driver = {
	.name		= "ALI15x3_IDE",
	.id_table	= alim15x3_pci_tbl,
	.probe		= alim15x3_init_one,
	.remove		= ide_pci_remove,
	.suspend	= ide_pci_suspend,
	.resume		= ide_pci_resume,
};

static int __init ali15x3_ide_init(void)
{
	return ide_pci_register_driver(&alim15x3_pci_driver);
}

static void __exit ali15x3_ide_exit(void)
{
	pci_unregister_driver(&alim15x3_pci_driver);
}

module_init(ali15x3_ide_init);
module_exit(ali15x3_ide_exit);

MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1998-2000 Michel Aubry, Maintainer
	3	* Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer
	4	* Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer
	5	*
	6	* Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org)
	7	* May be copied or modified under the terms of the GNU General Public License
ccd32e22	8	* Copyright (C) 2002 Alan Cox
1da177e4	9	* ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw>
21b82477	10	* Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com>
95ba8c17	11	* Copyright (C) 2007 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
1da177e4 LT	12	*
	13	* (U)DMA capable version of ali 1533/1543(C), 1535(D)
	14	*
	15	**********************************************************************
	16	* 9/7/99 --Parts from the above author are included and need to be
	17	* converted into standard interface, once I finish the thought.
	18	*
	19	* Recent changes
	20	* Don't use LBA48 mode on ALi <= 0xC4
	21	* Don't poke 0x79 with a non ALi northbridge
	22	* Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang)
	23	* Allow UDMA6 on revisions > 0xC4
	24	*
	25	* Documentation
	26	* Chipset documentation available under NDA only
	27	*
	28	*/
	29
1da177e4 LT	30	#include <linux/module.h>
	31	#include <linux/types.h>
	32	#include <linux/kernel.h>
	33	#include <linux/pci.h>
1da177e4 LT	34	#include <linux/ide.h>
1da177e4 LT	35	#include <linux/init.h>
95ba8c17	36	#include <linux/dmi.h>
1da177e4 LT	37
	38	#include <asm/io.h>
	39
ced3ec8a BZ	40	#define DRV_NAME "alim15x3"
ced3ec8a BZ	41
63b1623e BZ	42	/*
	43	* Allow UDMA on M1543C-E chipset for WDC disks that ignore CRC checking
	44	* (this is DANGEROUS and could result in data corruption).
	45	*/
	46	static int wdc_udma;
	47
	48	module_param(wdc_udma, bool, 0);
	49	MODULE_PARM_DESC(wdc_udma,
	50	"allow UDMA on M1543C-E chipset for WDC disks (DANGEROUS)");
	51
1da177e4 LT	52	/*
	53	* ALi devices are not plug in. Otherwise these static values would
	54	* need to go. They ought to go away anyway
	55	*/
	56
	57	static u8 m5229_revision;
	58	static u8 chip_is_1543c_e;
	59	static struct pci_dev *isa_dev;
	60
1da177e4	61	/**
88b2b32b	62	* ali_set_pio_mode - set host controller for PIO mode
26bcb879 BZ	63	* @drive: drive
26bcb879 BZ	64	* @pio: PIO mode number
21b82477	65	*
26bcb879	66	* Program the controller for the given PIO mode.
1da177e4	67	*/
26bcb879	68
88b2b32b	69	static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	70	{
898ec223	71	ide_hwif_t *hwif = drive->hwif;
36501650	72	struct pci_dev *dev = to_pci_dev(hwif->dev);
288911af BZ	73	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
288911af BZ	74	int s_time = t->setup, a_time = t->active, c_time = t->cycle;
1da177e4 LT	75	u8 s_clc, a_clc, r_clc;
1da177e4 LT	76	unsigned long flags;
30e5ee4d	77	int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
1da177e4 LT	78	int port = hwif->channel ? 0x5c : 0x58;
1da177e4 LT	79	int portFIFO = hwif->channel ? 0x55 : 0x54;
123995b9	80	u8 cd_dma_fifo = 0, unit = drive->dn & 1;
1da177e4	81
1da177e4 LT	82	if ((s_clc = (s_time * bus_speed + 999) / 1000) >= 8)
	83	s_clc = 0;
	84	if ((a_clc = (a_time * bus_speed + 999) / 1000) >= 8)
	85	a_clc = 0;
1da177e4	86
1da177e4 LT	87	if (!(r_clc = (c_time * bus_speed + 999) / 1000 - a_clc - s_clc)) {
	88	r_clc = 1;
	89	} else {
	90	if (r_clc >= 16)
	91	r_clc = 0;
	92	}
	93	local_irq_save(flags);
	94
	95	/*
	96	* PIO mode => ATA FIFO on, ATAPI FIFO off
	97	*/
	98	pci_read_config_byte(dev, portFIFO, &cd_dma_fifo);
	99	if (drive->media==ide_disk) {
	100	if (unit) {
	101	pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0x0F) \| 0x50);
	102	} else {
	103	pci_write_config_byte(dev, portFIFO, (cd_dma_fifo & 0xF0) \| 0x05);
	104	}
	105	} else {
	106	if (unit) {
	107	pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0x0F);
	108	} else {
	109	pci_write_config_byte(dev, portFIFO, cd_dma_fifo & 0xF0);
	110	}
	111	}
	112
	113	pci_write_config_byte(dev, port, s_clc);
123995b9	114	pci_write_config_byte(dev, port + unit + 2, (a_clc << 4) \| r_clc);
1da177e4	115	local_irq_restore(flags);
21b82477 SS	116	}
21b82477 SS	117
1da177e4	118	/**
2d5eaa6d BZ	119	* ali_udma_filter - compute UDMA mask
2d5eaa6d BZ	120	* @drive: IDE device
1da177e4	121	*
2d5eaa6d BZ	122	* Return available UDMA modes.
	123	*
	124	* The actual rules for the ALi are:
1da177e4 LT	125	* No UDMA on revisions <= 0x20
1da177e4 LT	126	* Disk only for revisions < 0xC2
63b1623e	127	* Not WDC drives on M1543C-E (?)
1da177e4	128	*/
1da177e4	129
2d5eaa6d	130	static u8 ali_udma_filter(ide_drive_t *drive)
1da177e4	131	{
2d5eaa6d BZ	132	if (m5229_revision > 0x20 && m5229_revision < 0xC2) {
	133	if (drive->media != ide_disk)
	134	return 0;
4dde4492 BZ	135	if (wdc_udma == 0 && chip_is_1543c_e &&
4dde4492 BZ	136	strstr((char *)&drive->id[ATA_ID_PROD], "WDC "))
2d5eaa6d	137	return 0;
1da177e4 LT	138	}
1da177e4 LT	139
2d5eaa6d	140	return drive->hwif->ultra_mask;
1da177e4 LT	141	}
	142
	143	/**
88b2b32b BZ	144	* ali_set_dma_mode - set host controller for DMA mode
	145	* @drive: drive
	146	* @speed: DMA mode
1da177e4 LT	147	*
1da177e4 LT	148	* Configure the hardware for the desired IDE transfer mode.
1da177e4	149	*/
f212ff28	150
88b2b32b	151	static void ali_set_dma_mode(ide_drive_t *drive, const u8 speed)
1da177e4	152	{
898ec223	153	ide_hwif_t *hwif = drive->hwif;
36501650	154	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4	155	u8 speed1 = speed;
123995b9	156	u8 unit = drive->dn & 1;
1da177e4 LT	157	u8 tmpbyte = 0x00;
	158	int m5229_udma = (hwif->channel) ? 0x57 : 0x56;
	159
	160	if (speed == XFER_UDMA_6)
	161	speed1 = 0x47;
	162
	163	if (speed < XFER_UDMA_0) {
	164	u8 ultra_enable = (unit) ? 0x7f : 0xf7;
	165	/*
	166	* clear "ultra enable" bit
	167	*/
	168	pci_read_config_byte(dev, m5229_udma, &tmpbyte);
	169	tmpbyte &= ultra_enable;
	170	pci_write_config_byte(dev, m5229_udma, tmpbyte);
	171
a6fe837e BZ	172	/*
	173	* FIXME: Oh, my... DMA timings are never set.
	174	*/
1da177e4 LT	175	} else {
	176	pci_read_config_byte(dev, m5229_udma, &tmpbyte);
	177	tmpbyte &= (0x0f << ((1-unit) << 2));
	178	/*
	179	* enable ultra dma and set timing
	180	*/
	181	tmpbyte \|= ((0x08 \| ((4-speed1)&0x07)) << (unit << 2));
	182	pci_write_config_byte(dev, m5229_udma, tmpbyte);
	183	if (speed >= XFER_UDMA_3) {
	184	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	185	tmpbyte \|= 1;
	186	pci_write_config_byte(dev, 0x4b, tmpbyte);
	187	}
	188	}
1da177e4 LT	189	}
1da177e4 LT	190
1da177e4 LT	191	/**
	192	* ali15x3_dma_setup - begin a DMA phase
	193	* @drive: target device
22981694	194	* @cmd: command
1da177e4 LT	195	*
	196	* Returns 1 if the DMA cannot be performed, zero on success.
	197	*/
	198
22981694	199	static int ali15x3_dma_setup(ide_drive_t drive, struct ide_cmd cmd)
1da177e4 LT	200	{
1da177e4 LT	201	if (m5229_revision < 0xC2 && drive->media != ide_disk) {
22981694	202	if (cmd->tf_flags & IDE_TFLAG_WRITE)
1da177e4 LT	203	return 1; /* try PIO instead of DMA */
1da177e4 LT	204	}
22981694	205	return ide_dma_setup(drive, cmd);
1da177e4 LT	206	}
	207
	208	/**
	209	* init_chipset_ali15x3 - Initialise an ALi IDE controller
	210	* @dev: PCI device
1da177e4 LT	211	*
	212	* This function initializes the ALI IDE controller and where
	213	* appropriate also sets up the 1533 southbridge.
	214	*/
a326b02b	215
2ed0ef54	216	static int init_chipset_ali15x3(struct pci_dev *dev)
1da177e4 LT	217	{
	218	unsigned long flags;
	219	u8 tmpbyte;
b1489009	220	struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
1da177e4	221
44c10138	222	m5229_revision = dev->revision;
1da177e4	223
b1489009	224	isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
1da177e4	225
1da177e4 LT	226	local_irq_save(flags);
	227
	228	if (m5229_revision < 0xC2) {
	229	/*
	230	* revision 0x20 (1543-E, 1543-F)
	231	* revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
	232	* clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
	233	*/
	234	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	235	/*
	236	* clear bit 7
	237	*/
	238	pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
cad221aa BZ	239	/*
	240	* check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
	241	*/
	242	if (m5229_revision >= 0x20 && isa_dev) {
	243	pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
	244	chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
	245	}
b1489009	246	goto out;
1da177e4 LT	247	}
	248
	249	/*
	250	* 1543C-B?, 1535, 1535D, 1553
	251	* Note 1: not all "motherboard" support this detection
	252	* Note 2: if no udma 66 device, the detection may "error".
	253	* but in this case, we will not set the device to
	254	* ultra 66, the detection result is not important
	255	*/
	256
	257	/*
	258	* enable "Cable Detection", m5229, 0x4b, bit3
	259	*/
	260	pci_read_config_byte(dev, 0x4b, &tmpbyte);
	261	pci_write_config_byte(dev, 0x4b, tmpbyte \| 0x08);
	262
	263	/*
	264	* We should only tune the 1533 enable if we are using an ALi
	265	* North bridge. We might have no north found on some zany
	266	* box without a device at 0:0.0. The ALi bridge will be at
	267	* 0:0.0 so if we didn't find one we know what is cooking.
	268	*/
b1489009 AC	269	if (north && north->vendor != PCI_VENDOR_ID_AL)
b1489009 AC	270	goto out;
1da177e4 LT	271
	272	if (m5229_revision < 0xC5 && isa_dev)
	273	{
	274	/*
	275	* set south-bridge's enable bit, m1533, 0x79
	276	*/
	277
	278	pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
	279	if (m5229_revision == 0xC2) {
	280	/*
	281	* 1543C-B0 (m1533, 0x79, bit 2)
	282	*/
	283	pci_write_config_byte(isa_dev, 0x79, tmpbyte \| 0x04);
	284	} else if (m5229_revision >= 0xC3) {
	285	/*
	286	* 1553/1535 (m1533, 0x79, bit 1)
	287	*/
	288	pci_write_config_byte(isa_dev, 0x79, tmpbyte \| 0x02);
	289	}
	290	}
cad221aa	291
b1489009	292	out:
cad221aa BZ	293	/*
	294	* CD_ROM DMA on (m5229, 0x53, bit0)
	295	* Enable this bit even if we want to use PIO.
	296	* PIO FIFO off (m5229, 0x53, bit1)
	297	* The hardware will use 0x54h and 0x55h to control PIO FIFO.
	298	* (Not on later devices it seems)
	299	*
	300	* 0x53 changes meaning on later revs - we must no touch
	301	* bit 1 on them. Need to check if 0x20 is the right break.
	302	*/
	303	if (m5229_revision >= 0x20) {
	304	pci_read_config_byte(dev, 0x53, &tmpbyte);
	305
	306	if (m5229_revision <= 0x20)
	307	tmpbyte = (tmpbyte & (~0x02)) \| 0x01;
	308	else if (m5229_revision == 0xc7 \|\| m5229_revision == 0xc8)
	309	tmpbyte \|= 0x03;
	310	else
	311	tmpbyte \|= 0x01;
	312
	313	pci_write_config_byte(dev, 0x53, tmpbyte);
	314	}
b1489009 AC	315	pci_dev_put(north);
b1489009 AC	316	pci_dev_put(isa_dev);
1da177e4 LT	317	local_irq_restore(flags);
	318	return 0;
	319	}
	320
95ba8c17 BZ	321	/*
	322	* Cable special cases
	323	*/
	324
1855256c	325	static const struct dmi_system_id cable_dmi_table[] = {
95ba8c17 BZ	326	{
	327	.ident = "HP Pavilion N5430",
	328	.matches = {
	329	DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
8663fd6d	330	DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
95ba8c17 BZ	331	},
95ba8c17 BZ	332	},
03e6f489 DE	333	{
	334	.ident = "Toshiba Satellite S1800-814",
	335	.matches = {
	336	DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
	337	DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
	338	},
	339	},
95ba8c17 BZ	340	{ }
	341	};
	342
	343	static int ali_cable_override(struct pci_dev *pdev)
	344	{
	345	/* Fujitsu P2000 */
	346	if (pdev->subsystem_vendor == 0x10CF &&
	347	pdev->subsystem_device == 0x10AF)
	348	return 1;
	349
d151456a BZ	350	/* Mitac 8317 (Winbook-A) and relatives */
	351	if (pdev->subsystem_vendor == 0x1071 &&
	352	pdev->subsystem_device == 0x8317)
	353	return 1;
	354
95ba8c17 BZ	355	/* Systems by DMI */
	356	if (dmi_check_system(cable_dmi_table))
	357	return 1;
	358
	359	return 0;
	360	}
	361
1da177e4	362	/**
ac95beed	363	* ali_cable_detect - cable detection
1da177e4 LT	364	* @hwif: IDE interface
	365	*
	366	* This checks if the controller and the cable are capable
	367	* of UDMA66 transfers. It doesn't check the drives.
	368	* But see note 2 below!
	369	*
	370	* FIXME: frobs bits that are not defined on newer ALi devicea
	371	*/
	372
f454cbe8	373	static u8 ali_cable_detect(ide_hwif_t *hwif)
1da177e4	374	{
36501650	375	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4	376	unsigned long flags;
95ba8c17	377	u8 cbl = ATA_CBL_PATA40, tmpbyte;
1da177e4 LT	378
	379	local_irq_save(flags);
	380
	381	if (m5229_revision >= 0xC2) {
	382	/*
95ba8c17 BZ	383	* m5229 80-pin cable detection (from Host View)
	384	*
	385	* 0x4a bit0 is 0 => primary channel has 80-pin
	386	* 0x4a bit1 is 0 => secondary channel has 80-pin
	387	*
	388	* Certain laptops use short but suitable cables
	389	* and don't implement the detect logic.
1da177e4	390	*/
95ba8c17 BZ	391	if (ali_cable_override(dev))
	392	cbl = ATA_CBL_PATA40_SHORT;
	393	else {
	394	pci_read_config_byte(dev, 0x4a, &tmpbyte);
	395	if ((tmpbyte & (1 << hwif->channel)) == 0)
	396	cbl = ATA_CBL_PATA80;
	397	}
1da177e4 LT	398	}
1da177e4 LT	399
1da177e4 LT	400	local_irq_restore(flags);
1da177e4 LT	401
95ba8c17	402	return cbl;
1da177e4 LT	403	}
1da177e4 LT	404
6d1cee44	405	#if !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC)
1da177e4 LT	406	/**
	407	* init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff
	408	* @hwif: interface to configure
	409	*
	410	* Obtain the IRQ tables for an ALi based IDE solution on the PC
	411	* class platforms. This part of the code isn't applicable to the
6d1cee44	412	* Sparc and PowerPC systems.
1da177e4 LT	413	*/
1da177e4 LT	414
c2f12589	415	static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif)
1da177e4	416	{
36501650	417	struct pci_dev *dev = to_pci_dev(hwif->dev);
1da177e4 LT	418	u8 ideic, inmir;
	419	s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6,
	420	1, 11, 0, 12, 0, 14, 0, 15 };
	421	int irq = -1;
	422
36501650	423	if (dev->device == PCI_DEVICE_ID_AL_M5229)
1da177e4 LT	424	hwif->irq = hwif->channel ? 15 : 14;
	425
	426	if (isa_dev) {
	427	/*
	428	* read IDE interface control
	429	*/
	430	pci_read_config_byte(isa_dev, 0x58, &ideic);
	431
	432	/* bit0, bit1 */
	433	ideic = ideic & 0x03;
	434
	435	/* get IRQ for IDE Controller */
	436	if ((hwif->channel && ideic == 0x03) \|\|
	437	(!hwif->channel && !ideic)) {
	438	/*
	439	* get SIRQ1 routing table
	440	*/
	441	pci_read_config_byte(isa_dev, 0x44, &inmir);
	442	inmir = inmir & 0x0f;
	443	irq = irq_routing_table[inmir];
	444	} else if (hwif->channel && !(ideic & 0x01)) {
	445	/*
	446	* get SIRQ2 routing table
	447	*/
	448	pci_read_config_byte(isa_dev, 0x75, &inmir);
	449	inmir = inmir & 0x0f;
	450	irq = irq_routing_table[inmir];
	451	}
	452	if(irq >= 0)
	453	hwif->irq = irq;
	454	}
1da177e4	455	}
6d1cee44 AV	456	#else
	457	#define init_hwif_ali15x3 NULL
	458	#endif /* !defined(CONFIG_SPARC64) && !defined(CONFIG_PPC) */
1da177e4 LT	459
	460	/**
	461	* init_dma_ali15x3 - set up DMA on ALi15x3
	462	* @hwif: IDE interface
b123f56e	463	* @d: IDE port info
1da177e4	464	*
b123f56e	465	* Set up the DMA functionality on the ALi 15x3.
1da177e4 LT	466	*/
1da177e4 LT	467
b123f56e BZ	468	static int __devinit init_dma_ali15x3(ide_hwif_t *hwif,
b123f56e BZ	469	const struct ide_port_info *d)
1da177e4	470	{
b123f56e BZ	471	struct pci_dev *dev = to_pci_dev(hwif->dev);
	472	unsigned long base = ide_pci_dma_base(hwif, d);
	473
ebb00fb5 BZ	474	if (base == 0)
	475	return -1;
	476
	477	hwif->dma_base = base;
	478
	479	if (ide_pci_check_simplex(hwif, d) < 0)
	480	return -1;
	481
	482	if (ide_pci_set_master(dev, d->name) < 0)
b123f56e BZ	483	return -1;
b123f56e BZ	484
0ecdca26	485	if (!hwif->channel)
b123f56e BZ	486	outb(inb(base + 2) & 0x60, base + 2);
	487
	488	printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
	489	hwif->name, base, base + 7);
	490
	491	if (ide_allocate_dma_engine(hwif))
	492	return -1;
	493
b123f56e	494	return 0;
1da177e4 LT	495	}
1da177e4 LT	496
ac95beed BZ	497	static const struct ide_port_ops ali_port_ops = {
	498	.set_pio_mode = ali_set_pio_mode,
	499	.set_dma_mode = ali_set_dma_mode,
	500	.udma_filter = ali_udma_filter,
	501	.cable_detect = ali_cable_detect,
	502	};
	503
f37afdac BZ	504	static const struct ide_dma_ops ali_dma_ops = {
f37afdac BZ	505	.dma_host_set = ide_dma_host_set,
5e37bdc0	506	.dma_setup = ali15x3_dma_setup,
f37afdac BZ	507	.dma_exec_cmd = ide_dma_exec_cmd,
f37afdac BZ	508	.dma_start = ide_dma_start,
653bcf52	509	.dma_end = ide_dma_end,
f37afdac BZ	510	.dma_test_irq = ide_dma_test_irq,
	511	.dma_lost_irq = ide_dma_lost_irq,
	512	.dma_timeout = ide_dma_timeout,
592b5315	513	.dma_sff_read_status = ide_dma_sff_read_status,
5e37bdc0 BZ	514	};
5e37bdc0 BZ	515
85620436	516	static const struct ide_port_info ali15x3_chipset __devinitdata = {
ced3ec8a	517	.name = DRV_NAME,
1da177e4 LT	518	.init_chipset = init_chipset_ali15x3,
	519	.init_hwif = init_hwif_ali15x3,
	520	.init_dma = init_dma_ali15x3,
ac95beed	521	.port_ops = &ali_port_ops,
3f023b01	522	.dma_ops = &sff_dma_ops,
4099d143	523	.pio_mask = ATA_PIO5,
5f8b6c34 BZ	524	.swdma_mask = ATA_SWDMA2,
5f8b6c34 BZ	525	.mwdma_mask = ATA_MWDMA2,
1da177e4 LT	526	};
	527
	528	/**
	529	* alim15x3_init_one - set up an ALi15x3 IDE controller
	530	* @dev: PCI device to set up
	531	*
	532	* Perform the actual set up for an ALi15x3 that has been found by the
	533	* hot plug layer.
	534	*/
	535
	536	static int __devinit alim15x3_init_one(struct pci_dev dev, const struct pci_device_id id)
	537	{
039788e1	538	struct ide_port_info d = ali15x3_chipset;
8ac2b42a	539	u8 rev = dev->revision, idx = id->driver_data;
1da177e4	540
28328307 BZ	541	/* don't use LBA48 DMA on ALi devices before rev 0xC5 */
	542	if (rev <= 0xC4)
	543	d.host_flags \|= IDE_HFLAG_NO_LBA48_DMA;
	544
	545	if (rev >= 0x20) {
	546	if (rev == 0x20)
	547	d.host_flags \|= IDE_HFLAG_NO_ATAPI_DMA;
	548
	549	if (rev < 0xC2)
	550	d.udma_mask = ATA_UDMA2;
	551	else if (rev == 0xC2 \|\| rev == 0xC3)
	552	d.udma_mask = ATA_UDMA4;
	553	else if (rev == 0xC4)
	554	d.udma_mask = ATA_UDMA5;
	555	else
	556	d.udma_mask = ATA_UDMA6;
5e37bdc0 BZ	557
5e37bdc0 BZ	558	d.dma_ops = &ali_dma_ops;
6d36b95f BZ	559	} else {
	560	d.host_flags \|= IDE_HFLAG_NO_DMA;
	561
	562	d.mwdma_mask = d.swdma_mask = 0;
28328307 BZ	563	}
28328307 BZ	564
8ac2b42a BZ	565	if (idx == 0)
	566	d.host_flags \|= IDE_HFLAG_CLEAR_SIMPLEX;
	567
6cdf6eb3	568	return ide_pci_init_one(dev, &d, NULL);
1da177e4 LT	569	}
	570
	571
9cbcc5e3 BZ	572	static const struct pci_device_id alim15x3_pci_tbl[] = {
9cbcc5e3 BZ	573	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 },
8ac2b42a	574	{ PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 },
1da177e4 LT	575	{ 0, },
	576	};
	577	MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl);
	578
a9ab09e2	579	static struct pci_driver alim15x3_pci_driver = {
1da177e4 LT	580	.name = "ALI15x3_IDE",
	581	.id_table = alim15x3_pci_tbl,
	582	.probe = alim15x3_init_one,
8ee3f3b6	583	.remove = ide_pci_remove,
feb22b7f BZ	584	.suspend = ide_pci_suspend,
feb22b7f BZ	585	.resume = ide_pci_resume,
1da177e4 LT	586	};
1da177e4 LT	587
82ab1eec	588	static int __init ali15x3_ide_init(void)
1da177e4	589	{
a9ab09e2	590	return ide_pci_register_driver(&alim15x3_pci_driver);
1da177e4 LT	591	}
1da177e4 LT	592
8ee3f3b6 BZ	593	static void __exit ali15x3_ide_exit(void)
8ee3f3b6 BZ	594	{
95964018	595	pci_unregister_driver(&alim15x3_pci_driver);
8ee3f3b6 BZ	596	}
8ee3f3b6 BZ	597
1da177e4	598	module_init(ali15x3_ide_init);
8ee3f3b6	599	module_exit(ali15x3_ide_exit);
1da177e4 LT	600
	601	MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox");
	602	MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE");
	603	MODULE_LICENSE("GPL");