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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer |
3 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
4 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
5 | * | |
6 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
7 | * May be copied or modified under the terms of the GNU General Public License | |
ccd32e22 | 8 | * Copyright (C) 2002 Alan Cox |
1da177e4 | 9 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> |
21b82477 | 10 | * Copyright (C) 2007 MontaVista Software, Inc. <source@mvista.com> |
3c8cc8df | 11 | * Copyright (C) 2007-2010 Bartlomiej Zolnierkiewicz |
1da177e4 LT |
12 | * |
13 | * (U)DMA capable version of ali 1533/1543(C), 1535(D) | |
14 | * | |
15 | ********************************************************************** | |
16 | * 9/7/99 --Parts from the above author are included and need to be | |
17 | * converted into standard interface, once I finish the thought. | |
18 | * | |
19 | * Recent changes | |
20 | * Don't use LBA48 mode on ALi <= 0xC4 | |
21 | * Don't poke 0x79 with a non ALi northbridge | |
22 | * Don't flip undefined bits on newer chipsets (fix Fujitsu laptop hang) | |
23 | * Allow UDMA6 on revisions > 0xC4 | |
24 | * | |
25 | * Documentation | |
26 | * Chipset documentation available under NDA only | |
27 | * | |
28 | */ | |
29 | ||
1da177e4 LT |
30 | #include <linux/module.h> |
31 | #include <linux/types.h> | |
32 | #include <linux/kernel.h> | |
33 | #include <linux/pci.h> | |
1da177e4 LT |
34 | #include <linux/ide.h> |
35 | #include <linux/init.h> | |
95ba8c17 | 36 | #include <linux/dmi.h> |
1da177e4 LT |
37 | |
38 | #include <asm/io.h> | |
39 | ||
ced3ec8a BZ |
40 | #define DRV_NAME "alim15x3" |
41 | ||
1da177e4 LT |
42 | /* |
43 | * ALi devices are not plug in. Otherwise these static values would | |
44 | * need to go. They ought to go away anyway | |
45 | */ | |
46 | ||
47 | static u8 m5229_revision; | |
48 | static u8 chip_is_1543c_e; | |
49 | static struct pci_dev *isa_dev; | |
50 | ||
293f18ad BZ |
51 | static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on) |
52 | { | |
53 | struct pci_dev *pdev = to_pci_dev(hwif->dev); | |
54 | int pio_fifo = 0x54 + hwif->channel; | |
55 | u8 fifo; | |
56 | int shift = 4 * (drive->dn & 1); | |
57 | ||
58 | pci_read_config_byte(pdev, pio_fifo, &fifo); | |
59 | fifo &= ~(0x0F << shift); | |
60 | fifo |= (on << shift); | |
61 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
62 | } | |
63 | ||
a345c785 BZ |
64 | static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive, |
65 | struct ide_timing *t) | |
66 | { | |
67 | struct pci_dev *dev = to_pci_dev(hwif->dev); | |
68 | int port = hwif->channel ? 0x5c : 0x58; | |
69 | u8 unit = drive->dn & 1; | |
70 | ||
71 | t->setup = clamp_val(t->setup, 1, 8) & 7; | |
72 | t->act8b = clamp_val(t->act8b, 1, 8) & 7; | |
73 | t->rec8b = clamp_val(t->rec8b, 1, 16) & 15; | |
74 | t->active = clamp_val(t->active, 1, 8) & 7; | |
75 | t->recover = clamp_val(t->recover, 1, 16) & 15; | |
76 | ||
77 | pci_write_config_byte(dev, port, t->setup); | |
78 | pci_write_config_byte(dev, port + 1, (t->act8b << 4) | t->rec8b); | |
79 | pci_write_config_byte(dev, port + unit + 2, | |
80 | (t->active << 4) | t->recover); | |
81 | } | |
82 | ||
1da177e4 | 83 | /** |
88b2b32b | 84 | * ali_set_pio_mode - set host controller for PIO mode |
e085b3ca | 85 | * @hwif: port |
26bcb879 | 86 | * @drive: drive |
21b82477 | 87 | * |
26bcb879 | 88 | * Program the controller for the given PIO mode. |
1da177e4 | 89 | */ |
26bcb879 | 90 | |
e085b3ca | 91 | static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
1da177e4 | 92 | { |
cde727be | 93 | ide_drive_t *pair = ide_get_pair_dev(drive); |
30e5ee4d | 94 | int bus_speed = ide_pci_clk ? ide_pci_clk : 33; |
3c8cc8df | 95 | unsigned long T = 1000000 / bus_speed; /* PCI clock based */ |
3c8cc8df | 96 | struct ide_timing t; |
1da177e4 | 97 | |
e085b3ca | 98 | ide_timing_compute(drive, drive->pio_mode, &t, T, 1); |
cde727be BZ |
99 | if (pair) { |
100 | struct ide_timing p; | |
101 | ||
102 | ide_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
5740345b BZ |
103 | ide_timing_merge(&p, &t, &t, |
104 | IDE_TIMING_SETUP | IDE_TIMING_8BIT); | |
cde727be BZ |
105 | if (pair->dma_mode) { |
106 | ide_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
5740345b BZ |
107 | ide_timing_merge(&p, &t, &t, |
108 | IDE_TIMING_SETUP | IDE_TIMING_8BIT); | |
cde727be BZ |
109 | } |
110 | } | |
3c8cc8df | 111 | |
1da177e4 LT |
112 | /* |
113 | * PIO mode => ATA FIFO on, ATAPI FIFO off | |
114 | */ | |
293f18ad | 115 | ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00); |
3c8cc8df | 116 | |
a345c785 | 117 | ali_program_timings(hwif, drive, &t); |
21b82477 SS |
118 | } |
119 | ||
1da177e4 | 120 | /** |
2d5eaa6d BZ |
121 | * ali_udma_filter - compute UDMA mask |
122 | * @drive: IDE device | |
1da177e4 | 123 | * |
2d5eaa6d BZ |
124 | * Return available UDMA modes. |
125 | * | |
126 | * The actual rules for the ALi are: | |
1da177e4 LT |
127 | * No UDMA on revisions <= 0x20 |
128 | * Disk only for revisions < 0xC2 | |
63b1623e | 129 | * Not WDC drives on M1543C-E (?) |
1da177e4 | 130 | */ |
1da177e4 | 131 | |
2d5eaa6d | 132 | static u8 ali_udma_filter(ide_drive_t *drive) |
1da177e4 | 133 | { |
2d5eaa6d BZ |
134 | if (m5229_revision > 0x20 && m5229_revision < 0xC2) { |
135 | if (drive->media != ide_disk) | |
136 | return 0; | |
2db3dae5 | 137 | if (chip_is_1543c_e && |
4dde4492 | 138 | strstr((char *)&drive->id[ATA_ID_PROD], "WDC ")) |
2d5eaa6d | 139 | return 0; |
1da177e4 LT |
140 | } |
141 | ||
2d5eaa6d | 142 | return drive->hwif->ultra_mask; |
1da177e4 LT |
143 | } |
144 | ||
145 | /** | |
88b2b32b | 146 | * ali_set_dma_mode - set host controller for DMA mode |
8776168c | 147 | * @hwif: port |
88b2b32b | 148 | * @drive: drive |
1da177e4 LT |
149 | * |
150 | * Configure the hardware for the desired IDE transfer mode. | |
1da177e4 | 151 | */ |
f212ff28 | 152 | |
8776168c | 153 | static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive) |
1da177e4 | 154 | { |
36501650 | 155 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
a345c785 BZ |
156 | ide_drive_t *pair = ide_get_pair_dev(drive); |
157 | int bus_speed = ide_pci_clk ? ide_pci_clk : 33; | |
158 | unsigned long T = 1000000 / bus_speed; /* PCI clock based */ | |
8776168c | 159 | const u8 speed = drive->dma_mode; |
1da177e4 | 160 | u8 speed1 = speed; |
123995b9 | 161 | u8 unit = drive->dn & 1; |
1da177e4 LT |
162 | u8 tmpbyte = 0x00; |
163 | int m5229_udma = (hwif->channel) ? 0x57 : 0x56; | |
a345c785 | 164 | struct ide_timing t; |
1da177e4 LT |
165 | |
166 | if (speed == XFER_UDMA_6) | |
167 | speed1 = 0x47; | |
168 | ||
169 | if (speed < XFER_UDMA_0) { | |
170 | u8 ultra_enable = (unit) ? 0x7f : 0xf7; | |
171 | /* | |
172 | * clear "ultra enable" bit | |
173 | */ | |
174 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
175 | tmpbyte &= ultra_enable; | |
176 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
177 | ||
a345c785 BZ |
178 | ide_timing_compute(drive, drive->dma_mode, &t, T, 1); |
179 | if (pair) { | |
180 | struct ide_timing p; | |
181 | ||
182 | ide_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
183 | ide_timing_merge(&p, &t, &t, | |
184 | IDE_TIMING_SETUP | IDE_TIMING_8BIT); | |
185 | if (pair->dma_mode) { | |
186 | ide_timing_compute(pair, pair->dma_mode, | |
187 | &p, T, 1); | |
188 | ide_timing_merge(&p, &t, &t, | |
189 | IDE_TIMING_SETUP | IDE_TIMING_8BIT); | |
190 | } | |
191 | } | |
192 | ali_program_timings(hwif, drive, &t); | |
1da177e4 LT |
193 | } else { |
194 | pci_read_config_byte(dev, m5229_udma, &tmpbyte); | |
195 | tmpbyte &= (0x0f << ((1-unit) << 2)); | |
196 | /* | |
197 | * enable ultra dma and set timing | |
198 | */ | |
199 | tmpbyte |= ((0x08 | ((4-speed1)&0x07)) << (unit << 2)); | |
200 | pci_write_config_byte(dev, m5229_udma, tmpbyte); | |
201 | if (speed >= XFER_UDMA_3) { | |
202 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
203 | tmpbyte |= 1; | |
204 | pci_write_config_byte(dev, 0x4b, tmpbyte); | |
205 | } | |
206 | } | |
1da177e4 LT |
207 | } |
208 | ||
1da177e4 | 209 | /** |
8a4a5738 | 210 | * ali_dma_check - DMA check |
1da177e4 | 211 | * @drive: target device |
22981694 | 212 | * @cmd: command |
1da177e4 LT |
213 | * |
214 | * Returns 1 if the DMA cannot be performed, zero on success. | |
215 | */ | |
216 | ||
8a4a5738 | 217 | static int ali_dma_check(ide_drive_t *drive, struct ide_cmd *cmd) |
1da177e4 LT |
218 | { |
219 | if (m5229_revision < 0xC2 && drive->media != ide_disk) { | |
22981694 | 220 | if (cmd->tf_flags & IDE_TFLAG_WRITE) |
1da177e4 LT |
221 | return 1; /* try PIO instead of DMA */ |
222 | } | |
8a4a5738 | 223 | return 0; |
1da177e4 LT |
224 | } |
225 | ||
226 | /** | |
227 | * init_chipset_ali15x3 - Initialise an ALi IDE controller | |
228 | * @dev: PCI device | |
1da177e4 LT |
229 | * |
230 | * This function initializes the ALI IDE controller and where | |
231 | * appropriate also sets up the 1533 southbridge. | |
232 | */ | |
a326b02b | 233 | |
2ed0ef54 | 234 | static int init_chipset_ali15x3(struct pci_dev *dev) |
1da177e4 LT |
235 | { |
236 | unsigned long flags; | |
237 | u8 tmpbyte; | |
b1489009 | 238 | struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0)); |
1da177e4 | 239 | |
44c10138 | 240 | m5229_revision = dev->revision; |
1da177e4 | 241 | |
b1489009 | 242 | isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
1da177e4 | 243 | |
1da177e4 LT |
244 | local_irq_save(flags); |
245 | ||
246 | if (m5229_revision < 0xC2) { | |
247 | /* | |
248 | * revision 0x20 (1543-E, 1543-F) | |
249 | * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E) | |
250 | * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7 | |
251 | */ | |
252 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
253 | /* | |
254 | * clear bit 7 | |
255 | */ | |
256 | pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F); | |
cad221aa BZ |
257 | /* |
258 | * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010 | |
259 | */ | |
260 | if (m5229_revision >= 0x20 && isa_dev) { | |
261 | pci_read_config_byte(isa_dev, 0x5e, &tmpbyte); | |
262 | chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0; | |
263 | } | |
b1489009 | 264 | goto out; |
1da177e4 LT |
265 | } |
266 | ||
267 | /* | |
268 | * 1543C-B?, 1535, 1535D, 1553 | |
269 | * Note 1: not all "motherboard" support this detection | |
270 | * Note 2: if no udma 66 device, the detection may "error". | |
271 | * but in this case, we will not set the device to | |
272 | * ultra 66, the detection result is not important | |
273 | */ | |
274 | ||
275 | /* | |
276 | * enable "Cable Detection", m5229, 0x4b, bit3 | |
277 | */ | |
278 | pci_read_config_byte(dev, 0x4b, &tmpbyte); | |
279 | pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08); | |
280 | ||
281 | /* | |
282 | * We should only tune the 1533 enable if we are using an ALi | |
283 | * North bridge. We might have no north found on some zany | |
284 | * box without a device at 0:0.0. The ALi bridge will be at | |
285 | * 0:0.0 so if we didn't find one we know what is cooking. | |
286 | */ | |
b1489009 AC |
287 | if (north && north->vendor != PCI_VENDOR_ID_AL) |
288 | goto out; | |
1da177e4 LT |
289 | |
290 | if (m5229_revision < 0xC5 && isa_dev) | |
291 | { | |
292 | /* | |
293 | * set south-bridge's enable bit, m1533, 0x79 | |
294 | */ | |
295 | ||
296 | pci_read_config_byte(isa_dev, 0x79, &tmpbyte); | |
297 | if (m5229_revision == 0xC2) { | |
298 | /* | |
299 | * 1543C-B0 (m1533, 0x79, bit 2) | |
300 | */ | |
301 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04); | |
302 | } else if (m5229_revision >= 0xC3) { | |
303 | /* | |
304 | * 1553/1535 (m1533, 0x79, bit 1) | |
305 | */ | |
306 | pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02); | |
307 | } | |
308 | } | |
cad221aa | 309 | |
b1489009 | 310 | out: |
cad221aa BZ |
311 | /* |
312 | * CD_ROM DMA on (m5229, 0x53, bit0) | |
313 | * Enable this bit even if we want to use PIO. | |
314 | * PIO FIFO off (m5229, 0x53, bit1) | |
315 | * The hardware will use 0x54h and 0x55h to control PIO FIFO. | |
316 | * (Not on later devices it seems) | |
317 | * | |
318 | * 0x53 changes meaning on later revs - we must no touch | |
319 | * bit 1 on them. Need to check if 0x20 is the right break. | |
320 | */ | |
321 | if (m5229_revision >= 0x20) { | |
322 | pci_read_config_byte(dev, 0x53, &tmpbyte); | |
323 | ||
324 | if (m5229_revision <= 0x20) | |
325 | tmpbyte = (tmpbyte & (~0x02)) | 0x01; | |
326 | else if (m5229_revision == 0xc7 || m5229_revision == 0xc8) | |
327 | tmpbyte |= 0x03; | |
328 | else | |
329 | tmpbyte |= 0x01; | |
330 | ||
331 | pci_write_config_byte(dev, 0x53, tmpbyte); | |
332 | } | |
b1489009 AC |
333 | pci_dev_put(north); |
334 | pci_dev_put(isa_dev); | |
1da177e4 LT |
335 | local_irq_restore(flags); |
336 | return 0; | |
337 | } | |
338 | ||
95ba8c17 BZ |
339 | /* |
340 | * Cable special cases | |
341 | */ | |
342 | ||
1855256c | 343 | static const struct dmi_system_id cable_dmi_table[] = { |
95ba8c17 BZ |
344 | { |
345 | .ident = "HP Pavilion N5430", | |
346 | .matches = { | |
347 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
8663fd6d | 348 | DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"), |
95ba8c17 BZ |
349 | }, |
350 | }, | |
03e6f489 DE |
351 | { |
352 | .ident = "Toshiba Satellite S1800-814", | |
353 | .matches = { | |
354 | DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), | |
355 | DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"), | |
356 | }, | |
357 | }, | |
95ba8c17 BZ |
358 | { } |
359 | }; | |
360 | ||
361 | static int ali_cable_override(struct pci_dev *pdev) | |
362 | { | |
363 | /* Fujitsu P2000 */ | |
364 | if (pdev->subsystem_vendor == 0x10CF && | |
365 | pdev->subsystem_device == 0x10AF) | |
366 | return 1; | |
367 | ||
d151456a BZ |
368 | /* Mitac 8317 (Winbook-A) and relatives */ |
369 | if (pdev->subsystem_vendor == 0x1071 && | |
370 | pdev->subsystem_device == 0x8317) | |
371 | return 1; | |
372 | ||
95ba8c17 BZ |
373 | /* Systems by DMI */ |
374 | if (dmi_check_system(cable_dmi_table)) | |
375 | return 1; | |
376 | ||
377 | return 0; | |
378 | } | |
379 | ||
1da177e4 | 380 | /** |
ac95beed | 381 | * ali_cable_detect - cable detection |
1da177e4 LT |
382 | * @hwif: IDE interface |
383 | * | |
384 | * This checks if the controller and the cable are capable | |
385 | * of UDMA66 transfers. It doesn't check the drives. | |
1da177e4 LT |
386 | */ |
387 | ||
f454cbe8 | 388 | static u8 ali_cable_detect(ide_hwif_t *hwif) |
1da177e4 | 389 | { |
36501650 | 390 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
95ba8c17 | 391 | u8 cbl = ATA_CBL_PATA40, tmpbyte; |
1da177e4 | 392 | |
1da177e4 LT |
393 | if (m5229_revision >= 0xC2) { |
394 | /* | |
95ba8c17 BZ |
395 | * m5229 80-pin cable detection (from Host View) |
396 | * | |
397 | * 0x4a bit0 is 0 => primary channel has 80-pin | |
398 | * 0x4a bit1 is 0 => secondary channel has 80-pin | |
399 | * | |
400 | * Certain laptops use short but suitable cables | |
401 | * and don't implement the detect logic. | |
1da177e4 | 402 | */ |
95ba8c17 BZ |
403 | if (ali_cable_override(dev)) |
404 | cbl = ATA_CBL_PATA40_SHORT; | |
405 | else { | |
406 | pci_read_config_byte(dev, 0x4a, &tmpbyte); | |
407 | if ((tmpbyte & (1 << hwif->channel)) == 0) | |
408 | cbl = ATA_CBL_PATA80; | |
409 | } | |
1da177e4 LT |
410 | } |
411 | ||
95ba8c17 | 412 | return cbl; |
1da177e4 LT |
413 | } |
414 | ||
03682411 | 415 | #ifndef CONFIG_SPARC64 |
1da177e4 LT |
416 | /** |
417 | * init_hwif_ali15x3 - Initialize the ALI IDE x86 stuff | |
418 | * @hwif: interface to configure | |
419 | * | |
420 | * Obtain the IRQ tables for an ALi based IDE solution on the PC | |
421 | * class platforms. This part of the code isn't applicable to the | |
03682411 | 422 | * Sparc systems. |
1da177e4 LT |
423 | */ |
424 | ||
c2f12589 | 425 | static void __devinit init_hwif_ali15x3 (ide_hwif_t *hwif) |
1da177e4 LT |
426 | { |
427 | u8 ideic, inmir; | |
428 | s8 irq_routing_table[] = { -1, 9, 3, 10, 4, 5, 7, 6, | |
429 | 1, 11, 0, 12, 0, 14, 0, 15 }; | |
430 | int irq = -1; | |
431 | ||
1da177e4 LT |
432 | if (isa_dev) { |
433 | /* | |
434 | * read IDE interface control | |
435 | */ | |
436 | pci_read_config_byte(isa_dev, 0x58, &ideic); | |
437 | ||
438 | /* bit0, bit1 */ | |
439 | ideic = ideic & 0x03; | |
440 | ||
441 | /* get IRQ for IDE Controller */ | |
442 | if ((hwif->channel && ideic == 0x03) || | |
443 | (!hwif->channel && !ideic)) { | |
444 | /* | |
445 | * get SIRQ1 routing table | |
446 | */ | |
447 | pci_read_config_byte(isa_dev, 0x44, &inmir); | |
448 | inmir = inmir & 0x0f; | |
449 | irq = irq_routing_table[inmir]; | |
450 | } else if (hwif->channel && !(ideic & 0x01)) { | |
451 | /* | |
452 | * get SIRQ2 routing table | |
453 | */ | |
454 | pci_read_config_byte(isa_dev, 0x75, &inmir); | |
455 | inmir = inmir & 0x0f; | |
456 | irq = irq_routing_table[inmir]; | |
457 | } | |
458 | if(irq >= 0) | |
459 | hwif->irq = irq; | |
460 | } | |
1da177e4 | 461 | } |
6d1cee44 AV |
462 | #else |
463 | #define init_hwif_ali15x3 NULL | |
03682411 | 464 | #endif /* CONFIG_SPARC64 */ |
1da177e4 LT |
465 | |
466 | /** | |
467 | * init_dma_ali15x3 - set up DMA on ALi15x3 | |
468 | * @hwif: IDE interface | |
b123f56e | 469 | * @d: IDE port info |
1da177e4 | 470 | * |
b123f56e | 471 | * Set up the DMA functionality on the ALi 15x3. |
1da177e4 LT |
472 | */ |
473 | ||
b123f56e BZ |
474 | static int __devinit init_dma_ali15x3(ide_hwif_t *hwif, |
475 | const struct ide_port_info *d) | |
1da177e4 | 476 | { |
b123f56e BZ |
477 | struct pci_dev *dev = to_pci_dev(hwif->dev); |
478 | unsigned long base = ide_pci_dma_base(hwif, d); | |
479 | ||
ebb00fb5 BZ |
480 | if (base == 0) |
481 | return -1; | |
482 | ||
483 | hwif->dma_base = base; | |
484 | ||
485 | if (ide_pci_check_simplex(hwif, d) < 0) | |
486 | return -1; | |
487 | ||
488 | if (ide_pci_set_master(dev, d->name) < 0) | |
b123f56e BZ |
489 | return -1; |
490 | ||
0ecdca26 | 491 | if (!hwif->channel) |
b123f56e BZ |
492 | outb(inb(base + 2) & 0x60, base + 2); |
493 | ||
494 | printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n", | |
495 | hwif->name, base, base + 7); | |
496 | ||
497 | if (ide_allocate_dma_engine(hwif)) | |
498 | return -1; | |
499 | ||
b123f56e | 500 | return 0; |
1da177e4 LT |
501 | } |
502 | ||
ac95beed BZ |
503 | static const struct ide_port_ops ali_port_ops = { |
504 | .set_pio_mode = ali_set_pio_mode, | |
505 | .set_dma_mode = ali_set_dma_mode, | |
506 | .udma_filter = ali_udma_filter, | |
507 | .cable_detect = ali_cable_detect, | |
508 | }; | |
509 | ||
f37afdac BZ |
510 | static const struct ide_dma_ops ali_dma_ops = { |
511 | .dma_host_set = ide_dma_host_set, | |
8a4a5738 | 512 | .dma_setup = ide_dma_setup, |
f37afdac | 513 | .dma_start = ide_dma_start, |
653bcf52 | 514 | .dma_end = ide_dma_end, |
f37afdac BZ |
515 | .dma_test_irq = ide_dma_test_irq, |
516 | .dma_lost_irq = ide_dma_lost_irq, | |
8a4a5738 | 517 | .dma_check = ali_dma_check, |
22117d6e | 518 | .dma_timer_expiry = ide_dma_sff_timer_expiry, |
592b5315 | 519 | .dma_sff_read_status = ide_dma_sff_read_status, |
5e37bdc0 BZ |
520 | }; |
521 | ||
85620436 | 522 | static const struct ide_port_info ali15x3_chipset __devinitdata = { |
ced3ec8a | 523 | .name = DRV_NAME, |
1da177e4 LT |
524 | .init_chipset = init_chipset_ali15x3, |
525 | .init_hwif = init_hwif_ali15x3, | |
526 | .init_dma = init_dma_ali15x3, | |
ac95beed | 527 | .port_ops = &ali_port_ops, |
3f023b01 | 528 | .dma_ops = &sff_dma_ops, |
4099d143 | 529 | .pio_mask = ATA_PIO5, |
5f8b6c34 BZ |
530 | .swdma_mask = ATA_SWDMA2, |
531 | .mwdma_mask = ATA_MWDMA2, | |
1da177e4 LT |
532 | }; |
533 | ||
534 | /** | |
535 | * alim15x3_init_one - set up an ALi15x3 IDE controller | |
536 | * @dev: PCI device to set up | |
537 | * | |
538 | * Perform the actual set up for an ALi15x3 that has been found by the | |
539 | * hot plug layer. | |
540 | */ | |
541 | ||
542 | static int __devinit alim15x3_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
543 | { | |
039788e1 | 544 | struct ide_port_info d = ali15x3_chipset; |
8ac2b42a | 545 | u8 rev = dev->revision, idx = id->driver_data; |
1da177e4 | 546 | |
28328307 BZ |
547 | /* don't use LBA48 DMA on ALi devices before rev 0xC5 */ |
548 | if (rev <= 0xC4) | |
549 | d.host_flags |= IDE_HFLAG_NO_LBA48_DMA; | |
550 | ||
551 | if (rev >= 0x20) { | |
552 | if (rev == 0x20) | |
553 | d.host_flags |= IDE_HFLAG_NO_ATAPI_DMA; | |
554 | ||
555 | if (rev < 0xC2) | |
556 | d.udma_mask = ATA_UDMA2; | |
557 | else if (rev == 0xC2 || rev == 0xC3) | |
558 | d.udma_mask = ATA_UDMA4; | |
559 | else if (rev == 0xC4) | |
560 | d.udma_mask = ATA_UDMA5; | |
561 | else | |
562 | d.udma_mask = ATA_UDMA6; | |
5e37bdc0 BZ |
563 | |
564 | d.dma_ops = &ali_dma_ops; | |
6d36b95f BZ |
565 | } else { |
566 | d.host_flags |= IDE_HFLAG_NO_DMA; | |
567 | ||
568 | d.mwdma_mask = d.swdma_mask = 0; | |
28328307 BZ |
569 | } |
570 | ||
8ac2b42a BZ |
571 | if (idx == 0) |
572 | d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX; | |
573 | ||
6cdf6eb3 | 574 | return ide_pci_init_one(dev, &d, NULL); |
1da177e4 LT |
575 | } |
576 | ||
577 | ||
9cbcc5e3 BZ |
578 | static const struct pci_device_id alim15x3_pci_tbl[] = { |
579 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), 0 }, | |
8ac2b42a | 580 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), 1 }, |
1da177e4 LT |
581 | { 0, }, |
582 | }; | |
583 | MODULE_DEVICE_TABLE(pci, alim15x3_pci_tbl); | |
584 | ||
a9ab09e2 | 585 | static struct pci_driver alim15x3_pci_driver = { |
1da177e4 LT |
586 | .name = "ALI15x3_IDE", |
587 | .id_table = alim15x3_pci_tbl, | |
588 | .probe = alim15x3_init_one, | |
8ee3f3b6 | 589 | .remove = ide_pci_remove, |
feb22b7f BZ |
590 | .suspend = ide_pci_suspend, |
591 | .resume = ide_pci_resume, | |
1da177e4 LT |
592 | }; |
593 | ||
82ab1eec | 594 | static int __init ali15x3_ide_init(void) |
1da177e4 | 595 | { |
a9ab09e2 | 596 | return ide_pci_register_driver(&alim15x3_pci_driver); |
1da177e4 LT |
597 | } |
598 | ||
8ee3f3b6 BZ |
599 | static void __exit ali15x3_ide_exit(void) |
600 | { | |
95964018 | 601 | pci_unregister_driver(&alim15x3_pci_driver); |
8ee3f3b6 BZ |
602 | } |
603 | ||
1da177e4 | 604 | module_init(ali15x3_ide_init); |
8ee3f3b6 | 605 | module_exit(ali15x3_ide_exit); |
1da177e4 | 606 | |
3c8cc8df | 607 | MODULE_AUTHOR("Michael Aubry, Andrzej Krzysztofowicz, CJ, Andre Hedrick, Alan Cox, Bartlomiej Zolnierkiewicz"); |
1da177e4 LT |
608 | MODULE_DESCRIPTION("PCI driver module for ALi 15x3 IDE"); |
609 | MODULE_LICENSE("GPL"); |