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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> |
3 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | |
4 | * | |
5 | */ | |
6 | ||
1da177e4 LT |
7 | #include <linux/module.h> |
8 | #include <linux/types.h> | |
9 | #include <linux/string.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/timer.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/major.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/genhd.h> | |
17 | #include <linux/blkpg.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/pci.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/hdreg.h> | |
22 | #include <linux/ide.h> | |
23 | #include <linux/bitops.h> | |
1e86240f | 24 | #include <linux/nmi.h> |
1da177e4 LT |
25 | |
26 | #include <asm/byteorder.h> | |
27 | #include <asm/irq.h> | |
28 | #include <asm/uaccess.h> | |
29 | #include <asm/io.h> | |
30 | ||
31 | /* | |
32 | * Conventional PIO operations for ATA devices | |
33 | */ | |
34 | ||
35 | static u8 ide_inb (unsigned long port) | |
36 | { | |
37 | return (u8) inb(port); | |
38 | } | |
39 | ||
40 | static u16 ide_inw (unsigned long port) | |
41 | { | |
42 | return (u16) inw(port); | |
43 | } | |
44 | ||
1da177e4 LT |
45 | static void ide_outb (u8 val, unsigned long port) |
46 | { | |
47 | outb(val, port); | |
48 | } | |
49 | ||
50 | static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) | |
51 | { | |
52 | outb(addr, port); | |
53 | } | |
54 | ||
55 | static void ide_outw (u16 val, unsigned long port) | |
56 | { | |
57 | outw(val, port); | |
58 | } | |
59 | ||
1da177e4 LT |
60 | void default_hwif_iops (ide_hwif_t *hwif) |
61 | { | |
62 | hwif->OUTB = ide_outb; | |
63 | hwif->OUTBSYNC = ide_outbsync; | |
64 | hwif->OUTW = ide_outw; | |
1da177e4 LT |
65 | hwif->INB = ide_inb; |
66 | hwif->INW = ide_inw; | |
1da177e4 LT |
67 | } |
68 | ||
1da177e4 LT |
69 | /* |
70 | * MMIO operations, typically used for SATA controllers | |
71 | */ | |
72 | ||
73 | static u8 ide_mm_inb (unsigned long port) | |
74 | { | |
75 | return (u8) readb((void __iomem *) port); | |
76 | } | |
77 | ||
78 | static u16 ide_mm_inw (unsigned long port) | |
79 | { | |
80 | return (u16) readw((void __iomem *) port); | |
81 | } | |
82 | ||
1da177e4 LT |
83 | static void ide_mm_outb (u8 value, unsigned long port) |
84 | { | |
85 | writeb(value, (void __iomem *) port); | |
86 | } | |
87 | ||
88 | static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) | |
89 | { | |
90 | writeb(value, (void __iomem *) port); | |
91 | } | |
92 | ||
93 | static void ide_mm_outw (u16 value, unsigned long port) | |
94 | { | |
95 | writew(value, (void __iomem *) port); | |
96 | } | |
97 | ||
1da177e4 LT |
98 | void default_hwif_mmiops (ide_hwif_t *hwif) |
99 | { | |
100 | hwif->OUTB = ide_mm_outb; | |
101 | /* Most systems will need to override OUTBSYNC, alas however | |
102 | this one is controller specific! */ | |
103 | hwif->OUTBSYNC = ide_mm_outbsync; | |
104 | hwif->OUTW = ide_mm_outw; | |
1da177e4 LT |
105 | hwif->INB = ide_mm_inb; |
106 | hwif->INW = ide_mm_inw; | |
1da177e4 LT |
107 | } |
108 | ||
109 | EXPORT_SYMBOL(default_hwif_mmiops); | |
110 | ||
1da177e4 LT |
111 | void SELECT_DRIVE (ide_drive_t *drive) |
112 | { | |
23579a2a | 113 | ide_hwif_t *hwif = drive->hwif; |
ac95beed | 114 | const struct ide_port_ops *port_ops = hwif->port_ops; |
23579a2a | 115 | |
ac95beed BZ |
116 | if (port_ops && port_ops->selectproc) |
117 | port_ops->selectproc(drive); | |
23579a2a | 118 | |
4c3032d8 | 119 | hwif->OUTB(drive->select.all, hwif->io_ports.device_addr); |
1da177e4 LT |
120 | } |
121 | ||
1da177e4 LT |
122 | void SELECT_MASK (ide_drive_t *drive, int mask) |
123 | { | |
ac95beed BZ |
124 | const struct ide_port_ops *port_ops = drive->hwif->port_ops; |
125 | ||
126 | if (port_ops && port_ops->maskproc) | |
127 | port_ops->maskproc(drive, mask); | |
1da177e4 LT |
128 | } |
129 | ||
1da177e4 LT |
130 | /* |
131 | * Some localbus EIDE interfaces require a special access sequence | |
132 | * when using 32-bit I/O instructions to transfer data. We call this | |
133 | * the "vlb_sync" sequence, which consists of three successive reads | |
134 | * of the sector count register location, with interrupts disabled | |
135 | * to ensure that the reads all happen together. | |
136 | */ | |
137 | static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) | |
138 | { | |
139 | (void) HWIF(drive)->INB(port); | |
140 | (void) HWIF(drive)->INB(port); | |
141 | (void) HWIF(drive)->INB(port); | |
142 | } | |
143 | ||
144 | /* | |
145 | * This is used for most PIO data transfers *from* the IDE interface | |
9567b349 BZ |
146 | * |
147 | * These routines will round up any request for an odd number of bytes, | |
148 | * so if an odd len is specified, be sure that there's at least one | |
149 | * extra byte allocated for the buffer. | |
1da177e4 | 150 | */ |
92d3ab27 | 151 | static void ata_input_data(ide_drive_t *drive, struct request *rq, |
9567b349 | 152 | void *buf, unsigned int len) |
1da177e4 | 153 | { |
4c3032d8 BZ |
154 | ide_hwif_t *hwif = drive->hwif; |
155 | struct ide_io_ports *io_ports = &hwif->io_ports; | |
9567b349 | 156 | unsigned long data_addr = io_ports->data_addr; |
4c3032d8 | 157 | u8 io_32bit = drive->io_32bit; |
16bb69c1 | 158 | u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; |
1da177e4 | 159 | |
9567b349 BZ |
160 | len++; |
161 | ||
1da177e4 | 162 | if (io_32bit) { |
16bb69c1 | 163 | unsigned long uninitialized_var(flags); |
23579a2a | 164 | |
16bb69c1 | 165 | if (io_32bit & 2) { |
1da177e4 | 166 | local_irq_save(flags); |
4c3032d8 | 167 | ata_vlb_sync(drive, io_ports->nsect_addr); |
16bb69c1 BZ |
168 | } |
169 | ||
170 | if (mmio) | |
171 | __ide_mm_insl((void __iomem *)data_addr, buf, len / 4); | |
172 | else | |
173 | insl(data_addr, buf, len / 4); | |
174 | ||
175 | if (io_32bit & 2) | |
1da177e4 | 176 | local_irq_restore(flags); |
9567b349 | 177 | |
16bb69c1 BZ |
178 | if ((len & 3) >= 2) { |
179 | if (mmio) | |
180 | __ide_mm_insw((void __iomem *)data_addr, | |
181 | (u8 *)buf + (len & ~3), 1); | |
182 | else | |
183 | insw(data_addr, (u8 *)buf + (len & ~3), 1); | |
184 | } | |
185 | } else { | |
186 | if (mmio) | |
187 | __ide_mm_insw((void __iomem *)data_addr, buf, len / 2); | |
188 | else | |
189 | insw(data_addr, buf, len / 2); | |
190 | } | |
1da177e4 LT |
191 | } |
192 | ||
193 | /* | |
194 | * This is used for most PIO data transfers *to* the IDE interface | |
195 | */ | |
92d3ab27 | 196 | static void ata_output_data(ide_drive_t *drive, struct request *rq, |
9567b349 | 197 | void *buf, unsigned int len) |
1da177e4 | 198 | { |
4c3032d8 BZ |
199 | ide_hwif_t *hwif = drive->hwif; |
200 | struct ide_io_ports *io_ports = &hwif->io_ports; | |
9567b349 | 201 | unsigned long data_addr = io_ports->data_addr; |
4c3032d8 | 202 | u8 io_32bit = drive->io_32bit; |
16bb69c1 | 203 | u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0; |
1da177e4 LT |
204 | |
205 | if (io_32bit) { | |
16bb69c1 | 206 | unsigned long uninitialized_var(flags); |
23579a2a | 207 | |
16bb69c1 | 208 | if (io_32bit & 2) { |
1da177e4 | 209 | local_irq_save(flags); |
4c3032d8 | 210 | ata_vlb_sync(drive, io_ports->nsect_addr); |
16bb69c1 BZ |
211 | } |
212 | ||
213 | if (mmio) | |
214 | __ide_mm_outsl((void __iomem *)data_addr, buf, len / 4); | |
215 | else | |
216 | outsl(data_addr, buf, len / 4); | |
217 | ||
218 | if (io_32bit & 2) | |
1da177e4 | 219 | local_irq_restore(flags); |
1da177e4 | 220 | |
16bb69c1 BZ |
221 | if ((len & 3) >= 2) { |
222 | if (mmio) | |
223 | __ide_mm_outsw((void __iomem *)data_addr, | |
224 | (u8 *)buf + (len & ~3), 1); | |
225 | else | |
226 | outsw(data_addr, (u8 *)buf + (len & ~3), 1); | |
227 | } | |
228 | } else { | |
229 | if (mmio) | |
230 | __ide_mm_outsw((void __iomem *)data_addr, buf, len / 2); | |
231 | else | |
232 | outsw(data_addr, buf, len / 2); | |
233 | } | |
1da177e4 LT |
234 | } |
235 | ||
236 | void default_hwif_transport(ide_hwif_t *hwif) | |
237 | { | |
9567b349 BZ |
238 | hwif->input_data = ata_input_data; |
239 | hwif->output_data = ata_output_data; | |
1da177e4 LT |
240 | } |
241 | ||
1da177e4 LT |
242 | void ide_fix_driveid (struct hd_driveid *id) |
243 | { | |
244 | #ifndef __LITTLE_ENDIAN | |
245 | # ifdef __BIG_ENDIAN | |
246 | int i; | |
247 | u16 *stringcast; | |
248 | ||
249 | id->config = __le16_to_cpu(id->config); | |
250 | id->cyls = __le16_to_cpu(id->cyls); | |
251 | id->reserved2 = __le16_to_cpu(id->reserved2); | |
252 | id->heads = __le16_to_cpu(id->heads); | |
253 | id->track_bytes = __le16_to_cpu(id->track_bytes); | |
254 | id->sector_bytes = __le16_to_cpu(id->sector_bytes); | |
255 | id->sectors = __le16_to_cpu(id->sectors); | |
256 | id->vendor0 = __le16_to_cpu(id->vendor0); | |
257 | id->vendor1 = __le16_to_cpu(id->vendor1); | |
258 | id->vendor2 = __le16_to_cpu(id->vendor2); | |
259 | stringcast = (u16 *)&id->serial_no[0]; | |
260 | for (i = 0; i < (20/2); i++) | |
261 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
262 | id->buf_type = __le16_to_cpu(id->buf_type); | |
263 | id->buf_size = __le16_to_cpu(id->buf_size); | |
264 | id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); | |
265 | stringcast = (u16 *)&id->fw_rev[0]; | |
266 | for (i = 0; i < (8/2); i++) | |
267 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
268 | stringcast = (u16 *)&id->model[0]; | |
269 | for (i = 0; i < (40/2); i++) | |
270 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
271 | id->dword_io = __le16_to_cpu(id->dword_io); | |
272 | id->reserved50 = __le16_to_cpu(id->reserved50); | |
273 | id->field_valid = __le16_to_cpu(id->field_valid); | |
274 | id->cur_cyls = __le16_to_cpu(id->cur_cyls); | |
275 | id->cur_heads = __le16_to_cpu(id->cur_heads); | |
276 | id->cur_sectors = __le16_to_cpu(id->cur_sectors); | |
277 | id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); | |
278 | id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); | |
279 | id->lba_capacity = __le32_to_cpu(id->lba_capacity); | |
280 | id->dma_1word = __le16_to_cpu(id->dma_1word); | |
281 | id->dma_mword = __le16_to_cpu(id->dma_mword); | |
282 | id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); | |
283 | id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); | |
284 | id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); | |
285 | id->eide_pio = __le16_to_cpu(id->eide_pio); | |
286 | id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); | |
287 | for (i = 0; i < 2; ++i) | |
288 | id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); | |
289 | for (i = 0; i < 4; ++i) | |
290 | id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); | |
291 | id->queue_depth = __le16_to_cpu(id->queue_depth); | |
292 | for (i = 0; i < 4; ++i) | |
293 | id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); | |
294 | id->major_rev_num = __le16_to_cpu(id->major_rev_num); | |
295 | id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); | |
296 | id->command_set_1 = __le16_to_cpu(id->command_set_1); | |
297 | id->command_set_2 = __le16_to_cpu(id->command_set_2); | |
298 | id->cfsse = __le16_to_cpu(id->cfsse); | |
299 | id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); | |
300 | id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); | |
301 | id->csf_default = __le16_to_cpu(id->csf_default); | |
302 | id->dma_ultra = __le16_to_cpu(id->dma_ultra); | |
303 | id->trseuc = __le16_to_cpu(id->trseuc); | |
304 | id->trsEuc = __le16_to_cpu(id->trsEuc); | |
305 | id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); | |
306 | id->mprc = __le16_to_cpu(id->mprc); | |
307 | id->hw_config = __le16_to_cpu(id->hw_config); | |
308 | id->acoustic = __le16_to_cpu(id->acoustic); | |
309 | id->msrqs = __le16_to_cpu(id->msrqs); | |
310 | id->sxfert = __le16_to_cpu(id->sxfert); | |
311 | id->sal = __le16_to_cpu(id->sal); | |
312 | id->spg = __le32_to_cpu(id->spg); | |
313 | id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); | |
314 | for (i = 0; i < 22; i++) | |
315 | id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); | |
316 | id->last_lun = __le16_to_cpu(id->last_lun); | |
317 | id->word127 = __le16_to_cpu(id->word127); | |
318 | id->dlf = __le16_to_cpu(id->dlf); | |
319 | id->csfo = __le16_to_cpu(id->csfo); | |
320 | for (i = 0; i < 26; i++) | |
321 | id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); | |
322 | id->word156 = __le16_to_cpu(id->word156); | |
323 | for (i = 0; i < 3; i++) | |
324 | id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); | |
325 | id->cfa_power = __le16_to_cpu(id->cfa_power); | |
326 | for (i = 0; i < 14; i++) | |
327 | id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); | |
328 | for (i = 0; i < 31; i++) | |
329 | id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); | |
330 | for (i = 0; i < 48; i++) | |
331 | id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); | |
332 | id->integrity_word = __le16_to_cpu(id->integrity_word); | |
333 | # else | |
334 | # error "Please fix <asm/byteorder.h>" | |
335 | # endif | |
336 | #endif | |
337 | } | |
338 | ||
01745112 BZ |
339 | /* |
340 | * ide_fixstring() cleans up and (optionally) byte-swaps a text string, | |
341 | * removing leading/trailing blanks and compressing internal blanks. | |
342 | * It is primarily used to tidy up the model name/number fields as | |
343 | * returned by the WIN_[P]IDENTIFY commands. | |
344 | */ | |
345 | ||
1da177e4 LT |
346 | void ide_fixstring (u8 *s, const int bytecount, const int byteswap) |
347 | { | |
348 | u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ | |
349 | ||
350 | if (byteswap) { | |
351 | /* convert from big-endian to host byte order */ | |
352 | for (p = end ; p != s;) { | |
353 | unsigned short *pp = (unsigned short *) (p -= 2); | |
354 | *pp = ntohs(*pp); | |
355 | } | |
356 | } | |
357 | /* strip leading blanks */ | |
358 | while (s != end && *s == ' ') | |
359 | ++s; | |
360 | /* compress internal blanks and strip trailing blanks */ | |
361 | while (s != end && *s) { | |
362 | if (*s++ != ' ' || (s != end && *s && *s != ' ')) | |
363 | *p++ = *(s-1); | |
364 | } | |
365 | /* wipe out trailing garbage */ | |
366 | while (p != end) | |
367 | *p++ = '\0'; | |
368 | } | |
369 | ||
370 | EXPORT_SYMBOL(ide_fixstring); | |
371 | ||
372 | /* | |
373 | * Needed for PCI irq sharing | |
374 | */ | |
375 | int drive_is_ready (ide_drive_t *drive) | |
376 | { | |
377 | ide_hwif_t *hwif = HWIF(drive); | |
378 | u8 stat = 0; | |
379 | ||
380 | if (drive->waiting_for_dma) | |
5e37bdc0 | 381 | return hwif->dma_ops->dma_test_irq(drive); |
1da177e4 LT |
382 | |
383 | #if 0 | |
384 | /* need to guarantee 400ns since last command was issued */ | |
385 | udelay(1); | |
386 | #endif | |
387 | ||
1da177e4 LT |
388 | /* |
389 | * We do a passive status test under shared PCI interrupts on | |
390 | * cards that truly share the ATA side interrupt, but may also share | |
391 | * an interrupt with another pci card/device. We make no assumptions | |
392 | * about possible isa-pnp and pci-pnp issues yet. | |
393 | */ | |
4c3032d8 | 394 | if (hwif->io_ports.ctl_addr) |
c47137a9 | 395 | stat = ide_read_altstatus(drive); |
1da177e4 | 396 | else |
1da177e4 | 397 | /* Note: this may clear a pending IRQ!! */ |
c47137a9 | 398 | stat = ide_read_status(drive); |
1da177e4 LT |
399 | |
400 | if (stat & BUSY_STAT) | |
401 | /* drive busy: definitely not interrupting */ | |
402 | return 0; | |
403 | ||
404 | /* drive ready: *might* be interrupting */ | |
405 | return 1; | |
406 | } | |
407 | ||
408 | EXPORT_SYMBOL(drive_is_ready); | |
409 | ||
1da177e4 LT |
410 | /* |
411 | * This routine busy-waits for the drive status to be not "busy". | |
412 | * It then checks the status for all of the "good" bits and none | |
413 | * of the "bad" bits, and if all is okay it returns 0. All other | |
74af21cf | 414 | * cases return error -- caller may then invoke ide_error(). |
1da177e4 LT |
415 | * |
416 | * This routine should get fixed to not hog the cpu during extra long waits.. | |
417 | * That could be done by busy-waiting for the first jiffy or two, and then | |
418 | * setting a timer to wake up at half second intervals thereafter, | |
419 | * until timeout is achieved, before timing out. | |
420 | */ | |
aedea591 | 421 | static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) |
1da177e4 | 422 | { |
1da177e4 | 423 | unsigned long flags; |
74af21cf BZ |
424 | int i; |
425 | u8 stat; | |
1da177e4 LT |
426 | |
427 | udelay(1); /* spec allows drive 400ns to assert "BUSY" */ | |
c47137a9 BZ |
428 | stat = ide_read_status(drive); |
429 | ||
430 | if (stat & BUSY_STAT) { | |
1da177e4 LT |
431 | local_irq_set(flags); |
432 | timeout += jiffies; | |
c47137a9 | 433 | while ((stat = ide_read_status(drive)) & BUSY_STAT) { |
1da177e4 LT |
434 | if (time_after(jiffies, timeout)) { |
435 | /* | |
436 | * One last read after the timeout in case | |
437 | * heavy interrupt load made us not make any | |
438 | * progress during the timeout.. | |
439 | */ | |
c47137a9 | 440 | stat = ide_read_status(drive); |
1da177e4 LT |
441 | if (!(stat & BUSY_STAT)) |
442 | break; | |
443 | ||
444 | local_irq_restore(flags); | |
74af21cf BZ |
445 | *rstat = stat; |
446 | return -EBUSY; | |
1da177e4 LT |
447 | } |
448 | } | |
449 | local_irq_restore(flags); | |
450 | } | |
451 | /* | |
452 | * Allow status to settle, then read it again. | |
453 | * A few rare drives vastly violate the 400ns spec here, | |
454 | * so we'll wait up to 10usec for a "good" status | |
455 | * rather than expensively fail things immediately. | |
456 | * This fix courtesy of Matthew Faupel & Niccolo Rigacci. | |
457 | */ | |
458 | for (i = 0; i < 10; i++) { | |
459 | udelay(1); | |
c47137a9 BZ |
460 | stat = ide_read_status(drive); |
461 | ||
462 | if (OK_STAT(stat, good, bad)) { | |
74af21cf | 463 | *rstat = stat; |
1da177e4 | 464 | return 0; |
74af21cf | 465 | } |
1da177e4 | 466 | } |
74af21cf BZ |
467 | *rstat = stat; |
468 | return -EFAULT; | |
469 | } | |
470 | ||
471 | /* | |
472 | * In case of error returns error value after doing "*startstop = ide_error()". | |
473 | * The caller should return the updated value of "startstop" in this case, | |
474 | * "startstop" is unchanged when the function returns 0. | |
475 | */ | |
476 | int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) | |
477 | { | |
478 | int err; | |
479 | u8 stat; | |
480 | ||
481 | /* bail early if we've exceeded max_failures */ | |
482 | if (drive->max_failures && (drive->failures > drive->max_failures)) { | |
483 | *startstop = ide_stopped; | |
484 | return 1; | |
485 | } | |
486 | ||
487 | err = __ide_wait_stat(drive, good, bad, timeout, &stat); | |
488 | ||
489 | if (err) { | |
490 | char *s = (err == -EBUSY) ? "status timeout" : "status error"; | |
491 | *startstop = ide_error(drive, s, stat); | |
492 | } | |
493 | ||
494 | return err; | |
1da177e4 LT |
495 | } |
496 | ||
497 | EXPORT_SYMBOL(ide_wait_stat); | |
498 | ||
a5b7e70d BZ |
499 | /** |
500 | * ide_in_drive_list - look for drive in black/white list | |
501 | * @id: drive identifier | |
502 | * @drive_table: list to inspect | |
503 | * | |
504 | * Look for a drive in the blacklist and the whitelist tables | |
505 | * Returns 1 if the drive is found in the table. | |
506 | */ | |
507 | ||
508 | int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) | |
509 | { | |
510 | for ( ; drive_table->id_model; drive_table++) | |
511 | if ((!strcmp(drive_table->id_model, id->model)) && | |
512 | (!drive_table->id_firmware || | |
513 | strstr(id->fw_rev, drive_table->id_firmware))) | |
514 | return 1; | |
515 | return 0; | |
516 | } | |
517 | ||
b0244a00 BZ |
518 | EXPORT_SYMBOL_GPL(ide_in_drive_list); |
519 | ||
a5b7e70d BZ |
520 | /* |
521 | * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. | |
522 | * We list them here and depend on the device side cable detection for them. | |
8588a2b7 BZ |
523 | * |
524 | * Some optical devices with the buggy firmwares have the same problem. | |
a5b7e70d BZ |
525 | */ |
526 | static const struct drive_list_entry ivb_list[] = { | |
527 | { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, | |
8588a2b7 | 528 | { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, |
e97564f3 PM |
529 | { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, |
530 | { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, | |
531 | { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, | |
a5b7e70d BZ |
532 | { NULL , NULL } |
533 | }; | |
534 | ||
1da177e4 LT |
535 | /* |
536 | * All hosts that use the 80c ribbon must use! | |
537 | * The name is derived from upper byte of word 93 and the 80c ribbon. | |
538 | */ | |
539 | u8 eighty_ninty_three (ide_drive_t *drive) | |
540 | { | |
7f8f48af BZ |
541 | ide_hwif_t *hwif = drive->hwif; |
542 | struct hd_driveid *id = drive->id; | |
a5b7e70d | 543 | int ivb = ide_in_drive_list(id, ivb_list); |
7f8f48af | 544 | |
49521f97 BZ |
545 | if (hwif->cbl == ATA_CBL_PATA40_SHORT) |
546 | return 1; | |
547 | ||
a5b7e70d BZ |
548 | if (ivb) |
549 | printk(KERN_DEBUG "%s: skipping word 93 validity check\n", | |
550 | drive->name); | |
551 | ||
b98f8803 GK |
552 | if (ide_dev_is_sata(id) && !ivb) |
553 | return 1; | |
554 | ||
a5b7e70d | 555 | if (hwif->cbl != ATA_CBL_PATA80 && !ivb) |
7f8f48af | 556 | goto no_80w; |
1a1276e7 | 557 | |
f68d9320 BZ |
558 | /* |
559 | * FIXME: | |
f367bed0 | 560 | * - change master/slave IDENTIFY order |
a5b7e70d | 561 | * - force bit13 (80c cable present) check also for !ivb devices |
f68d9320 BZ |
562 | * (unless the slave device is pre-ATA3) |
563 | */ | |
a5b7e70d | 564 | if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) |
7f8f48af BZ |
565 | return 1; |
566 | ||
567 | no_80w: | |
568 | if (drive->udma33_warned == 1) | |
569 | return 0; | |
570 | ||
571 | printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " | |
572 | "limiting max speed to UDMA33\n", | |
49521f97 BZ |
573 | drive->name, |
574 | hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); | |
7f8f48af BZ |
575 | |
576 | drive->udma33_warned = 1; | |
577 | ||
578 | return 0; | |
1da177e4 LT |
579 | } |
580 | ||
8a455134 | 581 | int ide_driveid_update(ide_drive_t *drive) |
1da177e4 | 582 | { |
8a455134 | 583 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 584 | struct hd_driveid *id; |
8a455134 | 585 | unsigned long timeout, flags; |
c47137a9 | 586 | u8 stat; |
1da177e4 | 587 | |
1da177e4 LT |
588 | /* |
589 | * Re-read drive->id for possible DMA mode | |
590 | * change (copied from ide-probe.c) | |
591 | */ | |
1da177e4 LT |
592 | |
593 | SELECT_MASK(drive, 1); | |
81ca6919 | 594 | ide_set_irq(drive, 1); |
1da177e4 | 595 | msleep(50); |
32b3fe4f | 596 | hwif->OUTBSYNC(drive, WIN_IDENTIFY, hwif->io_ports.command_addr); |
1da177e4 LT |
597 | timeout = jiffies + WAIT_WORSTCASE; |
598 | do { | |
599 | if (time_after(jiffies, timeout)) { | |
600 | SELECT_MASK(drive, 0); | |
601 | return 0; /* drive timed-out */ | |
602 | } | |
c47137a9 | 603 | |
1da177e4 | 604 | msleep(50); /* give drive a breather */ |
c47137a9 BZ |
605 | stat = ide_read_altstatus(drive); |
606 | } while (stat & BUSY_STAT); | |
607 | ||
1da177e4 | 608 | msleep(50); /* wait for IRQ and DRQ_STAT */ |
c47137a9 BZ |
609 | stat = ide_read_status(drive); |
610 | ||
611 | if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) { | |
1da177e4 LT |
612 | SELECT_MASK(drive, 0); |
613 | printk("%s: CHECK for good STATUS\n", drive->name); | |
614 | return 0; | |
615 | } | |
616 | local_irq_save(flags); | |
617 | SELECT_MASK(drive, 0); | |
618 | id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); | |
619 | if (!id) { | |
620 | local_irq_restore(flags); | |
621 | return 0; | |
622 | } | |
9567b349 | 623 | hwif->input_data(drive, NULL, id, SECTOR_SIZE); |
c47137a9 | 624 | (void)ide_read_status(drive); /* clear drive IRQ */ |
1da177e4 LT |
625 | local_irq_enable(); |
626 | local_irq_restore(flags); | |
627 | ide_fix_driveid(id); | |
628 | if (id) { | |
629 | drive->id->dma_ultra = id->dma_ultra; | |
630 | drive->id->dma_mword = id->dma_mword; | |
631 | drive->id->dma_1word = id->dma_1word; | |
632 | /* anything more ? */ | |
633 | kfree(id); | |
3ab7efe8 BZ |
634 | |
635 | if (drive->using_dma && ide_id_dma_bug(drive)) | |
636 | ide_dma_off(drive); | |
1da177e4 LT |
637 | } |
638 | ||
639 | return 1; | |
1da177e4 LT |
640 | } |
641 | ||
74af21cf | 642 | int ide_config_drive_speed(ide_drive_t *drive, u8 speed) |
1da177e4 | 643 | { |
74af21cf | 644 | ide_hwif_t *hwif = drive->hwif; |
4c3032d8 | 645 | struct ide_io_ports *io_ports = &hwif->io_ports; |
89613e66 | 646 | int error = 0; |
1da177e4 LT |
647 | u8 stat; |
648 | ||
649 | // while (HWGROUP(drive)->busy) | |
650 | // msleep(50); | |
651 | ||
652 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
5e37bdc0 BZ |
653 | if (hwif->dma_ops) /* check if host supports DMA */ |
654 | hwif->dma_ops->dma_host_set(drive, 0); | |
1da177e4 LT |
655 | #endif |
656 | ||
89613e66 SS |
657 | /* Skip setting PIO flow-control modes on pre-EIDE drives */ |
658 | if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) | |
659 | goto skip; | |
660 | ||
1da177e4 LT |
661 | /* |
662 | * Don't use ide_wait_cmd here - it will | |
663 | * attempt to set_geometry and recalibrate, | |
664 | * but for some reason these don't work at | |
665 | * this point (lost interrupt). | |
666 | */ | |
667 | /* | |
668 | * Select the drive, and issue the SETFEATURES command | |
669 | */ | |
670 | disable_irq_nosync(hwif->irq); | |
671 | ||
672 | /* | |
673 | * FIXME: we race against the running IRQ here if | |
674 | * this is called from non IRQ context. If we use | |
675 | * disable_irq() we hang on the error path. Work | |
676 | * is needed. | |
677 | */ | |
678 | ||
679 | udelay(1); | |
680 | SELECT_DRIVE(drive); | |
681 | SELECT_MASK(drive, 0); | |
682 | udelay(1); | |
81ca6919 | 683 | ide_set_irq(drive, 0); |
4c3032d8 BZ |
684 | hwif->OUTB(speed, io_ports->nsect_addr); |
685 | hwif->OUTB(SETFEATURES_XFER, io_ports->feature_addr); | |
686 | hwif->OUTBSYNC(drive, WIN_SETFEATURES, io_ports->command_addr); | |
81ca6919 BZ |
687 | if (drive->quirk_list == 2) |
688 | ide_set_irq(drive, 1); | |
1da177e4 | 689 | |
74af21cf BZ |
690 | error = __ide_wait_stat(drive, drive->ready_stat, |
691 | BUSY_STAT|DRQ_STAT|ERR_STAT, | |
692 | WAIT_CMD, &stat); | |
1da177e4 LT |
693 | |
694 | SELECT_MASK(drive, 0); | |
695 | ||
696 | enable_irq(hwif->irq); | |
697 | ||
698 | if (error) { | |
699 | (void) ide_dump_status(drive, "set_drive_speed_status", stat); | |
700 | return error; | |
701 | } | |
702 | ||
703 | drive->id->dma_ultra &= ~0xFF00; | |
704 | drive->id->dma_mword &= ~0x0F00; | |
705 | drive->id->dma_1word &= ~0x0F00; | |
706 | ||
89613e66 | 707 | skip: |
1da177e4 | 708 | #ifdef CONFIG_BLK_DEV_IDEDMA |
f37aaf9e BZ |
709 | if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) && |
710 | drive->using_dma) | |
5e37bdc0 BZ |
711 | hwif->dma_ops->dma_host_set(drive, 1); |
712 | else if (hwif->dma_ops) /* check if host supports DMA */ | |
4a546e04 | 713 | ide_dma_off_quietly(drive); |
1da177e4 LT |
714 | #endif |
715 | ||
716 | switch(speed) { | |
717 | case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; | |
718 | case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; | |
719 | case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; | |
720 | case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; | |
721 | case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; | |
722 | case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; | |
723 | case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; | |
724 | case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; | |
725 | case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; | |
726 | case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; | |
727 | case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; | |
728 | case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; | |
729 | case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; | |
730 | case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; | |
731 | default: break; | |
732 | } | |
733 | if (!drive->init_speed) | |
734 | drive->init_speed = speed; | |
735 | drive->current_speed = speed; | |
736 | return error; | |
737 | } | |
738 | ||
1da177e4 LT |
739 | /* |
740 | * This should get invoked any time we exit the driver to | |
741 | * wait for an interrupt response from a drive. handler() points | |
742 | * at the appropriate code to handle the next interrupt, and a | |
743 | * timer is started to prevent us from waiting forever in case | |
744 | * something goes wrong (see the ide_timer_expiry() handler later on). | |
745 | * | |
746 | * See also ide_execute_command | |
747 | */ | |
748 | static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, | |
749 | unsigned int timeout, ide_expiry_t *expiry) | |
750 | { | |
751 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
752 | ||
d30a426d | 753 | BUG_ON(hwgroup->handler); |
1da177e4 LT |
754 | hwgroup->handler = handler; |
755 | hwgroup->expiry = expiry; | |
756 | hwgroup->timer.expires = jiffies + timeout; | |
d30a426d | 757 | hwgroup->req_gen_timer = hwgroup->req_gen; |
1da177e4 LT |
758 | add_timer(&hwgroup->timer); |
759 | } | |
760 | ||
761 | void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, | |
762 | unsigned int timeout, ide_expiry_t *expiry) | |
763 | { | |
764 | unsigned long flags; | |
765 | spin_lock_irqsave(&ide_lock, flags); | |
766 | __ide_set_handler(drive, handler, timeout, expiry); | |
767 | spin_unlock_irqrestore(&ide_lock, flags); | |
768 | } | |
769 | ||
770 | EXPORT_SYMBOL(ide_set_handler); | |
771 | ||
772 | /** | |
773 | * ide_execute_command - execute an IDE command | |
774 | * @drive: IDE drive to issue the command against | |
775 | * @command: command byte to write | |
776 | * @handler: handler for next phase | |
777 | * @timeout: timeout for command | |
778 | * @expiry: handler to run on timeout | |
779 | * | |
780 | * Helper function to issue an IDE command. This handles the | |
781 | * atomicity requirements, command timing and ensures that the | |
782 | * handler and IRQ setup do not race. All IDE command kick off | |
783 | * should go via this function or do equivalent locking. | |
784 | */ | |
cd2a2d96 BZ |
785 | |
786 | void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, | |
787 | unsigned timeout, ide_expiry_t *expiry) | |
1da177e4 LT |
788 | { |
789 | unsigned long flags; | |
1da177e4 | 790 | ide_hwif_t *hwif = HWIF(drive); |
629f944b | 791 | |
1da177e4 | 792 | spin_lock_irqsave(&ide_lock, flags); |
629f944b | 793 | __ide_set_handler(drive, handler, timeout, expiry); |
4c3032d8 | 794 | hwif->OUTBSYNC(drive, cmd, hwif->io_ports.command_addr); |
629f944b BZ |
795 | /* |
796 | * Drive takes 400nS to respond, we must avoid the IRQ being | |
797 | * serviced before that. | |
798 | * | |
799 | * FIXME: we could skip this delay with care on non shared devices | |
800 | */ | |
1da177e4 LT |
801 | ndelay(400); |
802 | spin_unlock_irqrestore(&ide_lock, flags); | |
803 | } | |
1da177e4 LT |
804 | EXPORT_SYMBOL(ide_execute_command); |
805 | ||
1fc14258 BZ |
806 | void ide_execute_pkt_cmd(ide_drive_t *drive) |
807 | { | |
808 | ide_hwif_t *hwif = drive->hwif; | |
809 | unsigned long flags; | |
810 | ||
811 | spin_lock_irqsave(&ide_lock, flags); | |
812 | hwif->OUTBSYNC(drive, WIN_PACKETCMD, hwif->io_ports.command_addr); | |
813 | ndelay(400); | |
814 | spin_unlock_irqrestore(&ide_lock, flags); | |
815 | } | |
816 | EXPORT_SYMBOL_GPL(ide_execute_pkt_cmd); | |
1da177e4 LT |
817 | |
818 | /* needed below */ | |
819 | static ide_startstop_t do_reset1 (ide_drive_t *, int); | |
820 | ||
821 | /* | |
822 | * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms | |
823 | * during an atapi drive reset operation. If the drive has not yet responded, | |
824 | * and we have not yet hit our maximum waiting time, then the timer is restarted | |
825 | * for another 50ms. | |
826 | */ | |
827 | static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) | |
828 | { | |
829 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
1da177e4 LT |
830 | u8 stat; |
831 | ||
832 | SELECT_DRIVE(drive); | |
833 | udelay (10); | |
c47137a9 | 834 | stat = ide_read_status(drive); |
1da177e4 | 835 | |
c47137a9 | 836 | if (OK_STAT(stat, 0, BUSY_STAT)) |
1da177e4 | 837 | printk("%s: ATAPI reset complete\n", drive->name); |
c47137a9 | 838 | else { |
1da177e4 | 839 | if (time_before(jiffies, hwgroup->poll_timeout)) { |
1da177e4 LT |
840 | ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); |
841 | /* continue polling */ | |
842 | return ide_started; | |
843 | } | |
844 | /* end of polling */ | |
845 | hwgroup->polling = 0; | |
846 | printk("%s: ATAPI reset timed-out, status=0x%02x\n", | |
847 | drive->name, stat); | |
848 | /* do it the old fashioned way */ | |
849 | return do_reset1(drive, 1); | |
850 | } | |
851 | /* done polling */ | |
852 | hwgroup->polling = 0; | |
913759ac | 853 | hwgroup->resetting = 0; |
1da177e4 LT |
854 | return ide_stopped; |
855 | } | |
856 | ||
857 | /* | |
858 | * reset_pollfunc() gets invoked to poll the interface for completion every 50ms | |
859 | * during an ide reset operation. If the drives have not yet responded, | |
860 | * and we have not yet hit our maximum waiting time, then the timer is restarted | |
861 | * for another 50ms. | |
862 | */ | |
863 | static ide_startstop_t reset_pollfunc (ide_drive_t *drive) | |
864 | { | |
865 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
866 | ide_hwif_t *hwif = HWIF(drive); | |
ac95beed | 867 | const struct ide_port_ops *port_ops = hwif->port_ops; |
1da177e4 LT |
868 | u8 tmp; |
869 | ||
ac95beed BZ |
870 | if (port_ops && port_ops->reset_poll) { |
871 | if (port_ops->reset_poll(drive)) { | |
1da177e4 LT |
872 | printk(KERN_ERR "%s: host reset_poll failure for %s.\n", |
873 | hwif->name, drive->name); | |
874 | return ide_stopped; | |
875 | } | |
876 | } | |
877 | ||
c47137a9 BZ |
878 | tmp = ide_read_status(drive); |
879 | ||
880 | if (!OK_STAT(tmp, 0, BUSY_STAT)) { | |
1da177e4 | 881 | if (time_before(jiffies, hwgroup->poll_timeout)) { |
1da177e4 LT |
882 | ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); |
883 | /* continue polling */ | |
884 | return ide_started; | |
885 | } | |
886 | printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); | |
887 | drive->failures++; | |
888 | } else { | |
889 | printk("%s: reset: ", hwif->name); | |
64a57fe4 BZ |
890 | tmp = ide_read_error(drive); |
891 | ||
892 | if (tmp == 1) { | |
1da177e4 LT |
893 | printk("success\n"); |
894 | drive->failures = 0; | |
895 | } else { | |
896 | drive->failures++; | |
897 | printk("master: "); | |
898 | switch (tmp & 0x7f) { | |
899 | case 1: printk("passed"); | |
900 | break; | |
901 | case 2: printk("formatter device error"); | |
902 | break; | |
903 | case 3: printk("sector buffer error"); | |
904 | break; | |
905 | case 4: printk("ECC circuitry error"); | |
906 | break; | |
907 | case 5: printk("controlling MPU error"); | |
908 | break; | |
909 | default:printk("error (0x%02x?)", tmp); | |
910 | } | |
911 | if (tmp & 0x80) | |
912 | printk("; slave: failed"); | |
913 | printk("\n"); | |
914 | } | |
915 | } | |
916 | hwgroup->polling = 0; /* done polling */ | |
913759ac | 917 | hwgroup->resetting = 0; /* done reset attempt */ |
1da177e4 LT |
918 | return ide_stopped; |
919 | } | |
920 | ||
1da177e4 LT |
921 | static void ide_disk_pre_reset(ide_drive_t *drive) |
922 | { | |
923 | int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; | |
924 | ||
925 | drive->special.all = 0; | |
926 | drive->special.b.set_geometry = legacy; | |
927 | drive->special.b.recalibrate = legacy; | |
4ee06b7e | 928 | drive->mult_count = 0; |
1da177e4 LT |
929 | if (!drive->keep_settings && !drive->using_dma) |
930 | drive->mult_req = 0; | |
931 | if (drive->mult_req != drive->mult_count) | |
932 | drive->special.b.set_multmode = 1; | |
933 | } | |
934 | ||
935 | static void pre_reset(ide_drive_t *drive) | |
936 | { | |
ac95beed BZ |
937 | const struct ide_port_ops *port_ops = drive->hwif->port_ops; |
938 | ||
1da177e4 LT |
939 | if (drive->media == ide_disk) |
940 | ide_disk_pre_reset(drive); | |
941 | else | |
942 | drive->post_reset = 1; | |
943 | ||
99ffbe0e BZ |
944 | if (drive->using_dma) { |
945 | if (drive->crc_count) | |
578cfa0d | 946 | ide_check_dma_crc(drive); |
99ffbe0e BZ |
947 | else |
948 | ide_dma_off(drive); | |
949 | } | |
950 | ||
951 | if (!drive->keep_settings) { | |
952 | if (!drive->using_dma) { | |
1da177e4 LT |
953 | drive->unmask = 0; |
954 | drive->io_32bit = 0; | |
955 | } | |
956 | return; | |
957 | } | |
1da177e4 | 958 | |
ac95beed BZ |
959 | if (port_ops && port_ops->pre_reset) |
960 | port_ops->pre_reset(drive); | |
1da177e4 | 961 | |
513daadd SS |
962 | if (drive->current_speed != 0xff) |
963 | drive->desired_speed = drive->current_speed; | |
964 | drive->current_speed = 0xff; | |
1da177e4 LT |
965 | } |
966 | ||
967 | /* | |
968 | * do_reset1() attempts to recover a confused drive by resetting it. | |
969 | * Unfortunately, resetting a disk drive actually resets all devices on | |
970 | * the same interface, so it can really be thought of as resetting the | |
971 | * interface rather than resetting the drive. | |
972 | * | |
973 | * ATAPI devices have their own reset mechanism which allows them to be | |
974 | * individually reset without clobbering other devices on the same interface. | |
975 | * | |
976 | * Unfortunately, the IDE interface does not generate an interrupt to let | |
977 | * us know when the reset operation has finished, so we must poll for this. | |
978 | * Equally poor, though, is the fact that this may a very long time to complete, | |
979 | * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, | |
980 | * we set a timer to poll at 50ms intervals. | |
981 | */ | |
982 | static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) | |
983 | { | |
984 | unsigned int unit; | |
985 | unsigned long flags; | |
986 | ide_hwif_t *hwif; | |
987 | ide_hwgroup_t *hwgroup; | |
4c3032d8 | 988 | struct ide_io_ports *io_ports; |
ac95beed | 989 | const struct ide_port_ops *port_ops; |
23579a2a BZ |
990 | u8 ctl; |
991 | ||
1da177e4 LT |
992 | spin_lock_irqsave(&ide_lock, flags); |
993 | hwif = HWIF(drive); | |
994 | hwgroup = HWGROUP(drive); | |
995 | ||
4c3032d8 BZ |
996 | io_ports = &hwif->io_ports; |
997 | ||
1da177e4 | 998 | /* We must not reset with running handlers */ |
125e1874 | 999 | BUG_ON(hwgroup->handler != NULL); |
1da177e4 LT |
1000 | |
1001 | /* For an ATAPI device, first try an ATAPI SRST. */ | |
1002 | if (drive->media != ide_disk && !do_not_try_atapi) { | |
913759ac | 1003 | hwgroup->resetting = 1; |
1da177e4 LT |
1004 | pre_reset(drive); |
1005 | SELECT_DRIVE(drive); | |
1006 | udelay (20); | |
4c3032d8 | 1007 | hwif->OUTBSYNC(drive, WIN_SRST, io_ports->command_addr); |
68ad9910 | 1008 | ndelay(400); |
1da177e4 LT |
1009 | hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; |
1010 | hwgroup->polling = 1; | |
1011 | __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); | |
1012 | spin_unlock_irqrestore(&ide_lock, flags); | |
1013 | return ide_started; | |
1014 | } | |
1015 | ||
1016 | /* | |
1017 | * First, reset any device state data we were maintaining | |
1018 | * for any of the drives on this interface. | |
1019 | */ | |
1020 | for (unit = 0; unit < MAX_DRIVES; ++unit) | |
1021 | pre_reset(&hwif->drives[unit]); | |
1022 | ||
4c3032d8 | 1023 | if (io_ports->ctl_addr == 0) { |
1da177e4 LT |
1024 | spin_unlock_irqrestore(&ide_lock, flags); |
1025 | return ide_stopped; | |
1026 | } | |
1027 | ||
913759ac | 1028 | hwgroup->resetting = 1; |
1da177e4 LT |
1029 | /* |
1030 | * Note that we also set nIEN while resetting the device, | |
1031 | * to mask unwanted interrupts from the interface during the reset. | |
1032 | * However, due to the design of PC hardware, this will cause an | |
1033 | * immediate interrupt due to the edge transition it produces. | |
1034 | * This single interrupt gives us a "fast poll" for drives that | |
1035 | * recover from reset very quickly, saving us the first 50ms wait time. | |
1036 | */ | |
1037 | /* set SRST and nIEN */ | |
4c3032d8 | 1038 | hwif->OUTBSYNC(drive, drive->ctl|6, io_ports->ctl_addr); |
1da177e4 LT |
1039 | /* more than enough time */ |
1040 | udelay(10); | |
23579a2a BZ |
1041 | if (drive->quirk_list == 2) |
1042 | ctl = drive->ctl; /* clear SRST and nIEN */ | |
1043 | else | |
1044 | ctl = drive->ctl | 2; /* clear SRST, leave nIEN */ | |
4c3032d8 | 1045 | hwif->OUTBSYNC(drive, ctl, io_ports->ctl_addr); |
1da177e4 LT |
1046 | /* more than enough time */ |
1047 | udelay(10); | |
1048 | hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; | |
1049 | hwgroup->polling = 1; | |
1050 | __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); | |
1051 | ||
1052 | /* | |
1053 | * Some weird controller like resetting themselves to a strange | |
1054 | * state when the disks are reset this way. At least, the Winbond | |
1055 | * 553 documentation says that | |
1056 | */ | |
ac95beed BZ |
1057 | port_ops = hwif->port_ops; |
1058 | if (port_ops && port_ops->resetproc) | |
1059 | port_ops->resetproc(drive); | |
1da177e4 LT |
1060 | |
1061 | spin_unlock_irqrestore(&ide_lock, flags); | |
1062 | return ide_started; | |
1063 | } | |
1064 | ||
1065 | /* | |
1066 | * ide_do_reset() is the entry point to the drive/interface reset code. | |
1067 | */ | |
1068 | ||
1069 | ide_startstop_t ide_do_reset (ide_drive_t *drive) | |
1070 | { | |
1071 | return do_reset1(drive, 0); | |
1072 | } | |
1073 | ||
1074 | EXPORT_SYMBOL(ide_do_reset); | |
1075 | ||
1076 | /* | |
1077 | * ide_wait_not_busy() waits for the currently selected device on the hwif | |
9d501529 | 1078 | * to report a non-busy status, see comments in ide_probe_port(). |
1da177e4 LT |
1079 | */ |
1080 | int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) | |
1081 | { | |
1082 | u8 stat = 0; | |
1083 | ||
1084 | while(timeout--) { | |
1085 | /* | |
1086 | * Turn this into a schedule() sleep once I'm sure | |
1087 | * about locking issues (2.5 work ?). | |
1088 | */ | |
1089 | mdelay(1); | |
4c3032d8 | 1090 | stat = hwif->INB(hwif->io_ports.status_addr); |
1da177e4 LT |
1091 | if ((stat & BUSY_STAT) == 0) |
1092 | return 0; | |
1093 | /* | |
1094 | * Assume a value of 0xff means nothing is connected to | |
1095 | * the interface and it doesn't implement the pull-down | |
1096 | * resistor on D7. | |
1097 | */ | |
1098 | if (stat == 0xff) | |
1099 | return -ENODEV; | |
6842f8c8 | 1100 | touch_softlockup_watchdog(); |
1e86240f | 1101 | touch_nmi_watchdog(); |
1da177e4 LT |
1102 | } |
1103 | return -EBUSY; | |
1104 | } | |
1105 | ||
1106 | EXPORT_SYMBOL_GPL(ide_wait_not_busy); | |
1107 |