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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 2000-2002 Andre Hedrick <andre@linux-ide.org> |
3 | * Copyright (C) 2003 Red Hat <alan@redhat.com> | |
4 | * | |
5 | */ | |
6 | ||
1da177e4 LT |
7 | #include <linux/module.h> |
8 | #include <linux/types.h> | |
9 | #include <linux/string.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/timer.h> | |
12 | #include <linux/mm.h> | |
13 | #include <linux/interrupt.h> | |
14 | #include <linux/major.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/genhd.h> | |
17 | #include <linux/blkpg.h> | |
18 | #include <linux/slab.h> | |
19 | #include <linux/pci.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/hdreg.h> | |
22 | #include <linux/ide.h> | |
23 | #include <linux/bitops.h> | |
1e86240f | 24 | #include <linux/nmi.h> |
1da177e4 LT |
25 | |
26 | #include <asm/byteorder.h> | |
27 | #include <asm/irq.h> | |
28 | #include <asm/uaccess.h> | |
29 | #include <asm/io.h> | |
30 | ||
31 | /* | |
32 | * Conventional PIO operations for ATA devices | |
33 | */ | |
34 | ||
35 | static u8 ide_inb (unsigned long port) | |
36 | { | |
37 | return (u8) inb(port); | |
38 | } | |
39 | ||
40 | static u16 ide_inw (unsigned long port) | |
41 | { | |
42 | return (u16) inw(port); | |
43 | } | |
44 | ||
45 | static void ide_insw (unsigned long port, void *addr, u32 count) | |
46 | { | |
47 | insw(port, addr, count); | |
48 | } | |
49 | ||
1da177e4 LT |
50 | static void ide_insl (unsigned long port, void *addr, u32 count) |
51 | { | |
52 | insl(port, addr, count); | |
53 | } | |
54 | ||
55 | static void ide_outb (u8 val, unsigned long port) | |
56 | { | |
57 | outb(val, port); | |
58 | } | |
59 | ||
60 | static void ide_outbsync (ide_drive_t *drive, u8 addr, unsigned long port) | |
61 | { | |
62 | outb(addr, port); | |
63 | } | |
64 | ||
65 | static void ide_outw (u16 val, unsigned long port) | |
66 | { | |
67 | outw(val, port); | |
68 | } | |
69 | ||
70 | static void ide_outsw (unsigned long port, void *addr, u32 count) | |
71 | { | |
72 | outsw(port, addr, count); | |
73 | } | |
74 | ||
1da177e4 LT |
75 | static void ide_outsl (unsigned long port, void *addr, u32 count) |
76 | { | |
77 | outsl(port, addr, count); | |
78 | } | |
79 | ||
80 | void default_hwif_iops (ide_hwif_t *hwif) | |
81 | { | |
82 | hwif->OUTB = ide_outb; | |
83 | hwif->OUTBSYNC = ide_outbsync; | |
84 | hwif->OUTW = ide_outw; | |
1da177e4 LT |
85 | hwif->OUTSW = ide_outsw; |
86 | hwif->OUTSL = ide_outsl; | |
87 | hwif->INB = ide_inb; | |
88 | hwif->INW = ide_inw; | |
1da177e4 LT |
89 | hwif->INSW = ide_insw; |
90 | hwif->INSL = ide_insl; | |
91 | } | |
92 | ||
1da177e4 LT |
93 | /* |
94 | * MMIO operations, typically used for SATA controllers | |
95 | */ | |
96 | ||
97 | static u8 ide_mm_inb (unsigned long port) | |
98 | { | |
99 | return (u8) readb((void __iomem *) port); | |
100 | } | |
101 | ||
102 | static u16 ide_mm_inw (unsigned long port) | |
103 | { | |
104 | return (u16) readw((void __iomem *) port); | |
105 | } | |
106 | ||
107 | static void ide_mm_insw (unsigned long port, void *addr, u32 count) | |
108 | { | |
109 | __ide_mm_insw((void __iomem *) port, addr, count); | |
110 | } | |
111 | ||
1da177e4 LT |
112 | static void ide_mm_insl (unsigned long port, void *addr, u32 count) |
113 | { | |
114 | __ide_mm_insl((void __iomem *) port, addr, count); | |
115 | } | |
116 | ||
117 | static void ide_mm_outb (u8 value, unsigned long port) | |
118 | { | |
119 | writeb(value, (void __iomem *) port); | |
120 | } | |
121 | ||
122 | static void ide_mm_outbsync (ide_drive_t *drive, u8 value, unsigned long port) | |
123 | { | |
124 | writeb(value, (void __iomem *) port); | |
125 | } | |
126 | ||
127 | static void ide_mm_outw (u16 value, unsigned long port) | |
128 | { | |
129 | writew(value, (void __iomem *) port); | |
130 | } | |
131 | ||
132 | static void ide_mm_outsw (unsigned long port, void *addr, u32 count) | |
133 | { | |
134 | __ide_mm_outsw((void __iomem *) port, addr, count); | |
135 | } | |
136 | ||
1da177e4 LT |
137 | static void ide_mm_outsl (unsigned long port, void *addr, u32 count) |
138 | { | |
139 | __ide_mm_outsl((void __iomem *) port, addr, count); | |
140 | } | |
141 | ||
142 | void default_hwif_mmiops (ide_hwif_t *hwif) | |
143 | { | |
144 | hwif->OUTB = ide_mm_outb; | |
145 | /* Most systems will need to override OUTBSYNC, alas however | |
146 | this one is controller specific! */ | |
147 | hwif->OUTBSYNC = ide_mm_outbsync; | |
148 | hwif->OUTW = ide_mm_outw; | |
1da177e4 LT |
149 | hwif->OUTSW = ide_mm_outsw; |
150 | hwif->OUTSL = ide_mm_outsl; | |
151 | hwif->INB = ide_mm_inb; | |
152 | hwif->INW = ide_mm_inw; | |
1da177e4 LT |
153 | hwif->INSW = ide_mm_insw; |
154 | hwif->INSL = ide_mm_insl; | |
155 | } | |
156 | ||
157 | EXPORT_SYMBOL(default_hwif_mmiops); | |
158 | ||
1da177e4 LT |
159 | void SELECT_DRIVE (ide_drive_t *drive) |
160 | { | |
161 | if (HWIF(drive)->selectproc) | |
162 | HWIF(drive)->selectproc(drive); | |
163 | HWIF(drive)->OUTB(drive->select.all, IDE_SELECT_REG); | |
164 | } | |
165 | ||
1da177e4 LT |
166 | void SELECT_MASK (ide_drive_t *drive, int mask) |
167 | { | |
168 | if (HWIF(drive)->maskproc) | |
169 | HWIF(drive)->maskproc(drive, mask); | |
170 | } | |
171 | ||
1da177e4 LT |
172 | /* |
173 | * Some localbus EIDE interfaces require a special access sequence | |
174 | * when using 32-bit I/O instructions to transfer data. We call this | |
175 | * the "vlb_sync" sequence, which consists of three successive reads | |
176 | * of the sector count register location, with interrupts disabled | |
177 | * to ensure that the reads all happen together. | |
178 | */ | |
179 | static void ata_vlb_sync(ide_drive_t *drive, unsigned long port) | |
180 | { | |
181 | (void) HWIF(drive)->INB(port); | |
182 | (void) HWIF(drive)->INB(port); | |
183 | (void) HWIF(drive)->INB(port); | |
184 | } | |
185 | ||
186 | /* | |
187 | * This is used for most PIO data transfers *from* the IDE interface | |
188 | */ | |
189 | static void ata_input_data(ide_drive_t *drive, void *buffer, u32 wcount) | |
190 | { | |
191 | ide_hwif_t *hwif = HWIF(drive); | |
192 | u8 io_32bit = drive->io_32bit; | |
193 | ||
194 | if (io_32bit) { | |
195 | if (io_32bit & 2) { | |
196 | unsigned long flags; | |
197 | local_irq_save(flags); | |
198 | ata_vlb_sync(drive, IDE_NSECTOR_REG); | |
199 | hwif->INSL(IDE_DATA_REG, buffer, wcount); | |
200 | local_irq_restore(flags); | |
201 | } else | |
202 | hwif->INSL(IDE_DATA_REG, buffer, wcount); | |
203 | } else { | |
204 | hwif->INSW(IDE_DATA_REG, buffer, wcount<<1); | |
205 | } | |
206 | } | |
207 | ||
208 | /* | |
209 | * This is used for most PIO data transfers *to* the IDE interface | |
210 | */ | |
211 | static void ata_output_data(ide_drive_t *drive, void *buffer, u32 wcount) | |
212 | { | |
213 | ide_hwif_t *hwif = HWIF(drive); | |
214 | u8 io_32bit = drive->io_32bit; | |
215 | ||
216 | if (io_32bit) { | |
217 | if (io_32bit & 2) { | |
218 | unsigned long flags; | |
219 | local_irq_save(flags); | |
220 | ata_vlb_sync(drive, IDE_NSECTOR_REG); | |
221 | hwif->OUTSL(IDE_DATA_REG, buffer, wcount); | |
222 | local_irq_restore(flags); | |
223 | } else | |
224 | hwif->OUTSL(IDE_DATA_REG, buffer, wcount); | |
225 | } else { | |
226 | hwif->OUTSW(IDE_DATA_REG, buffer, wcount<<1); | |
227 | } | |
228 | } | |
229 | ||
230 | /* | |
231 | * The following routines are mainly used by the ATAPI drivers. | |
232 | * | |
233 | * These routines will round up any request for an odd number of bytes, | |
234 | * so if an odd bytecount is specified, be sure that there's at least one | |
235 | * extra byte allocated for the buffer. | |
236 | */ | |
237 | ||
238 | static void atapi_input_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) | |
239 | { | |
240 | ide_hwif_t *hwif = HWIF(drive); | |
241 | ||
242 | ++bytecount; | |
243 | #if defined(CONFIG_ATARI) || defined(CONFIG_Q40) | |
244 | if (MACH_IS_ATARI || MACH_IS_Q40) { | |
245 | /* Atari has a byte-swapped IDE interface */ | |
246 | insw_swapw(IDE_DATA_REG, buffer, bytecount / 2); | |
247 | return; | |
248 | } | |
249 | #endif /* CONFIG_ATARI || CONFIG_Q40 */ | |
250 | hwif->ata_input_data(drive, buffer, bytecount / 4); | |
251 | if ((bytecount & 0x03) >= 2) | |
252 | hwif->INSW(IDE_DATA_REG, ((u8 *)buffer)+(bytecount & ~0x03), 1); | |
253 | } | |
254 | ||
255 | static void atapi_output_bytes(ide_drive_t *drive, void *buffer, u32 bytecount) | |
256 | { | |
257 | ide_hwif_t *hwif = HWIF(drive); | |
258 | ||
259 | ++bytecount; | |
260 | #if defined(CONFIG_ATARI) || defined(CONFIG_Q40) | |
261 | if (MACH_IS_ATARI || MACH_IS_Q40) { | |
262 | /* Atari has a byte-swapped IDE interface */ | |
263 | outsw_swapw(IDE_DATA_REG, buffer, bytecount / 2); | |
264 | return; | |
265 | } | |
266 | #endif /* CONFIG_ATARI || CONFIG_Q40 */ | |
267 | hwif->ata_output_data(drive, buffer, bytecount / 4); | |
268 | if ((bytecount & 0x03) >= 2) | |
269 | hwif->OUTSW(IDE_DATA_REG, ((u8*)buffer)+(bytecount & ~0x03), 1); | |
270 | } | |
271 | ||
272 | void default_hwif_transport(ide_hwif_t *hwif) | |
273 | { | |
274 | hwif->ata_input_data = ata_input_data; | |
275 | hwif->ata_output_data = ata_output_data; | |
276 | hwif->atapi_input_bytes = atapi_input_bytes; | |
277 | hwif->atapi_output_bytes = atapi_output_bytes; | |
278 | } | |
279 | ||
1da177e4 LT |
280 | void ide_fix_driveid (struct hd_driveid *id) |
281 | { | |
282 | #ifndef __LITTLE_ENDIAN | |
283 | # ifdef __BIG_ENDIAN | |
284 | int i; | |
285 | u16 *stringcast; | |
286 | ||
287 | id->config = __le16_to_cpu(id->config); | |
288 | id->cyls = __le16_to_cpu(id->cyls); | |
289 | id->reserved2 = __le16_to_cpu(id->reserved2); | |
290 | id->heads = __le16_to_cpu(id->heads); | |
291 | id->track_bytes = __le16_to_cpu(id->track_bytes); | |
292 | id->sector_bytes = __le16_to_cpu(id->sector_bytes); | |
293 | id->sectors = __le16_to_cpu(id->sectors); | |
294 | id->vendor0 = __le16_to_cpu(id->vendor0); | |
295 | id->vendor1 = __le16_to_cpu(id->vendor1); | |
296 | id->vendor2 = __le16_to_cpu(id->vendor2); | |
297 | stringcast = (u16 *)&id->serial_no[0]; | |
298 | for (i = 0; i < (20/2); i++) | |
299 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
300 | id->buf_type = __le16_to_cpu(id->buf_type); | |
301 | id->buf_size = __le16_to_cpu(id->buf_size); | |
302 | id->ecc_bytes = __le16_to_cpu(id->ecc_bytes); | |
303 | stringcast = (u16 *)&id->fw_rev[0]; | |
304 | for (i = 0; i < (8/2); i++) | |
305 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
306 | stringcast = (u16 *)&id->model[0]; | |
307 | for (i = 0; i < (40/2); i++) | |
308 | stringcast[i] = __le16_to_cpu(stringcast[i]); | |
309 | id->dword_io = __le16_to_cpu(id->dword_io); | |
310 | id->reserved50 = __le16_to_cpu(id->reserved50); | |
311 | id->field_valid = __le16_to_cpu(id->field_valid); | |
312 | id->cur_cyls = __le16_to_cpu(id->cur_cyls); | |
313 | id->cur_heads = __le16_to_cpu(id->cur_heads); | |
314 | id->cur_sectors = __le16_to_cpu(id->cur_sectors); | |
315 | id->cur_capacity0 = __le16_to_cpu(id->cur_capacity0); | |
316 | id->cur_capacity1 = __le16_to_cpu(id->cur_capacity1); | |
317 | id->lba_capacity = __le32_to_cpu(id->lba_capacity); | |
318 | id->dma_1word = __le16_to_cpu(id->dma_1word); | |
319 | id->dma_mword = __le16_to_cpu(id->dma_mword); | |
320 | id->eide_pio_modes = __le16_to_cpu(id->eide_pio_modes); | |
321 | id->eide_dma_min = __le16_to_cpu(id->eide_dma_min); | |
322 | id->eide_dma_time = __le16_to_cpu(id->eide_dma_time); | |
323 | id->eide_pio = __le16_to_cpu(id->eide_pio); | |
324 | id->eide_pio_iordy = __le16_to_cpu(id->eide_pio_iordy); | |
325 | for (i = 0; i < 2; ++i) | |
326 | id->words69_70[i] = __le16_to_cpu(id->words69_70[i]); | |
327 | for (i = 0; i < 4; ++i) | |
328 | id->words71_74[i] = __le16_to_cpu(id->words71_74[i]); | |
329 | id->queue_depth = __le16_to_cpu(id->queue_depth); | |
330 | for (i = 0; i < 4; ++i) | |
331 | id->words76_79[i] = __le16_to_cpu(id->words76_79[i]); | |
332 | id->major_rev_num = __le16_to_cpu(id->major_rev_num); | |
333 | id->minor_rev_num = __le16_to_cpu(id->minor_rev_num); | |
334 | id->command_set_1 = __le16_to_cpu(id->command_set_1); | |
335 | id->command_set_2 = __le16_to_cpu(id->command_set_2); | |
336 | id->cfsse = __le16_to_cpu(id->cfsse); | |
337 | id->cfs_enable_1 = __le16_to_cpu(id->cfs_enable_1); | |
338 | id->cfs_enable_2 = __le16_to_cpu(id->cfs_enable_2); | |
339 | id->csf_default = __le16_to_cpu(id->csf_default); | |
340 | id->dma_ultra = __le16_to_cpu(id->dma_ultra); | |
341 | id->trseuc = __le16_to_cpu(id->trseuc); | |
342 | id->trsEuc = __le16_to_cpu(id->trsEuc); | |
343 | id->CurAPMvalues = __le16_to_cpu(id->CurAPMvalues); | |
344 | id->mprc = __le16_to_cpu(id->mprc); | |
345 | id->hw_config = __le16_to_cpu(id->hw_config); | |
346 | id->acoustic = __le16_to_cpu(id->acoustic); | |
347 | id->msrqs = __le16_to_cpu(id->msrqs); | |
348 | id->sxfert = __le16_to_cpu(id->sxfert); | |
349 | id->sal = __le16_to_cpu(id->sal); | |
350 | id->spg = __le32_to_cpu(id->spg); | |
351 | id->lba_capacity_2 = __le64_to_cpu(id->lba_capacity_2); | |
352 | for (i = 0; i < 22; i++) | |
353 | id->words104_125[i] = __le16_to_cpu(id->words104_125[i]); | |
354 | id->last_lun = __le16_to_cpu(id->last_lun); | |
355 | id->word127 = __le16_to_cpu(id->word127); | |
356 | id->dlf = __le16_to_cpu(id->dlf); | |
357 | id->csfo = __le16_to_cpu(id->csfo); | |
358 | for (i = 0; i < 26; i++) | |
359 | id->words130_155[i] = __le16_to_cpu(id->words130_155[i]); | |
360 | id->word156 = __le16_to_cpu(id->word156); | |
361 | for (i = 0; i < 3; i++) | |
362 | id->words157_159[i] = __le16_to_cpu(id->words157_159[i]); | |
363 | id->cfa_power = __le16_to_cpu(id->cfa_power); | |
364 | for (i = 0; i < 14; i++) | |
365 | id->words161_175[i] = __le16_to_cpu(id->words161_175[i]); | |
366 | for (i = 0; i < 31; i++) | |
367 | id->words176_205[i] = __le16_to_cpu(id->words176_205[i]); | |
368 | for (i = 0; i < 48; i++) | |
369 | id->words206_254[i] = __le16_to_cpu(id->words206_254[i]); | |
370 | id->integrity_word = __le16_to_cpu(id->integrity_word); | |
371 | # else | |
372 | # error "Please fix <asm/byteorder.h>" | |
373 | # endif | |
374 | #endif | |
375 | } | |
376 | ||
01745112 BZ |
377 | /* |
378 | * ide_fixstring() cleans up and (optionally) byte-swaps a text string, | |
379 | * removing leading/trailing blanks and compressing internal blanks. | |
380 | * It is primarily used to tidy up the model name/number fields as | |
381 | * returned by the WIN_[P]IDENTIFY commands. | |
382 | */ | |
383 | ||
1da177e4 LT |
384 | void ide_fixstring (u8 *s, const int bytecount, const int byteswap) |
385 | { | |
386 | u8 *p = s, *end = &s[bytecount & ~1]; /* bytecount must be even */ | |
387 | ||
388 | if (byteswap) { | |
389 | /* convert from big-endian to host byte order */ | |
390 | for (p = end ; p != s;) { | |
391 | unsigned short *pp = (unsigned short *) (p -= 2); | |
392 | *pp = ntohs(*pp); | |
393 | } | |
394 | } | |
395 | /* strip leading blanks */ | |
396 | while (s != end && *s == ' ') | |
397 | ++s; | |
398 | /* compress internal blanks and strip trailing blanks */ | |
399 | while (s != end && *s) { | |
400 | if (*s++ != ' ' || (s != end && *s && *s != ' ')) | |
401 | *p++ = *(s-1); | |
402 | } | |
403 | /* wipe out trailing garbage */ | |
404 | while (p != end) | |
405 | *p++ = '\0'; | |
406 | } | |
407 | ||
408 | EXPORT_SYMBOL(ide_fixstring); | |
409 | ||
410 | /* | |
411 | * Needed for PCI irq sharing | |
412 | */ | |
413 | int drive_is_ready (ide_drive_t *drive) | |
414 | { | |
415 | ide_hwif_t *hwif = HWIF(drive); | |
416 | u8 stat = 0; | |
417 | ||
418 | if (drive->waiting_for_dma) | |
419 | return hwif->ide_dma_test_irq(drive); | |
420 | ||
421 | #if 0 | |
422 | /* need to guarantee 400ns since last command was issued */ | |
423 | udelay(1); | |
424 | #endif | |
425 | ||
1da177e4 LT |
426 | /* |
427 | * We do a passive status test under shared PCI interrupts on | |
428 | * cards that truly share the ATA side interrupt, but may also share | |
429 | * an interrupt with another pci card/device. We make no assumptions | |
430 | * about possible isa-pnp and pci-pnp issues yet. | |
431 | */ | |
432 | if (IDE_CONTROL_REG) | |
c47137a9 | 433 | stat = ide_read_altstatus(drive); |
1da177e4 | 434 | else |
1da177e4 | 435 | /* Note: this may clear a pending IRQ!! */ |
c47137a9 | 436 | stat = ide_read_status(drive); |
1da177e4 LT |
437 | |
438 | if (stat & BUSY_STAT) | |
439 | /* drive busy: definitely not interrupting */ | |
440 | return 0; | |
441 | ||
442 | /* drive ready: *might* be interrupting */ | |
443 | return 1; | |
444 | } | |
445 | ||
446 | EXPORT_SYMBOL(drive_is_ready); | |
447 | ||
1da177e4 LT |
448 | /* |
449 | * This routine busy-waits for the drive status to be not "busy". | |
450 | * It then checks the status for all of the "good" bits and none | |
451 | * of the "bad" bits, and if all is okay it returns 0. All other | |
74af21cf | 452 | * cases return error -- caller may then invoke ide_error(). |
1da177e4 LT |
453 | * |
454 | * This routine should get fixed to not hog the cpu during extra long waits.. | |
455 | * That could be done by busy-waiting for the first jiffy or two, and then | |
456 | * setting a timer to wake up at half second intervals thereafter, | |
457 | * until timeout is achieved, before timing out. | |
458 | */ | |
aedea591 | 459 | static int __ide_wait_stat(ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout, u8 *rstat) |
1da177e4 | 460 | { |
1da177e4 | 461 | unsigned long flags; |
74af21cf BZ |
462 | int i; |
463 | u8 stat; | |
1da177e4 LT |
464 | |
465 | udelay(1); /* spec allows drive 400ns to assert "BUSY" */ | |
c47137a9 BZ |
466 | stat = ide_read_status(drive); |
467 | ||
468 | if (stat & BUSY_STAT) { | |
1da177e4 LT |
469 | local_irq_set(flags); |
470 | timeout += jiffies; | |
c47137a9 | 471 | while ((stat = ide_read_status(drive)) & BUSY_STAT) { |
1da177e4 LT |
472 | if (time_after(jiffies, timeout)) { |
473 | /* | |
474 | * One last read after the timeout in case | |
475 | * heavy interrupt load made us not make any | |
476 | * progress during the timeout.. | |
477 | */ | |
c47137a9 | 478 | stat = ide_read_status(drive); |
1da177e4 LT |
479 | if (!(stat & BUSY_STAT)) |
480 | break; | |
481 | ||
482 | local_irq_restore(flags); | |
74af21cf BZ |
483 | *rstat = stat; |
484 | return -EBUSY; | |
1da177e4 LT |
485 | } |
486 | } | |
487 | local_irq_restore(flags); | |
488 | } | |
489 | /* | |
490 | * Allow status to settle, then read it again. | |
491 | * A few rare drives vastly violate the 400ns spec here, | |
492 | * so we'll wait up to 10usec for a "good" status | |
493 | * rather than expensively fail things immediately. | |
494 | * This fix courtesy of Matthew Faupel & Niccolo Rigacci. | |
495 | */ | |
496 | for (i = 0; i < 10; i++) { | |
497 | udelay(1); | |
c47137a9 BZ |
498 | stat = ide_read_status(drive); |
499 | ||
500 | if (OK_STAT(stat, good, bad)) { | |
74af21cf | 501 | *rstat = stat; |
1da177e4 | 502 | return 0; |
74af21cf | 503 | } |
1da177e4 | 504 | } |
74af21cf BZ |
505 | *rstat = stat; |
506 | return -EFAULT; | |
507 | } | |
508 | ||
509 | /* | |
510 | * In case of error returns error value after doing "*startstop = ide_error()". | |
511 | * The caller should return the updated value of "startstop" in this case, | |
512 | * "startstop" is unchanged when the function returns 0. | |
513 | */ | |
514 | int ide_wait_stat(ide_startstop_t *startstop, ide_drive_t *drive, u8 good, u8 bad, unsigned long timeout) | |
515 | { | |
516 | int err; | |
517 | u8 stat; | |
518 | ||
519 | /* bail early if we've exceeded max_failures */ | |
520 | if (drive->max_failures && (drive->failures > drive->max_failures)) { | |
521 | *startstop = ide_stopped; | |
522 | return 1; | |
523 | } | |
524 | ||
525 | err = __ide_wait_stat(drive, good, bad, timeout, &stat); | |
526 | ||
527 | if (err) { | |
528 | char *s = (err == -EBUSY) ? "status timeout" : "status error"; | |
529 | *startstop = ide_error(drive, s, stat); | |
530 | } | |
531 | ||
532 | return err; | |
1da177e4 LT |
533 | } |
534 | ||
535 | EXPORT_SYMBOL(ide_wait_stat); | |
536 | ||
a5b7e70d BZ |
537 | /** |
538 | * ide_in_drive_list - look for drive in black/white list | |
539 | * @id: drive identifier | |
540 | * @drive_table: list to inspect | |
541 | * | |
542 | * Look for a drive in the blacklist and the whitelist tables | |
543 | * Returns 1 if the drive is found in the table. | |
544 | */ | |
545 | ||
546 | int ide_in_drive_list(struct hd_driveid *id, const struct drive_list_entry *drive_table) | |
547 | { | |
548 | for ( ; drive_table->id_model; drive_table++) | |
549 | if ((!strcmp(drive_table->id_model, id->model)) && | |
550 | (!drive_table->id_firmware || | |
551 | strstr(id->fw_rev, drive_table->id_firmware))) | |
552 | return 1; | |
553 | return 0; | |
554 | } | |
555 | ||
b0244a00 BZ |
556 | EXPORT_SYMBOL_GPL(ide_in_drive_list); |
557 | ||
a5b7e70d BZ |
558 | /* |
559 | * Early UDMA66 devices don't set bit14 to 1, only bit13 is valid. | |
560 | * We list them here and depend on the device side cable detection for them. | |
8588a2b7 BZ |
561 | * |
562 | * Some optical devices with the buggy firmwares have the same problem. | |
a5b7e70d BZ |
563 | */ |
564 | static const struct drive_list_entry ivb_list[] = { | |
565 | { "QUANTUM FIREBALLlct10 05" , "A03.0900" }, | |
8588a2b7 | 566 | { "TSSTcorp CDDVDW SH-S202J" , "SB00" }, |
e97564f3 PM |
567 | { "TSSTcorp CDDVDW SH-S202J" , "SB01" }, |
568 | { "TSSTcorp CDDVDW SH-S202N" , "SB00" }, | |
569 | { "TSSTcorp CDDVDW SH-S202N" , "SB01" }, | |
a5b7e70d BZ |
570 | { NULL , NULL } |
571 | }; | |
572 | ||
1da177e4 LT |
573 | /* |
574 | * All hosts that use the 80c ribbon must use! | |
575 | * The name is derived from upper byte of word 93 and the 80c ribbon. | |
576 | */ | |
577 | u8 eighty_ninty_three (ide_drive_t *drive) | |
578 | { | |
7f8f48af BZ |
579 | ide_hwif_t *hwif = drive->hwif; |
580 | struct hd_driveid *id = drive->id; | |
a5b7e70d | 581 | int ivb = ide_in_drive_list(id, ivb_list); |
7f8f48af | 582 | |
49521f97 BZ |
583 | if (hwif->cbl == ATA_CBL_PATA40_SHORT) |
584 | return 1; | |
585 | ||
a5b7e70d BZ |
586 | if (ivb) |
587 | printk(KERN_DEBUG "%s: skipping word 93 validity check\n", | |
588 | drive->name); | |
589 | ||
b98f8803 GK |
590 | if (ide_dev_is_sata(id) && !ivb) |
591 | return 1; | |
592 | ||
a5b7e70d | 593 | if (hwif->cbl != ATA_CBL_PATA80 && !ivb) |
7f8f48af | 594 | goto no_80w; |
1a1276e7 | 595 | |
f68d9320 BZ |
596 | /* |
597 | * FIXME: | |
f367bed0 | 598 | * - change master/slave IDENTIFY order |
a5b7e70d | 599 | * - force bit13 (80c cable present) check also for !ivb devices |
f68d9320 BZ |
600 | * (unless the slave device is pre-ATA3) |
601 | */ | |
a5b7e70d | 602 | if ((id->hw_config & 0x4000) || (ivb && (id->hw_config & 0x2000))) |
7f8f48af BZ |
603 | return 1; |
604 | ||
605 | no_80w: | |
606 | if (drive->udma33_warned == 1) | |
607 | return 0; | |
608 | ||
609 | printk(KERN_WARNING "%s: %s side 80-wire cable detection failed, " | |
610 | "limiting max speed to UDMA33\n", | |
49521f97 BZ |
611 | drive->name, |
612 | hwif->cbl == ATA_CBL_PATA80 ? "drive" : "host"); | |
7f8f48af BZ |
613 | |
614 | drive->udma33_warned = 1; | |
615 | ||
616 | return 0; | |
1da177e4 LT |
617 | } |
618 | ||
8a455134 | 619 | int ide_driveid_update(ide_drive_t *drive) |
1da177e4 | 620 | { |
8a455134 | 621 | ide_hwif_t *hwif = drive->hwif; |
1da177e4 | 622 | struct hd_driveid *id; |
8a455134 | 623 | unsigned long timeout, flags; |
c47137a9 | 624 | u8 stat; |
1da177e4 | 625 | |
1da177e4 LT |
626 | /* |
627 | * Re-read drive->id for possible DMA mode | |
628 | * change (copied from ide-probe.c) | |
629 | */ | |
1da177e4 LT |
630 | |
631 | SELECT_MASK(drive, 1); | |
81ca6919 | 632 | ide_set_irq(drive, 1); |
1da177e4 LT |
633 | msleep(50); |
634 | hwif->OUTB(WIN_IDENTIFY, IDE_COMMAND_REG); | |
635 | timeout = jiffies + WAIT_WORSTCASE; | |
636 | do { | |
637 | if (time_after(jiffies, timeout)) { | |
638 | SELECT_MASK(drive, 0); | |
639 | return 0; /* drive timed-out */ | |
640 | } | |
c47137a9 | 641 | |
1da177e4 | 642 | msleep(50); /* give drive a breather */ |
c47137a9 BZ |
643 | stat = ide_read_altstatus(drive); |
644 | } while (stat & BUSY_STAT); | |
645 | ||
1da177e4 | 646 | msleep(50); /* wait for IRQ and DRQ_STAT */ |
c47137a9 BZ |
647 | stat = ide_read_status(drive); |
648 | ||
649 | if (!OK_STAT(stat, DRQ_STAT, BAD_R_STAT)) { | |
1da177e4 LT |
650 | SELECT_MASK(drive, 0); |
651 | printk("%s: CHECK for good STATUS\n", drive->name); | |
652 | return 0; | |
653 | } | |
654 | local_irq_save(flags); | |
655 | SELECT_MASK(drive, 0); | |
656 | id = kmalloc(SECTOR_WORDS*4, GFP_ATOMIC); | |
657 | if (!id) { | |
658 | local_irq_restore(flags); | |
659 | return 0; | |
660 | } | |
661 | ata_input_data(drive, id, SECTOR_WORDS); | |
c47137a9 | 662 | (void)ide_read_status(drive); /* clear drive IRQ */ |
1da177e4 LT |
663 | local_irq_enable(); |
664 | local_irq_restore(flags); | |
665 | ide_fix_driveid(id); | |
666 | if (id) { | |
667 | drive->id->dma_ultra = id->dma_ultra; | |
668 | drive->id->dma_mword = id->dma_mword; | |
669 | drive->id->dma_1word = id->dma_1word; | |
670 | /* anything more ? */ | |
671 | kfree(id); | |
3ab7efe8 BZ |
672 | |
673 | if (drive->using_dma && ide_id_dma_bug(drive)) | |
674 | ide_dma_off(drive); | |
1da177e4 LT |
675 | } |
676 | ||
677 | return 1; | |
1da177e4 LT |
678 | } |
679 | ||
74af21cf | 680 | int ide_config_drive_speed(ide_drive_t *drive, u8 speed) |
1da177e4 | 681 | { |
74af21cf | 682 | ide_hwif_t *hwif = drive->hwif; |
89613e66 | 683 | int error = 0; |
1da177e4 LT |
684 | u8 stat; |
685 | ||
686 | // while (HWGROUP(drive)->busy) | |
687 | // msleep(50); | |
688 | ||
689 | #ifdef CONFIG_BLK_DEV_IDEDMA | |
15ce926a BZ |
690 | if (hwif->dma_host_set) /* check if host supports DMA */ |
691 | hwif->dma_host_set(drive, 0); | |
1da177e4 LT |
692 | #endif |
693 | ||
89613e66 SS |
694 | /* Skip setting PIO flow-control modes on pre-EIDE drives */ |
695 | if ((speed & 0xf8) == XFER_PIO_0 && !(drive->id->capability & 0x08)) | |
696 | goto skip; | |
697 | ||
1da177e4 LT |
698 | /* |
699 | * Don't use ide_wait_cmd here - it will | |
700 | * attempt to set_geometry and recalibrate, | |
701 | * but for some reason these don't work at | |
702 | * this point (lost interrupt). | |
703 | */ | |
704 | /* | |
705 | * Select the drive, and issue the SETFEATURES command | |
706 | */ | |
707 | disable_irq_nosync(hwif->irq); | |
708 | ||
709 | /* | |
710 | * FIXME: we race against the running IRQ here if | |
711 | * this is called from non IRQ context. If we use | |
712 | * disable_irq() we hang on the error path. Work | |
713 | * is needed. | |
714 | */ | |
715 | ||
716 | udelay(1); | |
717 | SELECT_DRIVE(drive); | |
718 | SELECT_MASK(drive, 0); | |
719 | udelay(1); | |
81ca6919 | 720 | ide_set_irq(drive, 0); |
1da177e4 LT |
721 | hwif->OUTB(speed, IDE_NSECTOR_REG); |
722 | hwif->OUTB(SETFEATURES_XFER, IDE_FEATURE_REG); | |
adcd33d4 | 723 | hwif->OUTBSYNC(drive, WIN_SETFEATURES, IDE_COMMAND_REG); |
81ca6919 BZ |
724 | if (drive->quirk_list == 2) |
725 | ide_set_irq(drive, 1); | |
1da177e4 | 726 | |
74af21cf BZ |
727 | error = __ide_wait_stat(drive, drive->ready_stat, |
728 | BUSY_STAT|DRQ_STAT|ERR_STAT, | |
729 | WAIT_CMD, &stat); | |
1da177e4 LT |
730 | |
731 | SELECT_MASK(drive, 0); | |
732 | ||
733 | enable_irq(hwif->irq); | |
734 | ||
735 | if (error) { | |
736 | (void) ide_dump_status(drive, "set_drive_speed_status", stat); | |
737 | return error; | |
738 | } | |
739 | ||
740 | drive->id->dma_ultra &= ~0xFF00; | |
741 | drive->id->dma_mword &= ~0x0F00; | |
742 | drive->id->dma_1word &= ~0x0F00; | |
743 | ||
89613e66 | 744 | skip: |
1da177e4 | 745 | #ifdef CONFIG_BLK_DEV_IDEDMA |
f37aaf9e BZ |
746 | if ((speed >= XFER_SW_DMA_0 || (hwif->host_flags & IDE_HFLAG_VDMA)) && |
747 | drive->using_dma) | |
15ce926a BZ |
748 | hwif->dma_host_set(drive, 1); |
749 | else if (hwif->dma_host_set) /* check if host supports DMA */ | |
4a546e04 | 750 | ide_dma_off_quietly(drive); |
1da177e4 LT |
751 | #endif |
752 | ||
753 | switch(speed) { | |
754 | case XFER_UDMA_7: drive->id->dma_ultra |= 0x8080; break; | |
755 | case XFER_UDMA_6: drive->id->dma_ultra |= 0x4040; break; | |
756 | case XFER_UDMA_5: drive->id->dma_ultra |= 0x2020; break; | |
757 | case XFER_UDMA_4: drive->id->dma_ultra |= 0x1010; break; | |
758 | case XFER_UDMA_3: drive->id->dma_ultra |= 0x0808; break; | |
759 | case XFER_UDMA_2: drive->id->dma_ultra |= 0x0404; break; | |
760 | case XFER_UDMA_1: drive->id->dma_ultra |= 0x0202; break; | |
761 | case XFER_UDMA_0: drive->id->dma_ultra |= 0x0101; break; | |
762 | case XFER_MW_DMA_2: drive->id->dma_mword |= 0x0404; break; | |
763 | case XFER_MW_DMA_1: drive->id->dma_mword |= 0x0202; break; | |
764 | case XFER_MW_DMA_0: drive->id->dma_mword |= 0x0101; break; | |
765 | case XFER_SW_DMA_2: drive->id->dma_1word |= 0x0404; break; | |
766 | case XFER_SW_DMA_1: drive->id->dma_1word |= 0x0202; break; | |
767 | case XFER_SW_DMA_0: drive->id->dma_1word |= 0x0101; break; | |
768 | default: break; | |
769 | } | |
770 | if (!drive->init_speed) | |
771 | drive->init_speed = speed; | |
772 | drive->current_speed = speed; | |
773 | return error; | |
774 | } | |
775 | ||
1da177e4 LT |
776 | /* |
777 | * This should get invoked any time we exit the driver to | |
778 | * wait for an interrupt response from a drive. handler() points | |
779 | * at the appropriate code to handle the next interrupt, and a | |
780 | * timer is started to prevent us from waiting forever in case | |
781 | * something goes wrong (see the ide_timer_expiry() handler later on). | |
782 | * | |
783 | * See also ide_execute_command | |
784 | */ | |
785 | static void __ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, | |
786 | unsigned int timeout, ide_expiry_t *expiry) | |
787 | { | |
788 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
789 | ||
d30a426d | 790 | BUG_ON(hwgroup->handler); |
1da177e4 LT |
791 | hwgroup->handler = handler; |
792 | hwgroup->expiry = expiry; | |
793 | hwgroup->timer.expires = jiffies + timeout; | |
d30a426d | 794 | hwgroup->req_gen_timer = hwgroup->req_gen; |
1da177e4 LT |
795 | add_timer(&hwgroup->timer); |
796 | } | |
797 | ||
798 | void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, | |
799 | unsigned int timeout, ide_expiry_t *expiry) | |
800 | { | |
801 | unsigned long flags; | |
802 | spin_lock_irqsave(&ide_lock, flags); | |
803 | __ide_set_handler(drive, handler, timeout, expiry); | |
804 | spin_unlock_irqrestore(&ide_lock, flags); | |
805 | } | |
806 | ||
807 | EXPORT_SYMBOL(ide_set_handler); | |
808 | ||
809 | /** | |
810 | * ide_execute_command - execute an IDE command | |
811 | * @drive: IDE drive to issue the command against | |
812 | * @command: command byte to write | |
813 | * @handler: handler for next phase | |
814 | * @timeout: timeout for command | |
815 | * @expiry: handler to run on timeout | |
816 | * | |
817 | * Helper function to issue an IDE command. This handles the | |
818 | * atomicity requirements, command timing and ensures that the | |
819 | * handler and IRQ setup do not race. All IDE command kick off | |
820 | * should go via this function or do equivalent locking. | |
821 | */ | |
cd2a2d96 BZ |
822 | |
823 | void ide_execute_command(ide_drive_t *drive, u8 cmd, ide_handler_t *handler, | |
824 | unsigned timeout, ide_expiry_t *expiry) | |
1da177e4 LT |
825 | { |
826 | unsigned long flags; | |
1da177e4 | 827 | ide_hwif_t *hwif = HWIF(drive); |
629f944b | 828 | |
1da177e4 | 829 | spin_lock_irqsave(&ide_lock, flags); |
629f944b | 830 | __ide_set_handler(drive, handler, timeout, expiry); |
1da177e4 | 831 | hwif->OUTBSYNC(drive, cmd, IDE_COMMAND_REG); |
629f944b BZ |
832 | /* |
833 | * Drive takes 400nS to respond, we must avoid the IRQ being | |
834 | * serviced before that. | |
835 | * | |
836 | * FIXME: we could skip this delay with care on non shared devices | |
837 | */ | |
1da177e4 LT |
838 | ndelay(400); |
839 | spin_unlock_irqrestore(&ide_lock, flags); | |
840 | } | |
841 | ||
842 | EXPORT_SYMBOL(ide_execute_command); | |
843 | ||
844 | ||
845 | /* needed below */ | |
846 | static ide_startstop_t do_reset1 (ide_drive_t *, int); | |
847 | ||
848 | /* | |
849 | * atapi_reset_pollfunc() gets invoked to poll the interface for completion every 50ms | |
850 | * during an atapi drive reset operation. If the drive has not yet responded, | |
851 | * and we have not yet hit our maximum waiting time, then the timer is restarted | |
852 | * for another 50ms. | |
853 | */ | |
854 | static ide_startstop_t atapi_reset_pollfunc (ide_drive_t *drive) | |
855 | { | |
856 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
1da177e4 LT |
857 | u8 stat; |
858 | ||
859 | SELECT_DRIVE(drive); | |
860 | udelay (10); | |
c47137a9 | 861 | stat = ide_read_status(drive); |
1da177e4 | 862 | |
c47137a9 | 863 | if (OK_STAT(stat, 0, BUSY_STAT)) |
1da177e4 | 864 | printk("%s: ATAPI reset complete\n", drive->name); |
c47137a9 | 865 | else { |
1da177e4 | 866 | if (time_before(jiffies, hwgroup->poll_timeout)) { |
1da177e4 LT |
867 | ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); |
868 | /* continue polling */ | |
869 | return ide_started; | |
870 | } | |
871 | /* end of polling */ | |
872 | hwgroup->polling = 0; | |
873 | printk("%s: ATAPI reset timed-out, status=0x%02x\n", | |
874 | drive->name, stat); | |
875 | /* do it the old fashioned way */ | |
876 | return do_reset1(drive, 1); | |
877 | } | |
878 | /* done polling */ | |
879 | hwgroup->polling = 0; | |
913759ac | 880 | hwgroup->resetting = 0; |
1da177e4 LT |
881 | return ide_stopped; |
882 | } | |
883 | ||
884 | /* | |
885 | * reset_pollfunc() gets invoked to poll the interface for completion every 50ms | |
886 | * during an ide reset operation. If the drives have not yet responded, | |
887 | * and we have not yet hit our maximum waiting time, then the timer is restarted | |
888 | * for another 50ms. | |
889 | */ | |
890 | static ide_startstop_t reset_pollfunc (ide_drive_t *drive) | |
891 | { | |
892 | ide_hwgroup_t *hwgroup = HWGROUP(drive); | |
893 | ide_hwif_t *hwif = HWIF(drive); | |
894 | u8 tmp; | |
895 | ||
896 | if (hwif->reset_poll != NULL) { | |
897 | if (hwif->reset_poll(drive)) { | |
898 | printk(KERN_ERR "%s: host reset_poll failure for %s.\n", | |
899 | hwif->name, drive->name); | |
900 | return ide_stopped; | |
901 | } | |
902 | } | |
903 | ||
c47137a9 BZ |
904 | tmp = ide_read_status(drive); |
905 | ||
906 | if (!OK_STAT(tmp, 0, BUSY_STAT)) { | |
1da177e4 | 907 | if (time_before(jiffies, hwgroup->poll_timeout)) { |
1da177e4 LT |
908 | ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); |
909 | /* continue polling */ | |
910 | return ide_started; | |
911 | } | |
912 | printk("%s: reset timed-out, status=0x%02x\n", hwif->name, tmp); | |
913 | drive->failures++; | |
914 | } else { | |
915 | printk("%s: reset: ", hwif->name); | |
64a57fe4 BZ |
916 | tmp = ide_read_error(drive); |
917 | ||
918 | if (tmp == 1) { | |
1da177e4 LT |
919 | printk("success\n"); |
920 | drive->failures = 0; | |
921 | } else { | |
922 | drive->failures++; | |
923 | printk("master: "); | |
924 | switch (tmp & 0x7f) { | |
925 | case 1: printk("passed"); | |
926 | break; | |
927 | case 2: printk("formatter device error"); | |
928 | break; | |
929 | case 3: printk("sector buffer error"); | |
930 | break; | |
931 | case 4: printk("ECC circuitry error"); | |
932 | break; | |
933 | case 5: printk("controlling MPU error"); | |
934 | break; | |
935 | default:printk("error (0x%02x?)", tmp); | |
936 | } | |
937 | if (tmp & 0x80) | |
938 | printk("; slave: failed"); | |
939 | printk("\n"); | |
940 | } | |
941 | } | |
942 | hwgroup->polling = 0; /* done polling */ | |
913759ac | 943 | hwgroup->resetting = 0; /* done reset attempt */ |
1da177e4 LT |
944 | return ide_stopped; |
945 | } | |
946 | ||
1da177e4 LT |
947 | static void ide_disk_pre_reset(ide_drive_t *drive) |
948 | { | |
949 | int legacy = (drive->id->cfs_enable_2 & 0x0400) ? 0 : 1; | |
950 | ||
951 | drive->special.all = 0; | |
952 | drive->special.b.set_geometry = legacy; | |
953 | drive->special.b.recalibrate = legacy; | |
4ee06b7e | 954 | drive->mult_count = 0; |
1da177e4 LT |
955 | if (!drive->keep_settings && !drive->using_dma) |
956 | drive->mult_req = 0; | |
957 | if (drive->mult_req != drive->mult_count) | |
958 | drive->special.b.set_multmode = 1; | |
959 | } | |
960 | ||
961 | static void pre_reset(ide_drive_t *drive) | |
962 | { | |
963 | if (drive->media == ide_disk) | |
964 | ide_disk_pre_reset(drive); | |
965 | else | |
966 | drive->post_reset = 1; | |
967 | ||
99ffbe0e BZ |
968 | if (drive->using_dma) { |
969 | if (drive->crc_count) | |
578cfa0d | 970 | ide_check_dma_crc(drive); |
99ffbe0e BZ |
971 | else |
972 | ide_dma_off(drive); | |
973 | } | |
974 | ||
975 | if (!drive->keep_settings) { | |
976 | if (!drive->using_dma) { | |
1da177e4 LT |
977 | drive->unmask = 0; |
978 | drive->io_32bit = 0; | |
979 | } | |
980 | return; | |
981 | } | |
1da177e4 LT |
982 | |
983 | if (HWIF(drive)->pre_reset != NULL) | |
984 | HWIF(drive)->pre_reset(drive); | |
985 | ||
513daadd SS |
986 | if (drive->current_speed != 0xff) |
987 | drive->desired_speed = drive->current_speed; | |
988 | drive->current_speed = 0xff; | |
1da177e4 LT |
989 | } |
990 | ||
991 | /* | |
992 | * do_reset1() attempts to recover a confused drive by resetting it. | |
993 | * Unfortunately, resetting a disk drive actually resets all devices on | |
994 | * the same interface, so it can really be thought of as resetting the | |
995 | * interface rather than resetting the drive. | |
996 | * | |
997 | * ATAPI devices have their own reset mechanism which allows them to be | |
998 | * individually reset without clobbering other devices on the same interface. | |
999 | * | |
1000 | * Unfortunately, the IDE interface does not generate an interrupt to let | |
1001 | * us know when the reset operation has finished, so we must poll for this. | |
1002 | * Equally poor, though, is the fact that this may a very long time to complete, | |
1003 | * (up to 30 seconds worstcase). So, instead of busy-waiting here for it, | |
1004 | * we set a timer to poll at 50ms intervals. | |
1005 | */ | |
1006 | static ide_startstop_t do_reset1 (ide_drive_t *drive, int do_not_try_atapi) | |
1007 | { | |
1008 | unsigned int unit; | |
1009 | unsigned long flags; | |
1010 | ide_hwif_t *hwif; | |
1011 | ide_hwgroup_t *hwgroup; | |
1012 | ||
1013 | spin_lock_irqsave(&ide_lock, flags); | |
1014 | hwif = HWIF(drive); | |
1015 | hwgroup = HWGROUP(drive); | |
1016 | ||
1017 | /* We must not reset with running handlers */ | |
125e1874 | 1018 | BUG_ON(hwgroup->handler != NULL); |
1da177e4 LT |
1019 | |
1020 | /* For an ATAPI device, first try an ATAPI SRST. */ | |
1021 | if (drive->media != ide_disk && !do_not_try_atapi) { | |
913759ac | 1022 | hwgroup->resetting = 1; |
1da177e4 LT |
1023 | pre_reset(drive); |
1024 | SELECT_DRIVE(drive); | |
1025 | udelay (20); | |
68ad9910 AC |
1026 | hwif->OUTBSYNC(drive, WIN_SRST, IDE_COMMAND_REG); |
1027 | ndelay(400); | |
1da177e4 LT |
1028 | hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; |
1029 | hwgroup->polling = 1; | |
1030 | __ide_set_handler(drive, &atapi_reset_pollfunc, HZ/20, NULL); | |
1031 | spin_unlock_irqrestore(&ide_lock, flags); | |
1032 | return ide_started; | |
1033 | } | |
1034 | ||
1035 | /* | |
1036 | * First, reset any device state data we were maintaining | |
1037 | * for any of the drives on this interface. | |
1038 | */ | |
1039 | for (unit = 0; unit < MAX_DRIVES; ++unit) | |
1040 | pre_reset(&hwif->drives[unit]); | |
1041 | ||
1da177e4 LT |
1042 | if (!IDE_CONTROL_REG) { |
1043 | spin_unlock_irqrestore(&ide_lock, flags); | |
1044 | return ide_stopped; | |
1045 | } | |
1046 | ||
913759ac | 1047 | hwgroup->resetting = 1; |
1da177e4 LT |
1048 | /* |
1049 | * Note that we also set nIEN while resetting the device, | |
1050 | * to mask unwanted interrupts from the interface during the reset. | |
1051 | * However, due to the design of PC hardware, this will cause an | |
1052 | * immediate interrupt due to the edge transition it produces. | |
1053 | * This single interrupt gives us a "fast poll" for drives that | |
1054 | * recover from reset very quickly, saving us the first 50ms wait time. | |
1055 | */ | |
1056 | /* set SRST and nIEN */ | |
1057 | hwif->OUTBSYNC(drive, drive->ctl|6,IDE_CONTROL_REG); | |
1058 | /* more than enough time */ | |
1059 | udelay(10); | |
1060 | if (drive->quirk_list == 2) { | |
1061 | /* clear SRST and nIEN */ | |
1062 | hwif->OUTBSYNC(drive, drive->ctl, IDE_CONTROL_REG); | |
1063 | } else { | |
1064 | /* clear SRST, leave nIEN */ | |
1065 | hwif->OUTBSYNC(drive, drive->ctl|2, IDE_CONTROL_REG); | |
1066 | } | |
1067 | /* more than enough time */ | |
1068 | udelay(10); | |
1069 | hwgroup->poll_timeout = jiffies + WAIT_WORSTCASE; | |
1070 | hwgroup->polling = 1; | |
1071 | __ide_set_handler(drive, &reset_pollfunc, HZ/20, NULL); | |
1072 | ||
1073 | /* | |
1074 | * Some weird controller like resetting themselves to a strange | |
1075 | * state when the disks are reset this way. At least, the Winbond | |
1076 | * 553 documentation says that | |
1077 | */ | |
4ee06b7e | 1078 | if (hwif->resetproc) |
1da177e4 | 1079 | hwif->resetproc(drive); |
1da177e4 LT |
1080 | |
1081 | spin_unlock_irqrestore(&ide_lock, flags); | |
1082 | return ide_started; | |
1083 | } | |
1084 | ||
1085 | /* | |
1086 | * ide_do_reset() is the entry point to the drive/interface reset code. | |
1087 | */ | |
1088 | ||
1089 | ide_startstop_t ide_do_reset (ide_drive_t *drive) | |
1090 | { | |
1091 | return do_reset1(drive, 0); | |
1092 | } | |
1093 | ||
1094 | EXPORT_SYMBOL(ide_do_reset); | |
1095 | ||
1096 | /* | |
1097 | * ide_wait_not_busy() waits for the currently selected device on the hwif | |
9d501529 | 1098 | * to report a non-busy status, see comments in ide_probe_port(). |
1da177e4 LT |
1099 | */ |
1100 | int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout) | |
1101 | { | |
1102 | u8 stat = 0; | |
1103 | ||
1104 | while(timeout--) { | |
1105 | /* | |
1106 | * Turn this into a schedule() sleep once I'm sure | |
1107 | * about locking issues (2.5 work ?). | |
1108 | */ | |
1109 | mdelay(1); | |
1110 | stat = hwif->INB(hwif->io_ports[IDE_STATUS_OFFSET]); | |
1111 | if ((stat & BUSY_STAT) == 0) | |
1112 | return 0; | |
1113 | /* | |
1114 | * Assume a value of 0xff means nothing is connected to | |
1115 | * the interface and it doesn't implement the pull-down | |
1116 | * resistor on D7. | |
1117 | */ | |
1118 | if (stat == 0xff) | |
1119 | return -ENODEV; | |
6842f8c8 | 1120 | touch_softlockup_watchdog(); |
1e86240f | 1121 | touch_nmi_watchdog(); |
1da177e4 LT |
1122 | } |
1123 | return -EBUSY; | |
1124 | } | |
1125 | ||
1126 | EXPORT_SYMBOL_GPL(ide_wait_not_busy); | |
1127 |