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1da177e4 LT |
1 | /* |
2 | * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001 | |
3 | * | |
4 | * Copyright (C) 1996-2001 Linus Torvalds & author (see below) | |
5 | */ | |
6 | ||
7 | /* | |
8 | * Version 0.03 Cleaned auto-tune, added probe | |
9 | * Version 0.04 Added second channel tuning | |
10 | * Version 0.05 Enhanced tuning ; added qd6500 support | |
11 | * Version 0.06 Added dos driver's list | |
12 | * Version 0.07 Second channel bug fix | |
13 | * | |
14 | * QDI QD6500/QD6580 EIDE controller fast support | |
15 | * | |
16 | * Please set local bus speed using kernel parameter idebus | |
17 | * for example, "idebus=33" stands for 33Mhz VLbus | |
18 | * To activate controller support, use "ide0=qd65xx" | |
b6209a90 BZ |
19 | * To enable tuning, use "hda=autotune hdb=autotune" |
20 | * To enable 2nd channel tuning (qd6580 only), use "hdc=autotune hdd=autotune" | |
1da177e4 LT |
21 | */ |
22 | ||
23 | /* | |
24 | * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by | |
25 | * Samuel Thibault <samuel.thibault@fnac.net> | |
26 | */ | |
27 | ||
1da177e4 | 28 | #include <linux/module.h> |
1da177e4 LT |
29 | #include <linux/types.h> |
30 | #include <linux/kernel.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/timer.h> | |
33 | #include <linux/mm.h> | |
34 | #include <linux/ioport.h> | |
35 | #include <linux/blkdev.h> | |
36 | #include <linux/hdreg.h> | |
37 | #include <linux/ide.h> | |
38 | #include <linux/init.h> | |
39 | #include <asm/system.h> | |
40 | #include <asm/io.h> | |
41 | ||
42 | #include "qd65xx.h" | |
43 | ||
44 | /* | |
45 | * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580) | |
46 | * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580) | |
47 | * -- qd6500 is a single IDE interface | |
48 | * -- qd6580 is a dual IDE interface | |
49 | * | |
50 | * More research on qd6580 being done by willmore@cig.mot.com (David) | |
51 | * More Information given by Petr Soucek (petr@ryston.cz) | |
52 | * http://www.ryston.cz/petr/vlb | |
53 | */ | |
54 | ||
55 | /* | |
56 | * base: Timer1 | |
57 | * | |
58 | * | |
59 | * base+0x01: Config (R/O) | |
60 | * | |
61 | * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500) | |
62 | * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30 | |
63 | * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz | |
64 | * bit 3: qd6500: 1 = disabled, 0 = enabled | |
65 | * qd6580: 1 | |
66 | * upper nibble: | |
67 | * qd6500: 1100 | |
68 | * qd6580: either 1010 or 0101 | |
69 | * | |
70 | * | |
71 | * base+0x02: Timer2 (qd6580 only) | |
72 | * | |
73 | * | |
74 | * base+0x03: Control (qd6580 only) | |
75 | * | |
76 | * bits 0-3 must always be set 1 | |
77 | * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock | |
78 | * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb | |
79 | * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb | |
80 | * channel 1 for hdc & hdd | |
81 | * bit 1 : 1 = only disks on primary port | |
82 | * 0 = disks & ATAPI devices on primary port | |
83 | * bit 2-4 : always 0 | |
84 | * bit 5 : status, but of what ? | |
85 | * bit 6 : always set 1 by dos driver | |
86 | * bit 7 : set 1 for non-ATAPI devices on primary port | |
87 | * (maybe read-ahead and post-write buffer ?) | |
88 | */ | |
89 | ||
90 | static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */ | |
91 | ||
92 | static void qd_write_reg (u8 content, unsigned long reg) | |
93 | { | |
94 | unsigned long flags; | |
95 | ||
96 | spin_lock_irqsave(&ide_lock, flags); | |
97 | outb(content,reg); | |
98 | spin_unlock_irqrestore(&ide_lock, flags); | |
99 | } | |
100 | ||
101 | static u8 __init qd_read_reg (unsigned long reg) | |
102 | { | |
103 | unsigned long flags; | |
104 | u8 read; | |
105 | ||
106 | spin_lock_irqsave(&ide_lock, flags); | |
107 | read = inb(reg); | |
108 | spin_unlock_irqrestore(&ide_lock, flags); | |
109 | return read; | |
110 | } | |
111 | ||
112 | /* | |
113 | * qd_select: | |
114 | * | |
115 | * This routine is invoked from ide.c to prepare for access to a given drive. | |
116 | */ | |
117 | ||
118 | static void qd_select (ide_drive_t *drive) | |
119 | { | |
120 | u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) | | |
121 | (QD_TIMREG(drive) & 0x02); | |
122 | ||
123 | if (timings[index] != QD_TIMING(drive)) | |
124 | qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive)); | |
125 | } | |
126 | ||
127 | /* | |
128 | * qd6500_compute_timing | |
129 | * | |
130 | * computes the timing value where | |
131 | * lower nibble represents active time, in count of VLB clocks | |
132 | * upper nibble represents recovery time, in count of VLB clocks | |
133 | */ | |
134 | ||
135 | static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time) | |
136 | { | |
137 | u8 active_cycle,recovery_cycle; | |
138 | ||
139 | if (system_bus_clock()<=33) { | |
140 | active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9); | |
141 | recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15); | |
142 | } else { | |
143 | active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8); | |
144 | recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18); | |
145 | } | |
146 | ||
147 | return((recovery_cycle<<4) | 0x08 | active_cycle); | |
148 | } | |
149 | ||
150 | /* | |
151 | * qd6580_compute_timing | |
152 | * | |
153 | * idem for qd6580 | |
154 | */ | |
155 | ||
156 | static u8 qd6580_compute_timing (int active_time, int recovery_time) | |
157 | { | |
158 | u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17); | |
159 | u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15); | |
160 | ||
161 | return((recovery_cycle<<4) | active_cycle); | |
162 | } | |
163 | ||
164 | /* | |
165 | * qd_find_disk_type | |
166 | * | |
167 | * tries to find timing from dos driver's table | |
168 | */ | |
169 | ||
170 | static int qd_find_disk_type (ide_drive_t *drive, | |
171 | int *active_time, int *recovery_time) | |
172 | { | |
173 | struct qd65xx_timing_s *p; | |
174 | char model[40]; | |
175 | ||
176 | if (!*drive->id->model) return 0; | |
177 | ||
178 | strncpy(model,drive->id->model,40); | |
179 | ide_fixstring(model,40,1); /* byte-swap */ | |
180 | ||
181 | for (p = qd65xx_timing ; p->offset != -1 ; p++) { | |
182 | if (!strncmp(p->model, model+p->offset, 4)) { | |
183 | printk(KERN_DEBUG "%s: listed !\n", drive->name); | |
184 | *active_time = p->active; | |
185 | *recovery_time = p->recovery; | |
186 | return 1; | |
187 | } | |
188 | } | |
189 | return 0; | |
190 | } | |
191 | ||
192 | /* | |
193 | * qd_timing_ok: | |
194 | * | |
195 | * check whether timings don't conflict | |
196 | */ | |
197 | ||
198 | static int qd_timing_ok (ide_drive_t drives[]) | |
199 | { | |
200 | return (IDE_IMPLY(drives[0].present && drives[1].present, | |
201 | IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1), | |
202 | QD_TIMING(drives) == QD_TIMING(drives+1)))); | |
203 | /* if same timing register, must be same timing */ | |
204 | } | |
205 | ||
206 | /* | |
207 | * qd_set_timing: | |
208 | * | |
209 | * records the timing, and enables selectproc as needed | |
210 | */ | |
211 | ||
212 | static void qd_set_timing (ide_drive_t *drive, u8 timing) | |
213 | { | |
214 | ide_hwif_t *hwif = HWIF(drive); | |
215 | ||
216 | drive->drive_data &= 0xff00; | |
217 | drive->drive_data |= timing; | |
218 | if (qd_timing_ok(hwif->drives)) { | |
219 | qd_select(drive); /* selects once */ | |
220 | hwif->selectproc = NULL; | |
221 | } else | |
222 | hwif->selectproc = &qd_select; | |
223 | ||
224 | printk(KERN_DEBUG "%s: %#x\n", drive->name, timing); | |
225 | } | |
226 | ||
26bcb879 | 227 | static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 LT |
228 | { |
229 | int active_time = 175; | |
230 | int recovery_time = 415; /* worst case values from the dos driver */ | |
231 | ||
26bcb879 BZ |
232 | /* |
233 | * FIXME: use "pio" value | |
234 | */ | |
1da177e4 LT |
235 | if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time) |
236 | && drive->id->tPIO && (drive->id->field_valid & 0x02) | |
237 | && drive->id->eide_pio >= 240) { | |
238 | ||
239 | printk(KERN_INFO "%s: PIO mode%d\n", drive->name, | |
240 | drive->id->tPIO); | |
241 | active_time = 110; | |
242 | recovery_time = drive->id->eide_pio - 120; | |
243 | } | |
244 | ||
245 | qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time)); | |
246 | } | |
247 | ||
26bcb879 | 248 | static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 | 249 | { |
1da177e4 | 250 | int base = HWIF(drive)->select_data; |
7dd00083 | 251 | unsigned int cycle_time; |
1da177e4 LT |
252 | int active_time = 175; |
253 | int recovery_time = 415; /* worst case values from the dos driver */ | |
254 | ||
255 | if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) { | |
7dd00083 | 256 | cycle_time = ide_pio_cycle_time(drive, pio); |
1da177e4 LT |
257 | |
258 | switch (pio) { | |
259 | case 0: break; | |
260 | case 3: | |
7dd00083 | 261 | if (cycle_time >= 110) { |
1da177e4 | 262 | active_time = 86; |
7dd00083 | 263 | recovery_time = cycle_time - 102; |
1da177e4 LT |
264 | } else |
265 | printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name); | |
266 | break; | |
267 | case 4: | |
7dd00083 | 268 | if (cycle_time >= 69) { |
1da177e4 | 269 | active_time = 70; |
7dd00083 | 270 | recovery_time = cycle_time - 61; |
1da177e4 LT |
271 | } else |
272 | printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name); | |
273 | break; | |
274 | default: | |
7dd00083 | 275 | if (cycle_time >= 180) { |
1da177e4 | 276 | active_time = 110; |
7dd00083 | 277 | recovery_time = cycle_time - 120; |
1da177e4 LT |
278 | } else { |
279 | active_time = ide_pio_timings[pio].active_time; | |
7dd00083 | 280 | recovery_time = cycle_time - active_time; |
1da177e4 LT |
281 | } |
282 | } | |
283 | printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio); | |
284 | } | |
285 | ||
286 | if (!HWIF(drive)->channel && drive->media != ide_disk) { | |
287 | qd_write_reg(0x5f, QD_CONTROL_PORT); | |
288 | printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO " | |
289 | "and post-write buffer on %s.\n", | |
290 | drive->name, HWIF(drive)->name); | |
291 | } | |
292 | ||
293 | qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time)); | |
294 | } | |
295 | ||
296 | /* | |
297 | * qd_testreg | |
298 | * | |
299 | * tests if the given port is a register | |
300 | */ | |
301 | ||
302 | static int __init qd_testreg(int port) | |
303 | { | |
304 | u8 savereg; | |
305 | u8 readreg; | |
306 | unsigned long flags; | |
307 | ||
308 | spin_lock_irqsave(&ide_lock, flags); | |
309 | savereg = inb_p(port); | |
310 | outb_p(QD_TESTVAL, port); /* safe value */ | |
311 | readreg = inb_p(port); | |
312 | outb(savereg, port); | |
313 | spin_unlock_irqrestore(&ide_lock, flags); | |
314 | ||
315 | if (savereg == QD_TESTVAL) { | |
316 | printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n"); | |
317 | printk(KERN_ERR "Please contact maintainers to tell about your hardware\n"); | |
318 | printk(KERN_ERR "Assuming qd65xx is not present.\n"); | |
319 | return 1; | |
320 | } | |
321 | ||
322 | return (readreg != QD_TESTVAL); | |
323 | } | |
324 | ||
325 | /* | |
326 | * qd_setup: | |
327 | * | |
328 | * called to setup an ata channel : adjusts attributes & links for tuning | |
329 | */ | |
330 | ||
331 | static void __init qd_setup(ide_hwif_t *hwif, int base, int config, | |
26bcb879 | 332 | unsigned int data0, unsigned int data1) |
1da177e4 LT |
333 | { |
334 | hwif->chipset = ide_qd65xx; | |
335 | hwif->channel = hwif->index; | |
336 | hwif->select_data = base; | |
337 | hwif->config_data = config; | |
338 | hwif->drives[0].drive_data = data0; | |
339 | hwif->drives[1].drive_data = data1; | |
340 | hwif->drives[0].io_32bit = | |
341 | hwif->drives[1].io_32bit = 1; | |
4099d143 | 342 | hwif->pio_mask = ATA_PIO4; |
1da177e4 LT |
343 | } |
344 | ||
345 | /* | |
346 | * qd_unsetup: | |
347 | * | |
348 | * called to unsetup an ata channel : back to default values, unlinks tuning | |
349 | */ | |
350 | /* | |
351 | static void __exit qd_unsetup(ide_hwif_t *hwif) | |
352 | { | |
353 | u8 config = hwif->config_data; | |
354 | int base = hwif->select_data; | |
26bcb879 | 355 | void *set_pio_mode = (void *)hwif->set_pio_mode; |
1da177e4 LT |
356 | |
357 | if (hwif->chipset != ide_qd65xx) | |
358 | return; | |
359 | ||
360 | printk(KERN_NOTICE "%s: back to defaults\n", hwif->name); | |
361 | ||
362 | hwif->selectproc = NULL; | |
26bcb879 | 363 | hwif->set_pio_mode = NULL; |
1da177e4 | 364 | |
26bcb879 | 365 | if (set_pio_mode == (void *)qd6500_set_pio_mode) { |
1da177e4 LT |
366 | // will do it for both |
367 | qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0])); | |
26bcb879 | 368 | } else if (set_pio_mode == (void *)qd6580_set_pio_mode) { |
1da177e4 LT |
369 | if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) { |
370 | qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); | |
371 | qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1])); | |
372 | } else { | |
373 | qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0])); | |
374 | } | |
375 | } else { | |
376 | printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n"); | |
377 | printk(KERN_WARNING "keeping settings !\n"); | |
378 | } | |
379 | } | |
380 | */ | |
381 | ||
382 | /* | |
383 | * qd_probe: | |
384 | * | |
385 | * looks at the specified baseport, and if qd found, registers & initialises it | |
386 | * return 1 if another qd may be probed | |
387 | */ | |
388 | ||
389 | static int __init qd_probe(int base) | |
390 | { | |
391 | ide_hwif_t *hwif; | |
8447d9d5 | 392 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; |
1da177e4 LT |
393 | u8 config; |
394 | u8 unit; | |
395 | ||
396 | config = qd_read_reg(QD_CONFIG_PORT); | |
397 | ||
398 | if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) ) | |
399 | return 1; | |
400 | ||
401 | unit = ! (config & QD_CONFIG_IDE_BASEPORT); | |
402 | ||
403 | if ((config & 0xf0) == QD_CONFIG_QD6500) { | |
404 | ||
405 | if (qd_testreg(base)) return 1; /* bad register */ | |
406 | ||
407 | /* qd6500 found */ | |
408 | ||
409 | hwif = &ide_hwifs[unit]; | |
410 | printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base); | |
411 | printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n", | |
412 | config, QD_ID3); | |
413 | ||
414 | if (config & QD_CONFIG_DISABLED) { | |
415 | printk(KERN_WARNING "qd6500 is disabled !\n"); | |
416 | return 1; | |
417 | } | |
418 | ||
26bcb879 BZ |
419 | qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA); |
420 | ||
421 | hwif->set_pio_mode = &qd6500_set_pio_mode; | |
422 | ||
8447d9d5 | 423 | idx[0] = unit; |
1da177e4 | 424 | |
8447d9d5 | 425 | ide_device_add(idx); |
1da177e4 LT |
426 | |
427 | return 1; | |
428 | } | |
429 | ||
430 | if (((config & 0xf0) == QD_CONFIG_QD6580_A) || | |
431 | ((config & 0xf0) == QD_CONFIG_QD6580_B)) { | |
432 | ||
433 | u8 control; | |
434 | ||
435 | if (qd_testreg(base) || qd_testreg(base+0x02)) return 1; | |
436 | /* bad registers */ | |
437 | ||
438 | /* qd6580 found */ | |
439 | ||
440 | control = qd_read_reg(QD_CONTROL_PORT); | |
441 | ||
442 | printk(KERN_NOTICE "qd6580 at %#x\n", base); | |
443 | printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n", | |
444 | config, control, QD_ID3); | |
445 | ||
446 | if (control & QD_CONTR_SEC_DISABLED) { | |
447 | /* secondary disabled */ | |
448 | ||
449 | hwif = &ide_hwifs[unit]; | |
450 | printk(KERN_INFO "%s: qd6580: single IDE board\n", | |
451 | hwif->name); | |
452 | qd_setup(hwif, base, config | (control << 8), | |
26bcb879 BZ |
453 | QD6580_DEF_DATA, QD6580_DEF_DATA2); |
454 | ||
455 | hwif->set_pio_mode = &qd6580_set_pio_mode; | |
456 | ||
8447d9d5 | 457 | idx[0] = unit; |
26bcb879 | 458 | |
8447d9d5 | 459 | ide_device_add(idx); |
1da177e4 | 460 | |
8447d9d5 | 461 | qd_write_reg(QD_DEF_CONTR, QD_CONTROL_PORT); |
1da177e4 LT |
462 | |
463 | return 1; | |
464 | } else { | |
465 | ide_hwif_t *mate; | |
466 | ||
467 | hwif = &ide_hwifs[0]; | |
468 | mate = &ide_hwifs[1]; | |
469 | /* secondary enabled */ | |
470 | printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n", | |
471 | hwif->name, mate->name); | |
472 | ||
473 | qd_setup(hwif, base, config | (control << 8), | |
26bcb879 BZ |
474 | QD6580_DEF_DATA, QD6580_DEF_DATA); |
475 | ||
476 | hwif->set_pio_mode = &qd6580_set_pio_mode; | |
477 | ||
1da177e4 | 478 | qd_setup(mate, base, config | (control << 8), |
26bcb879 BZ |
479 | QD6580_DEF_DATA2, QD6580_DEF_DATA2); |
480 | ||
481 | mate->set_pio_mode = &qd6580_set_pio_mode; | |
482 | ||
8447d9d5 BZ |
483 | idx[0] = 0; |
484 | idx[1] = 1; | |
26bcb879 | 485 | |
8447d9d5 | 486 | ide_device_add(idx); |
1da177e4 | 487 | |
8447d9d5 | 488 | qd_write_reg(QD_DEF_CONTR, QD_CONTROL_PORT); |
1da177e4 LT |
489 | |
490 | return 0; /* no other qd65xx possible */ | |
491 | } | |
492 | } | |
493 | /* no qd65xx found */ | |
494 | return 1; | |
495 | } | |
496 | ||
84913882 BZ |
497 | int probe_qd65xx = 0; |
498 | ||
499 | module_param_named(probe, probe_qd65xx, bool, 0); | |
500 | MODULE_PARM_DESC(probe, "probe for QD65xx chipsets"); | |
501 | ||
1da177e4 LT |
502 | /* Can be called directly from ide.c. */ |
503 | int __init qd65xx_init(void) | |
504 | { | |
84913882 BZ |
505 | if (probe_qd65xx == 0) |
506 | return -ENODEV; | |
507 | ||
1da177e4 LT |
508 | if (qd_probe(0x30)) |
509 | qd_probe(0xb0); | |
510 | if (ide_hwifs[0].chipset != ide_qd65xx && | |
511 | ide_hwifs[1].chipset != ide_qd65xx) | |
512 | return -ENODEV; | |
513 | return 0; | |
514 | } | |
515 | ||
516 | #ifdef MODULE | |
517 | module_init(qd65xx_init); | |
518 | #endif | |
519 | ||
520 | MODULE_AUTHOR("Samuel Thibault"); | |
521 | MODULE_DESCRIPTION("support of qd65xx vlb ide chipset"); | |
522 | MODULE_LICENSE("GPL"); |