[mirror_ubuntu-bionic-kernel.git] / drivers / ide / legacy / qd65xx.c

/*
 *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
 */

/*
 *  Version 0.03	Cleaned auto-tune, added probe
 *  Version 0.04	Added second channel tuning
 *  Version 0.05	Enhanced tuning ; added qd6500 support
 *  Version 0.06	Added dos driver's list
 *  Version 0.07	Second channel bug fix 
 *
 * QDI QD6500/QD6580 EIDE controller fast support
 *
 * To activate controller support, use "ide0=qd65xx"
 */

/*
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@fnac.net>
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/system.h>
#include <asm/io.h>

#define DRV_NAME "qd65xx"

#include "qd65xx.h"

/*
 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
 *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
 *	-- qd6500 is a single IDE interface
 *	-- qd6580 is a dual IDE interface
 *
 * More research on qd6580 being done by willmore@cig.mot.com (David)
 * More Information given by Petr Soucek (petr@ryston.cz)
 * http://www.ryston.cz/petr/vlb
 */

/*
 * base: Timer1
 *
 *
 * base+0x01: Config (R/O)
 *
 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
 * bit 3: qd6500: 1 = disabled, 0 = enabled
 *        qd6580: 1
 * upper nibble:
 *        qd6500: 1100
 *        qd6580: either 1010 or 0101
 *
 *
 * base+0x02: Timer2 (qd6580 only)
 *
 *
 * base+0x03: Control (qd6580 only)
 *
 * bits 0-3 must always be set 1
 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
 *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
 *                                                   channel 1 for hdc & hdd
 * bit 1 : 1 = only disks on primary port
 *         0 = disks & ATAPI devices on primary port
 * bit 2-4 : always 0
 * bit 5 : status, but of what ?
 * bit 6 : always set 1 by dos driver
 * bit 7 : set 1 for non-ATAPI devices on primary port
 *	(maybe read-ahead and post-write buffer ?)
 */

static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */

/*
 * qd65xx_select:
 *
 * This routine is invoked to prepare for access to a given drive.
 */

static void qd65xx_select(ide_drive_t *drive)
{
	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
			(QD_TIMREG(drive) & 0x02);

	if (timings[index] != QD_TIMING(drive))
		outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
}

/*
 * qd6500_compute_timing
 *
 * computes the timing value where
 *	lower nibble represents active time,   in count of VLB clocks
 *	upper nibble represents recovery time, in count of VLB clocks
 */

static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
	u8 act_cyc, rec_cyc;

	if (clk <= 33) {
		act_cyc =  9 - IDE_IN(active_time   * clk / 1000 + 1, 2,  9);
		rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
	} else {
		act_cyc =  8 - IDE_IN(active_time   * clk / 1000 + 1, 1,  8);
		rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
	}

	return (rec_cyc << 4) | 0x08 | act_cyc;
}

/*
 * qd6580_compute_timing
 *
 * idem for qd6580
 */

static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
	u8 act_cyc, rec_cyc;

	act_cyc = 17 - IDE_IN(active_time   * clk / 1000 + 1, 2, 17);
	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);

	return (rec_cyc << 4) | act_cyc;
}

/*
 * qd_find_disk_type
 *
 * tries to find timing from dos driver's table
 */

static int qd_find_disk_type (ide_drive_t *drive,
		int *active_time, int *recovery_time)
{
	struct qd65xx_timing_s *p;
	char model[40];

	if (!*drive->id->model) return 0;

	strncpy(model,drive->id->model,40);
	ide_fixstring(model,40,1); /* byte-swap */

	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
		if (!strncmp(p->model, model+p->offset, 4)) {
			printk(KERN_DEBUG "%s: listed !\n", drive->name);
			*active_time = p->active;
			*recovery_time = p->recovery;
			return 1;
		}
	}
	return 0;
}

/*
 * qd_set_timing:
 *
 * records the timing
 */

static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
	drive->drive_data &= 0xff00;
	drive->drive_data |= timing;

	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}

static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	/*
	 * FIXME: use "pio" value
	 */
	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
		&& drive->id->tPIO && (drive->id->field_valid & 0x02)
		&& drive->id->eide_pio >= 240) {

		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
				drive->id->tPIO);
		active_time = 110;
		recovery_time = drive->id->eide_pio - 120;
	}

	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
}

static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif = drive->hwif;
	unsigned int cycle_time;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */
	u8 base = (hwif->config_data & 0xff00) >> 8;

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
		cycle_time = ide_pio_cycle_time(drive, pio);

		switch (pio) {
			case 0: break;
			case 3:
				if (cycle_time >= 110) {
					active_time = 86;
					recovery_time = cycle_time - 102;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			case 4:
				if (cycle_time >= 69) {
					active_time = 70;
					recovery_time = cycle_time - 61;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			default:
				if (cycle_time >= 180) {
					active_time = 110;
					recovery_time = cycle_time - 120;
				} else {
					active_time = ide_pio_timings[pio].active_time;
					recovery_time = cycle_time - active_time;
				}
		}
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	}

	if (!HWIF(drive)->channel && drive->media != ide_disk) {
		outb(0x5f, QD_CONTROL_PORT);
		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
			"and post-write buffer on %s.\n",
			drive->name, HWIF(drive)->name);
	}

	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
}

/*
 * qd_testreg
 *
 * tests if the given port is a register
 */

static int __init qd_testreg(int port)
{
	unsigned long flags;
	u8 savereg, readreg;

	local_irq_save(flags);
	savereg = inb_p(port);
	outb_p(QD_TESTVAL, port);	/* safe value */
	readreg = inb_p(port);
	outb(savereg, port);
	local_irq_restore(flags);

	if (savereg == QD_TESTVAL) {
		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
		printk(KERN_ERR "Assuming qd65xx is not present.\n");
		return 1;
	}

	return (readreg != QD_TESTVAL);
}

static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
{
	u8 base = (hwif->config_data & 0xff00) >> 8;
	u8 config = QD_CONFIG(hwif);

	hwif->drives[0].drive_data = QD6500_DEF_DATA;
	hwif->drives[1].drive_data = QD6500_DEF_DATA;
}

static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
{
	u16 t1, t2;
	u8 base = (hwif->config_data & 0xff00) >> 8;
	u8 config = QD_CONFIG(hwif);

	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
		t1 = QD6580_DEF_DATA;
		t2 = QD6580_DEF_DATA2;
	} else
		t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;

	hwif->drives[0].drive_data = t1;
	hwif->drives[1].drive_data = t2;
}

static const struct ide_port_ops qd6500_port_ops = {
	.port_init_devs		= qd6500_port_init_devs,
	.set_pio_mode		= qd6500_set_pio_mode,
	.selectproc		= qd65xx_select,
};

static const struct ide_port_ops qd6580_port_ops = {
	.port_init_devs		= qd6580_port_init_devs,
	.set_pio_mode		= qd6580_set_pio_mode,
	.selectproc		= qd65xx_select,
};

static const struct ide_port_info qd65xx_port_info __initdata = {
	.name			= DRV_NAME,
	.chipset		= ide_qd65xx,
	.host_flags		= IDE_HFLAG_IO_32BIT |
				  IDE_HFLAG_NO_DMA,
	.pio_mask		= ATA_PIO4,
};

/*
 * qd_probe:
 *
 * looks at the specified baseport, and if qd found, registers & initialises it
 * return 1 if another qd may be probed
 */

static int __init qd_probe(int base)
{
	int rc;
	u8 config, unit, control;
	struct ide_port_info d = qd65xx_port_info;

	config = inb(QD_CONFIG_PORT);

	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
		return -ENODEV;

	unit = ! (config & QD_CONFIG_IDE_BASEPORT);

	if (unit)
		d.host_flags |= IDE_HFLAG_QD_2ND_PORT;

	switch (config & 0xf0) {
	case QD_CONFIG_QD6500:
		if (qd_testreg(base))
			 return -ENODEV;	/* bad register */

		if (config & QD_CONFIG_DISABLED) {
			printk(KERN_WARNING "qd6500 is disabled !\n");
			return -ENODEV;
		}

		printk(KERN_NOTICE "qd6500 at %#x\n", base);
		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
			config, QD_ID3);

		d.port_ops = &qd6500_port_ops;
		d.host_flags |= IDE_HFLAG_SINGLE;
		break;
	case QD_CONFIG_QD6580_A:
	case QD_CONFIG_QD6580_B:
		if (qd_testreg(base) || qd_testreg(base + 0x02))
			return -ENODEV;	/* bad registers */

		control = inb(QD_CONTROL_PORT);

		printk(KERN_NOTICE "qd6580 at %#x\n", base);
		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
			config, control, QD_ID3);

		outb(QD_DEF_CONTR, QD_CONTROL_PORT);

		d.port_ops = &qd6580_port_ops;
		if (control & QD_CONTR_SEC_DISABLED)
			d.host_flags |= IDE_HFLAG_SINGLE;

		printk(KERN_INFO "qd6580: %s IDE board\n",
			(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
		break;
	default:
		return -ENODEV;
	}

	rc = ide_legacy_device_add(&d, (base << 8) | config);

	if (d.host_flags & IDE_HFLAG_SINGLE)
		return (rc == 0) ? 1 : rc;

	return rc;
}

static int probe_qd65xx;

module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");

static int __init qd65xx_init(void)
{
	int rc1, rc2 = -ENODEV;

	if (probe_qd65xx == 0)
		return -ENODEV;

	rc1 = qd_probe(0x30);
	if (rc1)
		rc2 = qd_probe(0xb0);

	if (rc1 < 0 && rc2 < 0)
		return -ENODEV;

	return 0;
}

module_init(qd65xx_init);

MODULE_AUTHOR("Samuel Thibault");
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
	3	*/
	4
	5	/*
	6	* Version 0.03 Cleaned auto-tune, added probe
	7	* Version 0.04 Added second channel tuning
	8	* Version 0.05 Enhanced tuning ; added qd6500 support
	9	* Version 0.06 Added dos driver's list
	10	* Version 0.07 Second channel bug fix
	11	*
	12	* QDI QD6500/QD6580 EIDE controller fast support
	13	*
1da177e4	14	* To activate controller support, use "ide0=qd65xx"
1da177e4 LT	15	*/
	16
	17	/*
	18	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
	19	* Samuel Thibault <samuel.thibault@fnac.net>
	20	*/
	21
1da177e4	22	#include <linux/module.h>
1da177e4 LT	23	#include <linux/types.h>
	24	#include <linux/kernel.h>
	25	#include <linux/delay.h>
	26	#include <linux/timer.h>
	27	#include <linux/mm.h>
	28	#include <linux/ioport.h>
	29	#include <linux/blkdev.h>
	30	#include <linux/hdreg.h>
	31	#include <linux/ide.h>
	32	#include <linux/init.h>
	33	#include <asm/system.h>
	34	#include <asm/io.h>
	35
d92f1a28 BZ	36	#define DRV_NAME "qd65xx"
d92f1a28 BZ	37
1da177e4 LT	38	#include "qd65xx.h"
	39
	40	/*
	41	* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
	42	* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
	43	* -- qd6500 is a single IDE interface
	44	* -- qd6580 is a dual IDE interface
	45	*
	46	* More research on qd6580 being done by willmore@cig.mot.com (David)
	47	* More Information given by Petr Soucek (petr@ryston.cz)
	48	* http://www.ryston.cz/petr/vlb
	49	*/
	50
	51	/*
	52	* base: Timer1
	53	*
	54	*
	55	* base+0x01: Config (R/O)
	56	*
	57	* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
	58	* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
	59	* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
	60	* bit 3: qd6500: 1 = disabled, 0 = enabled
	61	* qd6580: 1
	62	* upper nibble:
	63	* qd6500: 1100
	64	* qd6580: either 1010 or 0101
	65	*
	66	*
	67	* base+0x02: Timer2 (qd6580 only)
	68	*
	69	*
	70	* base+0x03: Control (qd6580 only)
	71	*
	72	* bits 0-3 must always be set 1
	73	* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
	74	* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
	75	* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
	76	* channel 1 for hdc & hdd
	77	* bit 1 : 1 = only disks on primary port
	78	* 0 = disks & ATAPI devices on primary port
	79	* bit 2-4 : always 0
	80	* bit 5 : status, but of what ?
	81	* bit 6 : always set 1 by dos driver
	82	* bit 7 : set 1 for non-ATAPI devices on primary port
	83	* (maybe read-ahead and post-write buffer ?)
	84	*/
	85
	86	static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
	87
1da177e4	88	/*
d07616f1	89	* qd65xx_select:
1da177e4	90	*
d07616f1	91	* This routine is invoked to prepare for access to a given drive.
1da177e4 LT	92	*/
1da177e4 LT	93
d07616f1	94	static void qd65xx_select(ide_drive_t *drive)
1da177e4 LT	95	{
	96	u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) \|
	97	(QD_TIMREG(drive) & 0x02);
	98
	99	if (timings[index] != QD_TIMING(drive))
c196567a	100	outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
1da177e4 LT	101	}
	102
	103	/*
	104	* qd6500_compute_timing
	105	*
	106	* computes the timing value where
	107	* lower nibble represents active time, in count of VLB clocks
	108	* upper nibble represents recovery time, in count of VLB clocks
	109	*/
	110
	111	static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
	112	{
30e5ee4d	113	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
ebae41a5	114	u8 act_cyc, rec_cyc;
1da177e4	115
ebae41a5 BZ	116	if (clk <= 33) {
	117	act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
	118	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
1da177e4	119	} else {
ebae41a5 BZ	120	act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
ebae41a5 BZ	121	rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
1da177e4 LT	122	}
1da177e4 LT	123
ebae41a5	124	return (rec_cyc << 4) \| 0x08 \| act_cyc;
1da177e4 LT	125	}
	126
	127	/*
	128	* qd6580_compute_timing
	129	*
	130	* idem for qd6580
	131	*/
	132
	133	static u8 qd6580_compute_timing (int active_time, int recovery_time)
	134	{
30e5ee4d	135	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
ebae41a5	136	u8 act_cyc, rec_cyc;
1da177e4	137
ebae41a5 BZ	138	act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
	139	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
	140
	141	return (rec_cyc << 4) \| act_cyc;
1da177e4 LT	142	}
	143
	144	/*
	145	* qd_find_disk_type
	146	*
	147	* tries to find timing from dos driver's table
	148	*/
	149
	150	static int qd_find_disk_type (ide_drive_t *drive,
	151	int active_time, int recovery_time)
	152	{
	153	struct qd65xx_timing_s *p;
	154	char model[40];
	155
	156	if (!*drive->id->model) return 0;
	157
	158	strncpy(model,drive->id->model,40);
	159	ide_fixstring(model,40,1); /* byte-swap */
	160
	161	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
	162	if (!strncmp(p->model, model+p->offset, 4)) {
	163	printk(KERN_DEBUG "%s: listed !\n", drive->name);
	164	*active_time = p->active;
	165	*recovery_time = p->recovery;
	166	return 1;
	167	}
	168	}
	169	return 0;
	170	}
	171
1da177e4 LT	172	/*
	173	* qd_set_timing:
	174	*
d07616f1	175	* records the timing
1da177e4 LT	176	*/
	177
	178	static void qd_set_timing (ide_drive_t *drive, u8 timing)
	179	{
1da177e4 LT	180	drive->drive_data &= 0xff00;
1da177e4 LT	181	drive->drive_data \|= timing;
1da177e4 LT	182
	183	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
	184	}
	185
26bcb879	186	static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4 LT	187	{
	188	int active_time = 175;
	189	int recovery_time = 415; /* worst case values from the dos driver */
	190
26bcb879 BZ	191	/*
	192	* FIXME: use "pio" value
	193	*/
1da177e4 LT	194	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
	195	&& drive->id->tPIO && (drive->id->field_valid & 0x02)
	196	&& drive->id->eide_pio >= 240) {
	197
	198	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
	199	drive->id->tPIO);
	200	active_time = 110;
	201	recovery_time = drive->id->eide_pio - 120;
	202	}
	203
	204	qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
	205	}
	206
26bcb879	207	static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
1da177e4	208	{
79472b6e	209	ide_hwif_t *hwif = drive->hwif;
7dd00083	210	unsigned int cycle_time;
1da177e4 LT	211	int active_time = 175;
1da177e4 LT	212	int recovery_time = 415; /* worst case values from the dos driver */
79472b6e	213	u8 base = (hwif->config_data & 0xff00) >> 8;
1da177e4 LT	214
1da177e4 LT	215	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
7dd00083	216	cycle_time = ide_pio_cycle_time(drive, pio);
1da177e4 LT	217
	218	switch (pio) {
	219	case 0: break;
	220	case 3:
7dd00083	221	if (cycle_time >= 110) {
1da177e4	222	active_time = 86;
7dd00083	223	recovery_time = cycle_time - 102;
1da177e4 LT	224	} else
	225	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	226	break;
	227	case 4:
7dd00083	228	if (cycle_time >= 69) {
1da177e4	229	active_time = 70;
7dd00083	230	recovery_time = cycle_time - 61;
1da177e4 LT	231	} else
	232	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	233	break;
	234	default:
7dd00083	235	if (cycle_time >= 180) {
1da177e4	236	active_time = 110;
7dd00083	237	recovery_time = cycle_time - 120;
1da177e4 LT	238	} else {
1da177e4 LT	239	active_time = ide_pio_timings[pio].active_time;
7dd00083	240	recovery_time = cycle_time - active_time;
1da177e4 LT	241	}
	242	}
	243	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	244	}
	245
	246	if (!HWIF(drive)->channel && drive->media != ide_disk) {
c196567a	247	outb(0x5f, QD_CONTROL_PORT);
1da177e4 LT	248	printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
	249	"and post-write buffer on %s.\n",
	250	drive->name, HWIF(drive)->name);
	251	}
	252
	253	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
	254	}
	255
	256	/*
	257	* qd_testreg
	258	*
	259	* tests if the given port is a register
	260	*/
	261
	262	static int __init qd_testreg(int port)
	263	{
1da177e4	264	unsigned long flags;
f949820d	265	u8 savereg, readreg;
1da177e4	266
c196567a	267	local_irq_save(flags);
1da177e4 LT	268	savereg = inb_p(port);
	269	outb_p(QD_TESTVAL, port); /* safe value */
	270	readreg = inb_p(port);
	271	outb(savereg, port);
c196567a	272	local_irq_restore(flags);
1da177e4 LT	273
	274	if (savereg == QD_TESTVAL) {
	275	printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
	276	printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
	277	printk(KERN_ERR "Assuming qd65xx is not present.\n");
	278	return 1;
	279	}
	280
	281	return (readreg != QD_TESTVAL);
	282	}
	283
1f2cf8b0 BZ	284	static void __init qd6500_port_init_devs(ide_hwif_t *hwif)
1f2cf8b0 BZ	285	{
79472b6e BZ	286	u8 base = (hwif->config_data & 0xff00) >> 8;
79472b6e BZ	287	u8 config = QD_CONFIG(hwif);
1f2cf8b0 BZ	288
	289	hwif->drives[0].drive_data = QD6500_DEF_DATA;
	290	hwif->drives[1].drive_data = QD6500_DEF_DATA;
	291	}
	292
	293	static void __init qd6580_port_init_devs(ide_hwif_t *hwif)
	294	{
	295	u16 t1, t2;
79472b6e BZ	296	u8 base = (hwif->config_data & 0xff00) >> 8;
79472b6e BZ	297	u8 config = QD_CONFIG(hwif);
1f2cf8b0	298
79472b6e	299	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
1f2cf8b0 BZ	300	t1 = QD6580_DEF_DATA;
	301	t2 = QD6580_DEF_DATA2;
	302	} else
	303	t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
	304
	305	hwif->drives[0].drive_data = t1;
	306	hwif->drives[1].drive_data = t2;
1da177e4 LT	307	}
1da177e4 LT	308
ac95beed BZ	309	static const struct ide_port_ops qd6500_port_ops = {
	310	.port_init_devs = qd6500_port_init_devs,
	311	.set_pio_mode = qd6500_set_pio_mode,
	312	.selectproc = qd65xx_select,
	313	};
	314
	315	static const struct ide_port_ops qd6580_port_ops = {
	316	.port_init_devs = qd6580_port_init_devs,
	317	.set_pio_mode = qd6580_set_pio_mode,
	318	.selectproc = qd65xx_select,
	319	};
	320
c413b9b9	321	static const struct ide_port_info qd65xx_port_info __initdata = {
d92f1a28	322	.name = DRV_NAME,
c413b9b9 BZ	323	.chipset = ide_qd65xx,
c413b9b9 BZ	324	.host_flags = IDE_HFLAG_IO_32BIT \|
0d28ec7f	325	IDE_HFLAG_NO_DMA,
c413b9b9 BZ	326	.pio_mask = ATA_PIO4,
	327	};
	328
1da177e4 LT	329	/*
	330	* qd_probe:
	331	*
	332	* looks at the specified baseport, and if qd found, registers & initialises it
	333	* return 1 if another qd may be probed
	334	*/
	335
	336	static int __init qd_probe(int base)
	337	{
0bfeee7d	338	int rc;
7a2199f3	339	u8 config, unit, control;
e277f91f	340	struct ide_port_info d = qd65xx_port_info;
1da177e4	341
c196567a	342	config = inb(QD_CONFIG_PORT);
1da177e4 LT	343
1da177e4 LT	344	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
7daf66dd	345	return -ENODEV;
1da177e4 LT	346
	347	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
	348
e277f91f BZ	349	if (unit)
	350	d.host_flags \|= IDE_HFLAG_QD_2ND_PORT;
	351
7a2199f3 BZ	352	switch (config & 0xf0) {
7a2199f3 BZ	353	case QD_CONFIG_QD6500:
7daf66dd BZ	354	if (qd_testreg(base))
7daf66dd BZ	355	return -ENODEV; /* bad register */
1da177e4	356
1da177e4 LT	357	if (config & QD_CONFIG_DISABLED) {
1da177e4 LT	358	printk(KERN_WARNING "qd6500 is disabled !\n");
7daf66dd	359	return -ENODEV;
1da177e4 LT	360	}
1da177e4 LT	361
e277f91f BZ	362	printk(KERN_NOTICE "qd6500 at %#x\n", base);
	363	printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
	364	config, QD_ID3);
	365
ac95beed	366	d.port_ops = &qd6500_port_ops;
79472b6e	367	d.host_flags \|= IDE_HFLAG_SINGLE;
7a2199f3 BZ	368	break;
	369	case QD_CONFIG_QD6580_A:
	370	case QD_CONFIG_QD6580_B:
7daf66dd BZ	371	if (qd_testreg(base) \|\| qd_testreg(base + 0x02))
7daf66dd BZ	372	return -ENODEV; /* bad registers */
1da177e4	373
c196567a	374	control = inb(QD_CONTROL_PORT);
1da177e4 LT	375
	376	printk(KERN_NOTICE "qd6580 at %#x\n", base);
	377	printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
	378	config, control, QD_ID3);
	379
788d6697 BZ	380	outb(QD_DEF_CONTR, QD_CONTROL_PORT);
788d6697 BZ	381
ac95beed	382	d.port_ops = &qd6580_port_ops;
7a2199f3	383	if (control & QD_CONTR_SEC_DISABLED)
79472b6e BZ	384	d.host_flags \|= IDE_HFLAG_SINGLE;
79472b6e BZ	385
7a2199f3 BZ	386	printk(KERN_INFO "qd6580: %s IDE board\n",
	387	(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
	388	break;
	389	default:
	390	return -ENODEV;
	391	}
26bcb879	392
7a2199f3	393	rc = ide_legacy_device_add(&d, (base << 8) \| config);
e277f91f	394
7a2199f3 BZ	395	if (d.host_flags & IDE_HFLAG_SINGLE)
7a2199f3 BZ	396	return (rc == 0) ? 1 : rc;
1da177e4	397
7a2199f3	398	return rc;
1da177e4 LT	399	}
1da177e4 LT	400
ef87f8d0	401	static int probe_qd65xx;
84913882 BZ	402
	403	module_param_named(probe, probe_qd65xx, bool, 0);
	404	MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
	405
ade2daf9	406	static int __init qd65xx_init(void)
1da177e4	407	{
7daf66dd BZ	408	int rc1, rc2 = -ENODEV;
7daf66dd BZ	409
84913882 BZ	410	if (probe_qd65xx == 0)
	411	return -ENODEV;
	412
7daf66dd BZ	413	rc1 = qd_probe(0x30);
	414	if (rc1)
	415	rc2 = qd_probe(0xb0);
	416
	417	if (rc1 < 0 && rc2 < 0)
1da177e4	418	return -ENODEV;
7daf66dd	419
1da177e4 LT	420	return 0;
	421	}
	422
1da177e4	423	module_init(qd65xx_init);
1da177e4 LT	424
	425	MODULE_AUTHOR("Samuel Thibault");
	426	MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
	427	MODULE_LICENSE("GPL");