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1da177e4 | 1 | /* |
94c7fa0f | 2 | * linux/drivers/ide/pci/atiixp.c Version 0.03 Aug 3 2007 |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 2003 ATI Inc. <hyu@ati.com> | |
485efc6c | 5 | * Copyright (C) 2004,2007 Bartlomiej Zolnierkiewicz |
1da177e4 LT |
6 | */ |
7 | ||
1da177e4 LT |
8 | #include <linux/types.h> |
9 | #include <linux/module.h> | |
10 | #include <linux/kernel.h> | |
11 | #include <linux/ioport.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/hdreg.h> | |
14 | #include <linux/ide.h> | |
15 | #include <linux/delay.h> | |
16 | #include <linux/init.h> | |
17 | ||
18 | #include <asm/io.h> | |
19 | ||
20 | #define ATIIXP_IDE_PIO_TIMING 0x40 | |
21 | #define ATIIXP_IDE_MDMA_TIMING 0x44 | |
22 | #define ATIIXP_IDE_PIO_CONTROL 0x48 | |
23 | #define ATIIXP_IDE_PIO_MODE 0x4a | |
24 | #define ATIIXP_IDE_UDMA_CONTROL 0x54 | |
25 | #define ATIIXP_IDE_UDMA_MODE 0x56 | |
26 | ||
27 | typedef struct { | |
28 | u8 command_width; | |
29 | u8 recover_width; | |
30 | } atiixp_ide_timing; | |
31 | ||
32 | static atiixp_ide_timing pio_timing[] = { | |
33 | { 0x05, 0x0d }, | |
34 | { 0x04, 0x07 }, | |
35 | { 0x03, 0x04 }, | |
36 | { 0x02, 0x02 }, | |
37 | { 0x02, 0x00 }, | |
38 | }; | |
39 | ||
40 | static atiixp_ide_timing mdma_timing[] = { | |
41 | { 0x07, 0x07 }, | |
42 | { 0x02, 0x01 }, | |
43 | { 0x02, 0x00 }, | |
44 | }; | |
45 | ||
46 | static int save_mdma_mode[4]; | |
47 | ||
6c5f8cc3 AC |
48 | static DEFINE_SPINLOCK(atiixp_lock); |
49 | ||
ccf35289 | 50 | static void atiixp_dma_host_on(ide_drive_t *drive) |
1da177e4 LT |
51 | { |
52 | struct pci_dev *dev = drive->hwif->pci_dev; | |
53 | unsigned long flags; | |
54 | u16 tmp16; | |
55 | ||
6c5f8cc3 | 56 | spin_lock_irqsave(&atiixp_lock, flags); |
1da177e4 LT |
57 | |
58 | pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); | |
59 | if (save_mdma_mode[drive->dn]) | |
60 | tmp16 &= ~(1 << drive->dn); | |
61 | else | |
62 | tmp16 |= (1 << drive->dn); | |
63 | pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16); | |
64 | ||
6c5f8cc3 | 65 | spin_unlock_irqrestore(&atiixp_lock, flags); |
1da177e4 | 66 | |
ccf35289 | 67 | ide_dma_host_on(drive); |
1da177e4 LT |
68 | } |
69 | ||
7469aaf6 | 70 | static void atiixp_dma_host_off(ide_drive_t *drive) |
1da177e4 LT |
71 | { |
72 | struct pci_dev *dev = drive->hwif->pci_dev; | |
73 | unsigned long flags; | |
74 | u16 tmp16; | |
75 | ||
6c5f8cc3 | 76 | spin_lock_irqsave(&atiixp_lock, flags); |
1da177e4 LT |
77 | |
78 | pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &tmp16); | |
79 | tmp16 &= ~(1 << drive->dn); | |
80 | pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, tmp16); | |
81 | ||
6c5f8cc3 | 82 | spin_unlock_irqrestore(&atiixp_lock, flags); |
1da177e4 | 83 | |
7469aaf6 | 84 | ide_dma_host_off(drive); |
1da177e4 LT |
85 | } |
86 | ||
87 | /** | |
88b2b32b BZ |
88 | * atiixp_set_pio_mode - set host controller for PIO mode |
89 | * @drive: drive | |
90 | * @pio: PIO mode number | |
1da177e4 LT |
91 | * |
92 | * Set the interface PIO mode. | |
93 | */ | |
94 | ||
88b2b32b | 95 | static void atiixp_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 LT |
96 | { |
97 | struct pci_dev *dev = drive->hwif->pci_dev; | |
98 | unsigned long flags; | |
99 | int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; | |
100 | u32 pio_timing_data; | |
101 | u16 pio_mode_data; | |
102 | ||
6c5f8cc3 | 103 | spin_lock_irqsave(&atiixp_lock, flags); |
1da177e4 LT |
104 | |
105 | pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data); | |
106 | pio_mode_data &= ~(0x07 << (drive->dn * 4)); | |
107 | pio_mode_data |= (pio << (drive->dn * 4)); | |
108 | pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data); | |
109 | ||
110 | pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data); | |
111 | pio_timing_data &= ~(0xff << timing_shift); | |
112 | pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) | | |
113 | (pio_timing[pio].command_width << (timing_shift + 4)); | |
114 | pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data); | |
115 | ||
6c5f8cc3 | 116 | spin_unlock_irqrestore(&atiixp_lock, flags); |
1da177e4 LT |
117 | } |
118 | ||
119 | /** | |
88b2b32b BZ |
120 | * atiixp_set_dma_mode - set host controller for DMA mode |
121 | * @drive: drive | |
122 | * @speed: DMA mode | |
1da177e4 | 123 | * |
88b2b32b BZ |
124 | * Set a ATIIXP host controller to the desired DMA mode. This involves |
125 | * programming the right timing data into the PCI configuration space. | |
1da177e4 LT |
126 | */ |
127 | ||
88b2b32b | 128 | static void atiixp_set_dma_mode(ide_drive_t *drive, const u8 speed) |
1da177e4 LT |
129 | { |
130 | struct pci_dev *dev = drive->hwif->pci_dev; | |
131 | unsigned long flags; | |
132 | int timing_shift = (drive->dn & 2) ? 16 : 0 + (drive->dn & 1) ? 0 : 8; | |
133 | u32 tmp32; | |
134 | u16 tmp16; | |
94c7fa0f BZ |
135 | |
136 | if (speed < XFER_MW_DMA_0) | |
137 | return; | |
1da177e4 | 138 | |
6c5f8cc3 | 139 | spin_lock_irqsave(&atiixp_lock, flags); |
1da177e4 LT |
140 | |
141 | save_mdma_mode[drive->dn] = 0; | |
142 | if (speed >= XFER_UDMA_0) { | |
143 | pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16); | |
144 | tmp16 &= ~(0x07 << (drive->dn * 4)); | |
145 | tmp16 |= ((speed & 0x07) << (drive->dn * 4)); | |
146 | pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16); | |
147 | } else { | |
148 | if ((speed >= XFER_MW_DMA_0) && (speed <= XFER_MW_DMA_2)) { | |
149 | save_mdma_mode[drive->dn] = speed; | |
150 | pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32); | |
151 | tmp32 &= ~(0xff << timing_shift); | |
152 | tmp32 |= (mdma_timing[speed & 0x03].recover_width << timing_shift) | | |
153 | (mdma_timing[speed & 0x03].command_width << (timing_shift + 4)); | |
154 | pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32); | |
155 | } | |
156 | } | |
157 | ||
6c5f8cc3 | 158 | spin_unlock_irqrestore(&atiixp_lock, flags); |
1da177e4 LT |
159 | } |
160 | ||
1da177e4 LT |
161 | /** |
162 | * init_hwif_atiixp - fill in the hwif for the ATIIXP | |
163 | * @hwif: IDE interface | |
164 | * | |
165 | * Set up the ide_hwif_t for the ATIIXP interface according to the | |
166 | * capabilities of the hardware. | |
167 | */ | |
168 | ||
169 | static void __devinit init_hwif_atiixp(ide_hwif_t *hwif) | |
170 | { | |
e5c073ff CH |
171 | u8 udma_mode = 0; |
172 | u8 ch = hwif->channel; | |
173 | struct pci_dev *pdev = hwif->pci_dev; | |
174 | ||
26bcb879 | 175 | hwif->set_pio_mode = &atiixp_set_pio_mode; |
88b2b32b | 176 | hwif->set_dma_mode = &atiixp_set_dma_mode; |
1da177e4 LT |
177 | |
178 | if (!hwif->dma_base) | |
179 | return; | |
180 | ||
e5c073ff | 181 | pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode); |
49521f97 | 182 | |
e5c073ff | 183 | if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40) |
49521f97 | 184 | hwif->cbl = ATA_CBL_PATA80; |
e5c073ff | 185 | else |
49521f97 | 186 | hwif->cbl = ATA_CBL_PATA40; |
e5c073ff | 187 | |
ccf35289 | 188 | hwif->dma_host_on = &atiixp_dma_host_on; |
7469aaf6 | 189 | hwif->dma_host_off = &atiixp_dma_host_off; |
1da177e4 LT |
190 | } |
191 | ||
85620436 | 192 | static const struct ide_port_info atiixp_pci_info[] __devinitdata = { |
1da177e4 LT |
193 | { /* 0 */ |
194 | .name = "ATIIXP", | |
195 | .init_hwif = init_hwif_atiixp, | |
1da177e4 | 196 | .enablebits = {{0x48,0x01,0x00}, {0x48,0x08,0x00}}, |
3985ee3b | 197 | .host_flags = IDE_HFLAG_LEGACY_IRQS | IDE_HFLAG_BOOTABLE, |
4099d143 | 198 | .pio_mask = ATA_PIO4, |
5f8b6c34 BZ |
199 | .mwdma_mask = ATA_MWDMA2, |
200 | .udma_mask = ATA_UDMA5, | |
b25168df CH |
201 | },{ /* 1 */ |
202 | .name = "SB600_PATA", | |
203 | .init_hwif = init_hwif_atiixp, | |
b25168df | 204 | .enablebits = {{0x48,0x01,0x00}, {0x00,0x00,0x00}}, |
3985ee3b BZ |
205 | .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_LEGACY_IRQS | |
206 | IDE_HFLAG_BOOTABLE, | |
4099d143 | 207 | .pio_mask = ATA_PIO4, |
5f8b6c34 BZ |
208 | .mwdma_mask = ATA_MWDMA2, |
209 | .udma_mask = ATA_UDMA5, | |
b25168df | 210 | }, |
1da177e4 LT |
211 | }; |
212 | ||
213 | /** | |
214 | * atiixp_init_one - called when a ATIIXP is found | |
215 | * @dev: the atiixp device | |
216 | * @id: the matching pci id | |
217 | * | |
218 | * Called when the PCI registration layer (or the IDE initialization) | |
219 | * finds a device matching our IDE device tables. | |
220 | */ | |
221 | ||
222 | static int __devinit atiixp_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
223 | { | |
224 | return ide_setup_pci_device(dev, &atiixp_pci_info[id->driver_data]); | |
225 | } | |
226 | ||
9cbcc5e3 BZ |
227 | static const struct pci_device_id atiixp_pci_tbl[] = { |
228 | { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP200_IDE), 0 }, | |
229 | { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP300_IDE), 0 }, | |
230 | { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 }, | |
231 | { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 }, | |
232 | { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 }, | |
1da177e4 LT |
233 | { 0, }, |
234 | }; | |
235 | MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl); | |
236 | ||
237 | static struct pci_driver driver = { | |
238 | .name = "ATIIXP_IDE", | |
239 | .id_table = atiixp_pci_tbl, | |
240 | .probe = atiixp_init_one, | |
241 | }; | |
242 | ||
82ab1eec | 243 | static int __init atiixp_ide_init(void) |
1da177e4 LT |
244 | { |
245 | return ide_pci_register_driver(&driver); | |
246 | } | |
247 | ||
248 | module_init(atiixp_ide_init); | |
249 | ||
250 | MODULE_AUTHOR("HUI YU"); | |
251 | MODULE_DESCRIPTION("PCI driver module for ATI IXP IDE"); | |
252 | MODULE_LICENSE("GPL"); |