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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Copyright (C) 1996-1998 Linus Torvalds & authors (see below) |
3 | */ | |
4 | ||
5 | /* | |
6 | * Authors: | |
7 | * Jaromir Koutek <miri@punknet.cz>, | |
8 | * Jan Harkes <jaharkes@cwi.nl>, | |
9 | * Mark Lord <mlord@pobox.com> | |
10 | * Some parts of code are from ali14xx.c and from rz1000.c. | |
11 | * | |
12 | * OPTi is trademark of OPTi, Octek is trademark of Octek. | |
13 | * | |
14 | * I used docs from OPTi databook, from ftp.opti.com, file 9123-0002.ps | |
15 | * and disassembled/traced setupvic.exe (DOS program). | |
16 | * It increases kernel code about 2 kB. | |
17 | * I don't have this card no more, but I hope I can get some in case | |
18 | * of needed development. | |
19 | * My card is Octek PIDE 1.01 (on card) or OPTiViC (program). | |
20 | * It has a place for a secondary connector in circuit, but nothing | |
21 | * is there. Also BIOS says no address for | |
22 | * secondary controller (see bellow in ide_init_opti621). | |
23 | * I've only tested this on my system, which only has one disk. | |
24 | * It's Western Digital WDAC2850, with PIO mode 3. The PCI bus | |
25 | * is at 20 MHz (I have DX2/80, I tried PCI at 40, but I got random | |
26 | * lockups). I tried the OCTEK double speed CD-ROM and | |
27 | * it does not work! But I can't boot DOS also, so it's probably | |
28 | * hardware fault. I have connected Conner 80MB, the Seagate 850MB (no | |
29 | * problems) and Seagate 1GB (as slave, WD as master). My experiences | |
30 | * with the third, 1GB drive: I got 3MB/s (hdparm), but sometimes | |
31 | * it slows to about 100kB/s! I don't know why and I have | |
32 | * not this drive now, so I can't try it again. | |
33 | * I write this driver because I lost the paper ("manual") with | |
34 | * settings of jumpers on the card and I have to boot Linux with | |
35 | * Loadlin except LILO, cause I have to run the setupvic.exe program | |
36 | * already or I get disk errors (my test: rpm -Vf | |
37 | * /usr/X11R6/bin/XF86_SVGA - or any big file). | |
38 | * Some numbers from hdparm -t /dev/hda: | |
39 | * Timing buffer-cache reads: 32 MB in 3.02 seconds =10.60 MB/sec | |
40 | * Timing buffered disk reads: 16 MB in 5.52 seconds = 2.90 MB/sec | |
41 | * I have 4 Megs/s before, but I don't know why (maybe changes | |
42 | * in hdparm test). | |
43 | * After release of 0.1, I got some successful reports, so it might work. | |
44 | * | |
45 | * The main problem with OPTi is that some timings for master | |
46 | * and slave must be the same. For example, if you have master | |
47 | * PIO 3 and slave PIO 0, driver have to set some timings of | |
26bcb879 | 48 | * master for PIO 0. Second problem is that opti621_set_pio_mode |
1da177e4 LT |
49 | * got only one drive to set, but have to set both drives. |
50 | * This is solved in compute_pios. If you don't set | |
51 | * the second drive, compute_pios use ide_get_best_pio_mode | |
52 | * for autoselect mode (you can change it to PIO 0, if you want). | |
53 | * If you then set the second drive to another PIO, the old value | |
54 | * (automatically selected) will be overrided by yours. | |
55 | * There is a 25/33MHz switch in configuration | |
73f1ad86 | 56 | * register, but driver is written for use at any frequency. |
1da177e4 LT |
57 | * |
58 | * Version 0.1, Nov 8, 1996 | |
4eb68a25 | 59 | * by Jaromir Koutek, for 2.1.8. |
1da177e4 | 60 | * Initial version of driver. |
4eb68a25 | 61 | * |
1da177e4 LT |
62 | * Version 0.2 |
63 | * Number 0.2 skipped. | |
64 | * | |
65 | * Version 0.3, Nov 29, 1997 | |
66 | * by Mark Lord (probably), for 2.1.68 | |
67 | * Updates for use with new IDE block driver. | |
68 | * | |
69 | * Version 0.4, Dec 14, 1997 | |
70 | * by Jan Harkes | |
71 | * Fixed some errors and cleaned the code. | |
72 | * | |
73 | * Version 0.5, Jan 2, 1998 | |
74 | * by Jaromir Koutek | |
75 | * Updates for use with (again) new IDE block driver. | |
76 | * Update of documentation. | |
4eb68a25 | 77 | * |
1da177e4 LT |
78 | * Version 0.6, Jan 2, 1999 |
79 | * by Jaromir Koutek | |
80 | * Reversed to version 0.3 of the driver, because | |
81 | * 0.5 doesn't work. | |
82 | */ | |
83 | ||
1da177e4 LT |
84 | #include <linux/types.h> |
85 | #include <linux/module.h> | |
86 | #include <linux/kernel.h> | |
1da177e4 LT |
87 | #include <linux/pci.h> |
88 | #include <linux/hdreg.h> | |
89 | #include <linux/ide.h> | |
90 | ||
91 | #include <asm/io.h> | |
92 | ||
ced3ec8a BZ |
93 | #define DRV_NAME "opti621" |
94 | ||
1da177e4 LT |
95 | #define READ_REG 0 /* index of Read cycle timing register */ |
96 | #define WRITE_REG 1 /* index of Write cycle timing register */ | |
97 | #define CNTRL_REG 3 /* index of Control register */ | |
98 | #define STRAP_REG 5 /* index of Strap register */ | |
99 | #define MISC_REG 6 /* index of Miscellaneous register */ | |
100 | ||
101 | static int reg_base; | |
102 | ||
e65dde71 BZ |
103 | static DEFINE_SPINLOCK(opti621_lock); |
104 | ||
1da177e4 LT |
105 | /* Write value to register reg, base of register |
106 | * is at reg_base (0x1f0 primary, 0x170 secondary, | |
107 | * if not changed by PCI configuration). | |
108 | * This is from setupvic.exe program. | |
109 | */ | |
0ecdca26 | 110 | static void write_reg(u8 value, int reg) |
1da177e4 | 111 | { |
0ecdca26 BZ |
112 | inw(reg_base + 1); |
113 | inw(reg_base + 1); | |
114 | outb(3, reg_base + 2); | |
115 | outb(value, reg_base + reg); | |
116 | outb(0x83, reg_base + 2); | |
1da177e4 LT |
117 | } |
118 | ||
1da177e4 LT |
119 | /* Read value from register reg, base of register |
120 | * is at reg_base (0x1f0 primary, 0x170 secondary, | |
121 | * if not changed by PCI configuration). | |
122 | * This is from setupvic.exe program. | |
123 | */ | |
0ecdca26 | 124 | static u8 read_reg(int reg) |
1da177e4 LT |
125 | { |
126 | u8 ret = 0; | |
127 | ||
0ecdca26 BZ |
128 | inw(reg_base + 1); |
129 | inw(reg_base + 1); | |
130 | outb(3, reg_base + 2); | |
131 | ret = inb(reg_base + reg); | |
132 | outb(0x83, reg_base + 2); | |
133 | ||
1da177e4 LT |
134 | return ret; |
135 | } | |
136 | ||
26bcb879 | 137 | static void opti621_set_pio_mode(ide_drive_t *drive, const u8 pio) |
1da177e4 | 138 | { |
6c987183 BZ |
139 | ide_hwif_t *hwif = drive->hwif; |
140 | ide_drive_t *pair = ide_get_paired_drive(drive); | |
1da177e4 | 141 | unsigned long flags; |
810253d4 BZ |
142 | u8 tim, misc, addr_pio = pio, clk; |
143 | ||
144 | /* DRDY is default 2 (by OPTi Databook) */ | |
80a65fc5 BZ |
145 | static const u8 addr_timings[2][5] = { |
146 | { 0x20, 0x10, 0x00, 0x00, 0x00 }, /* 33 MHz */ | |
147 | { 0x10, 0x10, 0x00, 0x00, 0x00 }, /* 25 MHz */ | |
810253d4 | 148 | }; |
80a65fc5 BZ |
149 | static const u8 data_rec_timings[2][5] = { |
150 | { 0x5b, 0x45, 0x32, 0x21, 0x20 }, /* 33 MHz */ | |
151 | { 0x48, 0x34, 0x21, 0x10, 0x10 } /* 25 MHz */ | |
810253d4 | 152 | }; |
1da177e4 | 153 | |
6c987183 BZ |
154 | drive->drive_data = XFER_PIO_0 + pio; |
155 | ||
156 | if (pair->present) { | |
157 | if (pair->drive_data && pair->drive_data < drive->drive_data) | |
158 | addr_pio = pair->drive_data - XFER_PIO_0; | |
159 | } | |
1da177e4 | 160 | |
21bd33a6 BZ |
161 | spin_lock_irqsave(&opti621_lock, flags); |
162 | ||
163 | reg_base = hwif->io_ports.data_addr; | |
164 | ||
165 | /* allow Register-B */ | |
166 | outb(0xc0, reg_base + CNTRL_REG); | |
167 | /* hmm, setupvic.exe does this ;-) */ | |
168 | outb(0xff, reg_base + 5); | |
169 | /* if reads 0xff, adapter not exist? */ | |
170 | (void)inb(reg_base + CNTRL_REG); | |
171 | /* if reads 0xc0, no interface exist? */ | |
172 | read_reg(CNTRL_REG); | |
173 | ||
174 | /* check CLK speed */ | |
175 | clk = read_reg(STRAP_REG) & 1; | |
176 | ||
177 | printk(KERN_INFO "%s: CLK = %d MHz\n", hwif->name, clk ? 25 : 33); | |
178 | ||
810253d4 BZ |
179 | tim = data_rec_timings[clk][pio]; |
180 | misc = addr_timings[clk][addr_pio]; | |
1da177e4 | 181 | |
6c987183 BZ |
182 | /* select Index-0/1 for Register-A/B */ |
183 | write_reg(drive->select.b.unit, MISC_REG); | |
0ecdca26 | 184 | /* set read cycle timings */ |
810253d4 | 185 | write_reg(tim, READ_REG); |
0ecdca26 | 186 | /* set write cycle timings */ |
810253d4 | 187 | write_reg(tim, WRITE_REG); |
1da177e4 | 188 | |
1da177e4 LT |
189 | /* use Register-A for drive 0 */ |
190 | /* use Register-B for drive 1 */ | |
0ecdca26 | 191 | write_reg(0x85, CNTRL_REG); |
1da177e4 LT |
192 | |
193 | /* set address setup, DRDY timings, */ | |
194 | /* and read prefetch for both drives */ | |
0ecdca26 | 195 | write_reg(misc, MISC_REG); |
1da177e4 | 196 | |
e65dde71 | 197 | spin_unlock_irqrestore(&opti621_lock, flags); |
1da177e4 LT |
198 | } |
199 | ||
ac95beed | 200 | static const struct ide_port_ops opti621_port_ops = { |
ac95beed BZ |
201 | .set_pio_mode = opti621_set_pio_mode, |
202 | }; | |
1da177e4 | 203 | |
80a65fc5 | 204 | static const struct ide_port_info opti621_chipset __devinitdata = { |
ced3ec8a | 205 | .name = DRV_NAME, |
80a65fc5 BZ |
206 | .enablebits = { {0x45, 0x80, 0x00}, {0x40, 0x08, 0x00} }, |
207 | .port_ops = &opti621_port_ops, | |
208 | .host_flags = IDE_HFLAG_NO_DMA, | |
209 | .pio_mask = ATA_PIO4, | |
1da177e4 LT |
210 | }; |
211 | ||
212 | static int __devinit opti621_init_one(struct pci_dev *dev, const struct pci_device_id *id) | |
213 | { | |
6cdf6eb3 | 214 | return ide_pci_init_one(dev, &opti621_chipset, NULL); |
1da177e4 LT |
215 | } |
216 | ||
9cbcc5e3 BZ |
217 | static const struct pci_device_id opti621_pci_tbl[] = { |
218 | { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 }, | |
80a65fc5 | 219 | { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 0 }, |
1da177e4 LT |
220 | { 0, }, |
221 | }; | |
222 | MODULE_DEVICE_TABLE(pci, opti621_pci_tbl); | |
223 | ||
224 | static struct pci_driver driver = { | |
225 | .name = "Opti621_IDE", | |
226 | .id_table = opti621_pci_tbl, | |
227 | .probe = opti621_init_one, | |
adc7f85a | 228 | .remove = ide_pci_remove, |
1da177e4 LT |
229 | }; |
230 | ||
82ab1eec | 231 | static int __init opti621_ide_init(void) |
1da177e4 LT |
232 | { |
233 | return ide_pci_register_driver(&driver); | |
234 | } | |
235 | ||
adc7f85a BZ |
236 | static void __exit opti621_ide_exit(void) |
237 | { | |
238 | pci_unregister_driver(&driver); | |
239 | } | |
240 | ||
1da177e4 | 241 | module_init(opti621_ide_init); |
adc7f85a | 242 | module_exit(opti621_ide_exit); |
1da177e4 LT |
243 | |
244 | MODULE_AUTHOR("Jaromir Koutek, Jan Harkes, Mark Lord"); | |
245 | MODULE_DESCRIPTION("PCI driver module for Opti621 IDE"); | |
246 | MODULE_LICENSE("GPL"); |