[mirror_ubuntu-artful-kernel.git] / drivers / ide / pci / pdc202xx_new.c

/*
 *  Promise TX2/TX4/TX2000/133 IDE driver
 *
 *  This program is free software; you can redistribute it and/or
 *  modify it under the terms of the GNU General Public License
 *  as published by the Free Software Foundation; either version
 *  2 of the License, or (at your option) any later version.
 *
 *  Split from:
 *  linux/drivers/ide/pdc202xx.c	Version 0.35	Mar. 30, 2002
 *  Copyright (C) 1998-2002		Andre Hedrick <andre@linux-ide.org>
 *  Copyright (C) 2005-2006		MontaVista Software, Inc.
 *  Portions Copyright (C) 1999 Promise Technology, Inc.
 *  Author: Frank Tiernan (frankt@promise.com)
 *  Released under terms of General Public License
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/hdreg.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/ide.h>

#include <asm/io.h>
#include <asm/irq.h>

#ifdef CONFIG_PPC_PMAC
#include <asm/prom.h>
#include <asm/pci-bridge.h>
#endif

#define PDC202_DEBUG_CABLE	0

static const char *pdc_quirk_drives[] = {
	"QUANTUM FIREBALLlct08 08",
	"QUANTUM FIREBALLP KA6.4",
	"QUANTUM FIREBALLP KA9.1",
	"QUANTUM FIREBALLP LM20.4",
	"QUANTUM FIREBALLP KX13.6",
	"QUANTUM FIREBALLP KX20.5",
	"QUANTUM FIREBALLP KX27.3",
	"QUANTUM FIREBALLP LM20.5",
	NULL
};

#define set_2regs(a, b)					\
	do {						\
		hwif->OUTB((a + adj), indexreg);	\
		hwif->OUTB(b, datareg);			\
	} while(0)

#define set_ultra(a, b, c)				\
	do {						\
		set_2regs(0x10,(a));			\
		set_2regs(0x11,(b));			\
		set_2regs(0x12,(c));			\
	} while(0)

#define set_ata2(a, b)					\
	do {						\
		set_2regs(0x0e,(a));			\
		set_2regs(0x0f,(b));			\
	} while(0)

#define set_pio(a, b, c)				\
	do { 						\
		set_2regs(0x0c,(a));			\
		set_2regs(0x0d,(b));			\
		set_2regs(0x13,(c));			\
	} while(0)

static u8 pdcnew_ratemask (ide_drive_t *drive)
{
	u8 mode;

	switch(HWIF(drive)->pci_dev->device) {
		case PCI_DEVICE_ID_PROMISE_20277:
		case PCI_DEVICE_ID_PROMISE_20276:
		case PCI_DEVICE_ID_PROMISE_20275:
		case PCI_DEVICE_ID_PROMISE_20271:
		case PCI_DEVICE_ID_PROMISE_20269:
			mode = 4;
			break;
		case PCI_DEVICE_ID_PROMISE_20270:
		case PCI_DEVICE_ID_PROMISE_20268:
			mode = 3;
			break;
		default:
			return 0;
	}
	if (!eighty_ninty_three(drive))
		mode = min(mode, (u8)1);
	return mode;
}

static int check_in_drive_lists (ide_drive_t *drive, const char **list)
{
	struct hd_driveid *id = drive->id;

	if (pdc_quirk_drives == list) {
		while (*list) {
			if (strstr(id->model, *list++)) {
				return 2;
			}
		}
	} else {
		while (*list) {
			if (!strcmp(*list++,id->model)) {
				return 1;
			}
		}
	}
	return 0;
}

static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
{
	ide_hwif_t *hwif	= HWIF(drive);
	unsigned long indexreg	= hwif->dma_vendor1;
	unsigned long datareg	= hwif->dma_vendor3;
	u8 thold		= 0x10;
	u8 adj			= (drive->dn%2) ? 0x08 : 0x00;
	u8 speed		= ide_rate_filter(pdcnew_ratemask(drive), xferspeed);

	if (speed == XFER_UDMA_2) {
		hwif->OUTB((thold + adj), indexreg);
		hwif->OUTB((hwif->INB(datareg) & 0x7f), datareg);
	}

	switch (speed) {
		case XFER_UDMA_7:
			speed = XFER_UDMA_6;
		case XFER_UDMA_6:	set_ultra(0x1a, 0x01, 0xcb); break;
		case XFER_UDMA_5:	set_ultra(0x1a, 0x02, 0xcb); break;
		case XFER_UDMA_4:	set_ultra(0x1a, 0x03, 0xcd); break;
		case XFER_UDMA_3:	set_ultra(0x1a, 0x05, 0xcd); break;
		case XFER_UDMA_2:	set_ultra(0x2a, 0x07, 0xcd); break;
		case XFER_UDMA_1:	set_ultra(0x3a, 0x0a, 0xd0); break;
		case XFER_UDMA_0:	set_ultra(0x4a, 0x0f, 0xd5); break;
		case XFER_MW_DMA_2:	set_ata2(0x69, 0x25); break;
		case XFER_MW_DMA_1:	set_ata2(0x6b, 0x27); break;
		case XFER_MW_DMA_0:	set_ata2(0xdf, 0x5f); break;
		case XFER_PIO_4:	set_pio(0x23, 0x09, 0x25); break;
		case XFER_PIO_3:	set_pio(0x27, 0x0d, 0x35); break;
		case XFER_PIO_2:	set_pio(0x23, 0x26, 0x64); break;
		case XFER_PIO_1:	set_pio(0x46, 0x29, 0xa4); break;
		case XFER_PIO_0:	set_pio(0xfb, 0x2b, 0xac); break;
		default:
			;
	}

	return (ide_config_drive_speed(drive, speed));
}

/*   0    1    2    3    4    5    6   7   8
 * 960, 480, 390, 300, 240, 180, 120, 90, 60
 *           180, 150, 120,  90,  60
 * DMA_Speed
 * 180, 120,  90,  90,  90,  60,  30
 *  11,   5,   4,   3,   2,   1,   0
 */
static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
{
	pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
	(void)pdcnew_new_tune_chipset(drive, XFER_PIO_0 + pio);
}

static u8 pdcnew_new_cable_detect (ide_hwif_t *hwif)
{
	hwif->OUTB(0x0b, hwif->dma_vendor1);
	return ((u8)((hwif->INB(hwif->dma_vendor3) & 0x04)));
}
static int config_chipset_for_dma (ide_drive_t *drive)
{
	struct hd_driveid *id	= drive->id;
	ide_hwif_t *hwif	= HWIF(drive);
	u8 speed		= -1;
	u8 cable;

	u8 ultra_66		= ((id->dma_ultra & 0x0010) ||
				   (id->dma_ultra & 0x0008)) ? 1 : 0;

	cable = pdcnew_new_cable_detect(hwif);

	if (ultra_66 && cable) {
		printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
		printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
	}

	if (drive->media != ide_disk)
		return 0;
	if (id->capability & 4) {	/* IORDY_EN & PREFETCH_EN */
		hwif->OUTB((0x13 + ((drive->dn%2) ? 0x08 : 0x00)), hwif->dma_vendor1);
		hwif->OUTB((hwif->INB(hwif->dma_vendor3)|0x03), hwif->dma_vendor3);
	}

	speed = ide_dma_speed(drive, pdcnew_ratemask(drive));

	if (!speed)
		return 0;

	(void) hwif->speedproc(drive, speed);
	return ide_dma_enable(drive);
}

static int pdcnew_config_drive_xfer_rate (ide_drive_t *drive)
{
	ide_hwif_t *hwif	= HWIF(drive);
	struct hd_driveid *id	= drive->id;

	drive->init_speed = 0;

	if (id && (id->capability & 1) && drive->autodma) {

		if (ide_use_dma(drive)) {
			if (config_chipset_for_dma(drive))
				return hwif->ide_dma_on(drive);
		}

		goto fast_ata_pio;

	} else if ((id->capability & 8) || (id->field_valid & 2)) {
fast_ata_pio:
		hwif->tuneproc(drive, 255);
		return hwif->ide_dma_off_quietly(drive);
	}
	/* IORDY not supported */
	return 0;
}

static int pdcnew_quirkproc (ide_drive_t *drive)
{
	return ((int) check_in_drive_lists(drive, pdc_quirk_drives));
}

static int pdcnew_ide_dma_lostirq(ide_drive_t *drive)
{
	if (HWIF(drive)->resetproc != NULL)
		HWIF(drive)->resetproc(drive);
	return __ide_dma_lostirq(drive);
}

static int pdcnew_ide_dma_timeout(ide_drive_t *drive)
{
	if (HWIF(drive)->resetproc != NULL)
		HWIF(drive)->resetproc(drive);
	return __ide_dma_timeout(drive);
}

static void pdcnew_new_reset (ide_drive_t *drive)
{
	/*
	 * Deleted this because it is redundant from the caller.
	 */
	printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
		HWIF(drive)->channel ? "Secondary" : "Primary");
}

#ifdef CONFIG_PPC_PMAC
static void __devinit apple_kiwi_init(struct pci_dev *pdev)
{
	struct device_node *np = pci_device_to_OF_node(pdev);
	unsigned int class_rev = 0;
	void __iomem *mmio;
	u8 conf;

	if (np == NULL || !device_is_compatible(np, "kiwi-root"))
		return;

	pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
	class_rev &= 0xff;

	if (class_rev >= 0x03) {
		/* Setup chip magic config stuff (from darwin) */
		pci_read_config_byte(pdev, 0x40, &conf);
		pci_write_config_byte(pdev, 0x40, conf | 0x01);
	}
	mmio = ioremap(pci_resource_start(pdev, 5),
				      pci_resource_len(pdev, 5));

	/* Setup some PLL stuffs */
	switch (pdev->device) {
	case PCI_DEVICE_ID_PROMISE_20270:
		writew(0x0d2b, mmio + 0x1202);
		mdelay(30);
		break;
	case PCI_DEVICE_ID_PROMISE_20271:
		writew(0x0826, mmio + 0x1202);
		mdelay(30);
		break;
	}

	iounmap(mmio);
}
#endif /* CONFIG_PPC_PMAC */

static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const char *name)
{
	if (dev->resource[PCI_ROM_RESOURCE].start) {
		pci_write_config_dword(dev, PCI_ROM_ADDRESS,
			dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
		printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
			(unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
	}

#ifdef CONFIG_PPC_PMAC
	apple_kiwi_init(dev);
#endif

	return dev->irq;
}

static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
{
	hwif->autodma = 0;

	hwif->tuneproc  = &pdcnew_tune_drive;
	hwif->quirkproc = &pdcnew_quirkproc;
	hwif->speedproc = &pdcnew_new_tune_chipset;
	hwif->resetproc = &pdcnew_new_reset;

	hwif->drives[0].autotune = hwif->drives[1].autotune = 1;

	hwif->ultra_mask = 0x7f;
	hwif->mwdma_mask = 0x07;

	hwif->err_stops_fifo = 1;

	hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
	hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq;
	hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout;
	if (!(hwif->udma_four))
		hwif->udma_four = (pdcnew_new_cable_detect(hwif)) ? 0 : 1;
	if (!noautodma)
		hwif->autodma = 1;
	hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
#if PDC202_DEBUG_CABLE
	printk(KERN_DEBUG "%s: %s-pin cable\n",
		hwif->name, hwif->udma_four ? "80" : "40");
#endif /* PDC202_DEBUG_CABLE */
}

static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
{
	return ide_setup_pci_device(dev, d);
}

static int __devinit init_setup_pdc20270(struct pci_dev *dev,
					 ide_pci_device_t *d)
{
	struct pci_dev *findev = NULL;
	int ret;

	if ((dev->bus->self &&
	     dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
	    (dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
		if (PCI_SLOT(dev->devfn) & 2)
			return -ENODEV;
		d->extra = 0;
		while ((findev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
			if ((findev->vendor == dev->vendor) &&
			    (findev->device == dev->device) &&
			    (PCI_SLOT(findev->devfn) & 2)) {
				if (findev->irq != dev->irq) {
					findev->irq = dev->irq;
				}
				ret = ide_setup_pci_devices(dev, findev, d);
				pci_dev_put(findev);
				return ret;
			}
		}
	}
	return ide_setup_pci_device(dev, d);
}

static int __devinit init_setup_pdc20276(struct pci_dev *dev,
					 ide_pci_device_t *d)
{
	if ((dev->bus->self) &&
	    (dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
	    ((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) ||
	     (dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
		printk(KERN_INFO "ide: Skipping Promise PDC20276 "
			"attached to I2O RAID controller.\n");
		return -ENODEV;
	}
	return ide_setup_pci_device(dev, d);
}

static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
	{	/* 0 */
		.name		= "PDC20268",
		.init_setup	= init_setup_pdcnew,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 1 */
		.name		= "PDC20269",
		.init_setup	= init_setup_pdcnew,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 2 */
		.name		= "PDC20270",
		.init_setup	= init_setup_pdc20270,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 3 */
		.name		= "PDC20271",
		.init_setup	= init_setup_pdcnew,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 4 */
		.name		= "PDC20275",
		.init_setup	= init_setup_pdcnew,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 5 */
		.name		= "PDC20276",
		.init_setup	= init_setup_pdc20276,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	},{	/* 6 */
		.name		= "PDC20277",
		.init_setup	= init_setup_pdcnew,
		.init_chipset	= init_chipset_pdcnew,
		.init_hwif	= init_hwif_pdc202new,
		.channels	= 2,
		.autodma	= AUTODMA,
		.bootable	= OFF_BOARD,
	}
};

/**
 *	pdc202new_init_one	-	called when a pdc202xx is found
 *	@dev: the pdc202new device
 *	@id: the matching pci id
 *
 *	Called when the PCI registration layer (or the IDE initialization)
 *	finds a device matching our IDE device tables.
 */
 
static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data];

	return d->init_setup(dev, d);
}

static struct pci_device_id pdc202new_pci_tbl[] = {
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20271, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20275, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20276, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20277, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl);

static struct pci_driver driver = {
	.name		= "Promise_IDE",
	.id_table	= pdc202new_pci_tbl,
	.probe		= pdc202new_init_one,
};

static int pdc202new_ide_init(void)
{
	return ide_pci_register_driver(&driver);
}

module_init(pdc202new_ide_init);

MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
MODULE_DESCRIPTION("PCI driver module for Promise PDC20268 and higher");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Promise TX2/TX4/TX2000/133 IDE driver
	3	*
	4	* This program is free software; you can redistribute it and/or
	5	* modify it under the terms of the GNU General Public License
	6	* as published by the Free Software Foundation; either version
	7	* 2 of the License, or (at your option) any later version.
	8	*
	9	* Split from:
	10	* linux/drivers/ide/pdc202xx.c Version 0.35 Mar. 30, 2002
	11	* Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
b10a0686	12	* Copyright (C) 2005-2006 MontaVista Software, Inc.
1da177e4 LT	13	* Portions Copyright (C) 1999 Promise Technology, Inc.
	14	* Author: Frank Tiernan (frankt@promise.com)
	15	* Released under terms of General Public License
	16	*/
	17
1da177e4 LT	18	#include <linux/module.h>
	19	#include <linux/types.h>
	20	#include <linux/kernel.h>
	21	#include <linux/delay.h>
	22	#include <linux/timer.h>
	23	#include <linux/mm.h>
	24	#include <linux/ioport.h>
	25	#include <linux/blkdev.h>
	26	#include <linux/hdreg.h>
	27	#include <linux/interrupt.h>
	28	#include <linux/pci.h>
	29	#include <linux/init.h>
	30	#include <linux/ide.h>
	31
	32	#include <asm/io.h>
	33	#include <asm/irq.h>
	34
	35	#ifdef CONFIG_PPC_PMAC
	36	#include <asm/prom.h>
	37	#include <asm/pci-bridge.h>
	38	#endif
	39
	40	#define PDC202_DEBUG_CABLE 0
	41
3c6bee1d	42	static const char *pdc_quirk_drives[] = {
1da177e4 LT	43	"QUANTUM FIREBALLlct08 08",
	44	"QUANTUM FIREBALLP KA6.4",
	45	"QUANTUM FIREBALLP KA9.1",
	46	"QUANTUM FIREBALLP LM20.4",
	47	"QUANTUM FIREBALLP KX13.6",
	48	"QUANTUM FIREBALLP KX20.5",
	49	"QUANTUM FIREBALLP KX27.3",
	50	"QUANTUM FIREBALLP LM20.5",
	51	NULL
	52	};
	53
	54	#define set_2regs(a, b) \
	55	do { \
	56	hwif->OUTB((a + adj), indexreg); \
	57	hwif->OUTB(b, datareg); \
	58	} while(0)
	59
	60	#define set_ultra(a, b, c) \
	61	do { \
	62	set_2regs(0x10,(a)); \
	63	set_2regs(0x11,(b)); \
	64	set_2regs(0x12,(c)); \
	65	} while(0)
	66
	67	#define set_ata2(a, b) \
	68	do { \
	69	set_2regs(0x0e,(a)); \
	70	set_2regs(0x0f,(b)); \
	71	} while(0)
	72
	73	#define set_pio(a, b, c) \
	74	do { \
	75	set_2regs(0x0c,(a)); \
	76	set_2regs(0x0d,(b)); \
	77	set_2regs(0x13,(c)); \
	78	} while(0)
	79
	80	static u8 pdcnew_ratemask (ide_drive_t *drive)
	81	{
	82	u8 mode;
	83
	84	switch(HWIF(drive)->pci_dev->device) {
	85	case PCI_DEVICE_ID_PROMISE_20277:
	86	case PCI_DEVICE_ID_PROMISE_20276:
	87	case PCI_DEVICE_ID_PROMISE_20275:
	88	case PCI_DEVICE_ID_PROMISE_20271:
	89	case PCI_DEVICE_ID_PROMISE_20269:
	90	mode = 4;
	91	break;
	92	case PCI_DEVICE_ID_PROMISE_20270:
	93	case PCI_DEVICE_ID_PROMISE_20268:
	94	mode = 3;
	95	break;
	96	default:
	97	return 0;
	98	}
	99	if (!eighty_ninty_three(drive))
	100	mode = min(mode, (u8)1);
	101	return mode;
	102	}
	103
	104	static int check_in_drive_lists (ide_drive_t drive, const char *list)
	105	{
	106	struct hd_driveid *id = drive->id;
107
108	if (pdc_quirk_drives == list) {
109	while (*list) {
110	if (strstr(id->model, *list++)) {
111	return 2;
112	}
113	}
114	} else {
115	while (*list) {
116	if (!strcmp(*list++,id->model)) {
117	return 1;
118	}
119	}
120	}
121	return 0;
122	}
123
124	static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
125	{
126	ide_hwif_t *hwif = HWIF(drive);
127	unsigned long indexreg = hwif->dma_vendor1;
128	unsigned long datareg = hwif->dma_vendor3;
129	u8 thold = 0x10;
130	u8 adj = (drive->dn%2) ? 0x08 : 0x00;
131	u8 speed = ide_rate_filter(pdcnew_ratemask(drive), xferspeed);
132
133	if (speed == XFER_UDMA_2) {
134	hwif->OUTB((thold + adj), indexreg);
135	hwif->OUTB((hwif->INB(datareg) & 0x7f), datareg);
136	}
137
138	switch (speed) {
139	case XFER_UDMA_7:
140	speed = XFER_UDMA_6;
141	case XFER_UDMA_6: set_ultra(0x1a, 0x01, 0xcb); break;
142	case XFER_UDMA_5: set_ultra(0x1a, 0x02, 0xcb); break;
143	case XFER_UDMA_4: set_ultra(0x1a, 0x03, 0xcd); break;
144	case XFER_UDMA_3: set_ultra(0x1a, 0x05, 0xcd); break;
145	case XFER_UDMA_2: set_ultra(0x2a, 0x07, 0xcd); break;
146	case XFER_UDMA_1: set_ultra(0x3a, 0x0a, 0xd0); break;
147	case XFER_UDMA_0: set_ultra(0x4a, 0x0f, 0xd5); break;
148	case XFER_MW_DMA_2: set_ata2(0x69, 0x25); break;
149	case XFER_MW_DMA_1: set_ata2(0x6b, 0x27); break;
150	case XFER_MW_DMA_0: set_ata2(0xdf, 0x5f); break;
151	case XFER_PIO_4: set_pio(0x23, 0x09, 0x25); break;
152	case XFER_PIO_3: set_pio(0x27, 0x0d, 0x35); break;
153	case XFER_PIO_2: set_pio(0x23, 0x26, 0x64); break;
154	case XFER_PIO_1: set_pio(0x46, 0x29, 0xa4); break;
155	case XFER_PIO_0: set_pio(0xfb, 0x2b, 0xac); break;
156	default:
157	;
158	}
159
160	return (ide_config_drive_speed(drive, speed));
161	}
162
163	/* 0 1 2 3 4 5 6 7 8
164	* 960, 480, 390, 300, 240, 180, 120, 90, 60
165	* 180, 150, 120, 90, 60
166	* DMA_Speed
167	* 180, 120, 90, 90, 90, 60, 30
168	* 11, 5, 4, 3, 2, 1, 0
169	*/
170	static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
171	{
b10a0686 SS	172	pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
b10a0686 SS	173	(void)pdcnew_new_tune_chipset(drive, XFER_PIO_0 + pio);
1da177e4 LT	174	}
	175
	176	static u8 pdcnew_new_cable_detect (ide_hwif_t *hwif)
	177	{
	178	hwif->OUTB(0x0b, hwif->dma_vendor1);
	179	return ((u8)((hwif->INB(hwif->dma_vendor3) & 0x04)));
	180	}
	181	static int config_chipset_for_dma (ide_drive_t *drive)
	182	{
	183	struct hd_driveid *id = drive->id;
	184	ide_hwif_t *hwif = HWIF(drive);
	185	u8 speed = -1;
	186	u8 cable;
	187
	188	u8 ultra_66 = ((id->dma_ultra & 0x0010) \|\|
	189	(id->dma_ultra & 0x0008)) ? 1 : 0;
	190
	191	cable = pdcnew_new_cable_detect(hwif);
	192
	193	if (ultra_66 && cable) {
	194	printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
	195	printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
	196	}
	197
	198	if (drive->media != ide_disk)
	199	return 0;
	200	if (id->capability & 4) { /* IORDY_EN & PREFETCH_EN */
	201	hwif->OUTB((0x13 + ((drive->dn%2) ? 0x08 : 0x00)), hwif->dma_vendor1);
	202	hwif->OUTB((hwif->INB(hwif->dma_vendor3)\|0x03), hwif->dma_vendor3);
	203	}
	204
	205	speed = ide_dma_speed(drive, pdcnew_ratemask(drive));
	206
b10a0686	207	if (!speed)
1da177e4	208	return 0;
1da177e4 LT	209
	210	(void) hwif->speedproc(drive, speed);
	211	return ide_dma_enable(drive);
	212	}
	213
	214	static int pdcnew_config_drive_xfer_rate (ide_drive_t *drive)
	215	{
	216	ide_hwif_t *hwif = HWIF(drive);
	217	struct hd_driveid *id = drive->id;
	218
	219	drive->init_speed = 0;
	220
	221	if (id && (id->capability & 1) && drive->autodma) {
	222
	223	if (ide_use_dma(drive)) {
	224	if (config_chipset_for_dma(drive))
	225	return hwif->ide_dma_on(drive);
	226	}
	227
	228	goto fast_ata_pio;
	229
	230	} else if ((id->capability & 8) \|\| (id->field_valid & 2)) {
	231	fast_ata_pio:
b10a0686	232	hwif->tuneproc(drive, 255);
1da177e4 LT	233	return hwif->ide_dma_off_quietly(drive);
	234	}
	235	/* IORDY not supported */
	236	return 0;
	237	}
	238
	239	static int pdcnew_quirkproc (ide_drive_t *drive)
	240	{
	241	return ((int) check_in_drive_lists(drive, pdc_quirk_drives));
	242	}
	243
	244	static int pdcnew_ide_dma_lostirq(ide_drive_t *drive)
	245	{
	246	if (HWIF(drive)->resetproc != NULL)
	247	HWIF(drive)->resetproc(drive);
	248	return __ide_dma_lostirq(drive);
	249	}
	250
	251	static int pdcnew_ide_dma_timeout(ide_drive_t *drive)
	252	{
	253	if (HWIF(drive)->resetproc != NULL)
	254	HWIF(drive)->resetproc(drive);
	255	return __ide_dma_timeout(drive);
	256	}
	257
	258	static void pdcnew_new_reset (ide_drive_t *drive)
	259	{
	260	/*
	261	* Deleted this because it is redundant from the caller.
	262	*/
	263	printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
	264	HWIF(drive)->channel ? "Secondary" : "Primary");
	265	}
	266
	267	#ifdef CONFIG_PPC_PMAC
	268	static void __devinit apple_kiwi_init(struct pci_dev *pdev)
	269	{
	270	struct device_node *np = pci_device_to_OF_node(pdev);
	271	unsigned int class_rev = 0;
	272	void __iomem *mmio;
	273	u8 conf;
	274
	275	if (np == NULL \|\| !device_is_compatible(np, "kiwi-root"))
	276	return;
	277
	278	pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
	279	class_rev &= 0xff;
	280
	281	if (class_rev >= 0x03) {
	282	/* Setup chip magic config stuff (from darwin) */
	283	pci_read_config_byte(pdev, 0x40, &conf);
	284	pci_write_config_byte(pdev, 0x40, conf \| 0x01);
	285	}
	286	mmio = ioremap(pci_resource_start(pdev, 5),
	287	pci_resource_len(pdev, 5));
	288
	289	/* Setup some PLL stuffs */
	290	switch (pdev->device) {
	291	case PCI_DEVICE_ID_PROMISE_20270:
	292	writew(0x0d2b, mmio + 0x1202);
	293	mdelay(30);
	294	break;
	295	case PCI_DEVICE_ID_PROMISE_20271:
	296	writew(0x0826, mmio + 0x1202);
297	mdelay(30);
298	break;
299	}
300
301	iounmap(mmio);
302	}
303	#endif /* CONFIG_PPC_PMAC */
304
305	static unsigned int __devinit init_chipset_pdcnew(struct pci_dev dev, const char name)
306	{
307	if (dev->resource[PCI_ROM_RESOURCE].start) {
308	pci_write_config_dword(dev, PCI_ROM_ADDRESS,
309	dev->resource[PCI_ROM_RESOURCE].start \| PCI_ROM_ADDRESS_ENABLE);
08f46de9 GKH	310	printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n", name,
08f46de9 GKH	311	(unsigned long)dev->resource[PCI_ROM_RESOURCE].start);
1da177e4 LT	312	}
	313
	314	#ifdef CONFIG_PPC_PMAC
	315	apple_kiwi_init(dev);
	316	#endif
	317
	318	return dev->irq;
	319	}
	320
	321	static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
	322	{
	323	hwif->autodma = 0;
	324
	325	hwif->tuneproc = &pdcnew_tune_drive;
	326	hwif->quirkproc = &pdcnew_quirkproc;
	327	hwif->speedproc = &pdcnew_new_tune_chipset;
	328	hwif->resetproc = &pdcnew_new_reset;
	329
	330	hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
	331
	332	hwif->ultra_mask = 0x7f;
	333	hwif->mwdma_mask = 0x07;
	334
3706a872 AC	335	hwif->err_stops_fifo = 1;
3706a872 AC	336
1da177e4 LT	337	hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
	338	hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq;
	339	hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout;
	340	if (!(hwif->udma_four))
	341	hwif->udma_four = (pdcnew_new_cable_detect(hwif)) ? 0 : 1;
	342	if (!noautodma)
	343	hwif->autodma = 1;
	344	hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
	345	#if PDC202_DEBUG_CABLE
	346	printk(KERN_DEBUG "%s: %s-pin cable\n",
	347	hwif->name, hwif->udma_four ? "80" : "40");
	348	#endif /* PDC202_DEBUG_CABLE */
	349	}
	350
	351	static int __devinit init_setup_pdcnew(struct pci_dev dev, ide_pci_device_t d)
	352	{
	353	return ide_setup_pci_device(dev, d);
	354	}
	355
	356	static int __devinit init_setup_pdc20270(struct pci_dev *dev,
	357	ide_pci_device_t *d)
	358	{
	359	struct pci_dev *findev = NULL;
b1489009	360	int ret;
1da177e4 LT	361
	362	if ((dev->bus->self &&
	363	dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
	364	(dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
	365	if (PCI_SLOT(dev->devfn) & 2)
	366	return -ENODEV;
	367	d->extra = 0;
b1489009	368	while ((findev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
1da177e4 LT	369	if ((findev->vendor == dev->vendor) &&
	370	(findev->device == dev->device) &&
	371	(PCI_SLOT(findev->devfn) & 2)) {
	372	if (findev->irq != dev->irq) {
	373	findev->irq = dev->irq;
	374	}
b1489009 AC	375	ret = ide_setup_pci_devices(dev, findev, d);
	376	pci_dev_put(findev);
	377	return ret;
1da177e4 LT	378	}
	379	}
	380	}
	381	return ide_setup_pci_device(dev, d);
	382	}
	383
	384	static int __devinit init_setup_pdc20276(struct pci_dev *dev,
	385	ide_pci_device_t *d)
	386	{
	387	if ((dev->bus->self) &&
	388	(dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
	389	((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) \|\|
	390	(dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
	391	printk(KERN_INFO "ide: Skipping Promise PDC20276 "
	392	"attached to I2O RAID controller.\n");
	393	return -ENODEV;
	394	}
	395	return ide_setup_pci_device(dev, d);
	396	}
	397
	398	static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
	399	{ /* 0 */
	400	.name = "PDC20268",
	401	.init_setup = init_setup_pdcnew,
	402	.init_chipset = init_chipset_pdcnew,
	403	.init_hwif = init_hwif_pdc202new,
	404	.channels = 2,
	405	.autodma = AUTODMA,
	406	.bootable = OFF_BOARD,
	407	},{ /* 1 */
	408	.name = "PDC20269",
	409	.init_setup = init_setup_pdcnew,
	410	.init_chipset = init_chipset_pdcnew,
	411	.init_hwif = init_hwif_pdc202new,
	412	.channels = 2,
	413	.autodma = AUTODMA,
	414	.bootable = OFF_BOARD,
	415	},{ /* 2 */
	416	.name = "PDC20270",
	417	.init_setup = init_setup_pdc20270,
	418	.init_chipset = init_chipset_pdcnew,
	419	.init_hwif = init_hwif_pdc202new,
	420	.channels = 2,
	421	.autodma = AUTODMA,
1da177e4 LT	422	.bootable = OFF_BOARD,
	423	},{ /* 3 */
	424	.name = "PDC20271",
	425	.init_setup = init_setup_pdcnew,
	426	.init_chipset = init_chipset_pdcnew,
	427	.init_hwif = init_hwif_pdc202new,
	428	.channels = 2,
	429	.autodma = AUTODMA,
	430	.bootable = OFF_BOARD,
	431	},{ /* 4 */
	432	.name = "PDC20275",
	433	.init_setup = init_setup_pdcnew,
	434	.init_chipset = init_chipset_pdcnew,
	435	.init_hwif = init_hwif_pdc202new,
	436	.channels = 2,
	437	.autodma = AUTODMA,
	438	.bootable = OFF_BOARD,
	439	},{ /* 5 */
	440	.name = "PDC20276",
	441	.init_setup = init_setup_pdc20276,
	442	.init_chipset = init_chipset_pdcnew,
	443	.init_hwif = init_hwif_pdc202new,
	444	.channels = 2,
	445	.autodma = AUTODMA,
1da177e4 LT	446	.bootable = OFF_BOARD,
	447	},{ /* 6 */
	448	.name = "PDC20277",
	449	.init_setup = init_setup_pdcnew,
	450	.init_chipset = init_chipset_pdcnew,
	451	.init_hwif = init_hwif_pdc202new,
	452	.channels = 2,
	453	.autodma = AUTODMA,
	454	.bootable = OFF_BOARD,
	455	}
	456	};
	457
	458	/**
	459	* pdc202new_init_one - called when a pdc202xx is found
	460	* @dev: the pdc202new device
	461	* @id: the matching pci id
	462	*
	463	* Called when the PCI registration layer (or the IDE initialization)
	464	* finds a device matching our IDE device tables.
	465	*/
	466
	467	static int __devinit pdc202new_init_one(struct pci_dev dev, const struct pci_device_id id)
	468	{
	469	ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data];
	470
	471	return d->init_setup(dev, d);
	472	}
	473
	474	static struct pci_device_id pdc202new_pci_tbl[] = {
	475	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
	476	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
	477	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
	478	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20271, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
	479	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20275, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
	480	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20276, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
	481	{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20277, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
	482	{ 0, },
	483	};
	484	MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl);
	485
	486	static struct pci_driver driver = {
	487	.name = "Promise_IDE",
	488	.id_table = pdc202new_pci_tbl,
	489	.probe = pdc202new_init_one,
	490	};
	491
	492	static int pdc202new_ide_init(void)
	493	{
	494	return ide_pci_register_driver(&driver);
	495	}
	496
	497	module_init(pdc202new_ide_init);
	498
	499	MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
	500	MODULE_DESCRIPTION("PCI driver module for Promise PDC20268 and higher");
	501	MODULE_LICENSE("GPL");