[mirror_ubuntu-bionic-kernel.git] / drivers / ide / qd65xx.c

/*
 *  Copyright (C) 1996-2001  Linus Torvalds & author (see below)
 */

/*
 *  Version 0.03	Cleaned auto-tune, added probe
 *  Version 0.04	Added second channel tuning
 *  Version 0.05	Enhanced tuning ; added qd6500 support
 *  Version 0.06	Added dos driver's list
 *  Version 0.07	Second channel bug fix 
 *
 * QDI QD6500/QD6580 EIDE controller fast support
 *
 * To activate controller support, use "ide0=qd65xx"
 */

/*
 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
 * Samuel Thibault <samuel.thibault@ens-lyon.org>
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/timer.h>
#include <linux/mm.h>
#include <linux/ioport.h>
#include <linux/blkdev.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <asm/io.h>

#define DRV_NAME "qd65xx"

#include "qd65xx.h"

/*
 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
 *            or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
 *	-- qd6500 is a single IDE interface
 *	-- qd6580 is a dual IDE interface
 *
 * More research on qd6580 being done by willmore@cig.mot.com (David)
 * More Information given by Petr Soucek (petr@ryston.cz)
 * http://www.ryston.cz/petr/vlb
 */

/*
 * base: Timer1
 *
 *
 * base+0x01: Config (R/O)
 *
 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
 * bit 3: qd6500: 1 = disabled, 0 = enabled
 *        qd6580: 1
 * upper nibble:
 *        qd6500: 1100
 *        qd6580: either 1010 or 0101
 *
 *
 * base+0x02: Timer2 (qd6580 only)
 *
 *
 * base+0x03: Control (qd6580 only)
 *
 * bits 0-3 must always be set 1
 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
 *         0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
 *                                                   channel 1 for hdc & hdd
 * bit 1 : 1 = only disks on primary port
 *         0 = disks & ATAPI devices on primary port
 * bit 2-4 : always 0
 * bit 5 : status, but of what ?
 * bit 6 : always set 1 by dos driver
 * bit 7 : set 1 for non-ATAPI devices on primary port
 *	(maybe read-ahead and post-write buffer ?)
 */

static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */

/*
 * qd65xx_select:
 *
 * This routine is invoked to prepare for access to a given drive.
 */

static void qd65xx_dev_select(ide_drive_t *drive)
{
	u8 index = ((	(QD_TIMREG(drive)) & 0x80 ) >> 7) |
			(QD_TIMREG(drive) & 0x02);

	if (timings[index] != QD_TIMING(drive))
		outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));

	outb(drive->select | ATA_DEVICE_OBS, drive->hwif->io_ports.device_addr);
}

/*
 * qd6500_compute_timing
 *
 * computes the timing value where
 *	lower nibble represents active time,   in count of VLB clocks
 *	upper nibble represents recovery time, in count of VLB clocks
 */

static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
{
	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
	u8 act_cyc, rec_cyc;

	if (clk <= 33) {
		act_cyc =  9 - IDE_IN(active_time   * clk / 1000 + 1, 2,  9);
		rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
	} else {
		act_cyc =  8 - IDE_IN(active_time   * clk / 1000 + 1, 1,  8);
		rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
	}

	return (rec_cyc << 4) | 0x08 | act_cyc;
}

/*
 * qd6580_compute_timing
 *
 * idem for qd6580
 */

static u8 qd6580_compute_timing (int active_time, int recovery_time)
{
	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
	u8 act_cyc, rec_cyc;

	act_cyc = 17 - IDE_IN(active_time   * clk / 1000 + 1, 2, 17);
	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);

	return (rec_cyc << 4) | act_cyc;
}

/*
 * qd_find_disk_type
 *
 * tries to find timing from dos driver's table
 */

static int qd_find_disk_type (ide_drive_t *drive,
		int *active_time, int *recovery_time)
{
	struct qd65xx_timing_s *p;
	char *m = (char *)&drive->id[ATA_ID_PROD];
	char model[ATA_ID_PROD_LEN];

	if (*m == 0)
		return 0;

	strncpy(model, m, ATA_ID_PROD_LEN);
	ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */

	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
		if (!strncmp(p->model, model+p->offset, 4)) {
			printk(KERN_DEBUG "%s: listed !\n", drive->name);
			*active_time = p->active;
			*recovery_time = p->recovery;
			return 1;
		}
	}
	return 0;
}

/*
 * qd_set_timing:
 *
 * records the timing
 */

static void qd_set_timing (ide_drive_t *drive, u8 timing)
{
	unsigned long data = (unsigned long)ide_get_drivedata(drive);

	data &= 0xff00;
	data |= timing;
	ide_set_drivedata(drive, (void *)data);

	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
}

static void qd6500_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
	u16 *id = drive->id;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */

	/* FIXME: use drive->pio_mode value */
	if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
	    (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
	    id[ATA_ID_EIDE_PIO] >= 240) {
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
			id[ATA_ID_OLD_PIO_MODES] & 0xff);
		active_time = 110;
		recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
	}

	qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
				active_time, recovery_time));
}

static void qd6580_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
	const u8 pio = drive->pio_mode - XFER_PIO_0;
	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	unsigned int cycle_time;
	int active_time   = 175;
	int recovery_time = 415; /* worst case values from the dos driver */
	u8 base = (hwif->config_data & 0xff00) >> 8;

	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
		cycle_time = ide_pio_cycle_time(drive, pio);

		switch (pio) {
			case 0: break;
			case 3:
				if (cycle_time >= 110) {
					active_time = 86;
					recovery_time = cycle_time - 102;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			case 4:
				if (cycle_time >= 69) {
					active_time = 70;
					recovery_time = cycle_time - 61;
				} else
					printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
				break;
			default:
				if (cycle_time >= 180) {
					active_time = 110;
					recovery_time = cycle_time - 120;
				} else {
					active_time = t->active;
					recovery_time = cycle_time - active_time;
				}
		}
		printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	}

	if (!hwif->channel && drive->media != ide_disk) {
		outb(0x5f, QD_CONTROL_PORT);
		printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
			"and post-write buffer on %s.\n",
			drive->name, hwif->name);
	}

	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
}

/*
 * qd_testreg
 *
 * tests if the given port is a register
 */

static int __init qd_testreg(int port)
{
	unsigned long flags;
	u8 savereg, readreg;

	local_irq_save(flags);
	savereg = inb_p(port);
	outb_p(QD_TESTVAL, port);	/* safe value */
	readreg = inb_p(port);
	outb(savereg, port);
	local_irq_restore(flags);

	if (savereg == QD_TESTVAL) {
		printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
		printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
		printk(KERN_ERR "Assuming qd65xx is not present.\n");
		return 1;
	}

	return (readreg != QD_TESTVAL);
}

static void __init qd6500_init_dev(ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;
	u8 base = (hwif->config_data & 0xff00) >> 8;
	u8 config = QD_CONFIG(hwif);

	ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
}

static void __init qd6580_init_dev(ide_drive_t *drive)
{
	ide_hwif_t *hwif = drive->hwif;
	u16 t1, t2;
	u8 base = (hwif->config_data & 0xff00) >> 8;
	u8 config = QD_CONFIG(hwif);

	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
		t1 = QD6580_DEF_DATA;
		t2 = QD6580_DEF_DATA2;
	} else
		t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;

	ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
}

static const struct ide_tp_ops qd65xx_tp_ops = {
	.exec_command		= ide_exec_command,
	.read_status		= ide_read_status,
	.read_altstatus		= ide_read_altstatus,
	.write_devctl		= ide_write_devctl,

	.dev_select		= qd65xx_dev_select,
	.tf_load		= ide_tf_load,
	.tf_read		= ide_tf_read,

	.input_data		= ide_input_data,
	.output_data		= ide_output_data,
};

static const struct ide_port_ops qd6500_port_ops = {
	.init_dev		= qd6500_init_dev,
	.set_pio_mode		= qd6500_set_pio_mode,
};

static const struct ide_port_ops qd6580_port_ops = {
	.init_dev		= qd6580_init_dev,
	.set_pio_mode		= qd6580_set_pio_mode,
};

static const struct ide_port_info qd65xx_port_info __initconst = {
	.name			= DRV_NAME,
	.tp_ops 		= &qd65xx_tp_ops,
	.chipset		= ide_qd65xx,
	.host_flags		= IDE_HFLAG_IO_32BIT |
				  IDE_HFLAG_NO_DMA,
	.pio_mask		= ATA_PIO4,
};

/*
 * qd_probe:
 *
 * looks at the specified baseport, and if qd found, registers & initialises it
 * return 1 if another qd may be probed
 */

static int __init qd_probe(int base)
{
	int rc;
	u8 config, unit, control;
	struct ide_port_info d = qd65xx_port_info;

	config = inb(QD_CONFIG_PORT);

	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
		return -ENODEV;

	unit = ! (config & QD_CONFIG_IDE_BASEPORT);

	if (unit)
		d.host_flags |= IDE_HFLAG_QD_2ND_PORT;

	switch (config & 0xf0) {
	case QD_CONFIG_QD6500:
		if (qd_testreg(base))
			 return -ENODEV;	/* bad register */

		if (config & QD_CONFIG_DISABLED) {
			printk(KERN_WARNING "qd6500 is disabled !\n");
			return -ENODEV;
		}

		printk(KERN_NOTICE "qd6500 at %#x\n", base);
		printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
			config, QD_ID3);

		d.port_ops = &qd6500_port_ops;
		d.host_flags |= IDE_HFLAG_SINGLE;
		break;
	case QD_CONFIG_QD6580_A:
	case QD_CONFIG_QD6580_B:
		if (qd_testreg(base) || qd_testreg(base + 0x02))
			return -ENODEV;	/* bad registers */

		control = inb(QD_CONTROL_PORT);

		printk(KERN_NOTICE "qd6580 at %#x\n", base);
		printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
			config, control, QD_ID3);

		outb(QD_DEF_CONTR, QD_CONTROL_PORT);

		d.port_ops = &qd6580_port_ops;
		if (control & QD_CONTR_SEC_DISABLED)
			d.host_flags |= IDE_HFLAG_SINGLE;

		printk(KERN_INFO "qd6580: %s IDE board\n",
			(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
		break;
	default:
		return -ENODEV;
	}

	rc = ide_legacy_device_add(&d, (base << 8) | config);

	if (d.host_flags & IDE_HFLAG_SINGLE)
		return (rc == 0) ? 1 : rc;

	return rc;
}

static bool probe_qd65xx;

module_param_named(probe, probe_qd65xx, bool, 0);
MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");

static int __init qd65xx_init(void)
{
	int rc1, rc2 = -ENODEV;

	if (probe_qd65xx == 0)
		return -ENODEV;

	rc1 = qd_probe(0x30);
	if (rc1)
		rc2 = qd_probe(0xb0);

	if (rc1 < 0 && rc2 < 0)
		return -ENODEV;

	return 0;
}

module_init(qd65xx_init);

MODULE_AUTHOR("Samuel Thibault");
MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4	1	/*
1da177e4 LT	2	* Copyright (C) 1996-2001 Linus Torvalds & author (see below)
	3	*/
	4
	5	/*
	6	* Version 0.03 Cleaned auto-tune, added probe
	7	* Version 0.04 Added second channel tuning
	8	* Version 0.05 Enhanced tuning ; added qd6500 support
	9	* Version 0.06 Added dos driver's list
	10	* Version 0.07 Second channel bug fix
	11	*
	12	* QDI QD6500/QD6580 EIDE controller fast support
	13	*
1da177e4	14	* To activate controller support, use "ide0=qd65xx"
1da177e4 LT	15	*/
	16
	17	/*
	18	* Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
51935355	19	* Samuel Thibault <samuel.thibault@ens-lyon.org>
1da177e4 LT	20	*/
1da177e4 LT	21
1da177e4	22	#include <linux/module.h>
1da177e4 LT	23	#include <linux/types.h>
	24	#include <linux/kernel.h>
	25	#include <linux/delay.h>
	26	#include <linux/timer.h>
	27	#include <linux/mm.h>
	28	#include <linux/ioport.h>
	29	#include <linux/blkdev.h>
1da177e4 LT	30	#include <linux/ide.h>
1da177e4 LT	31	#include <linux/init.h>
1da177e4 LT	32	#include <asm/io.h>
1da177e4 LT	33
d92f1a28 BZ	34	#define DRV_NAME "qd65xx"
d92f1a28 BZ	35
1da177e4 LT	36	#include "qd65xx.h"
	37
	38	/*
	39	* I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
	40	* or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
	41	* -- qd6500 is a single IDE interface
	42	* -- qd6580 is a dual IDE interface
	43	*
	44	* More research on qd6580 being done by willmore@cig.mot.com (David)
	45	* More Information given by Petr Soucek (petr@ryston.cz)
	46	* http://www.ryston.cz/petr/vlb
	47	*/
	48
	49	/*
	50	* base: Timer1
	51	*
	52	*
	53	* base+0x01: Config (R/O)
	54	*
	55	* bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
	56	* bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
	57	* bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
	58	* bit 3: qd6500: 1 = disabled, 0 = enabled
	59	* qd6580: 1
	60	* upper nibble:
	61	* qd6500: 1100
	62	* qd6580: either 1010 or 0101
	63	*
	64	*
	65	* base+0x02: Timer2 (qd6580 only)
	66	*
	67	*
	68	* base+0x03: Control (qd6580 only)
	69	*
	70	* bits 0-3 must always be set 1
	71	* bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
	72	* bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
	73	* 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
	74	* channel 1 for hdc & hdd
	75	* bit 1 : 1 = only disks on primary port
	76	* 0 = disks & ATAPI devices on primary port
	77	* bit 2-4 : always 0
	78	* bit 5 : status, but of what ?
	79	* bit 6 : always set 1 by dos driver
	80	* bit 7 : set 1 for non-ATAPI devices on primary port
	81	* (maybe read-ahead and post-write buffer ?)
	82	*/
	83
	84	static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
	85
1da177e4	86	/*
d07616f1	87	* qd65xx_select:
1da177e4	88	*
d07616f1	89	* This routine is invoked to prepare for access to a given drive.
1da177e4 LT	90	*/
1da177e4 LT	91
abb596b2	92	static void qd65xx_dev_select(ide_drive_t *drive)
1da177e4 LT	93	{
	94	u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) \|
	95	(QD_TIMREG(drive) & 0x02);
	96
	97	if (timings[index] != QD_TIMING(drive))
c196567a	98	outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
abb596b2 SS	99
abb596b2 SS	100	outb(drive->select \| ATA_DEVICE_OBS, drive->hwif->io_ports.device_addr);
1da177e4 LT	101	}
	102
	103	/*
	104	* qd6500_compute_timing
	105	*
	106	* computes the timing value where
	107	* lower nibble represents active time, in count of VLB clocks
	108	* upper nibble represents recovery time, in count of VLB clocks
	109	*/
	110
	111	static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
	112	{
30e5ee4d	113	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
ebae41a5	114	u8 act_cyc, rec_cyc;
1da177e4	115
ebae41a5 BZ	116	if (clk <= 33) {
	117	act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
	118	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
1da177e4	119	} else {
ebae41a5 BZ	120	act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
ebae41a5 BZ	121	rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
1da177e4 LT	122	}
1da177e4 LT	123
ebae41a5	124	return (rec_cyc << 4) \| 0x08 \| act_cyc;
1da177e4 LT	125	}
	126
	127	/*
	128	* qd6580_compute_timing
	129	*
	130	* idem for qd6580
	131	*/
	132
	133	static u8 qd6580_compute_timing (int active_time, int recovery_time)
	134	{
30e5ee4d	135	int clk = ide_vlb_clk ? ide_vlb_clk : 50;
ebae41a5	136	u8 act_cyc, rec_cyc;
1da177e4	137
ebae41a5 BZ	138	act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
	139	rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
	140
	141	return (rec_cyc << 4) \| act_cyc;
1da177e4 LT	142	}
	143
	144	/*
	145	* qd_find_disk_type
	146	*
	147	* tries to find timing from dos driver's table
	148	*/
	149
	150	static int qd_find_disk_type (ide_drive_t *drive,
	151	int active_time, int recovery_time)
	152	{
	153	struct qd65xx_timing_s *p;
4dde4492 BZ	154	char m = (char )&drive->id[ATA_ID_PROD];
4dde4492 BZ	155	char model[ATA_ID_PROD_LEN];
1da177e4	156
4dde4492 BZ	157	if (*m == 0)
4dde4492 BZ	158	return 0;
1da177e4	159
4dde4492 BZ	160	strncpy(model, m, ATA_ID_PROD_LEN);
4dde4492 BZ	161	ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
1da177e4 LT	162
	163	for (p = qd65xx_timing ; p->offset != -1 ; p++) {
	164	if (!strncmp(p->model, model+p->offset, 4)) {
	165	printk(KERN_DEBUG "%s: listed !\n", drive->name);
	166	*active_time = p->active;
	167	*recovery_time = p->recovery;
	168	return 1;
	169	}
	170	}
	171	return 0;
	172	}
	173
1da177e4 LT	174	/*
	175	* qd_set_timing:
	176	*
d07616f1	177	* records the timing
1da177e4 LT	178	*/
	179
	180	static void qd_set_timing (ide_drive_t *drive, u8 timing)
	181	{
5bfb151f JR	182	unsigned long data = (unsigned long)ide_get_drivedata(drive);
	183
	184	data &= 0xff00;
	185	data \|= timing;
	186	ide_set_drivedata(drive, (void *)data);
1da177e4 LT	187
	188	printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
	189	}
	190
e085b3ca	191	static void qd6500_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
1da177e4	192	{
4dde4492	193	u16 *id = drive->id;
1da177e4 LT	194	int active_time = 175;
	195	int recovery_time = 415; /* worst case values from the dos driver */
	196
e085b3ca	197	/* FIXME: use drive->pio_mode value */
4dde4492	198	if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
48fb2688	199	(id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
4dde4492	200	id[ATA_ID_EIDE_PIO] >= 240) {
1da177e4	201	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
48fb2688	202	id[ATA_ID_OLD_PIO_MODES] & 0xff);
1da177e4	203	active_time = 110;
4dde4492	204	recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
1da177e4 LT	205	}
1da177e4 LT	206
898ec223 BZ	207	qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
898ec223 BZ	208	active_time, recovery_time));
1da177e4 LT	209	}
1da177e4 LT	210
e085b3ca	211	static void qd6580_set_pio_mode(ide_hwif_t hwif, ide_drive_t drive)
1da177e4	212	{
e085b3ca	213	const u8 pio = drive->pio_mode - XFER_PIO_0;
2feecfac	214	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
7dd00083	215	unsigned int cycle_time;
1da177e4 LT	216	int active_time = 175;
1da177e4 LT	217	int recovery_time = 415; /* worst case values from the dos driver */
79472b6e	218	u8 base = (hwif->config_data & 0xff00) >> 8;
1da177e4 LT	219
1da177e4 LT	220	if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
7dd00083	221	cycle_time = ide_pio_cycle_time(drive, pio);
1da177e4 LT	222
	223	switch (pio) {
	224	case 0: break;
	225	case 3:
7dd00083	226	if (cycle_time >= 110) {
1da177e4	227	active_time = 86;
7dd00083	228	recovery_time = cycle_time - 102;
1da177e4 LT	229	} else
	230	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	231	break;
	232	case 4:
7dd00083	233	if (cycle_time >= 69) {
1da177e4	234	active_time = 70;
7dd00083	235	recovery_time = cycle_time - 61;
1da177e4 LT	236	} else
	237	printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
	238	break;
	239	default:
7dd00083	240	if (cycle_time >= 180) {
1da177e4	241	active_time = 110;
7dd00083	242	recovery_time = cycle_time - 120;
1da177e4	243	} else {
2feecfac	244	active_time = t->active;
7dd00083	245	recovery_time = cycle_time - active_time;
1da177e4 LT	246	}
	247	}
	248	printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
	249	}
	250
898ec223	251	if (!hwif->channel && drive->media != ide_disk) {
c196567a	252	outb(0x5f, QD_CONTROL_PORT);
1da177e4 LT	253	printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
1da177e4 LT	254	"and post-write buffer on %s.\n",
898ec223	255	drive->name, hwif->name);
1da177e4 LT	256	}
	257
	258	qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
	259	}
	260
	261	/*
	262	* qd_testreg
	263	*
	264	* tests if the given port is a register
	265	*/
	266
	267	static int __init qd_testreg(int port)
	268	{
1da177e4	269	unsigned long flags;
f949820d	270	u8 savereg, readreg;
1da177e4	271
c196567a	272	local_irq_save(flags);
1da177e4 LT	273	savereg = inb_p(port);
	274	outb_p(QD_TESTVAL, port); /* safe value */
	275	readreg = inb_p(port);
	276	outb(savereg, port);
c196567a	277	local_irq_restore(flags);
1da177e4 LT	278
	279	if (savereg == QD_TESTVAL) {
	280	printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
	281	printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
	282	printk(KERN_ERR "Assuming qd65xx is not present.\n");
	283	return 1;
	284	}
	285
	286	return (readreg != QD_TESTVAL);
	287	}
	288
e6d95bd1	289	static void __init qd6500_init_dev(ide_drive_t *drive)
1f2cf8b0	290	{
e6d95bd1	291	ide_hwif_t *hwif = drive->hwif;
79472b6e BZ	292	u8 base = (hwif->config_data & 0xff00) >> 8;
79472b6e BZ	293	u8 config = QD_CONFIG(hwif);
1f2cf8b0	294
5bfb151f	295	ide_set_drivedata(drive, (void *)QD6500_DEF_DATA);
1f2cf8b0 BZ	296	}
1f2cf8b0 BZ	297
e6d95bd1	298	static void __init qd6580_init_dev(ide_drive_t *drive)
1f2cf8b0	299	{
e6d95bd1	300	ide_hwif_t *hwif = drive->hwif;
1f2cf8b0	301	u16 t1, t2;
79472b6e BZ	302	u8 base = (hwif->config_data & 0xff00) >> 8;
79472b6e BZ	303	u8 config = QD_CONFIG(hwif);
1f2cf8b0	304
79472b6e	305	if (hwif->host_flags & IDE_HFLAG_SINGLE) {
1f2cf8b0 BZ	306	t1 = QD6580_DEF_DATA;
	307	t2 = QD6580_DEF_DATA2;
	308	} else
	309	t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
	310
5bfb151f	311	ide_set_drivedata(drive, (void *)((drive->dn & 1) ? t2 : t1));
1da177e4 LT	312	}
1da177e4 LT	313
abb596b2 SS	314	static const struct ide_tp_ops qd65xx_tp_ops = {
	315	.exec_command = ide_exec_command,
	316	.read_status = ide_read_status,
	317	.read_altstatus = ide_read_altstatus,
	318	.write_devctl = ide_write_devctl,
	319
	320	.dev_select = qd65xx_dev_select,
	321	.tf_load = ide_tf_load,
	322	.tf_read = ide_tf_read,
	323
	324	.input_data = ide_input_data,
	325	.output_data = ide_output_data,
	326	};
	327
ac95beed	328	static const struct ide_port_ops qd6500_port_ops = {
e6d95bd1	329	.init_dev = qd6500_init_dev,
ac95beed	330	.set_pio_mode = qd6500_set_pio_mode,
ac95beed BZ	331	};
	332
	333	static const struct ide_port_ops qd6580_port_ops = {
e6d95bd1	334	.init_dev = qd6580_init_dev,
ac95beed	335	.set_pio_mode = qd6580_set_pio_mode,
ac95beed BZ	336	};
ac95beed BZ	337
e6b53703	338	static const struct ide_port_info qd65xx_port_info __initconst = {
d92f1a28	339	.name = DRV_NAME,
abb596b2	340	.tp_ops = &qd65xx_tp_ops,
c413b9b9 BZ	341	.chipset = ide_qd65xx,
c413b9b9 BZ	342	.host_flags = IDE_HFLAG_IO_32BIT \|
0d28ec7f	343	IDE_HFLAG_NO_DMA,
c413b9b9 BZ	344	.pio_mask = ATA_PIO4,
	345	};
	346
1da177e4 LT	347	/*
	348	* qd_probe:
	349	*
	350	* looks at the specified baseport, and if qd found, registers & initialises it
	351	* return 1 if another qd may be probed
	352	*/
	353
	354	static int __init qd_probe(int base)
	355	{
0bfeee7d	356	int rc;
7a2199f3	357	u8 config, unit, control;
e277f91f	358	struct ide_port_info d = qd65xx_port_info;
1da177e4	359
c196567a	360	config = inb(QD_CONFIG_PORT);
1da177e4 LT	361
1da177e4 LT	362	if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
7daf66dd	363	return -ENODEV;
1da177e4 LT	364
	365	unit = ! (config & QD_CONFIG_IDE_BASEPORT);
	366
e277f91f BZ	367	if (unit)
	368	d.host_flags \|= IDE_HFLAG_QD_2ND_PORT;
	369
7a2199f3 BZ	370	switch (config & 0xf0) {
7a2199f3 BZ	371	case QD_CONFIG_QD6500:
7daf66dd BZ	372	if (qd_testreg(base))
7daf66dd BZ	373	return -ENODEV; /* bad register */
1da177e4	374
1da177e4 LT	375	if (config & QD_CONFIG_DISABLED) {
1da177e4 LT	376	printk(KERN_WARNING "qd6500 is disabled !\n");
7daf66dd	377	return -ENODEV;
1da177e4 LT	378	}
1da177e4 LT	379
e277f91f BZ	380	printk(KERN_NOTICE "qd6500 at %#x\n", base);
	381	printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
	382	config, QD_ID3);
	383
ac95beed	384	d.port_ops = &qd6500_port_ops;
79472b6e	385	d.host_flags \|= IDE_HFLAG_SINGLE;
7a2199f3 BZ	386	break;
	387	case QD_CONFIG_QD6580_A:
	388	case QD_CONFIG_QD6580_B:
7daf66dd BZ	389	if (qd_testreg(base) \|\| qd_testreg(base + 0x02))
7daf66dd BZ	390	return -ENODEV; /* bad registers */
1da177e4	391
c196567a	392	control = inb(QD_CONTROL_PORT);
1da177e4 LT	393
	394	printk(KERN_NOTICE "qd6580 at %#x\n", base);
	395	printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
	396	config, control, QD_ID3);
	397
788d6697 BZ	398	outb(QD_DEF_CONTR, QD_CONTROL_PORT);
788d6697 BZ	399
ac95beed	400	d.port_ops = &qd6580_port_ops;
7a2199f3	401	if (control & QD_CONTR_SEC_DISABLED)
79472b6e BZ	402	d.host_flags \|= IDE_HFLAG_SINGLE;
79472b6e BZ	403
7a2199f3 BZ	404	printk(KERN_INFO "qd6580: %s IDE board\n",
	405	(control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
	406	break;
	407	default:
	408	return -ENODEV;
	409	}
26bcb879	410
7a2199f3	411	rc = ide_legacy_device_add(&d, (base << 8) \| config);
e277f91f	412
7a2199f3 BZ	413	if (d.host_flags & IDE_HFLAG_SINGLE)
7a2199f3 BZ	414	return (rc == 0) ? 1 : rc;
1da177e4	415
7a2199f3	416	return rc;
1da177e4 LT	417	}
1da177e4 LT	418
90ab5ee9	419	static bool probe_qd65xx;
84913882 BZ	420
	421	module_param_named(probe, probe_qd65xx, bool, 0);
	422	MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
	423
ade2daf9	424	static int __init qd65xx_init(void)
1da177e4	425	{
7daf66dd BZ	426	int rc1, rc2 = -ENODEV;
7daf66dd BZ	427
84913882 BZ	428	if (probe_qd65xx == 0)
	429	return -ENODEV;
	430
7daf66dd BZ	431	rc1 = qd_probe(0x30);
	432	if (rc1)
	433	rc2 = qd_probe(0xb0);
	434
	435	if (rc1 < 0 && rc2 < 0)
1da177e4	436	return -ENODEV;
7daf66dd	437
1da177e4 LT	438	return 0;
	439	}
	440
1da177e4	441	module_init(qd65xx_init);
1da177e4 LT	442
	443	MODULE_AUTHOR("Samuel Thibault");
	444	MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
	445	MODULE_LICENSE("GPL");