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CommitLineData
1da177e4
LT
1/*
2 * linux/drivers/ide/setup-pci.c Version 1.10 2002/08/19
3 *
4 * Copyright (c) 1998-2000 Andre Hedrick <andre@linux-ide.org>
5 *
6 * Copyright (c) 1995-1998 Mark Lord
7 * May be copied or modified under the terms of the GNU General Public License
1da177e4
LT
8 */
9
1da177e4
LT
10#include <linux/module.h>
11#include <linux/types.h>
12#include <linux/kernel.h>
13#include <linux/pci.h>
14#include <linux/init.h>
15#include <linux/timer.h>
16#include <linux/mm.h>
17#include <linux/interrupt.h>
18#include <linux/ide.h>
19#include <linux/dma-mapping.h>
20
21#include <asm/io.h>
22#include <asm/irq.h>
23
24
25/**
26 * ide_match_hwif - match a PCI IDE against an ide_hwif
27 * @io_base: I/O base of device
28 * @bootable: set if its bootable
29 * @name: name of device
30 *
31 * Match a PCI IDE port against an entry in ide_hwifs[],
32 * based on io_base port if possible. Return the matching hwif,
33 * or a new hwif. If we find an error (clashing, out of devices, etc)
34 * return NULL
35 *
36 * FIXME: we need to handle mmio matches here too
37 */
38
39static ide_hwif_t *ide_match_hwif(unsigned long io_base, u8 bootable, const char *name)
40{
41 int h;
42 ide_hwif_t *hwif;
43
44 /*
45 * Look for a hwif with matching io_base specified using
46 * parameters to ide_setup().
47 */
48 for (h = 0; h < MAX_HWIFS; ++h) {
49 hwif = &ide_hwifs[h];
50 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
51 if (hwif->chipset == ide_forced)
52 return hwif; /* a perfect match */
53 }
54 }
55 /*
56 * Look for a hwif with matching io_base default value.
57 * If chipset is "ide_unknown", then claim that hwif slot.
58 * Otherwise, some other chipset has already claimed it.. :(
59 */
60 for (h = 0; h < MAX_HWIFS; ++h) {
61 hwif = &ide_hwifs[h];
62 if (hwif->io_ports[IDE_DATA_OFFSET] == io_base) {
63 if (hwif->chipset == ide_unknown)
64 return hwif; /* match */
65 printk(KERN_ERR "%s: port 0x%04lx already claimed by %s\n",
66 name, io_base, hwif->name);
67 return NULL; /* already claimed */
68 }
69 }
70 /*
71 * Okay, there is no hwif matching our io_base,
72 * so we'll just claim an unassigned slot.
73 * Give preference to claiming other slots before claiming ide0/ide1,
74 * just in case there's another interface yet-to-be-scanned
75 * which uses ports 1f0/170 (the ide0/ide1 defaults).
76 *
77 * Unless there is a bootable card that does not use the standard
78 * ports 1f0/170 (the ide0/ide1 defaults). The (bootable) flag.
79 */
80 if (bootable) {
81 for (h = 0; h < MAX_HWIFS; ++h) {
82 hwif = &ide_hwifs[h];
83 if (hwif->chipset == ide_unknown)
84 return hwif; /* pick an unused entry */
85 }
86 } else {
87 for (h = 2; h < MAX_HWIFS; ++h) {
88 hwif = ide_hwifs + h;
89 if (hwif->chipset == ide_unknown)
90 return hwif; /* pick an unused entry */
91 }
92 }
83d7dbc4 93 for (h = 0; h < 2 && h < MAX_HWIFS; ++h) {
1da177e4
LT
94 hwif = ide_hwifs + h;
95 if (hwif->chipset == ide_unknown)
96 return hwif; /* pick an unused entry */
97 }
98 printk(KERN_ERR "%s: too many IDE interfaces, no room in table\n", name);
99 return NULL;
100}
101
102/**
103 * ide_setup_pci_baseregs - place a PCI IDE controller native
104 * @dev: PCI device of interface to switch native
105 * @name: Name of interface
106 *
107 * We attempt to place the PCI interface into PCI native mode. If
108 * we succeed the BARs are ok and the controller is in PCI mode.
109 * Returns 0 on success or an errno code.
110 *
111 * FIXME: if we program the interface and then fail to set the BARS
112 * we don't switch it back to legacy mode. Do we actually care ??
113 */
114
115static int ide_setup_pci_baseregs (struct pci_dev *dev, const char *name)
116{
117 u8 progif = 0;
118
119 /*
120 * Place both IDE interfaces into PCI "native" mode:
121 */
122 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
123 (progif & 5) != 5) {
124 if ((progif & 0xa) != 0xa) {
125 printk(KERN_INFO "%s: device not capable of full "
126 "native PCI mode\n", name);
127 return -EOPNOTSUPP;
128 }
129 printk("%s: placing both ports into native PCI mode\n", name);
130 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
131 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
132 (progif & 5) != 5) {
133 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
134 "0x%04x, got 0x%04x\n",
135 name, progif|5, progif);
136 return -EOPNOTSUPP;
137 }
138 }
139 return 0;
140}
141
142#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1da177e4
LT
143/**
144 * ide_get_or_set_dma_base - setup BMIBA
039788e1
BZ
145 * @d: IDE port info
146 * @hwif: IDE interface
1da177e4 147 *
c58e79dd
BZ
148 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
149 * Where a device has a partner that is already in DMA mode we check
150 * and enforce IDE simplex rules.
1da177e4
LT
151 */
152
85620436 153static unsigned long ide_get_or_set_dma_base(const struct ide_port_info *d, ide_hwif_t *hwif)
1da177e4
LT
154{
155 unsigned long dma_base = 0;
156 struct pci_dev *dev = hwif->pci_dev;
157
1da177e4
LT
158 if (hwif->mmio)
159 return hwif->dma_base;
160
161 if (hwif->mate && hwif->mate->dma_base) {
162 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
163 } else {
9ffcf364
BZ
164 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
165
166 dma_base = pci_resource_start(dev, baridx);
167
aea5d375 168 if (dma_base == 0) {
9ffcf364 169 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
aea5d375
BZ
170 return 0;
171 }
1da177e4
LT
172 }
173
aea5d375
BZ
174 if (hwif->channel)
175 dma_base += 8;
176
177 if ((d->host_flags & IDE_HFLAG_CS5520) == 0) {
1da177e4 178 u8 simplex_stat = 0;
1da177e4
LT
179
180 switch(dev->device) {
181 case PCI_DEVICE_ID_AL_M5219:
182 case PCI_DEVICE_ID_AL_M5229:
183 case PCI_DEVICE_ID_AMD_VIPER_7409:
184 case PCI_DEVICE_ID_CMD_643:
185 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
2f09a7f4 186 case PCI_DEVICE_ID_REVOLUTION:
31e8a465
BZ
187 simplex_stat = inb(dma_base + 2);
188 outb(simplex_stat & 0x60, dma_base + 2);
189 simplex_stat = inb(dma_base + 2);
1da177e4
LT
190 if (simplex_stat & 0x80) {
191 printk(KERN_INFO "%s: simplex device: "
9ffcf364
BZ
192 "DMA forced\n",
193 d->name);
1da177e4
LT
194 }
195 break;
196 default:
197 /*
198 * If the device claims "simplex" DMA,
199 * this means only one of the two interfaces
200 * can be trusted with DMA at any point in time.
201 * So we should enable DMA only on one of the
202 * two interfaces.
203 */
204 simplex_stat = hwif->INB(dma_base + 2);
205 if (simplex_stat & 0x80) {
206 /* simplex device? */
207/*
208 * At this point we haven't probed the drives so we can't make the
209 * appropriate decision. Really we should defer this problem
210 * until we tune the drive then try to grab DMA ownership if we want
211 * to be the DMA end. This has to be become dynamic to handle hot
212 * plug.
213 */
214 if (hwif->mate && hwif->mate->dma_base) {
215 printk(KERN_INFO "%s: simplex device: "
9ffcf364
BZ
216 "DMA disabled\n",
217 d->name);
1da177e4
LT
218 dma_base = 0;
219 }
220 }
221 }
222 }
223 return dma_base;
224}
225#endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
226
85620436 227void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
1da177e4 228{
bde07e5e
BZ
229 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
230 " PCI slot %s\n", d->name, dev->vendor, dev->device,
231 dev->revision, pci_name(dev));
1da177e4
LT
232}
233
234EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
235
236
237/**
238 * ide_pci_enable - do PCI enables
239 * @dev: PCI device
039788e1 240 * @d: IDE port info
1da177e4
LT
241 *
242 * Enable the IDE PCI device. We attempt to enable the device in full
09483916
BH
243 * but if that fails then we only need IO space. The PCI code should
244 * have setup the proper resources for us already for controllers in
245 * legacy mode.
1da177e4
LT
246 *
247 * Returns zero on success or an error code
248 */
039788e1 249
85620436 250static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
1da177e4
LT
251{
252 int ret;
253
254 if (pci_enable_device(dev)) {
09483916 255 ret = pci_enable_device_io(dev);
1da177e4
LT
256 if (ret < 0) {
257 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
258 "Could not enable device.\n", d->name);
259 goto out;
260 }
261 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
262 }
263
264 /*
039788e1
BZ
265 * assume all devices can do 32-bit DMA for now, we can add
266 * a DMA mask field to the struct ide_port_info if we need it
267 * (or let lower level driver set the DMA mask)
1da177e4
LT
268 */
269 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
270 if (ret < 0) {
271 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
272 goto out;
273 }
274
275 /* FIXME: Temporary - until we put in the hotplug interface logic
276 Check that the bits we want are not in use by someone else. */
277 ret = pci_request_region(dev, 4, "ide_tmp");
278 if (ret < 0)
279 goto out;
280
281 pci_release_region(dev, 4);
282out:
283 return ret;
284}
285
286/**
287 * ide_pci_configure - configure an unconfigured device
288 * @dev: PCI device
039788e1 289 * @d: IDE port info
1da177e4
LT
290 *
291 * Enable and configure the PCI device we have been passed.
292 * Returns zero on success or an error code.
293 */
039788e1 294
85620436 295static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
1da177e4
LT
296{
297 u16 pcicmd = 0;
298 /*
299 * PnP BIOS was *supposed* to have setup this device, but we
300 * can do it ourselves, so long as the BIOS has assigned an IRQ
301 * (or possibly the device is using a "legacy header" for IRQs).
302 * Maybe the user deliberately *disabled* the device,
303 * but we'll eventually ignore it again if no drives respond.
304 */
305 if (ide_setup_pci_baseregs(dev, d->name) || pci_write_config_word(dev, PCI_COMMAND, pcicmd|PCI_COMMAND_IO))
306 {
307 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
308 return -ENODEV;
309 }
310 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
311 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
312 return -EIO;
313 }
314 if (!(pcicmd & PCI_COMMAND_IO)) {
315 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
316 return -ENXIO;
317 }
318 return 0;
319}
320
321/**
322 * ide_pci_check_iomem - check a register is I/O
039788e1
BZ
323 * @dev: PCI device
324 * @d: IDE port info
325 * @bar: BAR number
1da177e4
LT
326 *
327 * Checks if a BAR is configured and points to MMIO space. If so
328 * print an error and return an error code. Otherwise return 0
329 */
039788e1 330
85620436 331static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d, int bar)
1da177e4
LT
332{
333 ulong flags = pci_resource_flags(dev, bar);
334
335 /* Unconfigured ? */
336 if (!flags || pci_resource_len(dev, bar) == 0)
337 return 0;
338
339 /* I/O space */
340 if(flags & PCI_BASE_ADDRESS_IO_MASK)
341 return 0;
342
343 /* Bad */
344 printk(KERN_ERR "%s: IO baseregs (BIOS) are reported "
345 "as MEM, report to "
346 "<andre@linux-ide.org>.\n", d->name);
347 return -EINVAL;
348}
349
350/**
351 * ide_hwif_configure - configure an IDE interface
352 * @dev: PCI device holding interface
039788e1 353 * @d: IDE port info
1da177e4
LT
354 * @mate: Paired interface if any
355 *
356 * Perform the initial set up for the hardware interface structure. This
357 * is done per interface port rather than per PCI device. There may be
358 * more than one port per device.
359 *
360 * Returns the new hardware interface structure, or NULL on a failure
361 */
039788e1 362
85620436 363static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *mate, int port, int irq)
1da177e4
LT
364{
365 unsigned long ctl = 0, base = 0;
366 ide_hwif_t *hwif;
7cab14a7 367 u8 bootable = (d->host_flags & IDE_HFLAG_BOOTABLE) ? 1 : 0;
79127c37
BZ
368 u8 oldnoprobe = 0;
369 struct hw_regs_s hw;
1da177e4 370
a5d8c5c8 371 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
1da177e4
LT
372 /* Possibly we should fail if these checks report true */
373 ide_pci_check_iomem(dev, d, 2*port);
374 ide_pci_check_iomem(dev, d, 2*port+1);
375
376 ctl = pci_resource_start(dev, 2*port+1);
377 base = pci_resource_start(dev, 2*port);
378 if ((ctl && !base) || (base && !ctl)) {
379 printk(KERN_ERR "%s: inconsistent baseregs (BIOS) "
380 "for port %d, skipping\n", d->name, port);
381 return NULL;
382 }
383 }
384 if (!ctl)
385 {
386 /* Use default values */
387 ctl = port ? 0x374 : 0x3f4;
388 base = port ? 0x170 : 0x1f0;
389 }
7cab14a7 390 if ((hwif = ide_match_hwif(base, bootable, d->name)) == NULL)
1da177e4 391 return NULL; /* no room in ide_hwifs[] */
79127c37
BZ
392
393 memset(&hw, 0, sizeof(hw));
394 hw.irq = hwif->irq ? hwif->irq : irq;
395 hw.dev = &dev->dev;
396 hw.chipset = d->chipset ? d->chipset : ide_pci;
397 ide_std_init_ports(&hw, base, ctl | 2);
398
399 if (hwif->io_ports[IDE_DATA_OFFSET] == base &&
400 hwif->io_ports[IDE_CONTROL_OFFSET] == (ctl | 2))
401 oldnoprobe = hwif->noprobe;
402
403 ide_init_port_hw(hwif, &hw);
404
405 hwif->noprobe = oldnoprobe;
406
1da177e4 407 hwif->pci_dev = dev;
039788e1 408 hwif->cds = d;
1da177e4
LT
409 hwif->channel = port;
410
1da177e4
LT
411 if (mate) {
412 hwif->mate = mate;
413 mate->mate = hwif;
414 }
415 return hwif;
416}
417
418/**
419 * ide_hwif_setup_dma - configure DMA interface
420 * @dev: PCI device
039788e1
BZ
421 * @d: IDE port info
422 * @hwif: IDE interface
1da177e4
LT
423 *
424 * Set up the DMA base for the interface. Enable the master bits as
425 * necessary and attempt to bring the device DMA into a ready to use
426 * state
427 */
039788e1 428
85620436 429static void ide_hwif_setup_dma(struct pci_dev *dev, const struct ide_port_info *d, ide_hwif_t *hwif)
1da177e4 430{
039788e1 431#ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1da177e4 432 u16 pcicmd;
47b68788 433
1da177e4
LT
434 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
435
47b68788 436 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
1da177e4
LT
437 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
438 (dev->class & 0x80))) {
9ffcf364 439 unsigned long dma_base = ide_get_or_set_dma_base(d, hwif);
1da177e4
LT
440 if (dma_base && !(pcicmd & PCI_COMMAND_MASTER)) {
441 /*
442 * Set up BM-DMA capability
443 * (PnP BIOS should have done this)
444 */
1da177e4
LT
445 pci_set_master(dev);
446 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) || !(pcicmd & PCI_COMMAND_MASTER)) {
447 printk(KERN_ERR "%s: %s error updating PCICMD\n",
448 hwif->name, d->name);
449 dma_base = 0;
450 }
451 }
452 if (dma_base) {
453 if (d->init_dma) {
454 d->init_dma(hwif, dma_base);
455 } else {
456 ide_setup_dma(hwif, dma_base, 8);
457 }
458 } else {
459 printk(KERN_INFO "%s: %s Bus-Master DMA disabled "
460 "(BIOS)\n", hwif->name, d->name);
461 }
462 }
1da177e4 463#endif /* CONFIG_BLK_DEV_IDEDMA_PCI*/
039788e1 464}
1da177e4
LT
465
466/**
467 * ide_setup_pci_controller - set up IDE PCI
468 * @dev: PCI device
039788e1 469 * @d: IDE port info
1da177e4
LT
470 * @noisy: verbose flag
471 * @config: returned as 1 if we configured the hardware
472 *
473 * Set up the PCI and controller side of the IDE interface. This brings
474 * up the PCI side of the device, checks that the device is enabled
475 * and enables it if need be
476 */
039788e1 477
85620436 478static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
1da177e4
LT
479{
480 int ret;
1da177e4
LT
481 u16 pcicmd;
482
483 if (noisy)
484 ide_setup_pci_noise(dev, d);
485
486 ret = ide_pci_enable(dev, d);
487 if (ret < 0)
488 goto out;
489
490 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
491 if (ret < 0) {
492 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
493 goto out;
494 }
495 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
496 ret = ide_pci_configure(dev, d);
497 if (ret < 0)
498 goto out;
499 *config = 1;
500 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
501 }
502
1da177e4
LT
503out:
504 return ret;
505}
506
507/**
508 * ide_pci_setup_ports - configure ports/devices on PCI IDE
509 * @dev: PCI device
039788e1 510 * @d: IDE port info
1da177e4 511 * @pciirq: IRQ line
8447d9d5 512 * @idx: ATA index table to update
1da177e4
LT
513 *
514 * Scan the interfaces attached to this device and do any
515 * necessary per port setup. Attach the devices and ask the
516 * generic DMA layer to do its work for us.
517 *
518 * Normally called automaticall from do_ide_pci_setup_device,
519 * but is also used directly as a helper function by some controllers
520 * where the chipset setup is not the default PCI IDE one.
521 */
8447d9d5 522
85620436 523void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d, int pciirq, u8 *idx)
1da177e4 524{
a5d8c5c8 525 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
1da177e4 526 ide_hwif_t *hwif, *mate = NULL;
1da177e4
LT
527 u8 tmp;
528
1da177e4
LT
529 /*
530 * Set up the IDE ports
531 */
cf6e854e 532
a5d8c5c8 533 for (port = 0; port < channels; ++port) {
85620436
BZ
534 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
535
1da177e4 536 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
cf6e854e
BZ
537 (tmp & e->mask) != e->val)) {
538 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
1da177e4 539 continue; /* port not enabled */
cf6e854e 540 }
1da177e4 541
1da177e4
LT
542 if ((hwif = ide_hwif_configure(dev, d, mate, port, pciirq)) == NULL)
543 continue;
544
8447d9d5 545 *(idx + port) = hwif->index;
1da177e4 546
1da177e4
LT
547 if (d->init_iops)
548 d->init_iops(hwif);
549
9ffcf364 550 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0)
1da177e4 551 ide_hwif_setup_dma(dev, d, hwif);
9ffcf364 552
8acf28c0
BZ
553 if ((!hwif->irq && (d->host_flags & IDE_HFLAG_LEGACY_IRQS)) ||
554 (d->host_flags & IDE_HFLAG_FORCE_LEGACY_IRQS))
3985ee3b
BZ
555 hwif->irq = port ? 15 : 14;
556
6a824c92 557 hwif->host_flags = d->host_flags;
4099d143 558 hwif->pio_mask = d->pio_mask;
6a824c92 559
1c51361a
BZ
560 if ((d->host_flags & IDE_HFLAG_SERIALIZE) && hwif->mate)
561 hwif->mate->serialized = hwif->serialized = 1;
562
caea7602
BZ
563 if (d->host_flags & IDE_HFLAG_IO_32BIT) {
564 hwif->drives[0].io_32bit = 1;
565 hwif->drives[1].io_32bit = 1;
566 }
567
568 if (d->host_flags & IDE_HFLAG_UNMASK_IRQS) {
569 hwif->drives[0].unmask = 1;
570 hwif->drives[1].unmask = 1;
571 }
572
5f8b6c34
BZ
573 if (hwif->dma_base) {
574 hwif->swdma_mask = d->swdma_mask;
575 hwif->mwdma_mask = d->mwdma_mask;
576 hwif->ultra_mask = d->udma_mask;
577 }
578
85ad93ad
BZ
579 hwif->drives[0].autotune = 1;
580 hwif->drives[1].autotune = 1;
581
272a3709
BZ
582 if (d->host_flags & IDE_HFLAG_RQSIZE_256)
583 hwif->rqsize = 256;
584
1da177e4
LT
585 if (d->init_hwif)
586 /* Call chipset-specific routine
587 * for each enabled hwif
588 */
589 d->init_hwif(hwif);
590
591 mate = hwif;
1da177e4 592 }
1da177e4
LT
593}
594
595EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
596
597/*
598 * ide_setup_pci_device() looks at the primary/secondary interfaces
599 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
600 * for use with them. This generic code works for most PCI chipsets.
601 *
602 * One thing that is not standardized is the location of the
603 * primary/secondary interface "enable/disable" bits. For chipsets that
039788e1 604 * we "know" about, this information is in the struct ide_port_info;
1da177e4
LT
605 * for all other chipsets, we just assume both interfaces are enabled.
606 */
039788e1 607static int do_ide_setup_pci_device(struct pci_dev *dev,
85620436 608 const struct ide_port_info *d,
8447d9d5 609 u8 *idx, u8 noisy)
1da177e4 610{
1da177e4
LT
611 int tried_config = 0;
612 int pciirq, ret;
613
614 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
615 if (ret < 0)
616 goto out;
617
618 /*
619 * Can we trust the reported IRQ?
620 */
621 pciirq = dev->irq;
622
623 /* Is it an "IDE storage" device in non-PCI mode? */
624 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
625 if (noisy)
626 printk(KERN_INFO "%s: not 100%% native mode: "
627 "will probe irqs later\n", d->name);
628 /*
629 * This allows offboard ide-pci cards the enable a BIOS,
630 * verify interrupt settings of split-mirror pci-config
631 * space, place chipset into init-mode, and/or preserve
632 * an interrupt if the card is not native ide support.
633 */
634 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
635 if (ret < 0)
636 goto out;
637 pciirq = ret;
638 } else if (tried_config) {
639 if (noisy)
640 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
641 pciirq = 0;
642 } else if (!pciirq) {
643 if (noisy)
644 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
645 d->name, pciirq);
646 pciirq = 0;
647 } else {
648 if (d->init_chipset) {
649 ret = d->init_chipset(dev, d->name);
650 if (ret < 0)
651 goto out;
652 }
653 if (noisy)
1da177e4
LT
654 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
655 d->name, pciirq);
1da177e4
LT
656 }
657
658 /* FIXME: silent failure can happen */
659
8447d9d5 660 ide_pci_setup_ports(dev, d, pciirq, idx);
1da177e4
LT
661out:
662 return ret;
663}
664
85620436 665int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
1da177e4 666{
8447d9d5 667 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
1da177e4
LT
668 int ret;
669
8447d9d5 670 ret = do_ide_setup_pci_device(dev, d, &idx[0], 1);
1da177e4 671
8447d9d5
BZ
672 if (ret >= 0)
673 ide_device_add(idx);
1da177e4 674
1da177e4
LT
675 return ret;
676}
677
678EXPORT_SYMBOL_GPL(ide_setup_pci_device);
679
680int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
85620436 681 const struct ide_port_info *d)
1da177e4
LT
682{
683 struct pci_dev *pdev[] = { dev1, dev2 };
1da177e4 684 int ret, i;
8447d9d5 685 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
1da177e4
LT
686
687 for (i = 0; i < 2; i++) {
8447d9d5 688 ret = do_ide_setup_pci_device(pdev[i], d, &idx[i*2], !i);
1da177e4
LT
689 /*
690 * FIXME: Mom, mom, they stole me the helper function to undo
691 * do_ide_setup_pci_device() on the first device!
692 */
693 if (ret < 0)
694 goto out;
695 }
696
8447d9d5 697 ide_device_add(idx);
1da177e4
LT
698out:
699 return ret;
700}
701
702EXPORT_SYMBOL_GPL(ide_setup_pci_devices);