[mirror_ubuntu-kernels.git] / drivers / ide / tx4938ide.c

/*
 * TX4938 internal IDE driver
 * Based on tx4939ide.c.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 *
 * (C) Copyright TOSHIBA CORPORATION 2005-2007
 */

#include <linux/module.h>
#include <linux/types.h>
#include <linux/ide.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>

#include <asm/ide.h>
#include <asm/txx9/tx4938.h>

static void tx4938ide_tune_ebusc(unsigned int ebus_ch,
				 unsigned int gbus_clock,
				 u8 pio)
{
	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]);
	unsigned int sp = (cr >> 4) & 3;
	unsigned int clock = gbus_clock / (4 - sp);
	unsigned int cycle = 1000000000 / clock;
	unsigned int shwt;
	int wt;

	/* Minimum DIOx- active time */
	wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
	/* IORDY setup time: 35ns */
	wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
	/* actual wait-cycle is max(wt & ~1, 1) */
	if (wt > 2 && (wt & 1))
		wt++;
	wt &= ~1;
	/* Address-valid to DIOR/DIOW setup */
	shwt = DIV_ROUND_UP(t->setup, cycle);

	/* -DIOx recovery time (SHWT * 4) and cycle time requirement */
	while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle)
		shwt++;
	if (shwt > 7) {
		pr_warning("tx4938ide: SHWT violation (%d)\n", shwt);
		shwt = 7;
	}
	pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n",
		 ebus_ch, cycle, wt, shwt);

	__raw_writeq((cr & ~0x3f007ull) | (wt << 12) | shwt,
		     &tx4938_ebuscptr->cr[ebus_ch]);
}

static void tx4938ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
{
	ide_hwif_t *hwif = drive->hwif;
	struct tx4938ide_platform_info *pdata = hwif->dev->platform_data;
	u8 safe = pio;
	ide_drive_t *pair;

	pair = ide_get_pair_dev(drive);
	if (pair)
		safe = min(safe, ide_get_best_pio_mode(pair, 255, 5));
	tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe);
}

#ifdef __BIG_ENDIAN

/* custom iops (independent from SWAP_IO_SPACE) */
static u8 tx4938ide_inb(unsigned long port)
{
	return __raw_readb((void __iomem *)port);
}

static void tx4938ide_outb(u8 value, unsigned long port)
{
	__raw_writeb(value, (void __iomem *)port);
}

static void tx4938ide_tf_load(ide_drive_t *drive, ide_task_t *task)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &task->tf;
	u8 HIHI = task->tf_flags & IDE_TFLAG_LBA48 ? 0xE0 : 0xEF;

	if (task->ftf_flags & IDE_FTFLAG_FLAGGED)
		HIHI = 0xFF;

	if (task->ftf_flags & IDE_FTFLAG_OUT_DATA) {
		u16 data = (tf->hob_data << 8) | tf->data;

		/* no endian swap */
		__raw_writew(data, (void __iomem *)io_ports->data_addr);
	}

	if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
		tx4938ide_outb(tf->hob_feature, io_ports->feature_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
		tx4938ide_outb(tf->hob_nsect, io_ports->nsect_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
		tx4938ide_outb(tf->hob_lbal, io_ports->lbal_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
		tx4938ide_outb(tf->hob_lbam, io_ports->lbam_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
		tx4938ide_outb(tf->hob_lbah, io_ports->lbah_addr);

	if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
		tx4938ide_outb(tf->feature, io_ports->feature_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
		tx4938ide_outb(tf->nsect, io_ports->nsect_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
		tx4938ide_outb(tf->lbal, io_ports->lbal_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
		tx4938ide_outb(tf->lbam, io_ports->lbam_addr);
	if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
		tx4938ide_outb(tf->lbah, io_ports->lbah_addr);

	if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
		tx4938ide_outb((tf->device & HIHI) | drive->select,
			       io_ports->device_addr);
}

static void tx4938ide_tf_read(ide_drive_t *drive, ide_task_t *task)
{
	ide_hwif_t *hwif = drive->hwif;
	struct ide_io_ports *io_ports = &hwif->io_ports;
	struct ide_taskfile *tf = &task->tf;

	if (task->ftf_flags & IDE_FTFLAG_IN_DATA) {
		u16 data;

		/* no endian swap */
		data = __raw_readw((void __iomem *)io_ports->data_addr);
		tf->data = data & 0xff;
		tf->hob_data = (data >> 8) & 0xff;
	}

	/* be sure we're looking at the low order bits */
	tx4938ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);

	if (task->tf_flags & IDE_TFLAG_IN_FEATURE)
		tf->feature = tx4938ide_inb(io_ports->feature_addr);
	if (task->tf_flags & IDE_TFLAG_IN_NSECT)
		tf->nsect  = tx4938ide_inb(io_ports->nsect_addr);
	if (task->tf_flags & IDE_TFLAG_IN_LBAL)
		tf->lbal   = tx4938ide_inb(io_ports->lbal_addr);
	if (task->tf_flags & IDE_TFLAG_IN_LBAM)
		tf->lbam   = tx4938ide_inb(io_ports->lbam_addr);
	if (task->tf_flags & IDE_TFLAG_IN_LBAH)
		tf->lbah   = tx4938ide_inb(io_ports->lbah_addr);
	if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
		tf->device = tx4938ide_inb(io_ports->device_addr);

	if (task->tf_flags & IDE_TFLAG_LBA48) {
		tx4938ide_outb(ATA_DEVCTL_OBS | 0x80, io_ports->ctl_addr);

		if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
			tf->hob_feature =
				tx4938ide_inb(io_ports->feature_addr);
		if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
			tf->hob_nsect   = tx4938ide_inb(io_ports->nsect_addr);
		if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
			tf->hob_lbal    = tx4938ide_inb(io_ports->lbal_addr);
		if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
			tf->hob_lbam    = tx4938ide_inb(io_ports->lbam_addr);
		if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
			tf->hob_lbah    = tx4938ide_inb(io_ports->lbah_addr);
	}
}

static void tx4938ide_input_data_swap(ide_drive_t *drive, struct request *rq,
				void *buf, unsigned int len)
{
	unsigned long port = drive->hwif->io_ports.data_addr;
	unsigned short *ptr = buf;
	unsigned int count = (len + 1) / 2;

	while (count--)
		*ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port));
	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
}

static void tx4938ide_output_data_swap(ide_drive_t *drive, struct request *rq,
				void *buf, unsigned int len)
{
	unsigned long port = drive->hwif->io_ports.data_addr;
	unsigned short *ptr = buf;
	unsigned int count = (len + 1) / 2;

	while (count--) {
		__raw_writew(le16_to_cpu(*ptr), (void __iomem *)port);
		ptr++;
	}
	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
}

static const struct ide_tp_ops tx4938ide_tp_ops = {
	.exec_command		= ide_exec_command,
	.read_status		= ide_read_status,
	.read_altstatus		= ide_read_altstatus,

	.set_irq		= ide_set_irq,

	.tf_load		= tx4938ide_tf_load,
	.tf_read		= tx4938ide_tf_read,

	.input_data		= tx4938ide_input_data_swap,
	.output_data		= tx4938ide_output_data_swap,
};

#endif	/* __BIG_ENDIAN */

static const struct ide_port_ops tx4938ide_port_ops = {
	.set_pio_mode		= tx4938ide_set_pio_mode,
};

static const struct ide_port_info tx4938ide_port_info __initdata = {
	.port_ops		= &tx4938ide_port_ops,
#ifdef __BIG_ENDIAN
	.tp_ops			= &tx4938ide_tp_ops,
#endif
	.host_flags		= IDE_HFLAG_MMIO | IDE_HFLAG_NO_DMA,
	.pio_mask		= ATA_PIO5,
	.chipset		= ide_generic,
};

static int __init tx4938ide_probe(struct platform_device *pdev)
{
	hw_regs_t hw;
	hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
	struct ide_host *host;
	struct resource *res;
	struct tx4938ide_platform_info *pdata = pdev->dev.platform_data;
	int irq, ret, i;
	unsigned long mapbase, mapctl;
	struct ide_port_info d = tx4938ide_port_info;

	irq = platform_get_irq(pdev, 0);
	if (irq < 0)
		return -ENODEV;
	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!res)
		return -ENODEV;

	if (!devm_request_mem_region(&pdev->dev, res->start,
				     res->end - res->start + 1, "tx4938ide"))
		return -EBUSY;
	mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
					      8 << pdata->ioport_shift);
	mapctl = (unsigned long)devm_ioremap(&pdev->dev,
					     res->start + 0x10000 +
					     (6 << pdata->ioport_shift),
					     1 << pdata->ioport_shift);
	if (!mapbase || !mapctl)
		return -EBUSY;

	memset(&hw, 0, sizeof(hw));
	if (pdata->ioport_shift) {
		unsigned long port = mapbase;
		unsigned long ctl = mapctl;

		hw.io_ports_array[0] = port;
#ifdef __BIG_ENDIAN
		port++;
		ctl++;
#endif
		for (i = 1; i <= 7; i++)
			hw.io_ports_array[i] =
				port + (i << pdata->ioport_shift);
		hw.io_ports.ctl_addr = ctl;
	} else
		ide_std_init_ports(&hw, mapbase, mapctl);
	hw.irq = irq;
	hw.dev = &pdev->dev;

	pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n",
		mapbase, mapctl, hw.irq);
	if (pdata->gbus_clock)
		tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0);
	else
		d.port_ops = NULL;
	ret = ide_host_add(&d, hws, &host);
	if (!ret)
		platform_set_drvdata(pdev, host);
	return ret;
}

static int __exit tx4938ide_remove(struct platform_device *pdev)
{
	struct ide_host *host = platform_get_drvdata(pdev);

	ide_host_remove(host);
	return 0;
}

static struct platform_driver tx4938ide_driver = {
	.driver		= {
		.name	= "tx4938ide",
		.owner	= THIS_MODULE,
	},
	.remove = __exit_p(tx4938ide_remove),
};

static int __init tx4938ide_init(void)
{
	return platform_driver_probe(&tx4938ide_driver, tx4938ide_probe);
}

static void __exit tx4938ide_exit(void)
{
	platform_driver_unregister(&tx4938ide_driver);
}

module_init(tx4938ide_init);
module_exit(tx4938ide_exit);

MODULE_DESCRIPTION("TX4938 internal IDE driver");
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:tx4938ide");
Commit	Line	Data
28502848 AN	1	/*
	2	* TX4938 internal IDE driver
	3	* Based on tx4939ide.c.
	4	*
	5	* This file is subject to the terms and conditions of the GNU General Public
	6	* License. See the file "COPYING" in the main directory of this archive
	7	* for more details.
	8	*
	9	* (C) Copyright TOSHIBA CORPORATION 2005-2007
	10	*/
	11
	12	#include <linux/module.h>
	13	#include <linux/types.h>
	14	#include <linux/ide.h>
	15	#include <linux/init.h>
	16	#include <linux/platform_device.h>
	17	#include <linux/io.h>
15a453a9 BZ	18
15a453a9 BZ	19	#include <asm/ide.h>
28502848 AN	20	#include <asm/txx9/tx4938.h>
	21
	22	static void tx4938ide_tune_ebusc(unsigned int ebus_ch,
	23	unsigned int gbus_clock,
	24	u8 pio)
	25	{
	26	struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
	27	u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]);
	28	unsigned int sp = (cr >> 4) & 3;
	29	unsigned int clock = gbus_clock / (4 - sp);
	30	unsigned int cycle = 1000000000 / clock;
7afa0535 AN	31	unsigned int shwt;
7afa0535 AN	32	int wt;
28502848 AN	33
	34	/* Minimum DIOx- active time */
	35	wt = DIV_ROUND_UP(t->act8b, cycle) - 2;
	36	/* IORDY setup time: 35ns */
7afa0535	37	wt = max_t(int, wt, DIV_ROUND_UP(35, cycle));
28502848 AN	38	/* actual wait-cycle is max(wt & ~1, 1) */
	39	if (wt > 2 && (wt & 1))
	40	wt++;
	41	wt &= ~1;
	42	/* Address-valid to DIOR/DIOW setup */
	43	shwt = DIV_ROUND_UP(t->setup, cycle);
	44
630a8b25 AN	45	/* -DIOx recovery time (SHWT * 4) and cycle time requirement */
	46	while ((shwt * 4 + wt + (wt ? 2 : 3)) * cycle < t->cycle)
	47	shwt++;
	48	if (shwt > 7) {
	49	pr_warning("tx4938ide: SHWT violation (%d)\n", shwt);
	50	shwt = 7;
	51	}
28502848 AN	52	pr_debug("tx4938ide: ebus %d, bus cycle %dns, WT %d, SHWT %d\n",
	53	ebus_ch, cycle, wt, shwt);
	54
630a8b25	55	__raw_writeq((cr & ~0x3f007ull) \| (wt << 12) \| shwt,
28502848 AN	56	&tx4938_ebuscptr->cr[ebus_ch]);
	57	}
	58
	59	static void tx4938ide_set_pio_mode(ide_drive_t *drive, const u8 pio)
	60	{
	61	ide_hwif_t *hwif = drive->hwif;
	62	struct tx4938ide_platform_info *pdata = hwif->dev->platform_data;
	63	u8 safe = pio;
	64	ide_drive_t *pair;
	65
	66	pair = ide_get_pair_dev(drive);
	67	if (pair)
	68	safe = min(safe, ide_get_best_pio_mode(pair, 255, 5));
	69	tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, safe);
	70	}
	71
	72	#ifdef __BIG_ENDIAN
	73
	74	/* custom iops (independent from SWAP_IO_SPACE) */
	75	static u8 tx4938ide_inb(unsigned long port)
	76	{
	77	return __raw_readb((void __iomem *)port);
	78	}
	79
	80	static void tx4938ide_outb(u8 value, unsigned long port)
	81	{
	82	__raw_writeb(value, (void __iomem *)port);
	83	}
	84
	85	static void tx4938ide_tf_load(ide_drive_t drive, ide_task_t task)
	86	{
	87	ide_hwif_t *hwif = drive->hwif;
	88	struct ide_io_ports *io_ports = &hwif->io_ports;
	89	struct ide_taskfile *tf = &task->tf;
	90	u8 HIHI = task->tf_flags & IDE_TFLAG_LBA48 ? 0xE0 : 0xEF;
	91
19710d25	92	if (task->ftf_flags & IDE_FTFLAG_FLAGGED)
28502848 AN	93	HIHI = 0xFF;
28502848 AN	94
19710d25	95	if (task->ftf_flags & IDE_FTFLAG_OUT_DATA) {
28502848 AN	96	u16 data = (tf->hob_data << 8) \| tf->data;
	97
	98	/* no endian swap */
	99	__raw_writew(data, (void __iomem *)io_ports->data_addr);
	100	}
	101
	102	if (task->tf_flags & IDE_TFLAG_OUT_HOB_FEATURE)
	103	tx4938ide_outb(tf->hob_feature, io_ports->feature_addr);
	104	if (task->tf_flags & IDE_TFLAG_OUT_HOB_NSECT)
	105	tx4938ide_outb(tf->hob_nsect, io_ports->nsect_addr);
	106	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAL)
	107	tx4938ide_outb(tf->hob_lbal, io_ports->lbal_addr);
	108	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAM)
	109	tx4938ide_outb(tf->hob_lbam, io_ports->lbam_addr);
	110	if (task->tf_flags & IDE_TFLAG_OUT_HOB_LBAH)
	111	tx4938ide_outb(tf->hob_lbah, io_ports->lbah_addr);
	112
	113	if (task->tf_flags & IDE_TFLAG_OUT_FEATURE)
	114	tx4938ide_outb(tf->feature, io_ports->feature_addr);
	115	if (task->tf_flags & IDE_TFLAG_OUT_NSECT)
	116	tx4938ide_outb(tf->nsect, io_ports->nsect_addr);
	117	if (task->tf_flags & IDE_TFLAG_OUT_LBAL)
	118	tx4938ide_outb(tf->lbal, io_ports->lbal_addr);
	119	if (task->tf_flags & IDE_TFLAG_OUT_LBAM)
	120	tx4938ide_outb(tf->lbam, io_ports->lbam_addr);
	121	if (task->tf_flags & IDE_TFLAG_OUT_LBAH)
	122	tx4938ide_outb(tf->lbah, io_ports->lbah_addr);
	123
	124	if (task->tf_flags & IDE_TFLAG_OUT_DEVICE)
	125	tx4938ide_outb((tf->device & HIHI) \| drive->select,
	126	io_ports->device_addr);
	127	}
	128
	129	static void tx4938ide_tf_read(ide_drive_t drive, ide_task_t task)
	130	{
	131	ide_hwif_t *hwif = drive->hwif;
	132	struct ide_io_ports *io_ports = &hwif->io_ports;
	133	struct ide_taskfile *tf = &task->tf;
	134
19710d25	135	if (task->ftf_flags & IDE_FTFLAG_IN_DATA) {
28502848 AN	136	u16 data;
	137
	138	/* no endian swap */
	139	data = __raw_readw((void __iomem *)io_ports->data_addr);
	140	tf->data = data & 0xff;
	141	tf->hob_data = (data >> 8) & 0xff;
	142	}
	143
	144	/* be sure we're looking at the low order bits */
	145	tx4938ide_outb(ATA_DEVCTL_OBS & ~0x80, io_ports->ctl_addr);
	146
	147	if (task->tf_flags & IDE_TFLAG_IN_FEATURE)
	148	tf->feature = tx4938ide_inb(io_ports->feature_addr);
	149	if (task->tf_flags & IDE_TFLAG_IN_NSECT)
	150	tf->nsect = tx4938ide_inb(io_ports->nsect_addr);
	151	if (task->tf_flags & IDE_TFLAG_IN_LBAL)
	152	tf->lbal = tx4938ide_inb(io_ports->lbal_addr);
	153	if (task->tf_flags & IDE_TFLAG_IN_LBAM)
	154	tf->lbam = tx4938ide_inb(io_ports->lbam_addr);
	155	if (task->tf_flags & IDE_TFLAG_IN_LBAH)
	156	tf->lbah = tx4938ide_inb(io_ports->lbah_addr);
	157	if (task->tf_flags & IDE_TFLAG_IN_DEVICE)
	158	tf->device = tx4938ide_inb(io_ports->device_addr);
	159
	160	if (task->tf_flags & IDE_TFLAG_LBA48) {
	161	tx4938ide_outb(ATA_DEVCTL_OBS \| 0x80, io_ports->ctl_addr);
	162
	163	if (task->tf_flags & IDE_TFLAG_IN_HOB_FEATURE)
	164	tf->hob_feature =
	165	tx4938ide_inb(io_ports->feature_addr);
	166	if (task->tf_flags & IDE_TFLAG_IN_HOB_NSECT)
	167	tf->hob_nsect = tx4938ide_inb(io_ports->nsect_addr);
	168	if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAL)
	169	tf->hob_lbal = tx4938ide_inb(io_ports->lbal_addr);
	170	if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAM)
	171	tf->hob_lbam = tx4938ide_inb(io_ports->lbam_addr);
	172	if (task->tf_flags & IDE_TFLAG_IN_HOB_LBAH)
	173	tf->hob_lbah = tx4938ide_inb(io_ports->lbah_addr);
	174	}
	175	}
	176
	177	static void tx4938ide_input_data_swap(ide_drive_t drive, struct request rq,
	178	void *buf, unsigned int len)
	179	{
	180	unsigned long port = drive->hwif->io_ports.data_addr;
	181	unsigned short *ptr = buf;
	182	unsigned int count = (len + 1) / 2;
	183
	184	while (count--)
	185	ptr++ = cpu_to_le16(__raw_readw((void __iomem )port));
f26f6cea	186	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
28502848 AN	187	}
	188
	189	static void tx4938ide_output_data_swap(ide_drive_t drive, struct request rq,
	190	void *buf, unsigned int len)
	191	{
	192	unsigned long port = drive->hwif->io_ports.data_addr;
	193	unsigned short *ptr = buf;
	194	unsigned int count = (len + 1) / 2;
	195
	196	while (count--) {
	197	__raw_writew(le16_to_cpu(ptr), (void __iomem )port);
	198	ptr++;
	199	}
f26f6cea	200	__ide_flush_dcache_range((unsigned long)buf, roundup(len, 2));
28502848 AN	201	}
	202
	203	static const struct ide_tp_ops tx4938ide_tp_ops = {
	204	.exec_command = ide_exec_command,
	205	.read_status = ide_read_status,
	206	.read_altstatus = ide_read_altstatus,
28502848 AN	207
	208	.set_irq = ide_set_irq,
	209
	210	.tf_load = tx4938ide_tf_load,
	211	.tf_read = tx4938ide_tf_read,
	212
	213	.input_data = tx4938ide_input_data_swap,
	214	.output_data = tx4938ide_output_data_swap,
	215	};
	216
	217	#endif /* __BIG_ENDIAN */
	218
	219	static const struct ide_port_ops tx4938ide_port_ops = {
3ee86dcd	220	.set_pio_mode = tx4938ide_set_pio_mode,
28502848 AN	221	};
	222
	223	static const struct ide_port_info tx4938ide_port_info __initdata = {
3ee86dcd	224	.port_ops = &tx4938ide_port_ops,
28502848	225	#ifdef __BIG_ENDIAN
3ee86dcd	226	.tp_ops = &tx4938ide_tp_ops,
28502848	227	#endif
3ee86dcd BZ	228	.host_flags = IDE_HFLAG_MMIO \| IDE_HFLAG_NO_DMA,
3ee86dcd BZ	229	.pio_mask = ATA_PIO5,
b1d249e8	230	.chipset = ide_generic,
28502848 AN	231	};
	232
	233	static int __init tx4938ide_probe(struct platform_device *pdev)
	234	{
	235	hw_regs_t hw;
	236	hw_regs_t *hws[] = { &hw, NULL, NULL, NULL };
	237	struct ide_host *host;
	238	struct resource *res;
	239	struct tx4938ide_platform_info *pdata = pdev->dev.platform_data;
	240	int irq, ret, i;
9d4eb0a3	241	unsigned long mapbase, mapctl;
28502848 AN	242	struct ide_port_info d = tx4938ide_port_info;
	243
	244	irq = platform_get_irq(pdev, 0);
	245	if (irq < 0)
	246	return -ENODEV;
	247	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	248	if (!res)
	249	return -ENODEV;
	250
	251	if (!devm_request_mem_region(&pdev->dev, res->start,
	252	res->end - res->start + 1, "tx4938ide"))
	253	return -EBUSY;
	254	mapbase = (unsigned long)devm_ioremap(&pdev->dev, res->start,
9d4eb0a3 AN	255	8 << pdata->ioport_shift);
	256	mapctl = (unsigned long)devm_ioremap(&pdev->dev,
	257	res->start + 0x10000 +
	258	(6 << pdata->ioport_shift),
	259	1 << pdata->ioport_shift);
	260	if (!mapbase \|\| !mapctl)
28502848 AN	261	return -EBUSY;
	262
	263	memset(&hw, 0, sizeof(hw));
	264	if (pdata->ioport_shift) {
	265	unsigned long port = mapbase;
9d4eb0a3	266	unsigned long ctl = mapctl;
28502848 AN	267
	268	hw.io_ports_array[0] = port;
	269	#ifdef __BIG_ENDIAN
	270	port++;
9d4eb0a3	271	ctl++;
28502848 AN	272	#endif
	273	for (i = 1; i <= 7; i++)
	274	hw.io_ports_array[i] =
	275	port + (i << pdata->ioport_shift);
9d4eb0a3	276	hw.io_ports.ctl_addr = ctl;
28502848	277	} else
9d4eb0a3	278	ide_std_init_ports(&hw, mapbase, mapctl);
28502848 AN	279	hw.irq = irq;
	280	hw.dev = &pdev->dev;
	281
9d4eb0a3 AN	282	pr_info("TX4938 IDE interface (base %#lx, ctl %#lx, irq %d)\n",
9d4eb0a3 AN	283	mapbase, mapctl, hw.irq);
28502848 AN	284	if (pdata->gbus_clock)
	285	tx4938ide_tune_ebusc(pdata->ebus_ch, pdata->gbus_clock, 0);
	286	else
	287	d.port_ops = NULL;
	288	ret = ide_host_add(&d, hws, &host);
9d4eb0a3 AN	289	if (!ret)
	290	platform_set_drvdata(pdev, host);
	291	return ret;
28502848 AN	292	}
	293
	294	static int __exit tx4938ide_remove(struct platform_device *pdev)
	295	{
	296	struct ide_host *host = platform_get_drvdata(pdev);
	297
	298	ide_host_remove(host);
	299	return 0;
	300	}
	301
	302	static struct platform_driver tx4938ide_driver = {
	303	.driver = {
	304	.name = "tx4938ide",
	305	.owner = THIS_MODULE,
	306	},
	307	.remove = __exit_p(tx4938ide_remove),
	308	};
	309
	310	static int __init tx4938ide_init(void)
	311	{
	312	return platform_driver_probe(&tx4938ide_driver, tx4938ide_probe);
	313	}
	314
	315	static void __exit tx4938ide_exit(void)
	316	{
	317	platform_driver_unregister(&tx4938ide_driver);
	318	}
	319
	320	module_init(tx4938ide_init);
	321	module_exit(tx4938ide_exit);
	322
	323	MODULE_DESCRIPTION("TX4938 internal IDE driver");
	324	MODULE_LICENSE("GPL");
	325	MODULE_ALIAS("platform:tx4938ide");