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36edc939 1// SPDX-License-Identifier: GPL-2.0-only
fdadbce0
OK
2/*
3 * bma180.c - IIO driver for Bosch BMA180 triaxial acceleration sensor
4 *
5 * Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com>
6 *
2017cff2
PM
7 * Support for BMA250 (c) Peter Meerwald <pmeerw@pmeerw.net>
8 *
2017cff2
PM
9 * SPI is not supported by driver
10 * BMA180: 7-bit I2C slave address 0x40 or 0x41
11 * BMA250: 7-bit I2C slave address 0x18 or 0x19
fdadbce0
OK
12 */
13
14#include <linux/module.h>
15#include <linux/i2c.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
16f1b4f0 18#include <linux/of_device.h>
fdadbce0
OK
19#include <linux/of.h>
20#include <linux/bitops.h>
21#include <linux/slab.h>
22#include <linux/string.h>
23#include <linux/iio/iio.h>
24#include <linux/iio/sysfs.h>
25#include <linux/iio/buffer.h>
26#include <linux/iio/trigger.h>
27#include <linux/iio/trigger_consumer.h>
28#include <linux/iio/triggered_buffer.h>
29
30#define BMA180_DRV_NAME "bma180"
31#define BMA180_IRQ_NAME "bma180_event"
32
16f1b4f0 33enum chip_ids {
1b9030f5 34 BMA180,
2017cff2 35 BMA250,
1b9030f5
PM
36};
37
c1949ec1
PM
38struct bma180_data;
39
1b9030f5
PM
40struct bma180_part_info {
41 const struct iio_chan_spec *channels;
7fa6790c 42 unsigned int num_channels;
1b9030f5 43 const int *scale_table;
7fa6790c 44 unsigned int num_scales;
1b9030f5 45 const int *bw_table;
7fa6790c 46 unsigned int num_bw;
2017cff2
PM
47
48 u8 int_reset_reg, int_reset_mask;
49 u8 sleep_reg, sleep_mask;
50 u8 bw_reg, bw_mask;
51 u8 scale_reg, scale_mask;
52 u8 power_reg, power_mask, lowpower_val;
53 u8 int_enable_reg, int_enable_mask;
54 u8 softreset_reg;
55
c1949ec1
PM
56 int (*chip_config)(struct bma180_data *data);
57 void (*chip_disable)(struct bma180_data *data);
1b9030f5
PM
58};
59
fdadbce0
OK
60/* Register set */
61#define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */
62#define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */
b81fbab7 63#define BMA180_TEMP 0x08
fdadbce0
OK
64#define BMA180_CTRL_REG0 0x0d
65#define BMA180_RESET 0x10
66#define BMA180_BW_TCS 0x20
67#define BMA180_CTRL_REG3 0x21
68#define BMA180_TCO_Z 0x30
69#define BMA180_OFFSET_LSB1 0x35
70
71/* BMA180_CTRL_REG0 bits */
72#define BMA180_DIS_WAKE_UP BIT(0) /* Disable wake up mode */
73#define BMA180_SLEEP BIT(1) /* 1 - chip will sleep */
74#define BMA180_EE_W BIT(4) /* Unlock writing to addr from 0x20 */
75#define BMA180_RESET_INT BIT(6) /* Reset pending interrupts */
76
77/* BMA180_CTRL_REG3 bits */
78#define BMA180_NEW_DATA_INT BIT(1) /* Intr every new accel data is ready */
79
80/* BMA180_OFFSET_LSB1 skipping mode bit */
81#define BMA180_SMP_SKIP BIT(0)
82
83/* Bit masks for registers bit fields */
cab767d5 84#define BMA180_RANGE 0x0e /* Range of measured accel values */
fdadbce0
OK
85#define BMA180_BW 0xf0 /* Accel bandwidth */
86#define BMA180_MODE_CONFIG 0x03 /* Config operation modes */
87
88/* We have to write this value in reset register to do soft reset */
89#define BMA180_RESET_VAL 0xb6
90
9a70b147 91#define BMA180_ID_REG_VAL 0x03
fdadbce0
OK
92
93/* Chip power modes */
fdadbce0
OK
94#define BMA180_LOW_POWER 0x03
95
2017cff2
PM
96#define BMA250_RANGE_REG 0x0f
97#define BMA250_BW_REG 0x10
98#define BMA250_POWER_REG 0x11
99#define BMA250_RESET_REG 0x14
100#define BMA250_INT_ENABLE_REG 0x17
101#define BMA250_INT_MAP_REG 0x1a
102#define BMA250_INT_RESET_REG 0x21
103
104#define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */
105#define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */
106#define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */
107#define BMA250_LOWPOWER_MASK BIT(6)
108#define BMA250_DATA_INTEN_MASK BIT(4)
109#define BMA250_INT1_DATA_MASK BIT(0)
110#define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */
fdadbce0 111
fdadbce0
OK
112struct bma180_data {
113 struct i2c_client *client;
114 struct iio_trigger *trig;
1b9030f5 115 const struct bma180_part_info *part_info;
587c2bea 116 struct iio_mount_matrix orientation;
fdadbce0 117 struct mutex mutex;
c7c69e85 118 bool sleep_state;
fdadbce0
OK
119 int scale;
120 int bw;
c7c69e85 121 bool pmode;
b9a6a237 122 u8 buff[16]; /* 3x 16-bit + 8-bit + padding + timestamp */
fdadbce0
OK
123};
124
b81fbab7 125enum bma180_chan {
fdadbce0
OK
126 AXIS_X,
127 AXIS_Y,
128 AXIS_Z,
b81fbab7 129 TEMP
fdadbce0
OK
130};
131
cab767d5
PM
132static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */
133static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 };
fdadbce0 134
2017cff2
PM
135static int bma250_bw_table[] = { 8, 16, 31, 63, 125, 250 }; /* Hz */
136static int bma250_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0,
137 0, 0, 306458 };
138
b81fbab7 139static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan)
fdadbce0 140{
fdadbce0
OK
141 int ret;
142
143 if (data->sleep_state)
144 return -EBUSY;
145
b81fbab7
PM
146 switch (chan) {
147 case TEMP:
148 ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP);
149 if (ret < 0)
150 dev_err(&data->client->dev, "failed to read temp register\n");
151 break;
152 default:
153 ret = i2c_smbus_read_word_data(data->client,
154 BMA180_ACC_X_LSB + chan * 2);
155 if (ret < 0)
156 dev_err(&data->client->dev,
157 "failed to read accel_%c register\n",
158 'x' + chan);
159 }
fdadbce0
OK
160
161 return ret;
162}
163
164static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val)
165{
166 int ret = i2c_smbus_read_byte_data(data->client, reg);
167 u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1));
168
169 if (ret < 0)
170 return ret;
171
172 return i2c_smbus_write_byte_data(data->client, reg, reg_val);
173}
174
175static int bma180_reset_intr(struct bma180_data *data)
176{
2017cff2
PM
177 int ret = bma180_set_bits(data, data->part_info->int_reset_reg,
178 data->part_info->int_reset_mask, 1);
fdadbce0
OK
179
180 if (ret)
181 dev_err(&data->client->dev, "failed to reset interrupt\n");
182
183 return ret;
184}
185
c7c69e85 186static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state)
fdadbce0 187{
2017cff2
PM
188 int ret = bma180_set_bits(data, data->part_info->int_enable_reg,
189 data->part_info->int_enable_mask, state);
fdadbce0
OK
190 if (ret)
191 goto err;
192 ret = bma180_reset_intr(data);
193 if (ret)
194 goto err;
195
196 return 0;
197
198err:
199 dev_err(&data->client->dev,
200 "failed to set new data interrupt state %d\n", state);
201 return ret;
202}
203
c7c69e85 204static int bma180_set_sleep_state(struct bma180_data *data, bool state)
fdadbce0 205{
2017cff2
PM
206 int ret = bma180_set_bits(data, data->part_info->sleep_reg,
207 data->part_info->sleep_mask, state);
fdadbce0
OK
208
209 if (ret) {
210 dev_err(&data->client->dev,
211 "failed to set sleep state %d\n", state);
212 return ret;
213 }
214 data->sleep_state = state;
215
216 return 0;
217}
218
c7c69e85 219static int bma180_set_ee_writing_state(struct bma180_data *data, bool state)
fdadbce0
OK
220{
221 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state);
222
223 if (ret)
224 dev_err(&data->client->dev,
225 "failed to set ee writing state %d\n", state);
226
227 return ret;
228}
229
230static int bma180_set_bw(struct bma180_data *data, int val)
231{
232 int ret, i;
233
234 if (data->sleep_state)
235 return -EBUSY;
236
1b9030f5
PM
237 for (i = 0; i < data->part_info->num_bw; ++i) {
238 if (data->part_info->bw_table[i] == val) {
2017cff2
PM
239 ret = bma180_set_bits(data, data->part_info->bw_reg,
240 data->part_info->bw_mask, i);
fdadbce0
OK
241 if (ret) {
242 dev_err(&data->client->dev,
243 "failed to set bandwidth\n");
244 return ret;
245 }
246 data->bw = val;
247 return 0;
248 }
249 }
250
251 return -EINVAL;
252}
253
254static int bma180_set_scale(struct bma180_data *data, int val)
255{
256 int ret, i;
257
258 if (data->sleep_state)
259 return -EBUSY;
260
1b9030f5
PM
261 for (i = 0; i < data->part_info->num_scales; ++i)
262 if (data->part_info->scale_table[i] == val) {
2017cff2
PM
263 ret = bma180_set_bits(data, data->part_info->scale_reg,
264 data->part_info->scale_mask, i);
fdadbce0
OK
265 if (ret) {
266 dev_err(&data->client->dev,
267 "failed to set scale\n");
268 return ret;
269 }
270 data->scale = val;
271 return 0;
272 }
273
274 return -EINVAL;
275}
276
c7c69e85 277static int bma180_set_pmode(struct bma180_data *data, bool mode)
fdadbce0 278{
2017cff2
PM
279 u8 reg_val = mode ? data->part_info->lowpower_val : 0;
280 int ret = bma180_set_bits(data, data->part_info->power_reg,
281 data->part_info->power_mask, reg_val);
fdadbce0
OK
282
283 if (ret) {
284 dev_err(&data->client->dev, "failed to set power mode\n");
285 return ret;
286 }
287 data->pmode = mode;
288
289 return 0;
290}
291
292static int bma180_soft_reset(struct bma180_data *data)
293{
294 int ret = i2c_smbus_write_byte_data(data->client,
2017cff2 295 data->part_info->softreset_reg, BMA180_RESET_VAL);
fdadbce0
OK
296
297 if (ret)
298 dev_err(&data->client->dev, "failed to reset the chip\n");
299
300 return ret;
301}
302
303static int bma180_chip_init(struct bma180_data *data)
304{
305 /* Try to read chip_id register. It must return 0x03. */
306 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID);
307
308 if (ret < 0)
c1949ec1
PM
309 return ret;
310 if (ret != BMA180_ID_REG_VAL)
311 return -ENODEV;
fdadbce0
OK
312
313 ret = bma180_soft_reset(data);
314 if (ret)
c1949ec1 315 return ret;
fdadbce0
OK
316 /*
317 * No serial transaction should occur within minimum 10 us
318 * after soft_reset command
319 */
320 msleep(20);
321
2017cff2
PM
322 ret = bma180_set_new_data_intr_state(data, false);
323 if (ret)
324 return ret;
325
326 return bma180_set_pmode(data, false);
c1949ec1
PM
327}
328
329static int bma180_chip_config(struct bma180_data *data)
330{
331 int ret = bma180_chip_init(data);
332
333 if (ret)
334 goto err;
fdadbce0
OK
335 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1);
336 if (ret)
337 goto err;
c7c69e85 338 ret = bma180_set_ee_writing_state(data, true);
fdadbce0
OK
339 if (ret)
340 goto err;
2017cff2 341 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1);
fdadbce0
OK
342 if (ret)
343 goto err;
2017cff2 344 ret = bma180_set_bw(data, 20); /* 20 Hz */
fdadbce0
OK
345 if (ret)
346 goto err;
2017cff2 347 ret = bma180_set_scale(data, 2452); /* 2 G */
fdadbce0
OK
348 if (ret)
349 goto err;
2017cff2
PM
350
351 return 0;
352
353err:
354 dev_err(&data->client->dev, "failed to config the chip\n");
355 return ret;
356}
357
358static int bma250_chip_config(struct bma180_data *data)
359{
360 int ret = bma180_chip_init(data);
361
362 if (ret)
363 goto err;
364 ret = bma180_set_bw(data, 16); /* 16 Hz */
fdadbce0
OK
365 if (ret)
366 goto err;
2017cff2
PM
367 ret = bma180_set_scale(data, 38344); /* 2 G */
368 if (ret)
369 goto err;
370 ret = bma180_set_bits(data, BMA250_INT_MAP_REG,
371 BMA250_INT1_DATA_MASK, 1);
fdadbce0
OK
372 if (ret)
373 goto err;
374
375 return 0;
376
377err:
c1949ec1 378 dev_err(&data->client->dev, "failed to config the chip\n");
fdadbce0
OK
379 return ret;
380}
381
382static void bma180_chip_disable(struct bma180_data *data)
383{
c7c69e85 384 if (bma180_set_new_data_intr_state(data, false))
fdadbce0 385 goto err;
c7c69e85 386 if (bma180_set_ee_writing_state(data, false))
fdadbce0 387 goto err;
c7c69e85 388 if (bma180_set_sleep_state(data, true))
fdadbce0
OK
389 goto err;
390
391 return;
392
393err:
394 dev_err(&data->client->dev, "failed to disable the chip\n");
395}
396
2017cff2
PM
397static void bma250_chip_disable(struct bma180_data *data)
398{
399 if (bma180_set_new_data_intr_state(data, false))
400 goto err;
401 if (bma180_set_sleep_state(data, true))
402 goto err;
403
404 return;
405
406err:
407 dev_err(&data->client->dev, "failed to disable the chip\n");
408}
409
7fa6790c 410static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned int n,
402a324e
PM
411 bool micros)
412{
413 size_t len = 0;
414 int i;
415
416 for (i = 0; i < n; i++) {
417 if (!vals[i])
418 continue;
419 len += scnprintf(buf + len, PAGE_SIZE - len,
420 micros ? "0.%06d " : "%d ", vals[i]);
421 }
422 buf[len - 1] = '\n';
423
424 return len;
425}
426
427static ssize_t bma180_show_filter_freq_avail(struct device *dev,
428 struct device_attribute *attr, char *buf)
429{
430 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
431
432 return bma180_show_avail(buf, data->part_info->bw_table,
433 data->part_info->num_bw, false);
434}
435
436static ssize_t bma180_show_scale_avail(struct device *dev,
437 struct device_attribute *attr, char *buf)
438{
439 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev));
440
441 return bma180_show_avail(buf, data->part_info->scale_table,
442 data->part_info->num_scales, true);
443}
444
445static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available,
446 S_IRUGO, bma180_show_filter_freq_avail, NULL, 0);
447
448static IIO_DEVICE_ATTR(in_accel_scale_available,
449 S_IRUGO, bma180_show_scale_avail, NULL, 0);
fdadbce0
OK
450
451static struct attribute *bma180_attributes[] = {
402a324e
PM
452 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available.
453 dev_attr.attr,
454 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
fdadbce0
OK
455 NULL,
456};
457
458static const struct attribute_group bma180_attrs_group = {
459 .attrs = bma180_attributes,
460};
461
462static int bma180_read_raw(struct iio_dev *indio_dev,
463 struct iio_chan_spec const *chan, int *val, int *val2,
464 long mask)
465{
466 struct bma180_data *data = iio_priv(indio_dev);
467 int ret;
468
469 switch (mask) {
470 case IIO_CHAN_INFO_RAW:
b75b58b4
AS
471 ret = iio_device_claim_direct_mode(indio_dev);
472 if (ret)
473 return ret;
474
fdadbce0 475 mutex_lock(&data->mutex);
b81fbab7 476 ret = bma180_get_data_reg(data, chan->scan_index);
fdadbce0 477 mutex_unlock(&data->mutex);
b75b58b4 478 iio_device_release_direct_mode(indio_dev);
fdadbce0
OK
479 if (ret < 0)
480 return ret;
b81fbab7
PM
481 *val = sign_extend32(ret >> chan->scan_type.shift,
482 chan->scan_type.realbits - 1);
fdadbce0
OK
483 return IIO_VAL_INT;
484 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
485 *val = data->bw;
486 return IIO_VAL_INT;
487 case IIO_CHAN_INFO_SCALE:
b81fbab7
PM
488 switch (chan->type) {
489 case IIO_ACCEL:
490 *val = 0;
491 *val2 = data->scale;
492 return IIO_VAL_INT_PLUS_MICRO;
493 case IIO_TEMP:
494 *val = 500;
495 return IIO_VAL_INT;
496 default:
497 return -EINVAL;
498 }
499 case IIO_CHAN_INFO_OFFSET:
500 *val = 48; /* 0 LSB @ 24 degree C */
501 return IIO_VAL_INT;
fdadbce0
OK
502 default:
503 return -EINVAL;
504 }
505}
506
507static int bma180_write_raw(struct iio_dev *indio_dev,
508 struct iio_chan_spec const *chan, int val, int val2, long mask)
509{
510 struct bma180_data *data = iio_priv(indio_dev);
511 int ret;
512
513 switch (mask) {
514 case IIO_CHAN_INFO_SCALE:
515 if (val)
516 return -EINVAL;
517 mutex_lock(&data->mutex);
518 ret = bma180_set_scale(data, val2);
519 mutex_unlock(&data->mutex);
520 return ret;
521 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY:
9b2a4d35
PM
522 if (val2)
523 return -EINVAL;
fdadbce0
OK
524 mutex_lock(&data->mutex);
525 ret = bma180_set_bw(data, val);
526 mutex_unlock(&data->mutex);
527 return ret;
528 default:
529 return -EINVAL;
530 }
531}
532
fdadbce0
OK
533static const struct iio_info bma180_info = {
534 .attrs = &bma180_attrs_group,
535 .read_raw = bma180_read_raw,
536 .write_raw = bma180_write_raw,
fdadbce0
OK
537};
538
c7c69e85 539static const char * const bma180_power_modes[] = { "low_noise", "low_power" };
fdadbce0
OK
540
541static int bma180_get_power_mode(struct iio_dev *indio_dev,
542 const struct iio_chan_spec *chan)
543{
544 struct bma180_data *data = iio_priv(indio_dev);
545
546 return data->pmode;
547}
548
549static int bma180_set_power_mode(struct iio_dev *indio_dev,
550 const struct iio_chan_spec *chan, unsigned int mode)
551{
552 struct bma180_data *data = iio_priv(indio_dev);
553 int ret;
554
555 mutex_lock(&data->mutex);
556 ret = bma180_set_pmode(data, mode);
557 mutex_unlock(&data->mutex);
558
559 return ret;
560}
561
587c2bea
NS
562static const struct iio_mount_matrix *
563bma180_accel_get_mount_matrix(const struct iio_dev *indio_dev,
564 const struct iio_chan_spec *chan)
565{
566 struct bma180_data *data = iio_priv(indio_dev);
567
568 return &data->orientation;
569}
570
fdadbce0
OK
571static const struct iio_enum bma180_power_mode_enum = {
572 .items = bma180_power_modes,
573 .num_items = ARRAY_SIZE(bma180_power_modes),
574 .get = bma180_get_power_mode,
575 .set = bma180_set_power_mode,
576};
577
578static const struct iio_chan_spec_ext_info bma180_ext_info[] = {
579 IIO_ENUM("power_mode", true, &bma180_power_mode_enum),
580 IIO_ENUM_AVAILABLE("power_mode", &bma180_power_mode_enum),
587c2bea
NS
581 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix),
582 { }
fdadbce0
OK
583};
584
6377aa49 585#define BMA180_ACC_CHANNEL(_axis, _bits) { \
fdadbce0 586 .type = IIO_ACCEL, \
5585215b
PM
587 .modified = 1, \
588 .channel2 = IIO_MOD_##_axis, \
5c1449d4
PM
589 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
590 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
fdadbce0 591 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \
5585215b 592 .scan_index = AXIS_##_axis, \
7d7feae7
JC
593 .scan_type = { \
594 .sign = 's', \
6377aa49 595 .realbits = _bits, \
7d7feae7 596 .storagebits = 16, \
6377aa49 597 .shift = 16 - _bits, \
7d7feae7 598 }, \
fdadbce0
OK
599 .ext_info = bma180_ext_info, \
600}
601
b81fbab7
PM
602#define BMA180_TEMP_CHANNEL { \
603 .type = IIO_TEMP, \
604 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
605 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \
606 .scan_index = TEMP, \
607 .scan_type = { \
608 .sign = 's', \
609 .realbits = 8, \
610 .storagebits = 16, \
611 }, \
612}
613
fdadbce0 614static const struct iio_chan_spec bma180_channels[] = {
6377aa49
PM
615 BMA180_ACC_CHANNEL(X, 14),
616 BMA180_ACC_CHANNEL(Y, 14),
617 BMA180_ACC_CHANNEL(Z, 14),
b81fbab7
PM
618 BMA180_TEMP_CHANNEL,
619 IIO_CHAN_SOFT_TIMESTAMP(4),
fdadbce0
OK
620};
621
2017cff2
PM
622static const struct iio_chan_spec bma250_channels[] = {
623 BMA180_ACC_CHANNEL(X, 10),
624 BMA180_ACC_CHANNEL(Y, 10),
625 BMA180_ACC_CHANNEL(Z, 10),
626 BMA180_TEMP_CHANNEL,
627 IIO_CHAN_SOFT_TIMESTAMP(4),
628};
629
1b9030f5
PM
630static const struct bma180_part_info bma180_part_info[] = {
631 [BMA180] = {
632 bma180_channels, ARRAY_SIZE(bma180_channels),
633 bma180_scale_table, ARRAY_SIZE(bma180_scale_table),
634 bma180_bw_table, ARRAY_SIZE(bma180_bw_table),
2017cff2
PM
635 BMA180_CTRL_REG0, BMA180_RESET_INT,
636 BMA180_CTRL_REG0, BMA180_SLEEP,
637 BMA180_BW_TCS, BMA180_BW,
638 BMA180_OFFSET_LSB1, BMA180_RANGE,
639 BMA180_TCO_Z, BMA180_MODE_CONFIG, BMA180_LOW_POWER,
640 BMA180_CTRL_REG3, BMA180_NEW_DATA_INT,
641 BMA180_RESET,
c1949ec1
PM
642 bma180_chip_config,
643 bma180_chip_disable,
1b9030f5 644 },
2017cff2
PM
645 [BMA250] = {
646 bma250_channels, ARRAY_SIZE(bma250_channels),
647 bma250_scale_table, ARRAY_SIZE(bma250_scale_table),
648 bma250_bw_table, ARRAY_SIZE(bma250_bw_table),
649 BMA250_INT_RESET_REG, BMA250_INT_RESET_MASK,
650 BMA250_POWER_REG, BMA250_SUSPEND_MASK,
651 BMA250_BW_REG, BMA250_BW_MASK,
652 BMA250_RANGE_REG, BMA250_RANGE_MASK,
653 BMA250_POWER_REG, BMA250_LOWPOWER_MASK, 1,
654 BMA250_INT_ENABLE_REG, BMA250_DATA_INTEN_MASK,
655 BMA250_RESET_REG,
656 bma250_chip_config,
657 bma250_chip_disable,
658 },
1b9030f5
PM
659};
660
fdadbce0
OK
661static irqreturn_t bma180_trigger_handler(int irq, void *p)
662{
663 struct iio_poll_func *pf = p;
664 struct iio_dev *indio_dev = pf->indio_dev;
665 struct bma180_data *data = iio_priv(indio_dev);
bc2b7dab 666 s64 time_ns = iio_get_time_ns(indio_dev);
fdadbce0
OK
667 int bit, ret, i = 0;
668
669 mutex_lock(&data->mutex);
fdadbce0 670
70dddeee 671 for_each_set_bit(bit, indio_dev->active_scan_mask,
fdadbce0 672 indio_dev->masklength) {
b81fbab7 673 ret = bma180_get_data_reg(data, bit);
fdadbce0
OK
674 if (ret < 0) {
675 mutex_unlock(&data->mutex);
676 goto err;
677 }
678 ((s16 *)data->buff)[i++] = ret;
679 }
b81fbab7 680
fdadbce0
OK
681 mutex_unlock(&data->mutex);
682
6bf9d877 683 iio_push_to_buffers_with_timestamp(indio_dev, data->buff, time_ns);
fdadbce0
OK
684err:
685 iio_trigger_notify_done(indio_dev->trig);
686
687 return IRQ_HANDLED;
688}
689
690static int bma180_data_rdy_trigger_set_state(struct iio_trigger *trig,
691 bool state)
692{
693 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
694 struct bma180_data *data = iio_priv(indio_dev);
695
696 return bma180_set_new_data_intr_state(data, state);
697}
698
699static int bma180_trig_try_reen(struct iio_trigger *trig)
700{
701 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
702 struct bma180_data *data = iio_priv(indio_dev);
703
704 return bma180_reset_intr(data);
705}
706
707static const struct iio_trigger_ops bma180_trigger_ops = {
708 .set_trigger_state = bma180_data_rdy_trigger_set_state,
709 .try_reenable = bma180_trig_try_reen,
fdadbce0
OK
710};
711
712static int bma180_probe(struct i2c_client *client,
713 const struct i2c_device_id *id)
714{
715 struct bma180_data *data;
716 struct iio_dev *indio_dev;
16f1b4f0 717 enum chip_ids chip;
fdadbce0
OK
718 int ret;
719
720 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
721 if (!indio_dev)
722 return -ENOMEM;
723
724 data = iio_priv(indio_dev);
725 i2c_set_clientdata(client, indio_dev);
726 data->client = client;
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JMC
727 if (client->dev.of_node)
728 chip = (enum chip_ids)of_device_get_match_data(&client->dev);
729 else
730 chip = id->driver_data;
731 data->part_info = &bma180_part_info[chip];
fdadbce0 732
587c2bea
NS
733 ret = iio_read_mount_matrix(&client->dev, "mount-matrix",
734 &data->orientation);
735 if (ret)
736 return ret;
737
c1949ec1 738 ret = data->part_info->chip_config(data);
fdadbce0
OK
739 if (ret < 0)
740 goto err_chip_disable;
741
742 mutex_init(&data->mutex);
fdadbce0 743 indio_dev->dev.parent = &client->dev;
1b9030f5
PM
744 indio_dev->channels = data->part_info->channels;
745 indio_dev->num_channels = data->part_info->num_channels;
2017cff2 746 indio_dev->name = id->name;
fdadbce0
OK
747 indio_dev->modes = INDIO_DIRECT_MODE;
748 indio_dev->info = &bma180_info;
749
16ed8692
PM
750 if (client->irq > 0) {
751 data->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name,
752 indio_dev->id);
753 if (!data->trig) {
754 ret = -ENOMEM;
755 goto err_chip_disable;
756 }
fdadbce0 757
16ed8692
PM
758 ret = devm_request_irq(&client->dev, client->irq,
759 iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING,
2017cff2 760 "bma180_event", data->trig);
16ed8692
PM
761 if (ret) {
762 dev_err(&client->dev, "unable to request IRQ\n");
763 goto err_trigger_free;
764 }
fdadbce0 765
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PM
766 data->trig->dev.parent = &client->dev;
767 data->trig->ops = &bma180_trigger_ops;
768 iio_trigger_set_drvdata(data->trig, indio_dev);
8deab475 769 indio_dev->trig = iio_trigger_get(data->trig);
fdadbce0 770
16ed8692
PM
771 ret = iio_trigger_register(data->trig);
772 if (ret)
773 goto err_trigger_free;
774 }
fdadbce0
OK
775
776 ret = iio_triggered_buffer_setup(indio_dev, NULL,
777 bma180_trigger_handler, NULL);
778 if (ret < 0) {
779 dev_err(&client->dev, "unable to setup iio triggered buffer\n");
780 goto err_trigger_unregister;
781 }
782
783 ret = iio_device_register(indio_dev);
784 if (ret < 0) {
785 dev_err(&client->dev, "unable to register iio device\n");
786 goto err_buffer_cleanup;
787 }
788
789 return 0;
790
791err_buffer_cleanup:
792 iio_triggered_buffer_cleanup(indio_dev);
793err_trigger_unregister:
16ed8692
PM
794 if (data->trig)
795 iio_trigger_unregister(data->trig);
fdadbce0 796err_trigger_free:
16ed8692 797 iio_trigger_free(data->trig);
fdadbce0 798err_chip_disable:
c1949ec1 799 data->part_info->chip_disable(data);
fdadbce0
OK
800
801 return ret;
802}
803
804static int bma180_remove(struct i2c_client *client)
805{
806 struct iio_dev *indio_dev = i2c_get_clientdata(client);
807 struct bma180_data *data = iio_priv(indio_dev);
808
809 iio_device_unregister(indio_dev);
810 iio_triggered_buffer_cleanup(indio_dev);
16ed8692
PM
811 if (data->trig) {
812 iio_trigger_unregister(data->trig);
813 iio_trigger_free(data->trig);
814 }
fdadbce0
OK
815
816 mutex_lock(&data->mutex);
c1949ec1 817 data->part_info->chip_disable(data);
fdadbce0
OK
818 mutex_unlock(&data->mutex);
819
820 return 0;
821}
822
823#ifdef CONFIG_PM_SLEEP
824static int bma180_suspend(struct device *dev)
825{
234efa17 826 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
fdadbce0
OK
827 struct bma180_data *data = iio_priv(indio_dev);
828 int ret;
829
830 mutex_lock(&data->mutex);
c7c69e85 831 ret = bma180_set_sleep_state(data, true);
fdadbce0
OK
832 mutex_unlock(&data->mutex);
833
834 return ret;
835}
836
837static int bma180_resume(struct device *dev)
838{
234efa17 839 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
fdadbce0
OK
840 struct bma180_data *data = iio_priv(indio_dev);
841 int ret;
842
843 mutex_lock(&data->mutex);
c7c69e85 844 ret = bma180_set_sleep_state(data, false);
fdadbce0
OK
845 mutex_unlock(&data->mutex);
846
847 return ret;
848}
849
850static SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume);
851#define BMA180_PM_OPS (&bma180_pm_ops)
852#else
853#define BMA180_PM_OPS NULL
854#endif
855
e05d83bc 856static const struct i2c_device_id bma180_ids[] = {
2017cff2
PM
857 { "bma180", BMA180 },
858 { "bma250", BMA250 },
fdadbce0
OK
859 { }
860};
861
1b9030f5 862MODULE_DEVICE_TABLE(i2c, bma180_ids);
fdadbce0 863
16f1b4f0
JMC
864static const struct of_device_id bma180_of_match[] = {
865 {
866 .compatible = "bosch,bma180",
867 .data = (void *)BMA180
868 },
869 {
870 .compatible = "bosch,bma250",
871 .data = (void *)BMA250
872 },
873 { }
874};
875MODULE_DEVICE_TABLE(of, bma180_of_match);
876
fdadbce0
OK
877static struct i2c_driver bma180_driver = {
878 .driver = {
2017cff2 879 .name = "bma180",
fdadbce0 880 .pm = BMA180_PM_OPS,
16f1b4f0 881 .of_match_table = bma180_of_match,
fdadbce0
OK
882 },
883 .probe = bma180_probe,
884 .remove = bma180_remove,
1b9030f5 885 .id_table = bma180_ids,
fdadbce0
OK
886};
887
888module_i2c_driver(bma180_driver);
889
890MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>");
891MODULE_AUTHOR("Texas Instruments, Inc.");
2017cff2 892MODULE_DESCRIPTION("Bosch BMA180/BMA250 triaxial acceleration sensor");
fdadbce0 893MODULE_LICENSE("GPL");