]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - drivers/iio/accel/kxsd9.c
Merge tag 'nfs-for-4.15-1' of git://git.linux-nfs.org/projects/anna/linux-nfs
[mirror_ubuntu-bionic-kernel.git] / drivers / iio / accel / kxsd9.c
CommitLineData
e435bc19
JC
1/*
2 * kxsd9.c simple support for the Kionix KXSD9 3D
3 * accelerometer.
4 *
0f8c9620 5 * Copyright (c) 2008-2009 Jonathan Cameron <jic23@kernel.org>
e435bc19
JC
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * The i2c interface is very similar, so shouldn't be a problem once
12 * I have a suitable wire made up.
13 *
14 * TODO: Support the motion detector
e435bc19
JC
15 */
16
e435bc19
JC
17#include <linux/device.h>
18#include <linux/kernel.h>
e435bc19 19#include <linux/sysfs.h>
5a0e3ad6 20#include <linux/slab.h>
99c97852 21#include <linux/module.h>
0d1fb2d5 22#include <linux/regmap.h>
11adc2b2 23#include <linux/bitops.h>
2bb4a02a
LW
24#include <linux/delay.h>
25#include <linux/regulator/consumer.h>
9a9a369d 26#include <linux/pm_runtime.h>
06458e27
JC
27#include <linux/iio/iio.h>
28#include <linux/iio/sysfs.h>
0427a106
LW
29#include <linux/iio/buffer.h>
30#include <linux/iio/triggered_buffer.h>
31#include <linux/iio/trigger_consumer.h>
e435bc19 32
bf96f6e8
LW
33#include "kxsd9.h"
34
e435bc19
JC
35#define KXSD9_REG_X 0x00
36#define KXSD9_REG_Y 0x02
37#define KXSD9_REG_Z 0x04
38#define KXSD9_REG_AUX 0x06
39#define KXSD9_REG_RESET 0x0a
40#define KXSD9_REG_CTRL_C 0x0c
41
11adc2b2
LW
42#define KXSD9_CTRL_C_FS_MASK 0x03
43#define KXSD9_CTRL_C_FS_8G 0x00
44#define KXSD9_CTRL_C_FS_6G 0x01
45#define KXSD9_CTRL_C_FS_4G 0x02
46#define KXSD9_CTRL_C_FS_2G 0x03
47#define KXSD9_CTRL_C_MOT_LAT BIT(3)
48#define KXSD9_CTRL_C_MOT_LEV BIT(4)
49#define KXSD9_CTRL_C_LP_MASK 0xe0
50#define KXSD9_CTRL_C_LP_NONE 0x00
51#define KXSD9_CTRL_C_LP_2000HZC BIT(5)
52#define KXSD9_CTRL_C_LP_2000HZB BIT(6)
53#define KXSD9_CTRL_C_LP_2000HZA (BIT(5)|BIT(6))
54#define KXSD9_CTRL_C_LP_1000HZ BIT(7)
55#define KXSD9_CTRL_C_LP_500HZ (BIT(7)|BIT(5))
56#define KXSD9_CTRL_C_LP_100HZ (BIT(7)|BIT(6))
57#define KXSD9_CTRL_C_LP_50HZ (BIT(7)|BIT(6)|BIT(5))
e435bc19
JC
58
59#define KXSD9_REG_CTRL_B 0x0d
11adc2b2
LW
60
61#define KXSD9_CTRL_B_CLK_HLD BIT(7)
62#define KXSD9_CTRL_B_ENABLE BIT(6)
63#define KXSD9_CTRL_B_ST BIT(5) /* Self-test */
64
e435bc19
JC
65#define KXSD9_REG_CTRL_A 0x0e
66
e435bc19
JC
67/**
68 * struct kxsd9_state - device related storage
0427a106 69 * @dev: pointer to the parent device
dc6ac050 70 * @map: regmap to the device
12884004 71 * @orientation: mounting matrix, flipped axis etc
2bb4a02a 72 * @regs: regulators for this device, VDD and IOVDD
9a9a369d 73 * @scale: the current scaling setting
dc6ac050 74 */
e435bc19 75struct kxsd9_state {
0427a106 76 struct device *dev;
0d1fb2d5 77 struct regmap *map;
12884004 78 struct iio_mount_matrix orientation;
2bb4a02a 79 struct regulator_bulk_data regs[2];
9a9a369d 80 u8 scale;
e435bc19
JC
81};
82
d34dbee8
JC
83#define KXSD9_SCALE_2G "0.011978"
84#define KXSD9_SCALE_4G "0.023927"
85#define KXSD9_SCALE_6G "0.035934"
86#define KXSD9_SCALE_8G "0.047853"
e435bc19 87
d34dbee8
JC
88/* reverse order */
89static const int kxsd9_micro_scales[4] = { 47853, 35934, 23927, 11978 };
e435bc19 90
84e2f6f9
LW
91#define KXSD9_ZERO_G_OFFSET -2048
92
2bb4a02a
LW
93/*
94 * Regulator names
95 */
96static const char kxsd9_reg_vdd[] = "vdd";
97static const char kxsd9_reg_iovdd[] = "iovdd";
98
d34dbee8 99static int kxsd9_write_scale(struct iio_dev *indio_dev, int micro)
e435bc19 100{
d34dbee8 101 int ret, i;
ed0c012b 102 struct kxsd9_state *st = iio_priv(indio_dev);
d34dbee8
JC
103 bool foundit = false;
104
105 for (i = 0; i < 4; i++)
106 if (micro == kxsd9_micro_scales[i]) {
107 foundit = true;
108 break;
109 }
110 if (!foundit)
e435bc19 111 return -EINVAL;
f3fb0011 112
11adc2b2
LW
113 ret = regmap_update_bits(st->map,
114 KXSD9_REG_CTRL_C,
115 KXSD9_CTRL_C_FS_MASK,
116 i);
bf96f6e8 117 if (ret < 0)
e435bc19 118 goto error_ret;
9a9a369d
LW
119
120 /* Cached scale when the sensor is powered down */
121 st->scale = i;
122
e435bc19 123error_ret:
d34dbee8 124 return ret;
e435bc19 125}
f3fb0011 126
f3fb0011
JC
127static IIO_CONST_ATTR(accel_scale_available,
128 KXSD9_SCALE_2G " "
129 KXSD9_SCALE_4G " "
130 KXSD9_SCALE_6G " "
131 KXSD9_SCALE_8G);
e435bc19
JC
132
133static struct attribute *kxsd9_attributes[] = {
f3fb0011 134 &iio_const_attr_accel_scale_available.dev_attr.attr,
e435bc19
JC
135 NULL,
136};
137
d34dbee8
JC
138static int kxsd9_write_raw(struct iio_dev *indio_dev,
139 struct iio_chan_spec const *chan,
140 int val,
141 int val2,
142 long mask)
143{
144 int ret = -EINVAL;
9a9a369d
LW
145 struct kxsd9_state *st = iio_priv(indio_dev);
146
147 pm_runtime_get_sync(st->dev);
d34dbee8 148
c8a9f805 149 if (mask == IIO_CHAN_INFO_SCALE) {
d34dbee8
JC
150 /* Check no integer component */
151 if (val)
152 return -EINVAL;
153 ret = kxsd9_write_scale(indio_dev, val2);
154 }
155
9a9a369d
LW
156 pm_runtime_mark_last_busy(st->dev);
157 pm_runtime_put_autosuspend(st->dev);
158
d34dbee8
JC
159 return ret;
160}
161
162static int kxsd9_read_raw(struct iio_dev *indio_dev,
163 struct iio_chan_spec const *chan,
164 int *val, int *val2, long mask)
165{
166 int ret = -EINVAL;
167 struct kxsd9_state *st = iio_priv(indio_dev);
0d1fb2d5 168 unsigned int regval;
84e2f6f9
LW
169 __be16 raw_val;
170 u16 nval;
d34dbee8 171
9a9a369d
LW
172 pm_runtime_get_sync(st->dev);
173
d34dbee8 174 switch (mask) {
31313fc6 175 case IIO_CHAN_INFO_RAW:
84e2f6f9
LW
176 ret = regmap_bulk_read(st->map, chan->address, &raw_val,
177 sizeof(raw_val));
178 if (ret)
d34dbee8 179 goto error_ret;
84e2f6f9
LW
180 nval = be16_to_cpu(raw_val);
181 /* Only 12 bits are valid */
182 nval >>= 4;
183 *val = nval;
184 ret = IIO_VAL_INT;
185 break;
186 case IIO_CHAN_INFO_OFFSET:
187 /* This has a bias of -2048 */
188 *val = KXSD9_ZERO_G_OFFSET;
7ac61a06 189 ret = IIO_VAL_INT;
d34dbee8 190 break;
c8a9f805 191 case IIO_CHAN_INFO_SCALE:
0d1fb2d5
LW
192 ret = regmap_read(st->map,
193 KXSD9_REG_CTRL_C,
194 &regval);
bf96f6e8 195 if (ret < 0)
d34dbee8 196 goto error_ret;
307fe9dd 197 *val = 0;
11adc2b2 198 *val2 = kxsd9_micro_scales[regval & KXSD9_CTRL_C_FS_MASK];
d34dbee8
JC
199 ret = IIO_VAL_INT_PLUS_MICRO;
200 break;
73327b4c 201 }
d34dbee8
JC
202
203error_ret:
9a9a369d
LW
204 pm_runtime_mark_last_busy(st->dev);
205 pm_runtime_put_autosuspend(st->dev);
206
d34dbee8
JC
207 return ret;
208};
0427a106
LW
209
210static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
211{
212 const struct iio_poll_func *pf = p;
213 struct iio_dev *indio_dev = pf->indio_dev;
214 struct kxsd9_state *st = iio_priv(indio_dev);
215 int ret;
216 /* 4 * 16bit values AND timestamp */
217 __be16 hw_values[8];
218
219 ret = regmap_bulk_read(st->map,
220 KXSD9_REG_X,
221 &hw_values,
222 8);
223 if (ret) {
224 dev_err(st->dev,
225 "error reading data\n");
226 return ret;
227 }
228
229 iio_push_to_buffers_with_timestamp(indio_dev,
230 hw_values,
231 iio_get_time_ns(indio_dev));
232 iio_trigger_notify_done(indio_dev->trig);
233
234 return IRQ_HANDLED;
235}
236
9a9a369d
LW
237static int kxsd9_buffer_preenable(struct iio_dev *indio_dev)
238{
239 struct kxsd9_state *st = iio_priv(indio_dev);
240
241 pm_runtime_get_sync(st->dev);
242
243 return 0;
244}
245
246static int kxsd9_buffer_postdisable(struct iio_dev *indio_dev)
247{
248 struct kxsd9_state *st = iio_priv(indio_dev);
249
250 pm_runtime_mark_last_busy(st->dev);
251 pm_runtime_put_autosuspend(st->dev);
252
253 return 0;
254}
255
256static const struct iio_buffer_setup_ops kxsd9_buffer_setup_ops = {
257 .preenable = kxsd9_buffer_preenable,
258 .postenable = iio_triggered_buffer_postenable,
259 .predisable = iio_triggered_buffer_predisable,
260 .postdisable = kxsd9_buffer_postdisable,
261};
262
12884004
LW
263static const struct iio_mount_matrix *
264kxsd9_get_mount_matrix(const struct iio_dev *indio_dev,
265 const struct iio_chan_spec *chan)
266{
267 struct kxsd9_state *st = iio_priv(indio_dev);
268
269 return &st->orientation;
270}
271
272static const struct iio_chan_spec_ext_info kxsd9_ext_info[] = {
273 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxsd9_get_mount_matrix),
274 { },
275};
276
0427a106 277#define KXSD9_ACCEL_CHAN(axis, index) \
d34dbee8
JC
278 { \
279 .type = IIO_ACCEL, \
280 .modified = 1, \
281 .channel2 = IIO_MOD_##axis, \
2f6bb534 282 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
84e2f6f9
LW
283 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
284 BIT(IIO_CHAN_INFO_OFFSET), \
12884004 285 .ext_info = kxsd9_ext_info, \
d34dbee8 286 .address = KXSD9_REG_##axis, \
0427a106
LW
287 .scan_index = index, \
288 .scan_type = { \
289 .sign = 'u', \
290 .realbits = 12, \
291 .storagebits = 16, \
292 .shift = 4, \
293 .endianness = IIO_BE, \
294 }, \
d34dbee8
JC
295 }
296
f4e4b955 297static const struct iio_chan_spec kxsd9_channels[] = {
0427a106
LW
298 KXSD9_ACCEL_CHAN(X, 0),
299 KXSD9_ACCEL_CHAN(Y, 1),
300 KXSD9_ACCEL_CHAN(Z, 2),
d34dbee8 301 {
6835cb6b 302 .type = IIO_VOLTAGE,
2f6bb534 303 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
d34dbee8
JC
304 .indexed = 1,
305 .address = KXSD9_REG_AUX,
0427a106
LW
306 .scan_index = 3,
307 .scan_type = {
308 .sign = 'u',
309 .realbits = 12,
310 .storagebits = 16,
311 .shift = 4,
312 .endianness = IIO_BE,
313 },
314 },
315 IIO_CHAN_SOFT_TIMESTAMP(4),
d34dbee8
JC
316};
317
e435bc19
JC
318static const struct attribute_group kxsd9_attribute_group = {
319 .attrs = kxsd9_attributes,
320};
321
4ae1c61f 322static int kxsd9_power_up(struct kxsd9_state *st)
e435bc19 323{
d34dbee8
JC
324 int ret;
325
2bb4a02a
LW
326 /* Enable the regulators */
327 ret = regulator_bulk_enable(ARRAY_SIZE(st->regs), st->regs);
328 if (ret) {
329 dev_err(st->dev, "Cannot enable regulators\n");
330 return ret;
331 }
332
333 /* Power up */
334 ret = regmap_write(st->map,
335 KXSD9_REG_CTRL_B,
336 KXSD9_CTRL_B_ENABLE);
d34dbee8
JC
337 if (ret)
338 return ret;
2bb4a02a
LW
339
340 /*
341 * Set 1000Hz LPF, 2g fullscale, motion wakeup threshold 1g,
342 * latched wakeup
343 */
344 ret = regmap_write(st->map,
345 KXSD9_REG_CTRL_C,
346 KXSD9_CTRL_C_LP_1000HZ |
347 KXSD9_CTRL_C_MOT_LEV |
348 KXSD9_CTRL_C_MOT_LAT |
9a9a369d 349 st->scale);
2bb4a02a
LW
350 if (ret)
351 return ret;
352
353 /*
354 * Power-up time depends on the LPF setting, but typ 15.9 ms, let's
355 * set 20 ms to allow for some slack.
356 */
357 msleep(20);
358
359 return 0;
e435bc19
JC
360};
361
2bb4a02a
LW
362static int kxsd9_power_down(struct kxsd9_state *st)
363{
364 int ret;
365
366 /*
367 * Set into low power mode - since there may be more users of the
368 * regulators this is the first step of the power saving: it will
369 * make sure we conserve power even if there are others users on the
370 * regulators.
371 */
372 ret = regmap_update_bits(st->map,
373 KXSD9_REG_CTRL_B,
374 KXSD9_CTRL_B_ENABLE,
375 0);
376 if (ret)
377 return ret;
378
379 /* Disable the regulators */
380 ret = regulator_bulk_disable(ARRAY_SIZE(st->regs), st->regs);
381 if (ret) {
382 dev_err(st->dev, "Cannot disable regulators\n");
383 return ret;
384 }
385
386 return 0;
387}
388
6fe8135f 389static const struct iio_info kxsd9_info = {
d34dbee8
JC
390 .read_raw = &kxsd9_read_raw,
391 .write_raw = &kxsd9_write_raw,
6fe8135f 392 .attrs = &kxsd9_attribute_group,
6fe8135f
JC
393};
394
0427a106
LW
395/* Four channels apart from timestamp, scan mask = 0x0f */
396static const unsigned long kxsd9_scan_masks[] = { 0xf, 0 };
397
79383aae 398int kxsd9_common_probe(struct device *dev,
0d1fb2d5 399 struct regmap *map,
bf96f6e8 400 const char *name)
e435bc19 401{
ed0c012b 402 struct iio_dev *indio_dev;
e435bc19 403 struct kxsd9_state *st;
9f907972 404 int ret;
e435bc19 405
79383aae 406 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
4ee30933
SK
407 if (!indio_dev)
408 return -ENOMEM;
409
ed0c012b 410 st = iio_priv(indio_dev);
79383aae 411 st->dev = dev;
0d1fb2d5 412 st->map = map;
e435bc19 413
d34dbee8
JC
414 indio_dev->channels = kxsd9_channels;
415 indio_dev->num_channels = ARRAY_SIZE(kxsd9_channels);
9f907972 416 indio_dev->name = name;
79383aae 417 indio_dev->dev.parent = dev;
ed0c012b
JC
418 indio_dev->info = &kxsd9_info;
419 indio_dev->modes = INDIO_DIRECT_MODE;
0427a106 420 indio_dev->available_scan_masks = kxsd9_scan_masks;
ed0c012b 421
12884004
LW
422 /* Read the mounting matrix, if present */
423 ret = of_iio_read_mount_matrix(dev,
424 "mount-matrix",
425 &st->orientation);
426 if (ret)
427 return ret;
428
2bb4a02a
LW
429 /* Fetch and turn on regulators */
430 st->regs[0].supply = kxsd9_reg_vdd;
431 st->regs[1].supply = kxsd9_reg_iovdd;
79383aae 432 ret = devm_regulator_bulk_get(dev,
2bb4a02a
LW
433 ARRAY_SIZE(st->regs),
434 st->regs);
435 if (ret) {
79383aae 436 dev_err(dev, "Cannot get regulators\n");
2bb4a02a
LW
437 return ret;
438 }
9a9a369d
LW
439 /* Default scaling */
440 st->scale = KXSD9_CTRL_C_FS_2G;
2bb4a02a 441
9f907972
LW
442 kxsd9_power_up(st);
443
0427a106
LW
444 ret = iio_triggered_buffer_setup(indio_dev,
445 iio_pollfunc_store_time,
446 kxsd9_trigger_handler,
9a9a369d 447 &kxsd9_buffer_setup_ops);
0427a106 448 if (ret) {
79383aae 449 dev_err(dev, "triggered buffer setup failed\n");
2bb4a02a 450 goto err_power_down;
0427a106
LW
451 }
452
9f907972
LW
453 ret = iio_device_register(indio_dev);
454 if (ret)
0427a106 455 goto err_cleanup_buffer;
9f907972 456
79383aae 457 dev_set_drvdata(dev, indio_dev);
154021a3 458
9a9a369d
LW
459 /* Enable runtime PM */
460 pm_runtime_get_noresume(dev);
461 pm_runtime_set_active(dev);
462 pm_runtime_enable(dev);
463 /*
464 * Set autosuspend to two orders of magnitude larger than the
465 * start-up time. 20ms start-up time means 2000ms autosuspend,
466 * i.e. 2 seconds.
467 */
468 pm_runtime_set_autosuspend_delay(dev, 2000);
469 pm_runtime_use_autosuspend(dev);
470 pm_runtime_put(dev);
471
154021a3 472 return 0;
0427a106
LW
473
474err_cleanup_buffer:
475 iio_triggered_buffer_cleanup(indio_dev);
2bb4a02a
LW
476err_power_down:
477 kxsd9_power_down(st);
0427a106
LW
478
479 return ret;
154021a3 480}
bf96f6e8 481EXPORT_SYMBOL(kxsd9_common_probe);
154021a3 482
79383aae 483int kxsd9_common_remove(struct device *dev)
154021a3 484{
79383aae 485 struct iio_dev *indio_dev = dev_get_drvdata(dev);
2bb4a02a 486 struct kxsd9_state *st = iio_priv(indio_dev);
154021a3 487
0427a106 488 iio_triggered_buffer_cleanup(indio_dev);
154021a3 489 iio_device_unregister(indio_dev);
9a9a369d
LW
490 pm_runtime_get_sync(dev);
491 pm_runtime_put_noidle(dev);
492 pm_runtime_disable(dev);
2bb4a02a 493 kxsd9_power_down(st);
154021a3 494
9f907972
LW
495 return 0;
496}
bf96f6e8 497EXPORT_SYMBOL(kxsd9_common_remove);
e435bc19 498
9a9a369d
LW
499#ifdef CONFIG_PM
500static int kxsd9_runtime_suspend(struct device *dev)
501{
502 struct iio_dev *indio_dev = dev_get_drvdata(dev);
503 struct kxsd9_state *st = iio_priv(indio_dev);
504
505 return kxsd9_power_down(st);
506}
507
508static int kxsd9_runtime_resume(struct device *dev)
509{
510 struct iio_dev *indio_dev = dev_get_drvdata(dev);
511 struct kxsd9_state *st = iio_priv(indio_dev);
512
513 return kxsd9_power_up(st);
514}
515#endif /* CONFIG_PM */
516
517const struct dev_pm_ops kxsd9_dev_pm_ops = {
518 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
519 pm_runtime_force_resume)
520 SET_RUNTIME_PM_OPS(kxsd9_runtime_suspend,
521 kxsd9_runtime_resume, NULL)
522};
523EXPORT_SYMBOL(kxsd9_dev_pm_ops);
524
0f8c9620 525MODULE_AUTHOR("Jonathan Cameron <jic23@kernel.org>");
bf96f6e8 526MODULE_DESCRIPTION("Kionix KXSD9 driver");
e435bc19 527MODULE_LICENSE("GPL v2");