[mirror_ubuntu-jammy-kernel.git] / drivers / iio / adc / ad7266.c

/*
 * AD7266/65 SPI ADC driver
 *
 * Copyright 2012 Analog Devices Inc.
 *
 * Licensed under the GPL-2.
 */

#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/iio/iio.h>
#include <linux/iio/buffer.h>
#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>

#include <linux/platform_data/ad7266.h>

struct ad7266_state {
	struct spi_device	*spi;
	struct regulator	*reg;
	unsigned long		vref_mv;

	struct spi_transfer	single_xfer[3];
	struct spi_message	single_msg;

	enum ad7266_range	range;
	enum ad7266_mode	mode;
	bool			fixed_addr;
	struct gpio		gpios[3];

	/*
	 * DMA (thus cache coherency maintenance) requires the
	 * transfer buffers to live in their own cache lines.
	 * The buffer needs to be large enough to hold two samples (4 bytes) and
	 * the naturally aligned timestamp (8 bytes).
	 */
	struct {
		__be16 sample[2];
		s64 timestamp;
	} data ____cacheline_aligned;
};

static int ad7266_wakeup(struct ad7266_state *st)
{
	/* Any read with >= 2 bytes will wake the device */
	return spi_read(st->spi, &st->data.sample[0], 2);
}

static int ad7266_powerdown(struct ad7266_state *st)
{
	/* Any read with < 2 bytes will powerdown the device */
	return spi_read(st->spi, &st->data.sample[0], 1);
}

static int ad7266_preenable(struct iio_dev *indio_dev)
{
	struct ad7266_state *st = iio_priv(indio_dev);
	return ad7266_wakeup(st);
}

static int ad7266_postdisable(struct iio_dev *indio_dev)
{
	struct ad7266_state *st = iio_priv(indio_dev);
	return ad7266_powerdown(st);
}

static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
	.preenable = &ad7266_preenable,
	.postenable = &iio_triggered_buffer_postenable,
	.predisable = &iio_triggered_buffer_predisable,
	.postdisable = &ad7266_postdisable,
};

static irqreturn_t ad7266_trigger_handler(int irq, void *p)
{
	struct iio_poll_func *pf = p;
	struct iio_dev *indio_dev = pf->indio_dev;
	struct ad7266_state *st = iio_priv(indio_dev);
	int ret;

	ret = spi_read(st->spi, st->data.sample, 4);
	if (ret == 0) {
		iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
			    pf->timestamp);
	}

	iio_trigger_notify_done(indio_dev->trig);

	return IRQ_HANDLED;
}

static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
{
	unsigned int i;

	if (st->fixed_addr)
		return;

	switch (st->mode) {
	case AD7266_MODE_SINGLE_ENDED:
		nr >>= 1;
		break;
	case AD7266_MODE_PSEUDO_DIFF:
		nr |= 1;
		break;
	case AD7266_MODE_DIFF:
		nr &= ~1;
		break;
	}

	for (i = 0; i < 3; ++i)
		gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
}

static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
	const unsigned long *scan_mask)
{
	struct ad7266_state *st = iio_priv(indio_dev);
	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);

	ad7266_select_input(st, nr);

	return 0;
}

static int ad7266_read_single(struct ad7266_state *st, int *val,
	unsigned int address)
{
	int ret;

	ad7266_select_input(st, address);

	ret = spi_sync(st->spi, &st->single_msg);
	*val = be16_to_cpu(st->data.sample[address % 2]);

	return ret;
}

static int ad7266_read_raw(struct iio_dev *indio_dev,
	struct iio_chan_spec const *chan, int *val, int *val2, long m)
{
	struct ad7266_state *st = iio_priv(indio_dev);
	unsigned long scale_mv;
	int ret;

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		ret = iio_device_claim_direct_mode(indio_dev);
		if (ret)
			return ret;
		ret = ad7266_read_single(st, val, chan->address);
		iio_device_release_direct_mode(indio_dev);

		*val = (*val >> 2) & 0xfff;
		if (chan->scan_type.sign == 's')
			*val = sign_extend32(*val, 11);

		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		scale_mv = st->vref_mv;
		if (st->mode == AD7266_MODE_DIFF)
			scale_mv *= 2;
		if (st->range == AD7266_RANGE_2VREF)
			scale_mv *= 2;

		*val = scale_mv;
		*val2 = chan->scan_type.realbits;
		return IIO_VAL_FRACTIONAL_LOG2;
	case IIO_CHAN_INFO_OFFSET:
		if (st->range == AD7266_RANGE_2VREF &&
			st->mode != AD7266_MODE_DIFF)
			*val = 2048;
		else
			*val = 0;
		return IIO_VAL_INT;
	}
	return -EINVAL;
}

#define AD7266_CHAN(_chan, _sign) {			\
	.type = IIO_VOLTAGE,				\
	.indexed = 1,					\
	.channel = (_chan),				\
	.address = (_chan),				\
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
		| BIT(IIO_CHAN_INFO_OFFSET),			\
	.scan_index = (_chan),				\
	.scan_type = {					\
		.sign = (_sign),			\
		.realbits = 12,				\
		.storagebits = 16,			\
		.shift = 2,				\
		.endianness = IIO_BE,			\
	},						\
}

#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
const struct iio_chan_spec ad7266_channels_##_name[] = { \
	AD7266_CHAN(0, (_sign)), \
	AD7266_CHAN(1, (_sign)), \
	AD7266_CHAN(2, (_sign)), \
	AD7266_CHAN(3, (_sign)), \
	AD7266_CHAN(4, (_sign)), \
	AD7266_CHAN(5, (_sign)), \
	AD7266_CHAN(6, (_sign)), \
	AD7266_CHAN(7, (_sign)), \
	AD7266_CHAN(8, (_sign)), \
	AD7266_CHAN(9, (_sign)), \
	AD7266_CHAN(10, (_sign)), \
	AD7266_CHAN(11, (_sign)), \
	IIO_CHAN_SOFT_TIMESTAMP(13), \
}

#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
	AD7266_CHAN(0, (_sign)), \
	AD7266_CHAN(1, (_sign)), \
	IIO_CHAN_SOFT_TIMESTAMP(2), \
}

static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');

#define AD7266_CHAN_DIFF(_chan, _sign) {			\
	.type = IIO_VOLTAGE,				\
	.indexed = 1,					\
	.channel = (_chan) * 2,				\
	.channel2 = (_chan) * 2 + 1,			\
	.address = (_chan),				\
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE)	\
		| BIT(IIO_CHAN_INFO_OFFSET),			\
	.scan_index = (_chan),				\
	.scan_type = {					\
		.sign = _sign,			\
		.realbits = 12,				\
		.storagebits = 16,			\
		.shift = 2,				\
		.endianness = IIO_BE,			\
	},						\
	.differential = 1,				\
}

#define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
	AD7266_CHAN_DIFF(0, (_sign)), \
	AD7266_CHAN_DIFF(1, (_sign)), \
	AD7266_CHAN_DIFF(2, (_sign)), \
	AD7266_CHAN_DIFF(3, (_sign)), \
	AD7266_CHAN_DIFF(4, (_sign)), \
	AD7266_CHAN_DIFF(5, (_sign)), \
	IIO_CHAN_SOFT_TIMESTAMP(6), \
}

static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');

#define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
	AD7266_CHAN_DIFF(0, (_sign)), \
	AD7266_CHAN_DIFF(1, (_sign)), \
	IIO_CHAN_SOFT_TIMESTAMP(2), \
}

static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');

static const struct iio_info ad7266_info = {
	.read_raw = &ad7266_read_raw,
	.update_scan_mode = &ad7266_update_scan_mode,
};

static const unsigned long ad7266_available_scan_masks[] = {
	0x003,
	0x00c,
	0x030,
	0x0c0,
	0x300,
	0xc00,
	0x000,
};

static const unsigned long ad7266_available_scan_masks_diff[] = {
	0x003,
	0x00c,
	0x030,
	0x000,
};

static const unsigned long ad7266_available_scan_masks_fixed[] = {
	0x003,
	0x000,
};

struct ad7266_chan_info {
	const struct iio_chan_spec *channels;
	unsigned int num_channels;
	const unsigned long *scan_masks;
};

#define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
	(((_differential) << 2) | ((_signed) << 1) | ((_fixed) << 0))

static const struct ad7266_chan_info ad7266_chan_infos[] = {
	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
		.channels = ad7266_channels_u,
		.num_channels = ARRAY_SIZE(ad7266_channels_u),
		.scan_masks = ad7266_available_scan_masks,
	},
	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
		.channels = ad7266_channels_u_fixed,
		.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
		.scan_masks = ad7266_available_scan_masks_fixed,
	},
	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
		.channels = ad7266_channels_s,
		.num_channels = ARRAY_SIZE(ad7266_channels_s),
		.scan_masks = ad7266_available_scan_masks,
	},
	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
		.channels = ad7266_channels_s_fixed,
		.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
		.scan_masks = ad7266_available_scan_masks_fixed,
	},
	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
		.channels = ad7266_channels_diff_u,
		.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
		.scan_masks = ad7266_available_scan_masks_diff,
	},
	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
		.channels = ad7266_channels_diff_fixed_u,
		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
		.scan_masks = ad7266_available_scan_masks_fixed,
	},
	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
		.channels = ad7266_channels_diff_s,
		.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
		.scan_masks = ad7266_available_scan_masks_diff,
	},
	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
		.channels = ad7266_channels_diff_fixed_s,
		.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
		.scan_masks = ad7266_available_scan_masks_fixed,
	},
};

static void ad7266_init_channels(struct iio_dev *indio_dev)
{
	struct ad7266_state *st = iio_priv(indio_dev);
	bool is_differential, is_signed;
	const struct ad7266_chan_info *chan_info;
	int i;

	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
	is_signed = (st->range == AD7266_RANGE_2VREF) |
		    (st->mode == AD7266_MODE_DIFF);

	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
	chan_info = &ad7266_chan_infos[i];

	indio_dev->channels = chan_info->channels;
	indio_dev->num_channels = chan_info->num_channels;
	indio_dev->available_scan_masks = chan_info->scan_masks;
	indio_dev->masklength = chan_info->num_channels - 1;
}

static const char * const ad7266_gpio_labels[] = {
	"AD0", "AD1", "AD2",
};

static int ad7266_probe(struct spi_device *spi)
{
	struct ad7266_platform_data *pdata = spi->dev.platform_data;
	struct iio_dev *indio_dev;
	struct ad7266_state *st;
	unsigned int i;
	int ret;

	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	if (indio_dev == NULL)
		return -ENOMEM;

	st = iio_priv(indio_dev);

	st->reg = devm_regulator_get_optional(&spi->dev, "vref");
	if (!IS_ERR(st->reg)) {
		ret = regulator_enable(st->reg);
		if (ret)
			return ret;

		ret = regulator_get_voltage(st->reg);
		if (ret < 0)
			goto error_disable_reg;

		st->vref_mv = ret / 1000;
	} else {
		/* Any other error indicates that the regulator does exist */
		if (PTR_ERR(st->reg) != -ENODEV)
			return PTR_ERR(st->reg);
		/* Use internal reference */
		st->vref_mv = 2500;
	}

	if (pdata) {
		st->fixed_addr = pdata->fixed_addr;
		st->mode = pdata->mode;
		st->range = pdata->range;

		if (!st->fixed_addr) {
			for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
				st->gpios[i].gpio = pdata->addr_gpios[i];
				st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
				st->gpios[i].label = ad7266_gpio_labels[i];
			}
			ret = gpio_request_array(st->gpios,
				ARRAY_SIZE(st->gpios));
			if (ret)
				goto error_disable_reg;
		}
	} else {
		st->fixed_addr = true;
		st->range = AD7266_RANGE_VREF;
		st->mode = AD7266_MODE_DIFF;
	}

	spi_set_drvdata(spi, indio_dev);
	st->spi = spi;

	indio_dev->dev.parent = &spi->dev;
	indio_dev->dev.of_node = spi->dev.of_node;
	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->info = &ad7266_info;

	ad7266_init_channels(indio_dev);

	/* wakeup */
	st->single_xfer[0].rx_buf = &st->data.sample[0];
	st->single_xfer[0].len = 2;
	st->single_xfer[0].cs_change = 1;
	/* conversion */
	st->single_xfer[1].rx_buf = st->data.sample;
	st->single_xfer[1].len = 4;
	st->single_xfer[1].cs_change = 1;
	/* powerdown */
	st->single_xfer[2].tx_buf = &st->data.sample[0];
	st->single_xfer[2].len = 1;

	spi_message_init(&st->single_msg);
	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);

	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
		&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
	if (ret)
		goto error_free_gpios;

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_buffer_cleanup;

	return 0;

error_buffer_cleanup:
	iio_triggered_buffer_cleanup(indio_dev);
error_free_gpios:
	if (!st->fixed_addr)
		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
error_disable_reg:
	if (!IS_ERR(st->reg))
		regulator_disable(st->reg);

	return ret;
}

static int ad7266_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct ad7266_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	iio_triggered_buffer_cleanup(indio_dev);
	if (!st->fixed_addr)
		gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
	if (!IS_ERR(st->reg))
		regulator_disable(st->reg);

	return 0;
}

static const struct spi_device_id ad7266_id[] = {
	{"ad7265", 0},
	{"ad7266", 0},
	{ }
};
MODULE_DEVICE_TABLE(spi, ad7266_id);

static struct spi_driver ad7266_driver = {
	.driver = {
		.name	= "ad7266",
	},
	.probe		= ad7266_probe,
	.remove		= ad7266_remove,
	.id_table	= ad7266_id,
};
module_spi_driver(ad7266_driver);

MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
8ec4cf53 LPC	1	/*
	2	* AD7266/65 SPI ADC driver
	3	*
	4	* Copyright 2012 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2.
	7	*/
	8
	9	#include <linux/device.h>
	10	#include <linux/kernel.h>
	11	#include <linux/slab.h>
	12	#include <linux/spi/spi.h>
	13	#include <linux/regulator/consumer.h>
	14	#include <linux/err.h>
	15	#include <linux/gpio.h>
	16	#include <linux/module.h>
	17
	18	#include <linux/interrupt.h>
	19
	20	#include <linux/iio/iio.h>
	21	#include <linux/iio/buffer.h>
	22	#include <linux/iio/trigger_consumer.h>
	23	#include <linux/iio/triggered_buffer.h>
	24
	25	#include <linux/platform_data/ad7266.h>
	26
	27	struct ad7266_state {
	28	struct spi_device *spi;
	29	struct regulator *reg;
2ebc39c0	30	unsigned long vref_mv;
8ec4cf53 LPC	31
	32	struct spi_transfer single_xfer[3];
	33	struct spi_message single_msg;
	34
	35	enum ad7266_range range;
	36	enum ad7266_mode mode;
	37	bool fixed_addr;
	38	struct gpio gpios[3];
	39
	40	/*
	41	* DMA (thus cache coherency maintenance) requires the
	42	* transfer buffers to live in their own cache lines.
	43	* The buffer needs to be large enough to hold two samples (4 bytes) and
	44	* the naturally aligned timestamp (8 bytes).
	45	*/
54e018da LPC	46	struct {
	47	__be16 sample[2];
	48	s64 timestamp;
	49	} data ____cacheline_aligned;
8ec4cf53 LPC	50	};
	51
	52	static int ad7266_wakeup(struct ad7266_state *st)
	53	{
	54	/* Any read with >= 2 bytes will wake the device */
54e018da	55	return spi_read(st->spi, &st->data.sample[0], 2);
8ec4cf53 LPC	56	}
	57
	58	static int ad7266_powerdown(struct ad7266_state *st)
	59	{
	60	/* Any read with < 2 bytes will powerdown the device */
54e018da	61	return spi_read(st->spi, &st->data.sample[0], 1);
8ec4cf53 LPC	62	}
	63
	64	static int ad7266_preenable(struct iio_dev *indio_dev)
	65	{
	66	struct ad7266_state *st = iio_priv(indio_dev);
06e1b542	67	return ad7266_wakeup(st);
8ec4cf53 LPC	68	}
	69
	70	static int ad7266_postdisable(struct iio_dev *indio_dev)
	71	{
	72	struct ad7266_state *st = iio_priv(indio_dev);
	73	return ad7266_powerdown(st);
	74	}
	75
	76	static const struct iio_buffer_setup_ops iio_triggered_buffer_setup_ops = {
	77	.preenable = &ad7266_preenable,
	78	.postenable = &iio_triggered_buffer_postenable,
	79	.predisable = &iio_triggered_buffer_predisable,
	80	.postdisable = &ad7266_postdisable,
	81	};
	82
	83	static irqreturn_t ad7266_trigger_handler(int irq, void *p)
	84	{
	85	struct iio_poll_func *pf = p;
	86	struct iio_dev *indio_dev = pf->indio_dev;
8ec4cf53 LPC	87	struct ad7266_state *st = iio_priv(indio_dev);
	88	int ret;
	89
54e018da	90	ret = spi_read(st->spi, st->data.sample, 4);
8ec4cf53	91	if (ret == 0) {
54e018da	92	iio_push_to_buffers_with_timestamp(indio_dev, &st->data,
fce8abfd	93	pf->timestamp);
8ec4cf53 LPC	94	}
	95
	96	iio_trigger_notify_done(indio_dev->trig);
	97
	98	return IRQ_HANDLED;
	99	}
	100
	101	static void ad7266_select_input(struct ad7266_state *st, unsigned int nr)
	102	{
	103	unsigned int i;
	104
	105	if (st->fixed_addr)
	106	return;
	107
	108	switch (st->mode) {
	109	case AD7266_MODE_SINGLE_ENDED:
	110	nr >>= 1;
	111	break;
	112	case AD7266_MODE_PSEUDO_DIFF:
	113	nr \|= 1;
	114	break;
	115	case AD7266_MODE_DIFF:
	116	nr &= ~1;
	117	break;
	118	}
	119
	120	for (i = 0; i < 3; ++i)
	121	gpio_set_value(st->gpios[i].gpio, (bool)(nr & BIT(i)));
	122	}
	123
	124	static int ad7266_update_scan_mode(struct iio_dev *indio_dev,
	125	const unsigned long *scan_mask)
	126	{
	127	struct ad7266_state *st = iio_priv(indio_dev);
	128	unsigned int nr = find_first_bit(scan_mask, indio_dev->masklength);
	129
	130	ad7266_select_input(st, nr);
	131
	132	return 0;
	133	}
	134
	135	static int ad7266_read_single(struct ad7266_state st, int val,
	136	unsigned int address)
	137	{
	138	int ret;
	139
	140	ad7266_select_input(st, address);
	141
	142	ret = spi_sync(st->spi, &st->single_msg);
54e018da	143	*val = be16_to_cpu(st->data.sample[address % 2]);
8ec4cf53 LPC	144
	145	return ret;
	146	}
	147
	148	static int ad7266_read_raw(struct iio_dev *indio_dev,
	149	struct iio_chan_spec const chan, int val, int *val2, long m)
	150	{
	151	struct ad7266_state *st = iio_priv(indio_dev);
2ebc39c0	152	unsigned long scale_mv;
8ec4cf53 LPC	153	int ret;
	154
	155	switch (m) {
	156	case IIO_CHAN_INFO_RAW:
c70df20e	157	ret = iio_device_claim_direct_mode(indio_dev);
8ec4cf53 LPC	158	if (ret)
8ec4cf53 LPC	159	return ret;
c70df20e AS	160	ret = ad7266_read_single(st, val, chan->address);
c70df20e AS	161	iio_device_release_direct_mode(indio_dev);
8ec4cf53 LPC	162
	163	val = (val >> 2) & 0xfff;
	164	if (chan->scan_type.sign == 's')
	165	val = sign_extend32(val, 11);
	166
	167	return IIO_VAL_INT;
	168	case IIO_CHAN_INFO_SCALE:
2ebc39c0	169	scale_mv = st->vref_mv;
8ec4cf53	170	if (st->mode == AD7266_MODE_DIFF)
2ebc39c0	171	scale_mv *= 2;
8ec4cf53	172	if (st->range == AD7266_RANGE_2VREF)
2ebc39c0	173	scale_mv *= 2;
8ec4cf53	174
2ebc39c0 LPC	175	*val = scale_mv;
	176	*val2 = chan->scan_type.realbits;
	177	return IIO_VAL_FRACTIONAL_LOG2;
8ec4cf53 LPC	178	case IIO_CHAN_INFO_OFFSET:
	179	if (st->range == AD7266_RANGE_2VREF &&
	180	st->mode != AD7266_MODE_DIFF)
	181	*val = 2048;
	182	else
	183	*val = 0;
	184	return IIO_VAL_INT;
	185	}
	186	return -EINVAL;
	187	}
	188
	189	#define AD7266_CHAN(_chan, _sign) { \
	190	.type = IIO_VOLTAGE, \
	191	.indexed = 1, \
	192	.channel = (_chan), \
	193	.address = (_chan), \
3234ac7e JC	194	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	195	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	196	\| BIT(IIO_CHAN_INFO_OFFSET), \
8ec4cf53 LPC	197	.scan_index = (_chan), \
	198	.scan_type = { \
	199	.sign = (_sign), \
	200	.realbits = 12, \
	201	.storagebits = 16, \
	202	.shift = 2, \
	203	.endianness = IIO_BE, \
	204	}, \
	205	}
	206
	207	#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS(_name, _sign) \
	208	const struct iio_chan_spec ad7266_channels_##_name[] = { \
	209	AD7266_CHAN(0, (_sign)), \
	210	AD7266_CHAN(1, (_sign)), \
	211	AD7266_CHAN(2, (_sign)), \
	212	AD7266_CHAN(3, (_sign)), \
	213	AD7266_CHAN(4, (_sign)), \
	214	AD7266_CHAN(5, (_sign)), \
	215	AD7266_CHAN(6, (_sign)), \
	216	AD7266_CHAN(7, (_sign)), \
	217	AD7266_CHAN(8, (_sign)), \
	218	AD7266_CHAN(9, (_sign)), \
	219	AD7266_CHAN(10, (_sign)), \
	220	AD7266_CHAN(11, (_sign)), \
	221	IIO_CHAN_SOFT_TIMESTAMP(13), \
	222	}
	223
	224	#define AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(_name, _sign) \
	225	const struct iio_chan_spec ad7266_channels_##_name##_fixed[] = { \
	226	AD7266_CHAN(0, (_sign)), \
	227	AD7266_CHAN(1, (_sign)), \
	228	IIO_CHAN_SOFT_TIMESTAMP(2), \
	229	}
	230
	231	static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(u, 'u');
	232	static AD7266_DECLARE_SINGLE_ENDED_CHANNELS(s, 's');
	233	static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(u, 'u');
	234	static AD7266_DECLARE_SINGLE_ENDED_CHANNELS_FIXED(s, 's');
	235
	236	#define AD7266_CHAN_DIFF(_chan, _sign) { \
	237	.type = IIO_VOLTAGE, \
	238	.indexed = 1, \
	239	.channel = (_chan) * 2, \
	240	.channel2 = (_chan) * 2 + 1, \
	241	.address = (_chan), \
3234ac7e JC	242	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	243	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) \
	244	\| BIT(IIO_CHAN_INFO_OFFSET), \
8ec4cf53 LPC	245	.scan_index = (_chan), \
	246	.scan_type = { \
	247	.sign = _sign, \
	248	.realbits = 12, \
	249	.storagebits = 16, \
	250	.shift = 2, \
	251	.endianness = IIO_BE, \
	252	}, \
	253	.differential = 1, \
	254	}
	255
	256	#define AD7266_DECLARE_DIFF_CHANNELS(_name, _sign) \
	257	const struct iio_chan_spec ad7266_channels_diff_##_name[] = { \
	258	AD7266_CHAN_DIFF(0, (_sign)), \
	259	AD7266_CHAN_DIFF(1, (_sign)), \
	260	AD7266_CHAN_DIFF(2, (_sign)), \
	261	AD7266_CHAN_DIFF(3, (_sign)), \
	262	AD7266_CHAN_DIFF(4, (_sign)), \
	263	AD7266_CHAN_DIFF(5, (_sign)), \
	264	IIO_CHAN_SOFT_TIMESTAMP(6), \
	265	}
	266
	267	static AD7266_DECLARE_DIFF_CHANNELS(s, 's');
	268	static AD7266_DECLARE_DIFF_CHANNELS(u, 'u');
	269
	270	#define AD7266_DECLARE_DIFF_CHANNELS_FIXED(_name, _sign) \
	271	const struct iio_chan_spec ad7266_channels_diff_fixed_##_name[] = { \
	272	AD7266_CHAN_DIFF(0, (_sign)), \
	273	AD7266_CHAN_DIFF(1, (_sign)), \
	274	IIO_CHAN_SOFT_TIMESTAMP(2), \
	275	}
	276
	277	static AD7266_DECLARE_DIFF_CHANNELS_FIXED(s, 's');
	278	static AD7266_DECLARE_DIFF_CHANNELS_FIXED(u, 'u');
	279
	280	static const struct iio_info ad7266_info = {
	281	.read_raw = &ad7266_read_raw,
	282	.update_scan_mode = &ad7266_update_scan_mode,
8ec4cf53 LPC	283	};
8ec4cf53 LPC	284
2bdb3afc	285	static const unsigned long ad7266_available_scan_masks[] = {
8ec4cf53 LPC	286	0x003,
	287	0x00c,
	288	0x030,
	289	0x0c0,
	290	0x300,
	291	0xc00,
	292	0x000,
	293	};
	294
2bdb3afc	295	static const unsigned long ad7266_available_scan_masks_diff[] = {
8ec4cf53 LPC	296	0x003,
	297	0x00c,
	298	0x030,
	299	0x000,
	300	};
	301
2bdb3afc	302	static const unsigned long ad7266_available_scan_masks_fixed[] = {
8ec4cf53 LPC	303	0x003,
	304	0x000,
	305	};
	306
	307	struct ad7266_chan_info {
	308	const struct iio_chan_spec *channels;
	309	unsigned int num_channels;
2bdb3afc	310	const unsigned long *scan_masks;
8ec4cf53 LPC	311	};
	312
	313	#define AD7266_CHAN_INFO_INDEX(_differential, _signed, _fixed) \
	314	(((_differential) << 2) \| ((_signed) << 1) \| ((_fixed) << 0))
	315
	316	static const struct ad7266_chan_info ad7266_chan_infos[] = {
	317	[AD7266_CHAN_INFO_INDEX(0, 0, 0)] = {
	318	.channels = ad7266_channels_u,
	319	.num_channels = ARRAY_SIZE(ad7266_channels_u),
	320	.scan_masks = ad7266_available_scan_masks,
	321	},
	322	[AD7266_CHAN_INFO_INDEX(0, 0, 1)] = {
	323	.channels = ad7266_channels_u_fixed,
	324	.num_channels = ARRAY_SIZE(ad7266_channels_u_fixed),
	325	.scan_masks = ad7266_available_scan_masks_fixed,
	326	},
	327	[AD7266_CHAN_INFO_INDEX(0, 1, 0)] = {
	328	.channels = ad7266_channels_s,
	329	.num_channels = ARRAY_SIZE(ad7266_channels_s),
	330	.scan_masks = ad7266_available_scan_masks,
	331	},
	332	[AD7266_CHAN_INFO_INDEX(0, 1, 1)] = {
	333	.channels = ad7266_channels_s_fixed,
	334	.num_channels = ARRAY_SIZE(ad7266_channels_s_fixed),
	335	.scan_masks = ad7266_available_scan_masks_fixed,
	336	},
	337	[AD7266_CHAN_INFO_INDEX(1, 0, 0)] = {
	338	.channels = ad7266_channels_diff_u,
	339	.num_channels = ARRAY_SIZE(ad7266_channels_diff_u),
	340	.scan_masks = ad7266_available_scan_masks_diff,
	341	},
	342	[AD7266_CHAN_INFO_INDEX(1, 0, 1)] = {
	343	.channels = ad7266_channels_diff_fixed_u,
	344	.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_u),
	345	.scan_masks = ad7266_available_scan_masks_fixed,
	346	},
	347	[AD7266_CHAN_INFO_INDEX(1, 1, 0)] = {
	348	.channels = ad7266_channels_diff_s,
	349	.num_channels = ARRAY_SIZE(ad7266_channels_diff_s),
	350	.scan_masks = ad7266_available_scan_masks_diff,
	351	},
	352	[AD7266_CHAN_INFO_INDEX(1, 1, 1)] = {
	353	.channels = ad7266_channels_diff_fixed_s,
	354	.num_channels = ARRAY_SIZE(ad7266_channels_diff_fixed_s),
	355	.scan_masks = ad7266_available_scan_masks_fixed,
	356	},
	357	};
	358
fc52692c	359	static void ad7266_init_channels(struct iio_dev *indio_dev)
8ec4cf53 LPC	360	{
	361	struct ad7266_state *st = iio_priv(indio_dev);
	362	bool is_differential, is_signed;
	363	const struct ad7266_chan_info *chan_info;
	364	int i;
	365
	366	is_differential = st->mode != AD7266_MODE_SINGLE_ENDED;
	367	is_signed = (st->range == AD7266_RANGE_2VREF) \|
	368	(st->mode == AD7266_MODE_DIFF);
	369
	370	i = AD7266_CHAN_INFO_INDEX(is_differential, is_signed, st->fixed_addr);
	371	chan_info = &ad7266_chan_infos[i];
	372
	373	indio_dev->channels = chan_info->channels;
	374	indio_dev->num_channels = chan_info->num_channels;
	375	indio_dev->available_scan_masks = chan_info->scan_masks;
	376	indio_dev->masklength = chan_info->num_channels - 1;
	377	}
	378
	379	static const char * const ad7266_gpio_labels[] = {
	380	"AD0", "AD1", "AD2",
	381	};
	382
fc52692c	383	static int ad7266_probe(struct spi_device *spi)
8ec4cf53 LPC	384	{
	385	struct ad7266_platform_data *pdata = spi->dev.platform_data;
	386	struct iio_dev *indio_dev;
	387	struct ad7266_state *st;
	388	unsigned int i;
	389	int ret;
	390
ded4fef9	391	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
8ec4cf53 LPC	392	if (indio_dev == NULL)
	393	return -ENOMEM;
	394
	395	st = iio_priv(indio_dev);
	396
e5511c81	397	st->reg = devm_regulator_get_optional(&spi->dev, "vref");
6b7f4e25	398	if (!IS_ERR(st->reg)) {
8ec4cf53 LPC	399	ret = regulator_enable(st->reg);
8ec4cf53 LPC	400	if (ret)
ded4fef9	401	return ret;
8ec4cf53	402
36ce0c1c AL	403	ret = regulator_get_voltage(st->reg);
	404	if (ret < 0)
	405	goto error_disable_reg;
	406
2ebc39c0	407	st->vref_mv = ret / 1000;
8ec4cf53	408	} else {
68b356eb MB	409	/* Any other error indicates that the regulator does exist */
	410	if (PTR_ERR(st->reg) != -ENODEV)
	411	return PTR_ERR(st->reg);
8ec4cf53	412	/* Use internal reference */
2ebc39c0	413	st->vref_mv = 2500;
8ec4cf53 LPC	414	}
	415
	416	if (pdata) {
	417	st->fixed_addr = pdata->fixed_addr;
	418	st->mode = pdata->mode;
	419	st->range = pdata->range;
	420
	421	if (!st->fixed_addr) {
	422	for (i = 0; i < ARRAY_SIZE(st->gpios); ++i) {
	423	st->gpios[i].gpio = pdata->addr_gpios[i];
	424	st->gpios[i].flags = GPIOF_OUT_INIT_LOW;
	425	st->gpios[i].label = ad7266_gpio_labels[i];
	426	}
	427	ret = gpio_request_array(st->gpios,
	428	ARRAY_SIZE(st->gpios));
	429	if (ret)
	430	goto error_disable_reg;
	431	}
	432	} else {
	433	st->fixed_addr = true;
	434	st->range = AD7266_RANGE_VREF;
	435	st->mode = AD7266_MODE_DIFF;
	436	}
	437
	438	spi_set_drvdata(spi, indio_dev);
	439	st->spi = spi;
	440
	441	indio_dev->dev.parent = &spi->dev;
b541eaff	442	indio_dev->dev.of_node = spi->dev.of_node;
8ec4cf53 LPC	443	indio_dev->name = spi_get_device_id(spi)->name;
	444	indio_dev->modes = INDIO_DIRECT_MODE;
	445	indio_dev->info = &ad7266_info;
	446
	447	ad7266_init_channels(indio_dev);
	448
	449	/* wakeup */
54e018da	450	st->single_xfer[0].rx_buf = &st->data.sample[0];
8ec4cf53 LPC	451	st->single_xfer[0].len = 2;
	452	st->single_xfer[0].cs_change = 1;
	453	/* conversion */
54e018da	454	st->single_xfer[1].rx_buf = st->data.sample;
8ec4cf53 LPC	455	st->single_xfer[1].len = 4;
	456	st->single_xfer[1].cs_change = 1;
	457	/* powerdown */
54e018da	458	st->single_xfer[2].tx_buf = &st->data.sample[0];
8ec4cf53 LPC	459	st->single_xfer[2].len = 1;
	460
	461	spi_message_init(&st->single_msg);
	462	spi_message_add_tail(&st->single_xfer[0], &st->single_msg);
	463	spi_message_add_tail(&st->single_xfer[1], &st->single_msg);
	464	spi_message_add_tail(&st->single_xfer[2], &st->single_msg);
	465
	466	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
	467	&ad7266_trigger_handler, &iio_triggered_buffer_setup_ops);
	468	if (ret)
	469	goto error_free_gpios;
	470
	471	ret = iio_device_register(indio_dev);
	472	if (ret)
	473	goto error_buffer_cleanup;
	474
	475	return 0;
	476
	477	error_buffer_cleanup:
	478	iio_triggered_buffer_cleanup(indio_dev);
	479	error_free_gpios:
	480	if (!st->fixed_addr)
	481	gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
	482	error_disable_reg:
fbe84bd4	483	if (!IS_ERR(st->reg))
8ec4cf53	484	regulator_disable(st->reg);
8ec4cf53 LPC	485
	486	return ret;
	487	}
	488
fc52692c	489	static int ad7266_remove(struct spi_device *spi)
8ec4cf53 LPC	490	{
	491	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	492	struct ad7266_state *st = iio_priv(indio_dev);
	493
	494	iio_device_unregister(indio_dev);
	495	iio_triggered_buffer_cleanup(indio_dev);
	496	if (!st->fixed_addr)
	497	gpio_free_array(st->gpios, ARRAY_SIZE(st->gpios));
fbe84bd4	498	if (!IS_ERR(st->reg))
8ec4cf53	499	regulator_disable(st->reg);
8ec4cf53 LPC	500
	501	return 0;
	502	}
	503
	504	static const struct spi_device_id ad7266_id[] = {
	505	{"ad7265", 0},
	506	{"ad7266", 0},
	507	{ }
	508	};
	509	MODULE_DEVICE_TABLE(spi, ad7266_id);
	510
	511	static struct spi_driver ad7266_driver = {
	512	.driver = {
	513	.name = "ad7266",
8ec4cf53 LPC	514	},
8ec4cf53 LPC	515	.probe = ad7266_probe,
fc52692c	516	.remove = ad7266_remove,
8ec4cf53 LPC	517	.id_table = ad7266_id,
	518	};
	519	module_spi_driver(ad7266_driver);
	520
	521	MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
	522	MODULE_DESCRIPTION("Analog Devices AD7266/65 ADC");
	523	MODULE_LICENSE("GPL v2");