[mirror_ubuntu-jammy-kernel.git] / drivers / iio / adc / ad7887.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * AD7887 SPI ADC driver
 *
 * Copyright 2010-2011 Analog Devices Inc.
 */

#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/spi/spi.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/iio/buffer.h>

#include <linux/iio/trigger_consumer.h>
#include <linux/iio/triggered_buffer.h>

#include <linux/platform_data/ad7887.h>

#define AD7887_REF_DIS		BIT(5)	/* on-chip reference disable */
#define AD7887_DUAL		BIT(4)	/* dual-channel mode */
#define AD7887_CH_AIN1		BIT(3)	/* convert on channel 1, DUAL=1 */
#define AD7887_CH_AIN0		0	/* convert on channel 0, DUAL=0,1 */
#define AD7887_PM_MODE1		0	/* CS based shutdown */
#define AD7887_PM_MODE2		1	/* full on */
#define AD7887_PM_MODE3		2	/* auto shutdown after conversion */
#define AD7887_PM_MODE4		3	/* standby mode */

enum ad7887_channels {
	AD7887_CH0,
	AD7887_CH0_CH1,
	AD7887_CH1,
};

/**
 * struct ad7887_chip_info - chip specifc information
 * @int_vref_mv:	the internal reference voltage
 * @channel:		channel specification
 */
struct ad7887_chip_info {
	u16				int_vref_mv;
	struct iio_chan_spec		channel[3];
};

struct ad7887_state {
	struct spi_device		*spi;
	const struct ad7887_chip_info	*chip_info;
	struct regulator		*reg;
	struct spi_transfer		xfer[4];
	struct spi_message		msg[3];
	struct spi_message		*ring_msg;
	unsigned char			tx_cmd_buf[4];

	/*
	 * DMA (thus cache coherency maintenance) requires the
	 * transfer buffers to live in their own cache lines.
	 * Buffer needs to be large enough to hold two 16 bit samples and a
	 * 64 bit aligned 64 bit timestamp.
	 */
	unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
		____cacheline_aligned;
};

enum ad7887_supported_device_ids {
	ID_AD7887
};

static int ad7887_ring_preenable(struct iio_dev *indio_dev)
{
	struct ad7887_state *st = iio_priv(indio_dev);

	/* We know this is a single long so can 'cheat' */
	switch (*indio_dev->active_scan_mask) {
	case (1 << 0):
		st->ring_msg = &st->msg[AD7887_CH0];
		break;
	case (1 << 1):
		st->ring_msg = &st->msg[AD7887_CH1];
		/* Dummy read: push CH1 setting down to hardware */
		spi_sync(st->spi, st->ring_msg);
		break;
	case ((1 << 1) | (1 << 0)):
		st->ring_msg = &st->msg[AD7887_CH0_CH1];
		break;
	}

	return 0;
}

static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
{
	struct ad7887_state *st = iio_priv(indio_dev);

	/* dummy read: restore default CH0 settin */
	return spi_sync(st->spi, &st->msg[AD7887_CH0]);
}

/**
 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
 *
 * Currently there is no option in this driver to disable the saving of
 * timestamps within the ring.
 **/
static irqreturn_t ad7887_trigger_handler(int irq, void *p)
{
	struct iio_poll_func *pf = p;
	struct iio_dev *indio_dev = pf->indio_dev;
	struct ad7887_state *st = iio_priv(indio_dev);
	int b_sent;

	b_sent = spi_sync(st->spi, st->ring_msg);
	if (b_sent)
		goto done;

	iio_push_to_buffers_with_timestamp(indio_dev, st->data,
		iio_get_time_ns(indio_dev));
done:
	iio_trigger_notify_done(indio_dev->trig);

	return IRQ_HANDLED;
}

static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
	.preenable = &ad7887_ring_preenable,
	.postenable = &iio_triggered_buffer_postenable,
	.predisable = &iio_triggered_buffer_predisable,
	.postdisable = &ad7887_ring_postdisable,
};

static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
{
	int ret = spi_sync(st->spi, &st->msg[ch]);
	if (ret)
		return ret;

	return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
}

static int ad7887_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long m)
{
	int ret;
	struct ad7887_state *st = iio_priv(indio_dev);

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		ret = iio_device_claim_direct_mode(indio_dev);
		if (ret)
			return ret;
		ret = ad7887_scan_direct(st, chan->address);
		iio_device_release_direct_mode(indio_dev);

		if (ret < 0)
			return ret;
		*val = ret >> chan->scan_type.shift;
		*val &= GENMASK(chan->scan_type.realbits - 1, 0);
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		if (st->reg) {
			*val = regulator_get_voltage(st->reg);
			if (*val < 0)
				return *val;
			*val /= 1000;
		} else {
			*val = st->chip_info->int_vref_mv;
		}

		*val2 = chan->scan_type.realbits;

		return IIO_VAL_FRACTIONAL_LOG2;
	}
	return -EINVAL;
}


static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
	/*
	 * More devices added in future
	 */
	[ID_AD7887] = {
		.channel[0] = {
			.type = IIO_VOLTAGE,
			.indexed = 1,
			.channel = 1,
			.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
			.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
			.address = 1,
			.scan_index = 1,
			.scan_type = {
				.sign = 'u',
				.realbits = 12,
				.storagebits = 16,
				.shift = 0,
				.endianness = IIO_BE,
			},
		},
		.channel[1] = {
			.type = IIO_VOLTAGE,
			.indexed = 1,
			.channel = 0,
			.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
			.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
			.address = 0,
			.scan_index = 0,
			.scan_type = {
				.sign = 'u',
				.realbits = 12,
				.storagebits = 16,
				.shift = 0,
				.endianness = IIO_BE,
			},
		},
		.channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
		.int_vref_mv = 2500,
	},
};

static const struct iio_info ad7887_info = {
	.read_raw = &ad7887_read_raw,
};

static int ad7887_probe(struct spi_device *spi)
{
	struct ad7887_platform_data *pdata = spi->dev.platform_data;
	struct ad7887_state *st;
	struct iio_dev *indio_dev;
	uint8_t mode;
	int ret;

	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
	if (indio_dev == NULL)
		return -ENOMEM;

	st = iio_priv(indio_dev);

	if (!pdata || !pdata->use_onchip_ref) {
		st->reg = devm_regulator_get(&spi->dev, "vref");
		if (IS_ERR(st->reg))
			return PTR_ERR(st->reg);

		ret = regulator_enable(st->reg);
		if (ret)
			return ret;
	}

	st->chip_info =
		&ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];

	spi_set_drvdata(spi, indio_dev);
	st->spi = spi;

	/* Estabilish that the iio_dev is a child of the spi device */
	indio_dev->dev.parent = &spi->dev;
	indio_dev->dev.of_node = spi->dev.of_node;
	indio_dev->name = spi_get_device_id(spi)->name;
	indio_dev->info = &ad7887_info;
	indio_dev->modes = INDIO_DIRECT_MODE;

	/* Setup default message */

	mode = AD7887_PM_MODE4;
	if (!pdata || !pdata->use_onchip_ref)
		mode |= AD7887_REF_DIS;
	if (pdata && pdata->en_dual)
		mode |= AD7887_DUAL;

	st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;

	st->xfer[0].rx_buf = &st->data[0];
	st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
	st->xfer[0].len = 2;

	spi_message_init(&st->msg[AD7887_CH0]);
	spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);

	if (pdata && pdata->en_dual) {
		st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;

		st->xfer[1].rx_buf = &st->data[0];
		st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
		st->xfer[1].len = 2;

		st->xfer[2].rx_buf = &st->data[2];
		st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
		st->xfer[2].len = 2;

		spi_message_init(&st->msg[AD7887_CH0_CH1]);
		spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
		spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);

		st->xfer[3].rx_buf = &st->data[2];
		st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
		st->xfer[3].len = 2;

		spi_message_init(&st->msg[AD7887_CH1]);
		spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);

		indio_dev->channels = st->chip_info->channel;
		indio_dev->num_channels = 3;
	} else {
		indio_dev->channels = &st->chip_info->channel[1];
		indio_dev->num_channels = 2;
	}

	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
			&ad7887_trigger_handler, &ad7887_ring_setup_ops);
	if (ret)
		goto error_disable_reg;

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_unregister_ring;

	return 0;
error_unregister_ring:
	iio_triggered_buffer_cleanup(indio_dev);
error_disable_reg:
	if (st->reg)
		regulator_disable(st->reg);

	return ret;
}

static int ad7887_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	struct ad7887_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	iio_triggered_buffer_cleanup(indio_dev);
	if (st->reg)
		regulator_disable(st->reg);

	return 0;
}

static const struct spi_device_id ad7887_id[] = {
	{"ad7887", ID_AD7887},
	{}
};
MODULE_DEVICE_TABLE(spi, ad7887_id);

static struct spi_driver ad7887_driver = {
	.driver = {
		.name	= "ad7887",
	},
	.probe		= ad7887_probe,
	.remove		= ad7887_remove,
	.id_table	= ad7887_id,
};
module_spi_driver(ad7887_driver);

MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
fda8d26e	1	// SPDX-License-Identifier: GPL-2.0-only
2b4756aa MH	2	/*
	3	* AD7887 SPI ADC driver
	4	*
596d0609	5	* Copyright 2010-2011 Analog Devices Inc.
2b4756aa MH	6	*/
2b4756aa MH	7
2b4756aa MH	8	#include <linux/device.h>
	9	#include <linux/kernel.h>
	10	#include <linux/slab.h>
	11	#include <linux/sysfs.h>
2b4756aa MH	12	#include <linux/spi/spi.h>
	13	#include <linux/regulator/consumer.h>
	14	#include <linux/err.h>
99c97852	15	#include <linux/module.h>
65dd3d3d	16	#include <linux/interrupt.h>
09a1737e	17	#include <linux/bitops.h>
2b4756aa	18
06458e27 JC	19	#include <linux/iio/iio.h>
	20	#include <linux/iio/sysfs.h>
	21	#include <linux/iio/buffer.h>
cdf38709	22
65dd3d3d LPC	23	#include <linux/iio/trigger_consumer.h>
65dd3d3d LPC	24	#include <linux/iio/triggered_buffer.h>
2b4756aa	25
4eb3ccf1	26	#include <linux/platform_data/ad7887.h>
2b4756aa	27
09a1737e PM	28	#define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
	29	#define AD7887_DUAL BIT(4) /* dual-channel mode */
	30	#define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
	31	#define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
	32	#define AD7887_PM_MODE1 0 /* CS based shutdown */
	33	#define AD7887_PM_MODE2 1 /* full on */
	34	#define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
	35	#define AD7887_PM_MODE4 3 /* standby mode */
65dd3d3d LPC	36
	37	enum ad7887_channels {
	38	AD7887_CH0,
	39	AD7887_CH0_CH1,
	40	AD7887_CH1,
	41	};
	42
65dd3d3d LPC	43	/**
	44	* struct ad7887_chip_info - chip specifc information
	45	* @int_vref_mv: the internal reference voltage
	46	* @channel: channel specification
	47	*/
	48	struct ad7887_chip_info {
	49	u16 int_vref_mv;
	50	struct iio_chan_spec channel[3];
	51	};
	52
	53	struct ad7887_state {
	54	struct spi_device *spi;
	55	const struct ad7887_chip_info *chip_info;
	56	struct regulator *reg;
	57	struct spi_transfer xfer[4];
	58	struct spi_message msg[3];
	59	struct spi_message *ring_msg;
fce7c3ea	60	unsigned char tx_cmd_buf[4];
65dd3d3d LPC	61
	62	/*
	63	* DMA (thus cache coherency maintenance) requires the
	64	* transfer buffers to live in their own cache lines.
	65	* Buffer needs to be large enough to hold two 16 bit samples and a
	66	* 64 bit aligned 64 bit timestamp.
	67	*/
	68	unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
	69	____cacheline_aligned;
	70	};
	71
	72	enum ad7887_supported_device_ids {
	73	ID_AD7887
	74	};
	75
	76	static int ad7887_ring_preenable(struct iio_dev *indio_dev)
	77	{
	78	struct ad7887_state *st = iio_priv(indio_dev);
65dd3d3d LPC	79
	80	/* We know this is a single long so can 'cheat' */
	81	switch (*indio_dev->active_scan_mask) {
	82	case (1 << 0):
	83	st->ring_msg = &st->msg[AD7887_CH0];
	84	break;
	85	case (1 << 1):
	86	st->ring_msg = &st->msg[AD7887_CH1];
	87	/* Dummy read: push CH1 setting down to hardware */
	88	spi_sync(st->spi, st->ring_msg);
	89	break;
	90	case ((1 << 1) \| (1 << 0)):
	91	st->ring_msg = &st->msg[AD7887_CH0_CH1];
	92	break;
	93	}
	94
	95	return 0;
	96	}
	97
	98	static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
	99	{
	100	struct ad7887_state *st = iio_priv(indio_dev);
	101
	102	/* dummy read: restore default CH0 settin */
	103	return spi_sync(st->spi, &st->msg[AD7887_CH0]);
	104	}
	105
	106	/**
	107	* ad7887_trigger_handler() bh of trigger launched polling to ring buffer
	108	*
	109	* Currently there is no option in this driver to disable the saving of
	110	* timestamps within the ring.
	111	**/
	112	static irqreturn_t ad7887_trigger_handler(int irq, void *p)
	113	{
	114	struct iio_poll_func *pf = p;
	115	struct iio_dev *indio_dev = pf->indio_dev;
	116	struct ad7887_state *st = iio_priv(indio_dev);
65dd3d3d LPC	117	int b_sent;
	118
	119	b_sent = spi_sync(st->spi, st->ring_msg);
	120	if (b_sent)
	121	goto done;
	122
5afd602b	123	iio_push_to_buffers_with_timestamp(indio_dev, st->data,
bc2b7dab	124	iio_get_time_ns(indio_dev));
65dd3d3d LPC	125	done:
	126	iio_trigger_notify_done(indio_dev->trig);
	127
	128	return IRQ_HANDLED;
	129	}
	130
	131	static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
	132	.preenable = &ad7887_ring_preenable,
	133	.postenable = &iio_triggered_buffer_postenable,
	134	.predisable = &iio_triggered_buffer_predisable,
	135	.postdisable = &ad7887_ring_postdisable,
	136	};
	137
2b4756aa MH	138	static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
	139	{
	140	int ret = spi_sync(st->spi, &st->msg[ch]);
	141	if (ret)
	142	return ret;
	143
	144	return (st->data[(ch * 2)] << 8) \| st->data[(ch * 2) + 1];
	145	}
	146
84f79ecb	147	static int ad7887_read_raw(struct iio_dev *indio_dev,
596d0609 MH	148	struct iio_chan_spec const *chan,
	149	int *val,
	150	int *val2,
	151	long m)
2b4756aa	152	{
2b4756aa	153	int ret;
84f79ecb	154	struct ad7887_state *st = iio_priv(indio_dev);
2b4756aa	155
596d0609	156	switch (m) {
b11f98ff	157	case IIO_CHAN_INFO_RAW:
6fea8a42 AS	158	ret = iio_device_claim_direct_mode(indio_dev);
	159	if (ret)
	160	return ret;
	161	ret = ad7887_scan_direct(st, chan->address);
	162	iio_device_release_direct_mode(indio_dev);
596d0609 MH	163
	164	if (ret < 0)
	165	return ret;
98efb70a	166	*val = ret >> chan->scan_type.shift;
09a1737e	167	*val &= GENMASK(chan->scan_type.realbits - 1, 0);
596d0609	168	return IIO_VAL_INT;
c8a9f805	169	case IIO_CHAN_INFO_SCALE:
bf5d2613 LPC	170	if (st->reg) {
	171	*val = regulator_get_voltage(st->reg);
	172	if (*val < 0)
	173	return *val;
	174	*val /= 1000;
	175	} else {
	176	*val = st->chip_info->int_vref_mv;
	177	}
	178
98efb70a	179	*val2 = chan->scan_type.realbits;
bf5d2613 LPC	180
bf5d2613 LPC	181	return IIO_VAL_FRACTIONAL_LOG2;
596d0609 MH	182	}
596d0609 MH	183	return -EINVAL;
2b4756aa MH	184	}
2b4756aa MH	185
2b4756aa MH	186
	187	static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
	188	/*
	189	* More devices added in future
	190	*/
	191	[ID_AD7887] = {
31bf47d5 JC	192	.channel[0] = {
	193	.type = IIO_VOLTAGE,
	194	.indexed = 1,
	195	.channel = 1,
16d186b1 JC	196	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
16d186b1 JC	197	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
31bf47d5 JC	198	.address = 1,
31bf47d5 JC	199	.scan_index = 1,
e39d9905 JC	200	.scan_type = {
	201	.sign = 'u',
	202	.realbits = 12,
	203	.storagebits = 16,
	204	.shift = 0,
	205	.endianness = IIO_BE,
	206	},
31bf47d5 JC	207	},
	208	.channel[1] = {
	209	.type = IIO_VOLTAGE,
	210	.indexed = 1,
	211	.channel = 0,
16d186b1 JC	212	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
16d186b1 JC	213	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
31bf47d5 JC	214	.address = 0,
31bf47d5 JC	215	.scan_index = 0,
e39d9905 JC	216	.scan_type = {
	217	.sign = 'u',
	218	.realbits = 12,
	219	.storagebits = 16,
	220	.shift = 0,
	221	.endianness = IIO_BE,
	222	},
31bf47d5	223	},
596d0609	224	.channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
2b4756aa MH	225	.int_vref_mv = 2500,
	226	},
	227	};
	228
6fe8135f JC	229	static const struct iio_info ad7887_info = {
6fe8135f JC	230	.read_raw = &ad7887_read_raw,
6fe8135f JC	231	};
6fe8135f JC	232
fc52692c	233	static int ad7887_probe(struct spi_device *spi)
2b4756aa MH	234	{
	235	struct ad7887_platform_data *pdata = spi->dev.platform_data;
	236	struct ad7887_state *st;
82429e0d	237	struct iio_dev *indio_dev;
fce7c3ea	238	uint8_t mode;
bf5d2613	239	int ret;
2b4756aa	240
82429e0d	241	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
f39e086a MH	242	if (indio_dev == NULL)
	243	return -ENOMEM;
	244
	245	st = iio_priv(indio_dev);
2b4756aa	246
bf5d2613	247	if (!pdata \|\| !pdata->use_onchip_ref) {
82429e0d SK	248	st->reg = devm_regulator_get(&spi->dev, "vref");
	249	if (IS_ERR(st->reg))
	250	return PTR_ERR(st->reg);
bf5d2613	251
2b4756aa MH	252	ret = regulator_enable(st->reg);
2b4756aa MH	253	if (ret)
82429e0d	254	return ret;
2b4756aa MH	255	}
	256
	257	st->chip_info =
	258	&ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
	259
f39e086a	260	spi_set_drvdata(spi, indio_dev);
2b4756aa MH	261	st->spi = spi;
2b4756aa MH	262
2b4756aa	263	/* Estabilish that the iio_dev is a child of the spi device */
f39e086a	264	indio_dev->dev.parent = &spi->dev;
b541eaff	265	indio_dev->dev.of_node = spi->dev.of_node;
f39e086a	266	indio_dev->name = spi_get_device_id(spi)->name;
6fe8135f	267	indio_dev->info = &ad7887_info;
f39e086a	268	indio_dev->modes = INDIO_DIRECT_MODE;
2b4756aa MH	269
	270	/* Setup default message */
	271
fce7c3ea LPC	272	mode = AD7887_PM_MODE4;
	273	if (!pdata \|\| !pdata->use_onchip_ref)
	274	mode \|= AD7887_REF_DIS;
	275	if (pdata && pdata->en_dual)
	276	mode \|= AD7887_DUAL;
	277
	278	st->tx_cmd_buf[0] = AD7887_CH_AIN0 \| mode;
2b4756aa MH	279
	280	st->xfer[0].rx_buf = &st->data[0];
	281	st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
	282	st->xfer[0].len = 2;
	283
	284	spi_message_init(&st->msg[AD7887_CH0]);
	285	spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
	286
	287	if (pdata && pdata->en_dual) {
fce7c3ea	288	st->tx_cmd_buf[2] = AD7887_CH_AIN1 \| mode;
2b4756aa MH	289
	290	st->xfer[1].rx_buf = &st->data[0];
	291	st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
	292	st->xfer[1].len = 2;
	293
	294	st->xfer[2].rx_buf = &st->data[2];
fce7c3ea	295	st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
2b4756aa MH	296	st->xfer[2].len = 2;
	297
	298	spi_message_init(&st->msg[AD7887_CH0_CH1]);
	299	spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
	300	spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
	301
fce7c3ea LPC	302	st->xfer[3].rx_buf = &st->data[2];
fce7c3ea LPC	303	st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
2b4756aa MH	304	st->xfer[3].len = 2;
	305
	306	spi_message_init(&st->msg[AD7887_CH1]);
	307	spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
	308
f39e086a MH	309	indio_dev->channels = st->chip_info->channel;
f39e086a MH	310	indio_dev->num_channels = 3;
2b4756aa	311	} else {
f39e086a MH	312	indio_dev->channels = &st->chip_info->channel[1];
f39e086a MH	313	indio_dev->num_channels = 2;
596d0609	314	}
2b4756aa	315
65dd3d3d LPC	316	ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
65dd3d3d LPC	317	&ad7887_trigger_handler, &ad7887_ring_setup_ops);
2b4756aa	318	if (ret)
f39e086a	319	goto error_disable_reg;
2b4756aa	320
26d25ae3 JC	321	ret = iio_device_register(indio_dev);
	322	if (ret)
	323	goto error_unregister_ring;
	324
	325	return 0;
	326	error_unregister_ring:
65dd3d3d	327	iio_triggered_buffer_cleanup(indio_dev);
2b4756aa	328	error_disable_reg:
bf5d2613	329	if (st->reg)
2b4756aa	330	regulator_disable(st->reg);
f39e086a	331
2b4756aa MH	332	return ret;
	333	}
	334
fc52692c	335	static int ad7887_remove(struct spi_device *spi)
2b4756aa	336	{
f39e086a MH	337	struct iio_dev *indio_dev = spi_get_drvdata(spi);
	338	struct ad7887_state *st = iio_priv(indio_dev);
	339
d2fffd6c	340	iio_device_unregister(indio_dev);
65dd3d3d	341	iio_triggered_buffer_cleanup(indio_dev);
82429e0d	342	if (st->reg)
2b4756aa	343	regulator_disable(st->reg);
f39e086a	344
2b4756aa MH	345	return 0;
	346	}
	347
	348	static const struct spi_device_id ad7887_id[] = {
	349	{"ad7887", ID_AD7887},
	350	{}
	351	};
55e4390c	352	MODULE_DEVICE_TABLE(spi, ad7887_id);
2b4756aa MH	353
	354	static struct spi_driver ad7887_driver = {
	355	.driver = {
	356	.name = "ad7887",
2b4756aa MH	357	},
2b4756aa MH	358	.probe = ad7887_probe,
fc52692c	359	.remove = ad7887_remove,
2b4756aa MH	360	.id_table = ad7887_id,
2b4756aa MH	361	};
ae6ae6fe	362	module_spi_driver(ad7887_driver);
2b4756aa	363
9920ed25	364	MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
2b4756aa MH	365	MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
2b4756aa MH	366	MODULE_LICENSE("GPL v2");