[mirror_ubuntu-zesty-kernel.git] / drivers / iio / adc / mcp3422.c

/*
 * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
 *
 * Copyright (C) 2013, Angelo Compagnucci
 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
 *
 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
 *            http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
 *            http://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
 *
 * This driver exports the value of analog input voltage to sysfs, the
 * voltage unit is nV.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/err.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/sysfs.h>
#include <linux/of.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>

/* Masks */
#define MCP3422_CHANNEL_MASK	0x60
#define MCP3422_PGA_MASK	0x03
#define MCP3422_SRATE_MASK	0x0C
#define MCP3422_SRATE_240	0x0
#define MCP3422_SRATE_60	0x1
#define MCP3422_SRATE_15	0x2
#define MCP3422_SRATE_3	0x3
#define MCP3422_PGA_1	0
#define MCP3422_PGA_2	1
#define MCP3422_PGA_4	2
#define MCP3422_PGA_8	3
#define MCP3422_CONT_SAMPLING	0x10

#define MCP3422_CHANNEL(config)	(((config) & MCP3422_CHANNEL_MASK) >> 5)
#define MCP3422_PGA(config)	((config) & MCP3422_PGA_MASK)
#define MCP3422_SAMPLE_RATE(config)	(((config) & MCP3422_SRATE_MASK) >> 2)

#define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
#define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
#define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)

#define MCP3422_CHAN(_index) \
	{ \
		.type = IIO_VOLTAGE, \
		.indexed = 1, \
		.channel = _index, \
		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
				| BIT(IIO_CHAN_INFO_SCALE), \
		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
	}

static const int mcp3422_scales[4][4] = {
	{ 1000000, 500000, 250000, 125000 },
	{ 250000 , 125000, 62500 , 31250  },
	{ 62500  , 31250 , 15625 , 7812   },
	{ 15625  , 7812  , 3906  , 1953   } };

/* Constant msleep times for data acquisitions */
static const int mcp3422_read_times[4] = {
	[MCP3422_SRATE_240] = 1000 / 240,
	[MCP3422_SRATE_60] = 1000 / 60,
	[MCP3422_SRATE_15] = 1000 / 15,
	[MCP3422_SRATE_3] = 1000 / 3 };

/* sample rates to integer conversion table */
static const int mcp3422_sample_rates[4] = {
	[MCP3422_SRATE_240] = 240,
	[MCP3422_SRATE_60] = 60,
	[MCP3422_SRATE_15] = 15,
	[MCP3422_SRATE_3] = 3 };

/* sample rates to sign extension table */
static const int mcp3422_sign_extend[4] = {
	[MCP3422_SRATE_240] = 11,
	[MCP3422_SRATE_60] = 13,
	[MCP3422_SRATE_15] = 15,
	[MCP3422_SRATE_3] = 17 };

/* Client data (each client gets its own) */
struct mcp3422 {
	struct i2c_client *i2c;
	u8 id;
	u8 config;
	u8 pga[4];
	struct mutex lock;
};

static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
{
	int ret;

	mutex_lock(&adc->lock);

	ret = i2c_master_send(adc->i2c, &newconfig, 1);
	if (ret > 0) {
		adc->config = newconfig;
		ret = 0;
	}

	mutex_unlock(&adc->lock);

	return ret;
}

static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
{
	int ret = 0;
	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
	u8 buf[4] = {0, 0, 0, 0};
	u32 temp;

	if (sample_rate == MCP3422_SRATE_3) {
		ret = i2c_master_recv(adc->i2c, buf, 4);
		temp = buf[0] << 16 | buf[1] << 8 | buf[2];
		*config = buf[3];
	} else {
		ret = i2c_master_recv(adc->i2c, buf, 3);
		temp = buf[0] << 8 | buf[1];
		*config = buf[2];
	}

	*value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);

	return ret;
}

static int mcp3422_read_channel(struct mcp3422 *adc,
				struct iio_chan_spec const *channel, int *value)
{
	int ret;
	u8 config;
	u8 req_channel = channel->channel;

	if (req_channel != MCP3422_CHANNEL(adc->config)) {
		config = adc->config;
		config &= ~MCP3422_CHANNEL_MASK;
		config |= MCP3422_CHANNEL_VALUE(req_channel);
		config &= ~MCP3422_PGA_MASK;
		config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);
		ret = mcp3422_update_config(adc, config);
		if (ret < 0)
			return ret;
		msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
	}

	return mcp3422_read(adc, value, &config);
}

static int mcp3422_read_raw(struct iio_dev *iio,
			struct iio_chan_spec const *channel, int *val1,
			int *val2, long mask)
{
	struct mcp3422 *adc = iio_priv(iio);
	int err;

	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
	u8 pga		 = MCP3422_PGA(adc->config);

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		err = mcp3422_read_channel(adc, channel, val1);
		if (err < 0)
			return -EINVAL;
		return IIO_VAL_INT;

	case IIO_CHAN_INFO_SCALE:

		*val1 = 0;
		*val2 = mcp3422_scales[sample_rate][pga];
		return IIO_VAL_INT_PLUS_NANO;

	case IIO_CHAN_INFO_SAMP_FREQ:
		*val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
		return IIO_VAL_INT;

	default:
		break;
	}

	return -EINVAL;
}

static int mcp3422_write_raw(struct iio_dev *iio,
			struct iio_chan_spec const *channel, int val1,
			int val2, long mask)
{
	struct mcp3422 *adc = iio_priv(iio);
	u8 temp;
	u8 config = adc->config;
	u8 req_channel = channel->channel;
	u8 sample_rate = MCP3422_SAMPLE_RATE(config);
	u8 i;

	switch (mask) {
	case IIO_CHAN_INFO_SCALE:
		if (val1 != 0)
			return -EINVAL;

		for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
			if (val2 == mcp3422_scales[sample_rate][i]) {
				adc->pga[req_channel] = i;

				config &= ~MCP3422_CHANNEL_MASK;
				config |= MCP3422_CHANNEL_VALUE(req_channel);
				config &= ~MCP3422_PGA_MASK;
				config |= MCP3422_PGA_VALUE(adc->pga[req_channel]);

				return mcp3422_update_config(adc, config);
			}
		}
		return -EINVAL;

	case IIO_CHAN_INFO_SAMP_FREQ:
		switch (val1) {
		case 240:
			temp = MCP3422_SRATE_240;
			break;
		case 60:
			temp = MCP3422_SRATE_60;
			break;
		case 15:
			temp = MCP3422_SRATE_15;
			break;
		case 3:
			if (adc->id > 4)
				return -EINVAL;
			temp = MCP3422_SRATE_3;
			break;
		default:
			return -EINVAL;
		}

		config &= ~MCP3422_CHANNEL_MASK;
		config |= MCP3422_CHANNEL_VALUE(req_channel);
		config &= ~MCP3422_SRATE_MASK;
		config |= MCP3422_SAMPLE_RATE_VALUE(temp);

		return mcp3422_update_config(adc, config);

	default:
		break;
	}

	return -EINVAL;
}

static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
		struct iio_chan_spec const *chan, long mask)
{
	switch (mask) {
	case IIO_CHAN_INFO_SCALE:
		return IIO_VAL_INT_PLUS_NANO;
	case IIO_CHAN_INFO_SAMP_FREQ:
		return IIO_VAL_INT_PLUS_MICRO;
	default:
		return -EINVAL;
	}
}

static ssize_t mcp3422_show_samp_freqs(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));

	if (adc->id > 4)
		return sprintf(buf, "240 60 15\n");

	return sprintf(buf, "240 60 15 3\n");
}

static ssize_t mcp3422_show_scales(struct device *dev,
		struct device_attribute *attr, char *buf)
{
	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);

	return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
		mcp3422_scales[sample_rate][0],
		mcp3422_scales[sample_rate][1],
		mcp3422_scales[sample_rate][2],
		mcp3422_scales[sample_rate][3]);
}

static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
		mcp3422_show_samp_freqs, NULL, 0);
static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
		mcp3422_show_scales, NULL, 0);

static struct attribute *mcp3422_attributes[] = {
	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
	NULL,
};

static const struct attribute_group mcp3422_attribute_group = {
	.attrs = mcp3422_attributes,
};

static const struct iio_chan_spec mcp3421_channels[] = {
	MCP3422_CHAN(0),
};

static const struct iio_chan_spec mcp3422_channels[] = {
	MCP3422_CHAN(0),
	MCP3422_CHAN(1),
};

static const struct iio_chan_spec mcp3424_channels[] = {
	MCP3422_CHAN(0),
	MCP3422_CHAN(1),
	MCP3422_CHAN(2),
	MCP3422_CHAN(3),
};

static const struct iio_info mcp3422_info = {
	.read_raw = mcp3422_read_raw,
	.write_raw = mcp3422_write_raw,
	.write_raw_get_fmt = mcp3422_write_raw_get_fmt,
	.attrs = &mcp3422_attribute_group,
	.driver_module = THIS_MODULE,
};

static int mcp3422_probe(struct i2c_client *client,
			 const struct i2c_device_id *id)
{
	struct iio_dev *indio_dev;
	struct mcp3422 *adc;
	int err;
	u8 config;

	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
		return -EOPNOTSUPP;

	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
	if (!indio_dev)
		return -ENOMEM;

	adc = iio_priv(indio_dev);
	adc->i2c = client;
	adc->id = (u8)(id->driver_data);

	mutex_init(&adc->lock);

	indio_dev->dev.parent = &client->dev;
	indio_dev->name = dev_name(&client->dev);
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->info = &mcp3422_info;

	switch (adc->id) {
	case 1:
	case 5:
		indio_dev->channels = mcp3421_channels;
		indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
		break;
	case 2:
	case 3:
	case 6:
	case 7:
		indio_dev->channels = mcp3422_channels;
		indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
		break;
	case 4:
	case 8:
		indio_dev->channels = mcp3424_channels;
		indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
		break;
	}

	/* meaningful default configuration */
	config = (MCP3422_CONT_SAMPLING
		| MCP3422_CHANNEL_VALUE(1)
		| MCP3422_PGA_VALUE(MCP3422_PGA_1)
		| MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
	mcp3422_update_config(adc, config);

	err = devm_iio_device_register(&client->dev, indio_dev);
	if (err < 0)
		return err;

	i2c_set_clientdata(client, indio_dev);

	return 0;
}

static const struct i2c_device_id mcp3422_id[] = {
	{ "mcp3421", 1 },
	{ "mcp3422", 2 },
	{ "mcp3423", 3 },
	{ "mcp3424", 4 },
	{ "mcp3425", 5 },
	{ "mcp3426", 6 },
	{ "mcp3427", 7 },
	{ "mcp3428", 8 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, mcp3422_id);

#ifdef CONFIG_OF
static const struct of_device_id mcp3422_of_match[] = {
	{ .compatible = "mcp3422" },
	{ }
};
MODULE_DEVICE_TABLE(of, mcp3422_of_match);
#endif

static struct i2c_driver mcp3422_driver = {
	.driver = {
		.name = "mcp3422",
		.of_match_table = of_match_ptr(mcp3422_of_match),
	},
	.probe = mcp3422_probe,
	.id_table = mcp3422_id,
};
module_i2c_driver(mcp3422_driver);

MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
07914c84	1	/*
505abf99	2	* mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
07914c84 AC	3	*
	4	* Copyright (C) 2013, Angelo Compagnucci
	5	* Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
	6	*
	7	* Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
2816ac64	8	* http://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
505abf99	9	* http://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
07914c84 AC	10	*
	11	* This driver exports the value of analog input voltage to sysfs, the
	12	* voltage unit is nV.
	13	*
	14	* This program is free software; you can redistribute it and/or modify
	15	* it under the terms of the GNU General Public License as published by
	16	* the Free Software Foundation; either version 2 of the License, or
	17	* (at your option) any later version.
	18	*/
	19
	20	#include <linux/err.h>
	21	#include <linux/i2c.h>
	22	#include <linux/module.h>
	23	#include <linux/delay.h>
	24	#include <linux/sysfs.h>
de36d817	25	#include <linux/of.h>
07914c84 AC	26
	27	#include <linux/iio/iio.h>
	28	#include <linux/iio/sysfs.h>
	29
	30	/* Masks */
	31	#define MCP3422_CHANNEL_MASK 0x60
	32	#define MCP3422_PGA_MASK 0x03
	33	#define MCP3422_SRATE_MASK 0x0C
	34	#define MCP3422_SRATE_240 0x0
	35	#define MCP3422_SRATE_60 0x1
	36	#define MCP3422_SRATE_15 0x2
	37	#define MCP3422_SRATE_3 0x3
	38	#define MCP3422_PGA_1 0
	39	#define MCP3422_PGA_2 1
	40	#define MCP3422_PGA_4 2
	41	#define MCP3422_PGA_8 3
	42	#define MCP3422_CONT_SAMPLING 0x10
	43
	44	#define MCP3422_CHANNEL(config) (((config) & MCP3422_CHANNEL_MASK) >> 5)
	45	#define MCP3422_PGA(config) ((config) & MCP3422_PGA_MASK)
	46	#define MCP3422_SAMPLE_RATE(config) (((config) & MCP3422_SRATE_MASK) >> 2)
	47
	48	#define MCP3422_CHANNEL_VALUE(value) (((value) << 5) & MCP3422_CHANNEL_MASK)
	49	#define MCP3422_PGA_VALUE(value) ((value) & MCP3422_PGA_MASK)
	50	#define MCP3422_SAMPLE_RATE_VALUE(value) ((value << 2) & MCP3422_SRATE_MASK)
	51
	52	#define MCP3422_CHAN(_index) \
	53	{ \
	54	.type = IIO_VOLTAGE, \
	55	.indexed = 1, \
	56	.channel = _index, \
	57	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
	58	\| BIT(IIO_CHAN_INFO_SCALE), \
	59	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
	60	}
	61
07914c84	62	static const int mcp3422_scales[4][4] = {
9e128ced AC	63	{ 1000000, 500000, 250000, 125000 },
	64	{ 250000 , 125000, 62500 , 31250 },
	65	{ 62500 , 31250 , 15625 , 7812 },
	66	{ 15625 , 7812 , 3906 , 1953 } };
07914c84 AC	67
	68	/* Constant msleep times for data acquisitions */
	69	static const int mcp3422_read_times[4] = {
	70	[MCP3422_SRATE_240] = 1000 / 240,
	71	[MCP3422_SRATE_60] = 1000 / 60,
	72	[MCP3422_SRATE_15] = 1000 / 15,
	73	[MCP3422_SRATE_3] = 1000 / 3 };
	74
	75	/* sample rates to integer conversion table */
	76	static const int mcp3422_sample_rates[4] = {
	77	[MCP3422_SRATE_240] = 240,
	78	[MCP3422_SRATE_60] = 60,
	79	[MCP3422_SRATE_15] = 15,
	80	[MCP3422_SRATE_3] = 3 };
	81
	82	/* sample rates to sign extension table */
	83	static const int mcp3422_sign_extend[4] = {
a5a3e431 PM	84	[MCP3422_SRATE_240] = 11,
	85	[MCP3422_SRATE_60] = 13,
	86	[MCP3422_SRATE_15] = 15,
	87	[MCP3422_SRATE_3] = 17 };
07914c84 AC	88
	89	/* Client data (each client gets its own) */
	90	struct mcp3422 {
	91	struct i2c_client *i2c;
2816ac64	92	u8 id;
07914c84 AC	93	u8 config;
	94	u8 pga[4];
	95	struct mutex lock;
	96	};
	97
	98	static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
	99	{
	100	int ret;
	101
	102	mutex_lock(&adc->lock);
	103
	104	ret = i2c_master_send(adc->i2c, &newconfig, 1);
	105	if (ret > 0) {
	106	adc->config = newconfig;
	107	ret = 0;
	108	}
	109
	110	mutex_unlock(&adc->lock);
	111
	112	return ret;
	113	}
	114
	115	static int mcp3422_read(struct mcp3422 adc, int value, u8 *config)
	116	{
	117	int ret = 0;
	118	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
	119	u8 buf[4] = {0, 0, 0, 0};
	120	u32 temp;
	121
	122	if (sample_rate == MCP3422_SRATE_3) {
	123	ret = i2c_master_recv(adc->i2c, buf, 4);
	124	temp = buf[0] << 16 \| buf[1] << 8 \| buf[2];
	125	*config = buf[3];
	126	} else {
	127	ret = i2c_master_recv(adc->i2c, buf, 3);
	128	temp = buf[0] << 8 \| buf[1];
	129	*config = buf[2];
	130	}
	131
	132	*value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
	133
	134	return ret;
	135	}
	136
	137	static int mcp3422_read_channel(struct mcp3422 *adc,
	138	struct iio_chan_spec const channel, int value)
	139	{
	140	int ret;
	141	u8 config;
	142	u8 req_channel = channel->channel;
	143
	144	if (req_channel != MCP3422_CHANNEL(adc->config)) {
	145	config = adc->config;
	146	config &= ~MCP3422_CHANNEL_MASK;
	147	config \|= MCP3422_CHANNEL_VALUE(req_channel);
	148	config &= ~MCP3422_PGA_MASK;
	149	config \|= MCP3422_PGA_VALUE(adc->pga[req_channel]);
	150	ret = mcp3422_update_config(adc, config);
	151	if (ret < 0)
	152	return ret;
	153	msleep(mcp3422_read_times[MCP3422_SAMPLE_RATE(adc->config)]);
	154	}
	155
	156	return mcp3422_read(adc, value, &config);
157	}
158
159	static int mcp3422_read_raw(struct iio_dev *iio,
160	struct iio_chan_spec const channel, int val1,
161	int *val2, long mask)
162	{
163	struct mcp3422 *adc = iio_priv(iio);
164	int err;
165
166	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
167	u8 pga = MCP3422_PGA(adc->config);
168
169	switch (mask) {
170	case IIO_CHAN_INFO_RAW:
171	err = mcp3422_read_channel(adc, channel, val1);
172	if (err < 0)
173	return -EINVAL;
174	return IIO_VAL_INT;
175
176	case IIO_CHAN_INFO_SCALE:
177
178	*val1 = 0;
179	*val2 = mcp3422_scales[sample_rate][pga];
180	return IIO_VAL_INT_PLUS_NANO;
181
182	case IIO_CHAN_INFO_SAMP_FREQ:
183	*val1 = mcp3422_sample_rates[MCP3422_SAMPLE_RATE(adc->config)];
184	return IIO_VAL_INT;
185
186	default:
187	break;
188	}
189
190	return -EINVAL;
191	}
192
193	static int mcp3422_write_raw(struct iio_dev *iio,
194	struct iio_chan_spec const *channel, int val1,
195	int val2, long mask)
196	{
197	struct mcp3422 *adc = iio_priv(iio);
198	u8 temp;
199	u8 config = adc->config;
200	u8 req_channel = channel->channel;
201	u8 sample_rate = MCP3422_SAMPLE_RATE(config);
202	u8 i;
203
204	switch (mask) {
205	case IIO_CHAN_INFO_SCALE:
206	if (val1 != 0)
207	return -EINVAL;
208
209	for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
210	if (val2 == mcp3422_scales[sample_rate][i]) {
211	adc->pga[req_channel] = i;
212
213	config &= ~MCP3422_CHANNEL_MASK;
214	config \|= MCP3422_CHANNEL_VALUE(req_channel);
215	config &= ~MCP3422_PGA_MASK;
216	config \|= MCP3422_PGA_VALUE(adc->pga[req_channel]);
217
218	return mcp3422_update_config(adc, config);
219	}
220	}
221	return -EINVAL;
222
223	case IIO_CHAN_INFO_SAMP_FREQ:
224	switch (val1) {
225	case 240:
226	temp = MCP3422_SRATE_240;
227	break;
228	case 60:
229	temp = MCP3422_SRATE_60;
230	break;
231	case 15:
232	temp = MCP3422_SRATE_15;
233	break;
234	case 3:
2816ac64 AC	235	if (adc->id > 4)
2816ac64 AC	236	return -EINVAL;
07914c84 AC	237	temp = MCP3422_SRATE_3;
	238	break;
	239	default:
	240	return -EINVAL;
	241	}
	242
	243	config &= ~MCP3422_CHANNEL_MASK;
	244	config \|= MCP3422_CHANNEL_VALUE(req_channel);
	245	config &= ~MCP3422_SRATE_MASK;
	246	config \|= MCP3422_SAMPLE_RATE_VALUE(temp);
	247
	248	return mcp3422_update_config(adc, config);
	249
	250	default:
	251	break;
	252	}
	253
	254	return -EINVAL;
	255	}
	256
	257	static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
	258	struct iio_chan_spec const *chan, long mask)
	259	{
	260	switch (mask) {
	261	case IIO_CHAN_INFO_SCALE:
	262	return IIO_VAL_INT_PLUS_NANO;
	263	case IIO_CHAN_INFO_SAMP_FREQ:
	264	return IIO_VAL_INT_PLUS_MICRO;
	265	default:
	266	return -EINVAL;
	267	}
	268	}
	269
2816ac64 AC	270	static ssize_t mcp3422_show_samp_freqs(struct device *dev,
	271	struct device_attribute attr, char buf)
	272	{
	273	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
	274
	275	if (adc->id > 4)
	276	return sprintf(buf, "240 60 15\n");
	277
	278	return sprintf(buf, "240 60 15 3\n");
	279	}
	280
07914c84 AC	281	static ssize_t mcp3422_show_scales(struct device *dev,
	282	struct device_attribute attr, char buf)
	283	{
	284	struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
	285	u8 sample_rate = MCP3422_SAMPLE_RATE(adc->config);
	286
	287	return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
	288	mcp3422_scales[sample_rate][0],
	289	mcp3422_scales[sample_rate][1],
	290	mcp3422_scales[sample_rate][2],
	291	mcp3422_scales[sample_rate][3]);
	292	}
	293
2816ac64 AC	294	static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
2816ac64 AC	295	mcp3422_show_samp_freqs, NULL, 0);
07914c84 AC	296	static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
	297	mcp3422_show_scales, NULL, 0);
	298
	299	static struct attribute *mcp3422_attributes[] = {
2816ac64	300	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
07914c84 AC	301	&iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
	302	NULL,
	303	};
	304
	305	static const struct attribute_group mcp3422_attribute_group = {
	306	.attrs = mcp3422_attributes,
	307	};
	308
78f16dbd SH	309	static const struct iio_chan_spec mcp3421_channels[] = {
	310	MCP3422_CHAN(0),
	311	};
	312
07914c84 AC	313	static const struct iio_chan_spec mcp3422_channels[] = {
	314	MCP3422_CHAN(0),
	315	MCP3422_CHAN(1),
	316	};
	317
	318	static const struct iio_chan_spec mcp3424_channels[] = {
	319	MCP3422_CHAN(0),
	320	MCP3422_CHAN(1),
	321	MCP3422_CHAN(2),
	322	MCP3422_CHAN(3),
	323	};
	324
	325	static const struct iio_info mcp3422_info = {
	326	.read_raw = mcp3422_read_raw,
	327	.write_raw = mcp3422_write_raw,
	328	.write_raw_get_fmt = mcp3422_write_raw_get_fmt,
	329	.attrs = &mcp3422_attribute_group,
	330	.driver_module = THIS_MODULE,
	331	};
	332
	333	static int mcp3422_probe(struct i2c_client *client,
	334	const struct i2c_device_id *id)
	335	{
	336	struct iio_dev *indio_dev;
	337	struct mcp3422 *adc;
	338	int err;
	339	u8 config;
	340
	341	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
f8d9d3b4	342	return -EOPNOTSUPP;
07914c84 AC	343
	344	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
	345	if (!indio_dev)
	346	return -ENOMEM;
	347
	348	adc = iio_priv(indio_dev);
	349	adc->i2c = client;
2816ac64	350	adc->id = (u8)(id->driver_data);
07914c84 AC	351
	352	mutex_init(&adc->lock);
	353
	354	indio_dev->dev.parent = &client->dev;
	355	indio_dev->name = dev_name(&client->dev);
	356	indio_dev->modes = INDIO_DIRECT_MODE;
	357	indio_dev->info = &mcp3422_info;
	358
2816ac64	359	switch (adc->id) {
78f16dbd	360	case 1:
505abf99	361	case 5:
78f16dbd SH	362	indio_dev->channels = mcp3421_channels;
	363	indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
	364	break;
07914c84 AC	365	case 2:
07914c84 AC	366	case 3:
2816ac64 AC	367	case 6:
2816ac64 AC	368	case 7:
07914c84 AC	369	indio_dev->channels = mcp3422_channels;
	370	indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
	371	break;
	372	case 4:
2816ac64	373	case 8:
07914c84 AC	374	indio_dev->channels = mcp3424_channels;
	375	indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
	376	break;
	377	}
	378
	379	/* meaningful default configuration */
	380	config = (MCP3422_CONT_SAMPLING
	381	\| MCP3422_CHANNEL_VALUE(1)
	382	\| MCP3422_PGA_VALUE(MCP3422_PGA_1)
	383	\| MCP3422_SAMPLE_RATE_VALUE(MCP3422_SRATE_240));
	384	mcp3422_update_config(adc, config);
	385
2842d4cc	386	err = devm_iio_device_register(&client->dev, indio_dev);
07914c84 AC	387	if (err < 0)
	388	return err;
	389
	390	i2c_set_clientdata(client, indio_dev);
	391
	392	return 0;
	393	}
	394
07914c84	395	static const struct i2c_device_id mcp3422_id[] = {
78f16dbd	396	{ "mcp3421", 1 },
07914c84 AC	397	{ "mcp3422", 2 },
	398	{ "mcp3423", 3 },
	399	{ "mcp3424", 4 },
505abf99	400	{ "mcp3425", 5 },
2816ac64 AC	401	{ "mcp3426", 6 },
	402	{ "mcp3427", 7 },
	403	{ "mcp3428", 8 },
07914c84 AC	404	{ }
	405	};
	406	MODULE_DEVICE_TABLE(i2c, mcp3422_id);
	407
	408	#ifdef CONFIG_OF
	409	static const struct of_device_id mcp3422_of_match[] = {
	410	{ .compatible = "mcp3422" },
	411	{ }
	412	};
	413	MODULE_DEVICE_TABLE(of, mcp3422_of_match);
	414	#endif
	415
	416	static struct i2c_driver mcp3422_driver = {
	417	.driver = {
	418	.name = "mcp3422",
07914c84 AC	419	.of_match_table = of_match_ptr(mcp3422_of_match),
	420	},
	421	.probe = mcp3422_probe,
07914c84 AC	422	.id_table = mcp3422_id,
	423	};
	424	module_i2c_driver(mcp3422_driver);
	425
	426	MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
505abf99	427	MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
07914c84	428	MODULE_LICENSE("GPL v2");