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efc945fb AM |
1 | /* |
2 | * ADC0831/ADC0832/ADC0834/ADC0838 8-bit ADC driver | |
3 | * | |
4 | * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com> | |
5 | * | |
6 | * This file is subject to the terms and conditions of version 2 of | |
7 | * the GNU General Public License. See the file COPYING in the main | |
8 | * directory of this archive for more details. | |
9 | * | |
10 | * Datasheet: http://www.ti.com/lit/ds/symlink/adc0832-n.pdf | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/spi/spi.h> | |
15 | #include <linux/iio/iio.h> | |
16 | #include <linux/regulator/consumer.h> | |
815bbc87 AM |
17 | #include <linux/iio/buffer.h> |
18 | #include <linux/iio/trigger.h> | |
19 | #include <linux/iio/triggered_buffer.h> | |
20 | #include <linux/iio/trigger_consumer.h> | |
efc945fb AM |
21 | |
22 | enum { | |
23 | adc0831, | |
24 | adc0832, | |
25 | adc0834, | |
26 | adc0838, | |
27 | }; | |
28 | ||
29 | struct adc0832 { | |
30 | struct spi_device *spi; | |
31 | struct regulator *reg; | |
32 | struct mutex lock; | |
33 | u8 mux_bits; | |
34 | ||
35 | u8 tx_buf[2] ____cacheline_aligned; | |
36 | u8 rx_buf[2]; | |
37 | }; | |
38 | ||
39 | #define ADC0832_VOLTAGE_CHANNEL(chan) \ | |
40 | { \ | |
41 | .type = IIO_VOLTAGE, \ | |
42 | .indexed = 1, \ | |
43 | .channel = chan, \ | |
44 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
815bbc87 AM |
45 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
46 | .scan_index = chan, \ | |
47 | .scan_type = { \ | |
48 | .sign = 'u', \ | |
49 | .realbits = 8, \ | |
50 | .storagebits = 8, \ | |
51 | }, \ | |
efc945fb AM |
52 | } |
53 | ||
815bbc87 | 54 | #define ADC0832_VOLTAGE_CHANNEL_DIFF(chan1, chan2, si) \ |
efc945fb AM |
55 | { \ |
56 | .type = IIO_VOLTAGE, \ | |
57 | .indexed = 1, \ | |
58 | .channel = (chan1), \ | |
59 | .channel2 = (chan2), \ | |
60 | .differential = 1, \ | |
61 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ | |
815bbc87 AM |
62 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ |
63 | .scan_index = si, \ | |
64 | .scan_type = { \ | |
65 | .sign = 'u', \ | |
66 | .realbits = 8, \ | |
67 | .storagebits = 8, \ | |
68 | }, \ | |
efc945fb AM |
69 | } |
70 | ||
71 | static const struct iio_chan_spec adc0831_channels[] = { | |
815bbc87 AM |
72 | ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 0), |
73 | IIO_CHAN_SOFT_TIMESTAMP(1), | |
efc945fb AM |
74 | }; |
75 | ||
76 | static const struct iio_chan_spec adc0832_channels[] = { | |
77 | ADC0832_VOLTAGE_CHANNEL(0), | |
78 | ADC0832_VOLTAGE_CHANNEL(1), | |
815bbc87 AM |
79 | ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 2), |
80 | ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 3), | |
81 | IIO_CHAN_SOFT_TIMESTAMP(4), | |
efc945fb AM |
82 | }; |
83 | ||
84 | static const struct iio_chan_spec adc0834_channels[] = { | |
85 | ADC0832_VOLTAGE_CHANNEL(0), | |
86 | ADC0832_VOLTAGE_CHANNEL(1), | |
87 | ADC0832_VOLTAGE_CHANNEL(2), | |
88 | ADC0832_VOLTAGE_CHANNEL(3), | |
815bbc87 AM |
89 | ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 4), |
90 | ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 5), | |
91 | ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 6), | |
92 | ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 7), | |
93 | IIO_CHAN_SOFT_TIMESTAMP(8), | |
efc945fb AM |
94 | }; |
95 | ||
96 | static const struct iio_chan_spec adc0838_channels[] = { | |
97 | ADC0832_VOLTAGE_CHANNEL(0), | |
98 | ADC0832_VOLTAGE_CHANNEL(1), | |
99 | ADC0832_VOLTAGE_CHANNEL(2), | |
100 | ADC0832_VOLTAGE_CHANNEL(3), | |
101 | ADC0832_VOLTAGE_CHANNEL(4), | |
102 | ADC0832_VOLTAGE_CHANNEL(5), | |
103 | ADC0832_VOLTAGE_CHANNEL(6), | |
104 | ADC0832_VOLTAGE_CHANNEL(7), | |
815bbc87 AM |
105 | ADC0832_VOLTAGE_CHANNEL_DIFF(0, 1, 8), |
106 | ADC0832_VOLTAGE_CHANNEL_DIFF(1, 0, 9), | |
107 | ADC0832_VOLTAGE_CHANNEL_DIFF(2, 3, 10), | |
108 | ADC0832_VOLTAGE_CHANNEL_DIFF(3, 2, 11), | |
109 | ADC0832_VOLTAGE_CHANNEL_DIFF(4, 5, 12), | |
110 | ADC0832_VOLTAGE_CHANNEL_DIFF(5, 4, 13), | |
111 | ADC0832_VOLTAGE_CHANNEL_DIFF(6, 7, 14), | |
112 | ADC0832_VOLTAGE_CHANNEL_DIFF(7, 6, 15), | |
113 | IIO_CHAN_SOFT_TIMESTAMP(16), | |
efc945fb AM |
114 | }; |
115 | ||
116 | static int adc0831_adc_conversion(struct adc0832 *adc) | |
117 | { | |
118 | struct spi_device *spi = adc->spi; | |
119 | int ret; | |
120 | ||
121 | ret = spi_read(spi, &adc->rx_buf, 2); | |
122 | if (ret) | |
123 | return ret; | |
124 | ||
125 | /* | |
126 | * Skip TRI-STATE and a leading zero | |
127 | */ | |
128 | return (adc->rx_buf[0] << 2 & 0xff) | (adc->rx_buf[1] >> 6); | |
129 | } | |
130 | ||
131 | static int adc0832_adc_conversion(struct adc0832 *adc, int channel, | |
132 | bool differential) | |
133 | { | |
134 | struct spi_device *spi = adc->spi; | |
135 | struct spi_transfer xfer = { | |
136 | .tx_buf = adc->tx_buf, | |
137 | .rx_buf = adc->rx_buf, | |
138 | .len = 2, | |
139 | }; | |
140 | int ret; | |
141 | ||
142 | if (!adc->mux_bits) | |
143 | return adc0831_adc_conversion(adc); | |
144 | ||
145 | /* start bit */ | |
146 | adc->tx_buf[0] = 1 << (adc->mux_bits + 1); | |
147 | /* single-ended or differential */ | |
148 | adc->tx_buf[0] |= differential ? 0 : (1 << adc->mux_bits); | |
149 | /* odd / sign */ | |
150 | adc->tx_buf[0] |= (channel % 2) << (adc->mux_bits - 1); | |
151 | /* select */ | |
152 | if (adc->mux_bits > 1) | |
153 | adc->tx_buf[0] |= channel / 2; | |
154 | ||
155 | /* align Data output BIT7 (MSB) to 8-bit boundary */ | |
156 | adc->tx_buf[0] <<= 1; | |
157 | ||
158 | ret = spi_sync_transfer(spi, &xfer, 1); | |
159 | if (ret) | |
160 | return ret; | |
161 | ||
162 | return adc->rx_buf[1]; | |
163 | } | |
164 | ||
165 | static int adc0832_read_raw(struct iio_dev *iio, | |
166 | struct iio_chan_spec const *channel, int *value, | |
167 | int *shift, long mask) | |
168 | { | |
169 | struct adc0832 *adc = iio_priv(iio); | |
170 | ||
171 | switch (mask) { | |
172 | case IIO_CHAN_INFO_RAW: | |
173 | mutex_lock(&adc->lock); | |
174 | *value = adc0832_adc_conversion(adc, channel->channel, | |
175 | channel->differential); | |
176 | mutex_unlock(&adc->lock); | |
177 | if (*value < 0) | |
178 | return *value; | |
179 | ||
180 | return IIO_VAL_INT; | |
181 | case IIO_CHAN_INFO_SCALE: | |
182 | *value = regulator_get_voltage(adc->reg); | |
183 | if (*value < 0) | |
184 | return *value; | |
185 | ||
186 | /* convert regulator output voltage to mV */ | |
187 | *value /= 1000; | |
188 | *shift = 8; | |
189 | ||
190 | return IIO_VAL_FRACTIONAL_LOG2; | |
191 | } | |
192 | ||
193 | return -EINVAL; | |
194 | } | |
195 | ||
196 | static const struct iio_info adc0832_info = { | |
197 | .read_raw = adc0832_read_raw, | |
efc945fb AM |
198 | }; |
199 | ||
815bbc87 AM |
200 | static irqreturn_t adc0832_trigger_handler(int irq, void *p) |
201 | { | |
202 | struct iio_poll_func *pf = p; | |
203 | struct iio_dev *indio_dev = pf->indio_dev; | |
204 | struct adc0832 *adc = iio_priv(indio_dev); | |
205 | u8 data[24] = { }; /* 16x 1 byte ADC data + 8 bytes timestamp */ | |
206 | int scan_index; | |
207 | int i = 0; | |
208 | ||
209 | mutex_lock(&adc->lock); | |
210 | ||
211 | for_each_set_bit(scan_index, indio_dev->active_scan_mask, | |
212 | indio_dev->masklength) { | |
213 | const struct iio_chan_spec *scan_chan = | |
214 | &indio_dev->channels[scan_index]; | |
215 | int ret = adc0832_adc_conversion(adc, scan_chan->channel, | |
216 | scan_chan->differential); | |
217 | if (ret < 0) { | |
218 | dev_warn(&adc->spi->dev, | |
219 | "failed to get conversion data\n"); | |
220 | goto out; | |
221 | } | |
222 | ||
223 | data[i] = ret; | |
224 | i++; | |
225 | } | |
226 | iio_push_to_buffers_with_timestamp(indio_dev, data, | |
227 | iio_get_time_ns(indio_dev)); | |
228 | out: | |
229 | mutex_unlock(&adc->lock); | |
230 | ||
231 | iio_trigger_notify_done(indio_dev->trig); | |
232 | ||
233 | return IRQ_HANDLED; | |
234 | } | |
235 | ||
efc945fb AM |
236 | static int adc0832_probe(struct spi_device *spi) |
237 | { | |
238 | struct iio_dev *indio_dev; | |
239 | struct adc0832 *adc; | |
240 | int ret; | |
241 | ||
242 | indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*adc)); | |
243 | if (!indio_dev) | |
244 | return -ENOMEM; | |
245 | ||
246 | adc = iio_priv(indio_dev); | |
247 | adc->spi = spi; | |
248 | mutex_init(&adc->lock); | |
249 | ||
250 | indio_dev->name = spi_get_device_id(spi)->name; | |
251 | indio_dev->dev.parent = &spi->dev; | |
b541eaff | 252 | indio_dev->dev.of_node = spi->dev.of_node; |
efc945fb AM |
253 | indio_dev->info = &adc0832_info; |
254 | indio_dev->modes = INDIO_DIRECT_MODE; | |
255 | ||
256 | switch (spi_get_device_id(spi)->driver_data) { | |
257 | case adc0831: | |
258 | adc->mux_bits = 0; | |
259 | indio_dev->channels = adc0831_channels; | |
260 | indio_dev->num_channels = ARRAY_SIZE(adc0831_channels); | |
261 | break; | |
262 | case adc0832: | |
263 | adc->mux_bits = 1; | |
264 | indio_dev->channels = adc0832_channels; | |
265 | indio_dev->num_channels = ARRAY_SIZE(adc0832_channels); | |
266 | break; | |
267 | case adc0834: | |
268 | adc->mux_bits = 2; | |
269 | indio_dev->channels = adc0834_channels; | |
270 | indio_dev->num_channels = ARRAY_SIZE(adc0834_channels); | |
271 | break; | |
272 | case adc0838: | |
273 | adc->mux_bits = 3; | |
274 | indio_dev->channels = adc0838_channels; | |
275 | indio_dev->num_channels = ARRAY_SIZE(adc0838_channels); | |
276 | break; | |
277 | default: | |
278 | return -EINVAL; | |
279 | } | |
280 | ||
281 | adc->reg = devm_regulator_get(&spi->dev, "vref"); | |
282 | if (IS_ERR(adc->reg)) | |
283 | return PTR_ERR(adc->reg); | |
284 | ||
285 | ret = regulator_enable(adc->reg); | |
286 | if (ret) | |
287 | return ret; | |
288 | ||
289 | spi_set_drvdata(spi, indio_dev); | |
290 | ||
815bbc87 AM |
291 | ret = iio_triggered_buffer_setup(indio_dev, NULL, |
292 | adc0832_trigger_handler, NULL); | |
293 | if (ret) | |
294 | goto err_reg_disable; | |
295 | ||
efc945fb AM |
296 | ret = iio_device_register(indio_dev); |
297 | if (ret) | |
815bbc87 AM |
298 | goto err_buffer_cleanup; |
299 | ||
300 | return 0; | |
301 | err_buffer_cleanup: | |
302 | iio_triggered_buffer_cleanup(indio_dev); | |
303 | err_reg_disable: | |
304 | regulator_disable(adc->reg); | |
efc945fb AM |
305 | |
306 | return ret; | |
307 | } | |
308 | ||
309 | static int adc0832_remove(struct spi_device *spi) | |
310 | { | |
311 | struct iio_dev *indio_dev = spi_get_drvdata(spi); | |
312 | struct adc0832 *adc = iio_priv(indio_dev); | |
313 | ||
314 | iio_device_unregister(indio_dev); | |
815bbc87 | 315 | iio_triggered_buffer_cleanup(indio_dev); |
efc945fb AM |
316 | regulator_disable(adc->reg); |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
321 | #ifdef CONFIG_OF | |
322 | ||
323 | static const struct of_device_id adc0832_dt_ids[] = { | |
324 | { .compatible = "ti,adc0831", }, | |
325 | { .compatible = "ti,adc0832", }, | |
326 | { .compatible = "ti,adc0834", }, | |
327 | { .compatible = "ti,adc0838", }, | |
328 | {} | |
329 | }; | |
330 | MODULE_DEVICE_TABLE(of, adc0832_dt_ids); | |
331 | ||
332 | #endif | |
333 | ||
334 | static const struct spi_device_id adc0832_id[] = { | |
335 | { "adc0831", adc0831 }, | |
336 | { "adc0832", adc0832 }, | |
337 | { "adc0834", adc0834 }, | |
338 | { "adc0838", adc0838 }, | |
339 | {} | |
340 | }; | |
341 | MODULE_DEVICE_TABLE(spi, adc0832_id); | |
342 | ||
343 | static struct spi_driver adc0832_driver = { | |
344 | .driver = { | |
345 | .name = "adc0832", | |
346 | .of_match_table = of_match_ptr(adc0832_dt_ids), | |
347 | }, | |
348 | .probe = adc0832_probe, | |
349 | .remove = adc0832_remove, | |
350 | .id_table = adc0832_id, | |
351 | }; | |
352 | module_spi_driver(adc0832_driver); | |
353 | ||
354 | MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>"); | |
355 | MODULE_DESCRIPTION("ADC0831/ADC0832/ADC0834/ADC0838 driver"); | |
356 | MODULE_LICENSE("GPL v2"); |