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iio:ad5446: Add support for I2C based DACs
[mirror_ubuntu-hirsute-kernel.git] / drivers / iio / dac / ad5446.c
CommitLineData
b5a49481
MH
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/workqueue.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/sysfs.h>
15#include <linux/list.h>
16#include <linux/spi/spi.h>
3ec36a2c 17#include <linux/i2c.h>
b5a49481
MH
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
99c97852 20#include <linux/module.h>
b5a49481 21
06458e27
JC
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
b5a49481
MH
24
25#include "ad5446.h"
26
83f0f572 27static const char * const ad5446_powerdown_modes[] = {
09d48aa9 28 "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
83f0f572
LPC
29};
30
09d48aa9
LPC
31static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
32 const struct iio_chan_spec *chan, unsigned int mode)
bbed4dc7 33{
638e59fc 34 struct ad5446_state *st = iio_priv(indio_dev);
83f0f572 35
09d48aa9 36 st->pwr_down_mode = mode + 1;
bbed4dc7 37
09d48aa9 38 return 0;
bbed4dc7
MH
39}
40
09d48aa9
LPC
41static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
42 const struct iio_chan_spec *chan)
bbed4dc7 43{
638e59fc 44 struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7 45
09d48aa9 46 return st->pwr_down_mode - 1;
bbed4dc7
MH
47}
48
09d48aa9
LPC
49static const struct iio_enum ad5446_powerdown_mode_enum = {
50 .items = ad5446_powerdown_modes,
51 .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
52 .get = ad5446_get_powerdown_mode,
53 .set = ad5446_set_powerdown_mode,
54};
55
83f0f572 56static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139 57 uintptr_t private,
83f0f572 58 const struct iio_chan_spec *chan,
bbed4dc7
MH
59 char *buf)
60{
638e59fc 61 struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7
MH
62
63 return sprintf(buf, "%d\n", st->pwr_down);
64}
65
83f0f572 66static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139 67 uintptr_t private,
83f0f572 68 const struct iio_chan_spec *chan,
bbed4dc7
MH
69 const char *buf, size_t len)
70{
638e59fc 71 struct ad5446_state *st = iio_priv(indio_dev);
cae329e0
LPC
72 unsigned int shift;
73 unsigned int val;
83f0f572 74 bool powerdown;
bbed4dc7
MH
75 int ret;
76
83f0f572 77 ret = strtobool(buf, &powerdown);
bbed4dc7
MH
78 if (ret)
79 return ret;
80
638e59fc 81 mutex_lock(&indio_dev->mlock);
83f0f572 82 st->pwr_down = powerdown;
bbed4dc7 83
cae329e0
LPC
84 if (st->pwr_down) {
85 shift = chan->scan_type.realbits + chan->scan_type.shift;
86 val = st->pwr_down_mode << shift;
87 } else {
88 val = st->cached_val;
89 }
bbed4dc7 90
cae329e0 91 ret = st->chip_info->write(st, val);
638e59fc 92 mutex_unlock(&indio_dev->mlock);
bbed4dc7
MH
93
94 return ret ? ret : len;
95}
96
3ec36a2c 97static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
83f0f572
LPC
98 {
99 .name = "powerdown",
100 .read = ad5446_read_dac_powerdown,
101 .write = ad5446_write_dac_powerdown,
83f0f572 102 },
09d48aa9
LPC
103 IIO_ENUM("powerdown_mode", false, &ad5446_powerdown_mode_enum),
104 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
83f0f572 105 { },
b5a49481
MH
106};
107
83f0f572 108#define _AD5446_CHANNEL(bits, storage, shift, ext) { \
33ad6b21
LPC
109 .type = IIO_VOLTAGE, \
110 .indexed = 1, \
111 .output = 1, \
112 .channel = 0, \
09f4eb40
JC
113 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
114 IIO_CHAN_INFO_SCALE_SHARED_BIT, \
83f0f572
LPC
115 .scan_type = IIO_ST('u', (bits), (storage), (shift)), \
116 .ext_info = (ext), \
33ad6b21
LPC
117}
118
83f0f572
LPC
119#define AD5446_CHANNEL(bits, storage, shift) \
120 _AD5446_CHANNEL(bits, storage, shift, NULL)
121
122#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
3ec36a2c 123 _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
b5a49481 124
33ad6b21
LPC
125static int ad5446_read_raw(struct iio_dev *indio_dev,
126 struct iio_chan_spec const *chan,
127 int *val,
128 int *val2,
129 long m)
130{
131 struct ad5446_state *st = iio_priv(indio_dev);
132 unsigned long scale_uv;
133
134 switch (m) {
5e06bdfb
LPC
135 case IIO_CHAN_INFO_RAW:
136 *val = st->cached_val;
137 return IIO_VAL_INT;
33ad6b21
LPC
138 case IIO_CHAN_INFO_SCALE:
139 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
140 *val = scale_uv / 1000;
141 *val2 = (scale_uv % 1000) * 1000;
142 return IIO_VAL_INT_PLUS_MICRO;
143
144 }
145 return -EINVAL;
146}
147
148static int ad5446_write_raw(struct iio_dev *indio_dev,
149 struct iio_chan_spec const *chan,
150 int val,
151 int val2,
152 long mask)
153{
154 struct ad5446_state *st = iio_priv(indio_dev);
07ffd0d0 155 int ret = 0;
33ad6b21
LPC
156
157 switch (mask) {
09f4eb40 158 case IIO_CHAN_INFO_RAW:
33ad6b21
LPC
159 if (val >= (1 << chan->scan_type.realbits) || val < 0)
160 return -EINVAL;
161
162 val <<= chan->scan_type.shift;
163 mutex_lock(&indio_dev->mlock);
164 st->cached_val = val;
af836d9a 165 if (!st->pwr_down)
cae329e0 166 ret = st->chip_info->write(st, val);
33ad6b21
LPC
167 mutex_unlock(&indio_dev->mlock);
168 break;
169 default:
170 ret = -EINVAL;
171 }
172
173 return ret;
174}
175
6fe8135f 176static const struct iio_info ad5446_info = {
7389266c
JC
177 .read_raw = ad5446_read_raw,
178 .write_raw = ad5446_write_raw,
179 .driver_module = THIS_MODULE,
180};
181
3ec36a2c
JFD
182static int __devinit ad5446_probe(struct device *dev, const char *name,
183 const struct ad5446_chip_info *chip_info)
b5a49481
MH
184{
185 struct ad5446_state *st;
86729fc4
JC
186 struct iio_dev *indio_dev;
187 struct regulator *reg;
b5a49481
MH
188 int ret, voltage_uv = 0;
189
3ec36a2c 190 reg = regulator_get(dev, "vcc");
86729fc4
JC
191 if (!IS_ERR(reg)) {
192 ret = regulator_enable(reg);
b5a49481
MH
193 if (ret)
194 goto error_put_reg;
195
86729fc4 196 voltage_uv = regulator_get_voltage(reg);
b5a49481
MH
197 }
198
7cbb7537 199 indio_dev = iio_device_alloc(sizeof(*st));
86729fc4
JC
200 if (indio_dev == NULL) {
201 ret = -ENOMEM;
202 goto error_disable_reg;
203 }
204 st = iio_priv(indio_dev);
3ec36a2c 205 st->chip_info = chip_info;
b5a49481 206
3ec36a2c 207 dev_set_drvdata(dev, indio_dev);
86729fc4 208 st->reg = reg;
3ec36a2c 209 st->dev = dev;
b5a49481 210
3ec36a2c
JFD
211 /* Establish that the iio_dev is a child of the device */
212 indio_dev->dev.parent = dev;
213 indio_dev->name = name;
83f0f572 214 indio_dev->info = &ad5446_info;
86729fc4 215 indio_dev->modes = INDIO_DIRECT_MODE;
33ad6b21
LPC
216 indio_dev->channels = &st->chip_info->channel;
217 indio_dev->num_channels = 1;
b5a49481 218
09d48aa9
LPC
219 st->pwr_down_mode = MODE_PWRDWN_1k;
220
4e5d3f92 221 if (st->chip_info->int_vref_mv)
bbed4dc7 222 st->vref_mv = st->chip_info->int_vref_mv;
4e5d3f92
LPC
223 else if (voltage_uv)
224 st->vref_mv = voltage_uv / 1000;
225 else
3ec36a2c 226 dev_warn(dev, "reference voltage unspecified\n");
b5a49481 227
86729fc4 228 ret = iio_device_register(indio_dev);
b5a49481
MH
229 if (ret)
230 goto error_free_device;
231
232 return 0;
233
234error_free_device:
7cbb7537 235 iio_device_free(indio_dev);
b5a49481 236error_disable_reg:
86729fc4
JC
237 if (!IS_ERR(reg))
238 regulator_disable(reg);
b5a49481 239error_put_reg:
86729fc4
JC
240 if (!IS_ERR(reg))
241 regulator_put(reg);
242
b5a49481
MH
243 return ret;
244}
245
3ec36a2c 246static int ad5446_remove(struct device *dev)
b5a49481 247{
3ec36a2c 248 struct iio_dev *indio_dev = dev_get_drvdata(dev);
86729fc4 249 struct ad5446_state *st = iio_priv(indio_dev);
b5a49481
MH
250
251 iio_device_unregister(indio_dev);
d2fffd6c
JC
252 if (!IS_ERR(st->reg)) {
253 regulator_disable(st->reg);
254 regulator_put(st->reg);
b5a49481 255 }
7cbb7537 256 iio_device_free(indio_dev);
d2fffd6c 257
b5a49481
MH
258 return 0;
259}
260
3ec36a2c
JFD
261#if IS_ENABLED(CONFIG_SPI_MASTER)
262
263static int ad5446_write(struct ad5446_state *st, unsigned val)
264{
265 struct spi_device *spi = to_spi_device(st->dev);
266 __be16 data = cpu_to_be16(val);
267
268 return spi_write(spi, &data, sizeof(data));
269}
270
271static int ad5660_write(struct ad5446_state *st, unsigned val)
272{
273 struct spi_device *spi = to_spi_device(st->dev);
274 uint8_t data[3];
275
276 data[0] = (val >> 16) & 0xFF;
277 data[1] = (val >> 8) & 0xFF;
278 data[2] = val & 0xFF;
279
280 return spi_write(spi, data, sizeof(data));
281}
282
283/**
284 * ad5446_supported_spi_device_ids:
285 * The AD5620/40/60 parts are available in different fixed internal reference
286 * voltage options. The actual part numbers may look differently
287 * (and a bit cryptic), however this style is used to make clear which
288 * parts are supported here.
289 */
290enum ad5446_supported_spi_device_ids {
291 ID_AD5444,
292 ID_AD5446,
293 ID_AD5450,
294 ID_AD5451,
295 ID_AD5541A,
296 ID_AD5512A,
297 ID_AD5553,
298 ID_AD5601,
299 ID_AD5611,
300 ID_AD5621,
301 ID_AD5620_2500,
302 ID_AD5620_1250,
303 ID_AD5640_2500,
304 ID_AD5640_1250,
305 ID_AD5660_2500,
306 ID_AD5660_1250,
307 ID_AD5662,
308};
309
310static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
311 [ID_AD5444] = {
312 .channel = AD5446_CHANNEL(12, 16, 2),
313 .write = ad5446_write,
314 },
315 [ID_AD5446] = {
316 .channel = AD5446_CHANNEL(14, 16, 0),
317 .write = ad5446_write,
318 },
319 [ID_AD5450] = {
320 .channel = AD5446_CHANNEL(8, 16, 6),
321 .write = ad5446_write,
322 },
323 [ID_AD5451] = {
324 .channel = AD5446_CHANNEL(10, 16, 4),
325 .write = ad5446_write,
326 },
327 [ID_AD5541A] = {
328 .channel = AD5446_CHANNEL(16, 16, 0),
329 .write = ad5446_write,
330 },
331 [ID_AD5512A] = {
332 .channel = AD5446_CHANNEL(12, 16, 4),
333 .write = ad5446_write,
334 },
335 [ID_AD5553] = {
336 .channel = AD5446_CHANNEL(14, 16, 0),
337 .write = ad5446_write,
338 },
339 [ID_AD5601] = {
340 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
341 .write = ad5446_write,
342 },
343 [ID_AD5611] = {
344 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
345 .write = ad5446_write,
346 },
347 [ID_AD5621] = {
348 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
349 .write = ad5446_write,
350 },
351 [ID_AD5620_2500] = {
352 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
353 .int_vref_mv = 2500,
354 .write = ad5446_write,
355 },
356 [ID_AD5620_1250] = {
357 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
358 .int_vref_mv = 1250,
359 .write = ad5446_write,
360 },
361 [ID_AD5640_2500] = {
362 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
363 .int_vref_mv = 2500,
364 .write = ad5446_write,
365 },
366 [ID_AD5640_1250] = {
367 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
368 .int_vref_mv = 1250,
369 .write = ad5446_write,
370 },
371 [ID_AD5660_2500] = {
372 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
373 .int_vref_mv = 2500,
374 .write = ad5660_write,
375 },
376 [ID_AD5660_1250] = {
377 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
378 .int_vref_mv = 1250,
379 .write = ad5660_write,
380 },
381 [ID_AD5662] = {
382 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
383 .write = ad5660_write,
384 },
385};
386
387static const struct spi_device_id ad5446_spi_ids[] = {
b5a49481
MH
388 {"ad5444", ID_AD5444},
389 {"ad5446", ID_AD5446},
779c0c46
LPC
390 {"ad5450", ID_AD5450},
391 {"ad5451", ID_AD5451},
392 {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
393 {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
b5a49481 394 {"ad5512a", ID_AD5512A},
67d1c1f4 395 {"ad5541a", ID_AD5541A},
11a7df48
LPC
396 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
397 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
bd51c0b0 398 {"ad5553", ID_AD5553},
2b61535a
MH
399 {"ad5601", ID_AD5601},
400 {"ad5611", ID_AD5611},
401 {"ad5621", ID_AD5621},
d846263d
MH
402 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
403 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
404 {"ad5640-2500", ID_AD5640_2500},
405 {"ad5640-1250", ID_AD5640_1250},
406 {"ad5660-2500", ID_AD5660_2500},
407 {"ad5660-1250", ID_AD5660_1250},
18e5ab31 408 {"ad5662", ID_AD5662},
b5a49481
MH
409 {}
410};
3ec36a2c
JFD
411MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
412
413static int __devinit ad5446_spi_probe(struct spi_device *spi)
414{
415 const struct spi_device_id *id = spi_get_device_id(spi);
416
417 return ad5446_probe(&spi->dev, id->name,
418 &ad5446_spi_chip_info[id->driver_data]);
419}
b5a49481 420
3ec36a2c
JFD
421static int __devexit ad5446_spi_remove(struct spi_device *spi)
422{
423 return ad5446_remove(&spi->dev);
424}
425
426static struct spi_driver ad5446_spi_driver = {
b5a49481
MH
427 .driver = {
428 .name = "ad5446",
b5a49481
MH
429 .owner = THIS_MODULE,
430 },
3ec36a2c
JFD
431 .probe = ad5446_spi_probe,
432 .remove = __devexit_p(ad5446_spi_remove),
433 .id_table = ad5446_spi_ids,
434};
435
436static int __init ad5446_spi_register_driver(void)
437{
438 return spi_register_driver(&ad5446_spi_driver);
439}
440
441static void ad5446_spi_unregister_driver(void)
442{
443 spi_unregister_driver(&ad5446_spi_driver);
444}
445
446#else
447
448static inline int ad5446_spi_register_driver(void) { return 0; }
449static inline void ad5446_spi_unregister_driver(void) { }
450
451#endif
452
453#if IS_ENABLED(CONFIG_I2C)
454
455static int ad5622_write(struct ad5446_state *st, unsigned val)
456{
457 struct i2c_client *client = to_i2c_client(st->dev);
458 __be16 data = cpu_to_be16(val);
459
460 return i2c_master_send(client, (char *)&data, sizeof(data));
461}
462
463/**
464 * ad5446_supported_i2c_device_ids:
465 * The AD5620/40/60 parts are available in different fixed internal reference
466 * voltage options. The actual part numbers may look differently
467 * (and a bit cryptic), however this style is used to make clear which
468 * parts are supported here.
469 */
470enum ad5446_supported_i2c_device_ids {
471 ID_AD5602,
472 ID_AD5612,
473 ID_AD5622,
474};
475
476static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
477 [ID_AD5602] = {
478 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
479 .write = ad5622_write,
480 },
481 [ID_AD5612] = {
482 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
483 .write = ad5622_write,
484 },
485 [ID_AD5622] = {
486 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
487 .write = ad5622_write,
488 },
b5a49481 489};
3ec36a2c
JFD
490
491static int __devinit ad5446_i2c_probe(struct i2c_client *i2c,
492 const struct i2c_device_id *id)
493{
494 return ad5446_probe(&i2c->dev, id->name,
495 &ad5446_i2c_chip_info[id->driver_data]);
496}
497
498static int __devexit ad5446_i2c_remove(struct i2c_client *i2c)
499{
500 return ad5446_remove(&i2c->dev);
501}
502
503static const struct i2c_device_id ad5446_i2c_ids[] = {
504 {"ad5602", ID_AD5602},
505 {"ad5612", ID_AD5612},
506 {"ad5622", ID_AD5622},
507 {}
508};
509MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
510
511static struct i2c_driver ad5446_i2c_driver = {
512 .driver = {
513 .name = "ad5446",
514 .owner = THIS_MODULE,
515 },
516 .probe = ad5446_i2c_probe,
517 .remove = __devexit_p(ad5446_i2c_remove),
518 .id_table = ad5446_i2c_ids,
519};
520
521static int __init ad5446_i2c_register_driver(void)
522{
523 return i2c_add_driver(&ad5446_i2c_driver);
524}
525
526static void __exit ad5446_i2c_unregister_driver(void)
527{
528 i2c_del_driver(&ad5446_i2c_driver);
529}
530
531#else
532
533static inline int ad5446_i2c_register_driver(void) { return 0; }
534static inline void ad5446_i2c_unregister_driver(void) { }
535
536#endif
537
538static int __init ad5446_init(void)
539{
540 int ret;
541
542 ret = ad5446_spi_register_driver();
543 if (ret)
544 return ret;
545
546 ret = ad5446_i2c_register_driver();
547 if (ret) {
548 ad5446_spi_unregister_driver();
549 return ret;
550 }
551
552 return 0;
553}
554module_init(ad5446_init);
555
556static void __exit ad5446_exit(void)
557{
558 ad5446_i2c_unregister_driver();
559 ad5446_spi_unregister_driver();
560}
561module_exit(ad5446_exit);
b5a49481
MH
562
563MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
564MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
565MODULE_LICENSE("GPL v2");