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iio: dac: ad5421: Use devm_* APIs
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CommitLineData
b5a49481
MH
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/workqueue.h>
11#include <linux/device.h>
12#include <linux/kernel.h>
13#include <linux/slab.h>
14#include <linux/sysfs.h>
15#include <linux/list.h>
16#include <linux/spi/spi.h>
3ec36a2c 17#include <linux/i2c.h>
b5a49481
MH
18#include <linux/regulator/consumer.h>
19#include <linux/err.h>
99c97852 20#include <linux/module.h>
b5a49481 21
06458e27
JC
22#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h>
b5a49481 24
2e15c903
JFD
25#define MODE_PWRDWN_1k 0x1
26#define MODE_PWRDWN_100k 0x2
27#define MODE_PWRDWN_TRISTATE 0x3
28
29/**
30 * struct ad5446_state - driver instance specific data
31 * @spi: spi_device
32 * @chip_info: chip model specific constants, available modes etc
33 * @reg: supply regulator
34 * @vref_mv: actual reference voltage used
35 */
36
37struct ad5446_state {
38 struct device *dev;
39 const struct ad5446_chip_info *chip_info;
40 struct regulator *reg;
41 unsigned short vref_mv;
42 unsigned cached_val;
43 unsigned pwr_down_mode;
44 unsigned pwr_down;
45};
46
47/**
48 * struct ad5446_chip_info - chip specific information
49 * @channel: channel spec for the DAC
50 * @int_vref_mv: AD5620/40/60: the internal reference voltage
51 * @write: chip specific helper function to write to the register
52 */
53
54struct ad5446_chip_info {
55 struct iio_chan_spec channel;
56 u16 int_vref_mv;
57 int (*write)(struct ad5446_state *st, unsigned val);
58};
b5a49481 59
83f0f572 60static const char * const ad5446_powerdown_modes[] = {
09d48aa9 61 "1kohm_to_gnd", "100kohm_to_gnd", "three_state"
83f0f572
LPC
62};
63
09d48aa9
LPC
64static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
65 const struct iio_chan_spec *chan, unsigned int mode)
bbed4dc7 66{
638e59fc 67 struct ad5446_state *st = iio_priv(indio_dev);
83f0f572 68
09d48aa9 69 st->pwr_down_mode = mode + 1;
bbed4dc7 70
09d48aa9 71 return 0;
bbed4dc7
MH
72}
73
09d48aa9
LPC
74static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
75 const struct iio_chan_spec *chan)
bbed4dc7 76{
638e59fc 77 struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7 78
09d48aa9 79 return st->pwr_down_mode - 1;
bbed4dc7
MH
80}
81
09d48aa9
LPC
82static const struct iio_enum ad5446_powerdown_mode_enum = {
83 .items = ad5446_powerdown_modes,
84 .num_items = ARRAY_SIZE(ad5446_powerdown_modes),
85 .get = ad5446_get_powerdown_mode,
86 .set = ad5446_set_powerdown_mode,
87};
88
83f0f572 89static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139 90 uintptr_t private,
83f0f572 91 const struct iio_chan_spec *chan,
bbed4dc7
MH
92 char *buf)
93{
638e59fc 94 struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7
MH
95
96 return sprintf(buf, "%d\n", st->pwr_down);
97}
98
83f0f572 99static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139 100 uintptr_t private,
83f0f572 101 const struct iio_chan_spec *chan,
bbed4dc7
MH
102 const char *buf, size_t len)
103{
638e59fc 104 struct ad5446_state *st = iio_priv(indio_dev);
cae329e0
LPC
105 unsigned int shift;
106 unsigned int val;
83f0f572 107 bool powerdown;
bbed4dc7
MH
108 int ret;
109
83f0f572 110 ret = strtobool(buf, &powerdown);
bbed4dc7
MH
111 if (ret)
112 return ret;
113
638e59fc 114 mutex_lock(&indio_dev->mlock);
83f0f572 115 st->pwr_down = powerdown;
bbed4dc7 116
cae329e0
LPC
117 if (st->pwr_down) {
118 shift = chan->scan_type.realbits + chan->scan_type.shift;
119 val = st->pwr_down_mode << shift;
120 } else {
121 val = st->cached_val;
122 }
bbed4dc7 123
cae329e0 124 ret = st->chip_info->write(st, val);
638e59fc 125 mutex_unlock(&indio_dev->mlock);
bbed4dc7
MH
126
127 return ret ? ret : len;
128}
129
3ec36a2c 130static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
83f0f572
LPC
131 {
132 .name = "powerdown",
133 .read = ad5446_read_dac_powerdown,
134 .write = ad5446_write_dac_powerdown,
83f0f572 135 },
09d48aa9
LPC
136 IIO_ENUM("powerdown_mode", false, &ad5446_powerdown_mode_enum),
137 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
83f0f572 138 { },
b5a49481
MH
139};
140
83f0f572 141#define _AD5446_CHANNEL(bits, storage, shift, ext) { \
33ad6b21
LPC
142 .type = IIO_VOLTAGE, \
143 .indexed = 1, \
144 .output = 1, \
145 .channel = 0, \
2f6a4a44
JC
146 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
147 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
83f0f572
LPC
148 .scan_type = IIO_ST('u', (bits), (storage), (shift)), \
149 .ext_info = (ext), \
33ad6b21
LPC
150}
151
83f0f572
LPC
152#define AD5446_CHANNEL(bits, storage, shift) \
153 _AD5446_CHANNEL(bits, storage, shift, NULL)
154
155#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
3ec36a2c 156 _AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
b5a49481 157
33ad6b21
LPC
158static int ad5446_read_raw(struct iio_dev *indio_dev,
159 struct iio_chan_spec const *chan,
160 int *val,
161 int *val2,
162 long m)
163{
164 struct ad5446_state *st = iio_priv(indio_dev);
165 unsigned long scale_uv;
166
167 switch (m) {
5e06bdfb
LPC
168 case IIO_CHAN_INFO_RAW:
169 *val = st->cached_val;
170 return IIO_VAL_INT;
33ad6b21
LPC
171 case IIO_CHAN_INFO_SCALE:
172 scale_uv = (st->vref_mv * 1000) >> chan->scan_type.realbits;
173 *val = scale_uv / 1000;
174 *val2 = (scale_uv % 1000) * 1000;
175 return IIO_VAL_INT_PLUS_MICRO;
176
177 }
178 return -EINVAL;
179}
180
181static int ad5446_write_raw(struct iio_dev *indio_dev,
182 struct iio_chan_spec const *chan,
183 int val,
184 int val2,
185 long mask)
186{
187 struct ad5446_state *st = iio_priv(indio_dev);
07ffd0d0 188 int ret = 0;
33ad6b21
LPC
189
190 switch (mask) {
09f4eb40 191 case IIO_CHAN_INFO_RAW:
33ad6b21
LPC
192 if (val >= (1 << chan->scan_type.realbits) || val < 0)
193 return -EINVAL;
194
195 val <<= chan->scan_type.shift;
196 mutex_lock(&indio_dev->mlock);
197 st->cached_val = val;
af836d9a 198 if (!st->pwr_down)
cae329e0 199 ret = st->chip_info->write(st, val);
33ad6b21
LPC
200 mutex_unlock(&indio_dev->mlock);
201 break;
202 default:
203 ret = -EINVAL;
204 }
205
206 return ret;
207}
208
6fe8135f 209static const struct iio_info ad5446_info = {
7389266c
JC
210 .read_raw = ad5446_read_raw,
211 .write_raw = ad5446_write_raw,
212 .driver_module = THIS_MODULE,
213};
214
fc52692c
GKH
215static int ad5446_probe(struct device *dev, const char *name,
216 const struct ad5446_chip_info *chip_info)
b5a49481
MH
217{
218 struct ad5446_state *st;
86729fc4
JC
219 struct iio_dev *indio_dev;
220 struct regulator *reg;
b5a49481
MH
221 int ret, voltage_uv = 0;
222
3ec36a2c 223 reg = regulator_get(dev, "vcc");
86729fc4
JC
224 if (!IS_ERR(reg)) {
225 ret = regulator_enable(reg);
b5a49481
MH
226 if (ret)
227 goto error_put_reg;
228
13e57ee2
AL
229 ret = regulator_get_voltage(reg);
230 if (ret < 0)
231 goto error_disable_reg;
232
233 voltage_uv = ret;
b5a49481
MH
234 }
235
7cbb7537 236 indio_dev = iio_device_alloc(sizeof(*st));
86729fc4
JC
237 if (indio_dev == NULL) {
238 ret = -ENOMEM;
239 goto error_disable_reg;
240 }
241 st = iio_priv(indio_dev);
3ec36a2c 242 st->chip_info = chip_info;
b5a49481 243
3ec36a2c 244 dev_set_drvdata(dev, indio_dev);
86729fc4 245 st->reg = reg;
3ec36a2c 246 st->dev = dev;
b5a49481 247
3ec36a2c
JFD
248 /* Establish that the iio_dev is a child of the device */
249 indio_dev->dev.parent = dev;
250 indio_dev->name = name;
83f0f572 251 indio_dev->info = &ad5446_info;
86729fc4 252 indio_dev->modes = INDIO_DIRECT_MODE;
33ad6b21
LPC
253 indio_dev->channels = &st->chip_info->channel;
254 indio_dev->num_channels = 1;
b5a49481 255
09d48aa9
LPC
256 st->pwr_down_mode = MODE_PWRDWN_1k;
257
4e5d3f92 258 if (st->chip_info->int_vref_mv)
bbed4dc7 259 st->vref_mv = st->chip_info->int_vref_mv;
4e5d3f92
LPC
260 else if (voltage_uv)
261 st->vref_mv = voltage_uv / 1000;
262 else
3ec36a2c 263 dev_warn(dev, "reference voltage unspecified\n");
b5a49481 264
86729fc4 265 ret = iio_device_register(indio_dev);
b5a49481
MH
266 if (ret)
267 goto error_free_device;
268
269 return 0;
270
271error_free_device:
7cbb7537 272 iio_device_free(indio_dev);
b5a49481 273error_disable_reg:
86729fc4
JC
274 if (!IS_ERR(reg))
275 regulator_disable(reg);
b5a49481 276error_put_reg:
86729fc4
JC
277 if (!IS_ERR(reg))
278 regulator_put(reg);
279
b5a49481
MH
280 return ret;
281}
282
3ec36a2c 283static int ad5446_remove(struct device *dev)
b5a49481 284{
3ec36a2c 285 struct iio_dev *indio_dev = dev_get_drvdata(dev);
86729fc4 286 struct ad5446_state *st = iio_priv(indio_dev);
b5a49481
MH
287
288 iio_device_unregister(indio_dev);
d2fffd6c
JC
289 if (!IS_ERR(st->reg)) {
290 regulator_disable(st->reg);
291 regulator_put(st->reg);
b5a49481 292 }
7cbb7537 293 iio_device_free(indio_dev);
d2fffd6c 294
b5a49481
MH
295 return 0;
296}
297
3ec36a2c
JFD
298#if IS_ENABLED(CONFIG_SPI_MASTER)
299
300static int ad5446_write(struct ad5446_state *st, unsigned val)
301{
302 struct spi_device *spi = to_spi_device(st->dev);
303 __be16 data = cpu_to_be16(val);
304
305 return spi_write(spi, &data, sizeof(data));
306}
307
308static int ad5660_write(struct ad5446_state *st, unsigned val)
309{
310 struct spi_device *spi = to_spi_device(st->dev);
311 uint8_t data[3];
312
313 data[0] = (val >> 16) & 0xFF;
314 data[1] = (val >> 8) & 0xFF;
315 data[2] = val & 0xFF;
316
317 return spi_write(spi, data, sizeof(data));
318}
319
320/**
321 * ad5446_supported_spi_device_ids:
322 * The AD5620/40/60 parts are available in different fixed internal reference
323 * voltage options. The actual part numbers may look differently
324 * (and a bit cryptic), however this style is used to make clear which
325 * parts are supported here.
326 */
327enum ad5446_supported_spi_device_ids {
2fafbce2
LPC
328 ID_AD5300,
329 ID_AD5310,
330 ID_AD5320,
3ec36a2c
JFD
331 ID_AD5444,
332 ID_AD5446,
333 ID_AD5450,
334 ID_AD5451,
335 ID_AD5541A,
336 ID_AD5512A,
337 ID_AD5553,
338 ID_AD5601,
339 ID_AD5611,
340 ID_AD5621,
341 ID_AD5620_2500,
342 ID_AD5620_1250,
343 ID_AD5640_2500,
344 ID_AD5640_1250,
345 ID_AD5660_2500,
346 ID_AD5660_1250,
347 ID_AD5662,
348};
349
350static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
2fafbce2
LPC
351 [ID_AD5300] = {
352 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
353 .write = ad5446_write,
354 },
355 [ID_AD5310] = {
356 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
357 .write = ad5446_write,
358 },
359 [ID_AD5320] = {
360 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
361 .write = ad5446_write,
362 },
3ec36a2c
JFD
363 [ID_AD5444] = {
364 .channel = AD5446_CHANNEL(12, 16, 2),
365 .write = ad5446_write,
366 },
367 [ID_AD5446] = {
368 .channel = AD5446_CHANNEL(14, 16, 0),
369 .write = ad5446_write,
370 },
371 [ID_AD5450] = {
372 .channel = AD5446_CHANNEL(8, 16, 6),
373 .write = ad5446_write,
374 },
375 [ID_AD5451] = {
376 .channel = AD5446_CHANNEL(10, 16, 4),
377 .write = ad5446_write,
378 },
379 [ID_AD5541A] = {
380 .channel = AD5446_CHANNEL(16, 16, 0),
381 .write = ad5446_write,
382 },
383 [ID_AD5512A] = {
384 .channel = AD5446_CHANNEL(12, 16, 4),
385 .write = ad5446_write,
386 },
387 [ID_AD5553] = {
388 .channel = AD5446_CHANNEL(14, 16, 0),
389 .write = ad5446_write,
390 },
391 [ID_AD5601] = {
392 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
393 .write = ad5446_write,
394 },
395 [ID_AD5611] = {
396 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
397 .write = ad5446_write,
398 },
399 [ID_AD5621] = {
400 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
401 .write = ad5446_write,
402 },
403 [ID_AD5620_2500] = {
404 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
405 .int_vref_mv = 2500,
406 .write = ad5446_write,
407 },
408 [ID_AD5620_1250] = {
409 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
410 .int_vref_mv = 1250,
411 .write = ad5446_write,
412 },
413 [ID_AD5640_2500] = {
414 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
415 .int_vref_mv = 2500,
416 .write = ad5446_write,
417 },
418 [ID_AD5640_1250] = {
419 .channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
420 .int_vref_mv = 1250,
421 .write = ad5446_write,
422 },
423 [ID_AD5660_2500] = {
424 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
425 .int_vref_mv = 2500,
426 .write = ad5660_write,
427 },
428 [ID_AD5660_1250] = {
429 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
430 .int_vref_mv = 1250,
431 .write = ad5660_write,
432 },
433 [ID_AD5662] = {
434 .channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
435 .write = ad5660_write,
436 },
437};
438
439static const struct spi_device_id ad5446_spi_ids[] = {
2fafbce2
LPC
440 {"ad5300", ID_AD5300},
441 {"ad5310", ID_AD5310},
442 {"ad5320", ID_AD5320},
b5a49481
MH
443 {"ad5444", ID_AD5444},
444 {"ad5446", ID_AD5446},
779c0c46
LPC
445 {"ad5450", ID_AD5450},
446 {"ad5451", ID_AD5451},
447 {"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
448 {"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
b5a49481 449 {"ad5512a", ID_AD5512A},
67d1c1f4 450 {"ad5541a", ID_AD5541A},
11a7df48
LPC
451 {"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
452 {"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
bd51c0b0 453 {"ad5553", ID_AD5553},
2b61535a
MH
454 {"ad5601", ID_AD5601},
455 {"ad5611", ID_AD5611},
456 {"ad5621", ID_AD5621},
d846263d
MH
457 {"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
458 {"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
459 {"ad5640-2500", ID_AD5640_2500},
460 {"ad5640-1250", ID_AD5640_1250},
461 {"ad5660-2500", ID_AD5660_2500},
462 {"ad5660-1250", ID_AD5660_1250},
18e5ab31 463 {"ad5662", ID_AD5662},
b5a49481
MH
464 {}
465};
3ec36a2c
JFD
466MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
467
fc52692c 468static int ad5446_spi_probe(struct spi_device *spi)
3ec36a2c
JFD
469{
470 const struct spi_device_id *id = spi_get_device_id(spi);
471
472 return ad5446_probe(&spi->dev, id->name,
473 &ad5446_spi_chip_info[id->driver_data]);
474}
b5a49481 475
fc52692c 476static int ad5446_spi_remove(struct spi_device *spi)
3ec36a2c
JFD
477{
478 return ad5446_remove(&spi->dev);
479}
480
481static struct spi_driver ad5446_spi_driver = {
b5a49481
MH
482 .driver = {
483 .name = "ad5446",
b5a49481
MH
484 .owner = THIS_MODULE,
485 },
3ec36a2c 486 .probe = ad5446_spi_probe,
fc52692c 487 .remove = ad5446_spi_remove,
3ec36a2c
JFD
488 .id_table = ad5446_spi_ids,
489};
490
491static int __init ad5446_spi_register_driver(void)
492{
493 return spi_register_driver(&ad5446_spi_driver);
494}
495
496static void ad5446_spi_unregister_driver(void)
497{
498 spi_unregister_driver(&ad5446_spi_driver);
499}
500
501#else
502
503static inline int ad5446_spi_register_driver(void) { return 0; }
504static inline void ad5446_spi_unregister_driver(void) { }
505
506#endif
507
508#if IS_ENABLED(CONFIG_I2C)
509
510static int ad5622_write(struct ad5446_state *st, unsigned val)
511{
512 struct i2c_client *client = to_i2c_client(st->dev);
513 __be16 data = cpu_to_be16(val);
514
515 return i2c_master_send(client, (char *)&data, sizeof(data));
516}
517
518/**
519 * ad5446_supported_i2c_device_ids:
520 * The AD5620/40/60 parts are available in different fixed internal reference
521 * voltage options. The actual part numbers may look differently
522 * (and a bit cryptic), however this style is used to make clear which
523 * parts are supported here.
524 */
525enum ad5446_supported_i2c_device_ids {
526 ID_AD5602,
527 ID_AD5612,
528 ID_AD5622,
529};
530
531static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
532 [ID_AD5602] = {
533 .channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
534 .write = ad5622_write,
535 },
536 [ID_AD5612] = {
537 .channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
538 .write = ad5622_write,
539 },
540 [ID_AD5622] = {
541 .channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
542 .write = ad5622_write,
543 },
b5a49481 544};
3ec36a2c 545
fc52692c
GKH
546static int ad5446_i2c_probe(struct i2c_client *i2c,
547 const struct i2c_device_id *id)
3ec36a2c
JFD
548{
549 return ad5446_probe(&i2c->dev, id->name,
550 &ad5446_i2c_chip_info[id->driver_data]);
551}
552
fc52692c 553static int ad5446_i2c_remove(struct i2c_client *i2c)
3ec36a2c
JFD
554{
555 return ad5446_remove(&i2c->dev);
556}
557
558static const struct i2c_device_id ad5446_i2c_ids[] = {
bf832380
LPC
559 {"ad5301", ID_AD5602},
560 {"ad5311", ID_AD5612},
561 {"ad5321", ID_AD5622},
3ec36a2c
JFD
562 {"ad5602", ID_AD5602},
563 {"ad5612", ID_AD5612},
564 {"ad5622", ID_AD5622},
565 {}
566};
567MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
568
569static struct i2c_driver ad5446_i2c_driver = {
570 .driver = {
571 .name = "ad5446",
572 .owner = THIS_MODULE,
573 },
574 .probe = ad5446_i2c_probe,
fc52692c 575 .remove = ad5446_i2c_remove,
3ec36a2c
JFD
576 .id_table = ad5446_i2c_ids,
577};
578
579static int __init ad5446_i2c_register_driver(void)
580{
581 return i2c_add_driver(&ad5446_i2c_driver);
582}
583
584static void __exit ad5446_i2c_unregister_driver(void)
585{
586 i2c_del_driver(&ad5446_i2c_driver);
587}
588
589#else
590
591static inline int ad5446_i2c_register_driver(void) { return 0; }
592static inline void ad5446_i2c_unregister_driver(void) { }
593
594#endif
595
596static int __init ad5446_init(void)
597{
598 int ret;
599
600 ret = ad5446_spi_register_driver();
601 if (ret)
602 return ret;
603
604 ret = ad5446_i2c_register_driver();
605 if (ret) {
606 ad5446_spi_unregister_driver();
607 return ret;
608 }
609
610 return 0;
611}
612module_init(ad5446_init);
613
614static void __exit ad5446_exit(void)
615{
616 ad5446_i2c_unregister_driver();
617 ad5446_spi_unregister_driver();
618}
619module_exit(ad5446_exit);
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MH
620
621MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
622MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
623MODULE_LICENSE("GPL v2");