[mirror_ubuntu-hirsute-kernel.git] / drivers / iio / dac / ad5446.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * AD5446 SPI DAC driver
 *
 * Copyright 2010 Analog Devices Inc.
 */

#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/spi/spi.h>
#include <linux/i2c.h>
#include <linux/regulator/consumer.h>
#include <linux/err.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>

#define MODE_PWRDWN_1k		0x1
#define MODE_PWRDWN_100k	0x2
#define MODE_PWRDWN_TRISTATE	0x3

/**
 * struct ad5446_state - driver instance specific data
 * @spi:		spi_device
 * @chip_info:		chip model specific constants, available modes etc
 * @reg:		supply regulator
 * @vref_mv:		actual reference voltage used
 */

struct ad5446_state {
	struct device		*dev;
	const struct ad5446_chip_info	*chip_info;
	struct regulator		*reg;
	unsigned short			vref_mv;
	unsigned			cached_val;
	unsigned			pwr_down_mode;
	unsigned			pwr_down;
};

/**
 * struct ad5446_chip_info - chip specific information
 * @channel:		channel spec for the DAC
 * @int_vref_mv:	AD5620/40/60: the internal reference voltage
 * @write:		chip specific helper function to write to the register
 */

struct ad5446_chip_info {
	struct iio_chan_spec	channel;
	u16			int_vref_mv;
	int			(*write)(struct ad5446_state *st, unsigned val);
};

static const char * const ad5446_powerdown_modes[] = {
	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
};

static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan, unsigned int mode)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	st->pwr_down_mode = mode + 1;

	return 0;
}

static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
	const struct iio_chan_spec *chan)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	return st->pwr_down_mode - 1;
}

static const struct iio_enum ad5446_powerdown_mode_enum = {
	.items = ad5446_powerdown_modes,
	.num_items = ARRAY_SIZE(ad5446_powerdown_modes),
	.get = ad5446_get_powerdown_mode,
	.set = ad5446_set_powerdown_mode,
};

static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
					   uintptr_t private,
					   const struct iio_chan_spec *chan,
					   char *buf)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	return sprintf(buf, "%d\n", st->pwr_down);
}

static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
					    uintptr_t private,
					    const struct iio_chan_spec *chan,
					    const char *buf, size_t len)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	unsigned int shift;
	unsigned int val;
	bool powerdown;
	int ret;

	ret = strtobool(buf, &powerdown);
	if (ret)
		return ret;

	mutex_lock(&indio_dev->mlock);
	st->pwr_down = powerdown;

	if (st->pwr_down) {
		shift = chan->scan_type.realbits + chan->scan_type.shift;
		val = st->pwr_down_mode << shift;
	} else {
		val = st->cached_val;
	}

	ret = st->chip_info->write(st, val);
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}

static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
	{
		.name = "powerdown",
		.read = ad5446_read_dac_powerdown,
		.write = ad5446_write_dac_powerdown,
		.shared = IIO_SEPARATE,
	},
	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
	{ },
};

#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
	.type = IIO_VOLTAGE, \
	.indexed = 1, \
	.output = 1, \
	.channel = 0, \
	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
	.scan_type = { \
		.sign = 'u', \
		.realbits = (bits), \
		.storagebits = (storage), \
		.shift = (_shift), \
		}, \
	.ext_info = (ext), \
}

#define AD5446_CHANNEL(bits, storage, shift) \
	_AD5446_CHANNEL(bits, storage, shift, NULL)

#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)

static int ad5446_read_raw(struct iio_dev *indio_dev,
			   struct iio_chan_spec const *chan,
			   int *val,
			   int *val2,
			   long m)
{
	struct ad5446_state *st = iio_priv(indio_dev);

	switch (m) {
	case IIO_CHAN_INFO_RAW:
		*val = st->cached_val;
		return IIO_VAL_INT;
	case IIO_CHAN_INFO_SCALE:
		*val = st->vref_mv;
		*val2 = chan->scan_type.realbits;
		return IIO_VAL_FRACTIONAL_LOG2;
	}
	return -EINVAL;
}

static int ad5446_write_raw(struct iio_dev *indio_dev,
			       struct iio_chan_spec const *chan,
			       int val,
			       int val2,
			       long mask)
{
	struct ad5446_state *st = iio_priv(indio_dev);
	int ret = 0;

	switch (mask) {
	case IIO_CHAN_INFO_RAW:
		if (val >= (1 << chan->scan_type.realbits) || val < 0)
			return -EINVAL;

		val <<= chan->scan_type.shift;
		mutex_lock(&indio_dev->mlock);
		st->cached_val = val;
		if (!st->pwr_down)
			ret = st->chip_info->write(st, val);
		mutex_unlock(&indio_dev->mlock);
		break;
	default:
		ret = -EINVAL;
	}

	return ret;
}

static const struct iio_info ad5446_info = {
	.read_raw = ad5446_read_raw,
	.write_raw = ad5446_write_raw,
};

static int ad5446_probe(struct device *dev, const char *name,
			const struct ad5446_chip_info *chip_info)
{
	struct ad5446_state *st;
	struct iio_dev *indio_dev;
	struct regulator *reg;
	int ret, voltage_uv = 0;

	reg = devm_regulator_get(dev, "vcc");
	if (!IS_ERR(reg)) {
		ret = regulator_enable(reg);
		if (ret)
			return ret;

		ret = regulator_get_voltage(reg);
		if (ret < 0)
			goto error_disable_reg;

		voltage_uv = ret;
	}

	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
	if (indio_dev == NULL) {
		ret = -ENOMEM;
		goto error_disable_reg;
	}
	st = iio_priv(indio_dev);
	st->chip_info = chip_info;

	dev_set_drvdata(dev, indio_dev);
	st->reg = reg;
	st->dev = dev;

	/* Establish that the iio_dev is a child of the device */
	indio_dev->dev.parent = dev;
	indio_dev->name = name;
	indio_dev->info = &ad5446_info;
	indio_dev->modes = INDIO_DIRECT_MODE;
	indio_dev->channels = &st->chip_info->channel;
	indio_dev->num_channels = 1;

	st->pwr_down_mode = MODE_PWRDWN_1k;

	if (st->chip_info->int_vref_mv)
		st->vref_mv = st->chip_info->int_vref_mv;
	else if (voltage_uv)
		st->vref_mv = voltage_uv / 1000;
	else
		dev_warn(dev, "reference voltage unspecified\n");

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_disable_reg;

	return 0;

error_disable_reg:
	if (!IS_ERR(reg))
		regulator_disable(reg);
	return ret;
}

static int ad5446_remove(struct device *dev)
{
	struct iio_dev *indio_dev = dev_get_drvdata(dev);
	struct ad5446_state *st = iio_priv(indio_dev);

	iio_device_unregister(indio_dev);
	if (!IS_ERR(st->reg))
		regulator_disable(st->reg);

	return 0;
}

#if IS_ENABLED(CONFIG_SPI_MASTER)

static int ad5446_write(struct ad5446_state *st, unsigned val)
{
	struct spi_device *spi = to_spi_device(st->dev);
	__be16 data = cpu_to_be16(val);

	return spi_write(spi, &data, sizeof(data));
}

static int ad5660_write(struct ad5446_state *st, unsigned val)
{
	struct spi_device *spi = to_spi_device(st->dev);
	uint8_t data[3];

	data[0] = (val >> 16) & 0xFF;
	data[1] = (val >> 8) & 0xFF;
	data[2] = val & 0xFF;

	return spi_write(spi, data, sizeof(data));
}

/**
 * ad5446_supported_spi_device_ids:
 * The AD5620/40/60 parts are available in different fixed internal reference
 * voltage options. The actual part numbers may look differently
 * (and a bit cryptic), however this style is used to make clear which
 * parts are supported here.
 */
enum ad5446_supported_spi_device_ids {
	ID_AD5300,
	ID_AD5310,
	ID_AD5320,
	ID_AD5444,
	ID_AD5446,
	ID_AD5450,
	ID_AD5451,
	ID_AD5541A,
	ID_AD5512A,
	ID_AD5553,
	ID_AD5601,
	ID_AD5611,
	ID_AD5621,
	ID_AD5641,
	ID_AD5620_2500,
	ID_AD5620_1250,
	ID_AD5640_2500,
	ID_AD5640_1250,
	ID_AD5660_2500,
	ID_AD5660_1250,
	ID_AD5662,
};

static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
	[ID_AD5300] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5310] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5320] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5444] = {
		.channel = AD5446_CHANNEL(12, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5446] = {
		.channel = AD5446_CHANNEL(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5450] = {
		.channel = AD5446_CHANNEL(8, 16, 6),
		.write = ad5446_write,
	},
	[ID_AD5451] = {
		.channel = AD5446_CHANNEL(10, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5541A] = {
		.channel = AD5446_CHANNEL(16, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5512A] = {
		.channel = AD5446_CHANNEL(12, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5553] = {
		.channel = AD5446_CHANNEL(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5601] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
		.write = ad5446_write,
	},
	[ID_AD5611] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
		.write = ad5446_write,
	},
	[ID_AD5621] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.write = ad5446_write,
	},
	[ID_AD5641] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.write = ad5446_write,
	},
	[ID_AD5620_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.int_vref_mv = 2500,
		.write = ad5446_write,
	},
	[ID_AD5620_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
		.int_vref_mv = 1250,
		.write = ad5446_write,
	},
	[ID_AD5640_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.int_vref_mv = 2500,
		.write = ad5446_write,
	},
	[ID_AD5640_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
		.int_vref_mv = 1250,
		.write = ad5446_write,
	},
	[ID_AD5660_2500] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.int_vref_mv = 2500,
		.write = ad5660_write,
	},
	[ID_AD5660_1250] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.int_vref_mv = 1250,
		.write = ad5660_write,
	},
	[ID_AD5662] = {
		.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
		.write = ad5660_write,
	},
};

static const struct spi_device_id ad5446_spi_ids[] = {
	{"ad5300", ID_AD5300},
	{"ad5310", ID_AD5310},
	{"ad5320", ID_AD5320},
	{"ad5444", ID_AD5444},
	{"ad5446", ID_AD5446},
	{"ad5450", ID_AD5450},
	{"ad5451", ID_AD5451},
	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
	{"ad5512a", ID_AD5512A},
	{"ad5541a", ID_AD5541A},
	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
	{"ad5553", ID_AD5553},
	{"ad5601", ID_AD5601},
	{"ad5611", ID_AD5611},
	{"ad5621", ID_AD5621},
	{"ad5641", ID_AD5641},
	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
	{"ad5640-2500", ID_AD5640_2500},
	{"ad5640-1250", ID_AD5640_1250},
	{"ad5660-2500", ID_AD5660_2500},
	{"ad5660-1250", ID_AD5660_1250},
	{"ad5662", ID_AD5662},
	{"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
	{"dac101s101", ID_AD5310},
	{"dac121s101", ID_AD5320},
	{"dac7512", ID_AD5320},
	{}
};
MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);

#ifdef CONFIG_OF
static const struct of_device_id ad5446_of_ids[] = {
	{ .compatible = "ti,dac7512" },
	{ }
};
MODULE_DEVICE_TABLE(of, ad5446_of_ids);
#endif

static int ad5446_spi_probe(struct spi_device *spi)
{
	const struct spi_device_id *id = spi_get_device_id(spi);

	return ad5446_probe(&spi->dev, id->name,
		&ad5446_spi_chip_info[id->driver_data]);
}

static int ad5446_spi_remove(struct spi_device *spi)
{
	return ad5446_remove(&spi->dev);
}

static struct spi_driver ad5446_spi_driver = {
	.driver = {
		.name	= "ad5446",
		.of_match_table = of_match_ptr(ad5446_of_ids),
	},
	.probe		= ad5446_spi_probe,
	.remove		= ad5446_spi_remove,
	.id_table	= ad5446_spi_ids,
};

static int __init ad5446_spi_register_driver(void)
{
	return spi_register_driver(&ad5446_spi_driver);
}

static void ad5446_spi_unregister_driver(void)
{
	spi_unregister_driver(&ad5446_spi_driver);
}

#else

static inline int ad5446_spi_register_driver(void) { return 0; }
static inline void ad5446_spi_unregister_driver(void) { }

#endif

#if IS_ENABLED(CONFIG_I2C)

static int ad5622_write(struct ad5446_state *st, unsigned val)
{
	struct i2c_client *client = to_i2c_client(st->dev);
	__be16 data = cpu_to_be16(val);

	return i2c_master_send(client, (char *)&data, sizeof(data));
}

/**
 * ad5446_supported_i2c_device_ids:
 * The AD5620/40/60 parts are available in different fixed internal reference
 * voltage options. The actual part numbers may look differently
 * (and a bit cryptic), however this style is used to make clear which
 * parts are supported here.
 */
enum ad5446_supported_i2c_device_ids {
	ID_AD5602,
	ID_AD5612,
	ID_AD5622,
};

static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
	[ID_AD5602] = {
		.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
		.write = ad5622_write,
	},
	[ID_AD5612] = {
		.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
		.write = ad5622_write,
	},
	[ID_AD5622] = {
		.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
		.write = ad5622_write,
	},
};

static int ad5446_i2c_probe(struct i2c_client *i2c,
			    const struct i2c_device_id *id)
{
	return ad5446_probe(&i2c->dev, id->name,
		&ad5446_i2c_chip_info[id->driver_data]);
}

static int ad5446_i2c_remove(struct i2c_client *i2c)
{
	return ad5446_remove(&i2c->dev);
}

static const struct i2c_device_id ad5446_i2c_ids[] = {
	{"ad5301", ID_AD5602},
	{"ad5311", ID_AD5612},
	{"ad5321", ID_AD5622},
	{"ad5602", ID_AD5602},
	{"ad5612", ID_AD5612},
	{"ad5622", ID_AD5622},
	{}
};
MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);

static struct i2c_driver ad5446_i2c_driver = {
	.driver = {
		   .name = "ad5446",
	},
	.probe = ad5446_i2c_probe,
	.remove = ad5446_i2c_remove,
	.id_table = ad5446_i2c_ids,
};

static int __init ad5446_i2c_register_driver(void)
{
	return i2c_add_driver(&ad5446_i2c_driver);
}

static void __exit ad5446_i2c_unregister_driver(void)
{
	i2c_del_driver(&ad5446_i2c_driver);
}

#else

static inline int ad5446_i2c_register_driver(void) { return 0; }
static inline void ad5446_i2c_unregister_driver(void) { }

#endif

static int __init ad5446_init(void)
{
	int ret;

	ret = ad5446_spi_register_driver();
	if (ret)
		return ret;

	ret = ad5446_i2c_register_driver();
	if (ret) {
		ad5446_spi_unregister_driver();
		return ret;
	}

	return 0;
}
module_init(ad5446_init);

static void __exit ad5446_exit(void)
{
	ad5446_i2c_unregister_driver();
	ad5446_spi_unregister_driver();
}
module_exit(ad5446_exit);

MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
80503b23	1	// SPDX-License-Identifier: GPL-2.0-or-later
b5a49481 MH	2	/*
	3	* AD5446 SPI DAC driver
	4	*
	5	* Copyright 2010 Analog Devices Inc.
b5a49481 MH	6	*/
	7
	8	#include <linux/interrupt.h>
	9	#include <linux/workqueue.h>
	10	#include <linux/device.h>
	11	#include <linux/kernel.h>
	12	#include <linux/slab.h>
	13	#include <linux/sysfs.h>
	14	#include <linux/list.h>
	15	#include <linux/spi/spi.h>
3ec36a2c	16	#include <linux/i2c.h>
b5a49481 MH	17	#include <linux/regulator/consumer.h>
b5a49481 MH	18	#include <linux/err.h>
99c97852	19	#include <linux/module.h>
b5a49481	20
06458e27 JC	21	#include <linux/iio/iio.h>
06458e27 JC	22	#include <linux/iio/sysfs.h>
b5a49481	23
2e15c903 JFD	24	#define MODE_PWRDWN_1k 0x1
	25	#define MODE_PWRDWN_100k 0x2
	26	#define MODE_PWRDWN_TRISTATE 0x3
	27
	28	/**
	29	* struct ad5446_state - driver instance specific data
	30	* @spi: spi_device
	31	* @chip_info: chip model specific constants, available modes etc
	32	* @reg: supply regulator
	33	* @vref_mv: actual reference voltage used
	34	*/
	35
	36	struct ad5446_state {
	37	struct device *dev;
	38	const struct ad5446_chip_info *chip_info;
	39	struct regulator *reg;
	40	unsigned short vref_mv;
	41	unsigned cached_val;
	42	unsigned pwr_down_mode;
	43	unsigned pwr_down;
	44	};
	45
	46	/**
	47	* struct ad5446_chip_info - chip specific information
	48	* @channel: channel spec for the DAC
	49	* @int_vref_mv: AD5620/40/60: the internal reference voltage
	50	* @write: chip specific helper function to write to the register
	51	*/
	52
	53	struct ad5446_chip_info {
	54	struct iio_chan_spec channel;
	55	u16 int_vref_mv;
	56	int (write)(struct ad5446_state st, unsigned val);
	57	};
b5a49481	58
83f0f572	59	static const char * const ad5446_powerdown_modes[] = {
09d48aa9	60	"1kohm_to_gnd", "100kohm_to_gnd", "three_state"
83f0f572 LPC	61	};
83f0f572 LPC	62
09d48aa9 LPC	63	static int ad5446_set_powerdown_mode(struct iio_dev *indio_dev,
09d48aa9 LPC	64	const struct iio_chan_spec *chan, unsigned int mode)
bbed4dc7	65	{
638e59fc	66	struct ad5446_state *st = iio_priv(indio_dev);
83f0f572	67
09d48aa9	68	st->pwr_down_mode = mode + 1;
bbed4dc7	69
09d48aa9	70	return 0;
bbed4dc7 MH	71	}
bbed4dc7 MH	72
09d48aa9 LPC	73	static int ad5446_get_powerdown_mode(struct iio_dev *indio_dev,
09d48aa9 LPC	74	const struct iio_chan_spec *chan)
bbed4dc7	75	{
638e59fc	76	struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7	77
09d48aa9	78	return st->pwr_down_mode - 1;
bbed4dc7 MH	79	}
bbed4dc7 MH	80
09d48aa9 LPC	81	static const struct iio_enum ad5446_powerdown_mode_enum = {
	82	.items = ad5446_powerdown_modes,
	83	.num_items = ARRAY_SIZE(ad5446_powerdown_modes),
	84	.get = ad5446_get_powerdown_mode,
	85	.set = ad5446_set_powerdown_mode,
	86	};
	87
83f0f572	88	static ssize_t ad5446_read_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139	89	uintptr_t private,
83f0f572	90	const struct iio_chan_spec *chan,
bbed4dc7 MH	91	char *buf)
bbed4dc7 MH	92	{
638e59fc	93	struct ad5446_state *st = iio_priv(indio_dev);
bbed4dc7 MH	94
	95	return sprintf(buf, "%d\n", st->pwr_down);
	96	}
	97
83f0f572	98	static ssize_t ad5446_write_dac_powerdown(struct iio_dev *indio_dev,
fc6d1139	99	uintptr_t private,
83f0f572	100	const struct iio_chan_spec *chan,
bbed4dc7 MH	101	const char *buf, size_t len)
bbed4dc7 MH	102	{
638e59fc	103	struct ad5446_state *st = iio_priv(indio_dev);
cae329e0 LPC	104	unsigned int shift;
cae329e0 LPC	105	unsigned int val;
83f0f572	106	bool powerdown;
bbed4dc7 MH	107	int ret;
bbed4dc7 MH	108
83f0f572	109	ret = strtobool(buf, &powerdown);
bbed4dc7 MH	110	if (ret)
	111	return ret;
	112
638e59fc	113	mutex_lock(&indio_dev->mlock);
83f0f572	114	st->pwr_down = powerdown;
bbed4dc7	115
cae329e0 LPC	116	if (st->pwr_down) {
	117	shift = chan->scan_type.realbits + chan->scan_type.shift;
	118	val = st->pwr_down_mode << shift;
	119	} else {
	120	val = st->cached_val;
	121	}
bbed4dc7	122
cae329e0	123	ret = st->chip_info->write(st, val);
638e59fc	124	mutex_unlock(&indio_dev->mlock);
bbed4dc7 MH	125
	126	return ret ? ret : len;
	127	}
	128
3ec36a2c	129	static const struct iio_chan_spec_ext_info ad5446_ext_info_powerdown[] = {
83f0f572 LPC	130	{
	131	.name = "powerdown",
	132	.read = ad5446_read_dac_powerdown,
	133	.write = ad5446_write_dac_powerdown,
3704432f	134	.shared = IIO_SEPARATE,
83f0f572	135	},
3704432f	136	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5446_powerdown_mode_enum),
09d48aa9	137	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5446_powerdown_mode_enum),
83f0f572	138	{ },
b5a49481 MH	139	};
b5a49481 MH	140
e3019c21	141	#define _AD5446_CHANNEL(bits, storage, _shift, ext) { \
33ad6b21 LPC	142	.type = IIO_VOLTAGE, \
	143	.indexed = 1, \
	144	.output = 1, \
	145	.channel = 0, \
2f6a4a44 JC	146	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
2f6a4a44 JC	147	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
e3019c21 JC	148	.scan_type = { \
	149	.sign = 'u', \
	150	.realbits = (bits), \
	151	.storagebits = (storage), \
	152	.shift = (_shift), \
	153	}, \
83f0f572	154	.ext_info = (ext), \
33ad6b21 LPC	155	}
33ad6b21 LPC	156
83f0f572 LPC	157	#define AD5446_CHANNEL(bits, storage, shift) \
	158	_AD5446_CHANNEL(bits, storage, shift, NULL)
	159
	160	#define AD5446_CHANNEL_POWERDOWN(bits, storage, shift) \
3ec36a2c	161	_AD5446_CHANNEL(bits, storage, shift, ad5446_ext_info_powerdown)
b5a49481	162
33ad6b21 LPC	163	static int ad5446_read_raw(struct iio_dev *indio_dev,
	164	struct iio_chan_spec const *chan,
	165	int *val,
	166	int *val2,
	167	long m)
	168	{
	169	struct ad5446_state *st = iio_priv(indio_dev);
33ad6b21 LPC	170
33ad6b21 LPC	171	switch (m) {
5e06bdfb LPC	172	case IIO_CHAN_INFO_RAW:
	173	*val = st->cached_val;
	174	return IIO_VAL_INT;
33ad6b21	175	case IIO_CHAN_INFO_SCALE:
0a99b601 LPC	176	*val = st->vref_mv;
	177	*val2 = chan->scan_type.realbits;
	178	return IIO_VAL_FRACTIONAL_LOG2;
33ad6b21 LPC	179	}
	180	return -EINVAL;
	181	}
	182
	183	static int ad5446_write_raw(struct iio_dev *indio_dev,
	184	struct iio_chan_spec const *chan,
	185	int val,
	186	int val2,
	187	long mask)
	188	{
	189	struct ad5446_state *st = iio_priv(indio_dev);
07ffd0d0	190	int ret = 0;
33ad6b21 LPC	191
33ad6b21 LPC	192	switch (mask) {
09f4eb40	193	case IIO_CHAN_INFO_RAW:
33ad6b21 LPC	194	if (val >= (1 << chan->scan_type.realbits) \|\| val < 0)
	195	return -EINVAL;
	196
	197	val <<= chan->scan_type.shift;
	198	mutex_lock(&indio_dev->mlock);
	199	st->cached_val = val;
af836d9a	200	if (!st->pwr_down)
cae329e0	201	ret = st->chip_info->write(st, val);
33ad6b21 LPC	202	mutex_unlock(&indio_dev->mlock);
	203	break;
	204	default:
	205	ret = -EINVAL;
	206	}
	207
	208	return ret;
	209	}
	210
6fe8135f	211	static const struct iio_info ad5446_info = {
7389266c JC	212	.read_raw = ad5446_read_raw,
7389266c JC	213	.write_raw = ad5446_write_raw,
7389266c JC	214	};
7389266c JC	215
fc52692c GKH	216	static int ad5446_probe(struct device dev, const char name,
fc52692c GKH	217	const struct ad5446_chip_info *chip_info)
b5a49481 MH	218	{
b5a49481 MH	219	struct ad5446_state *st;
86729fc4 JC	220	struct iio_dev *indio_dev;
86729fc4 JC	221	struct regulator *reg;
b5a49481 MH	222	int ret, voltage_uv = 0;
b5a49481 MH	223
ba727295	224	reg = devm_regulator_get(dev, "vcc");
86729fc4 JC	225	if (!IS_ERR(reg)) {
86729fc4 JC	226	ret = regulator_enable(reg);
b5a49481	227	if (ret)
ba727295	228	return ret;
b5a49481	229
13e57ee2 AL	230	ret = regulator_get_voltage(reg);
	231	if (ret < 0)
	232	goto error_disable_reg;
	233
	234	voltage_uv = ret;
b5a49481 MH	235	}
b5a49481 MH	236
ba727295	237	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
86729fc4 JC	238	if (indio_dev == NULL) {
	239	ret = -ENOMEM;
	240	goto error_disable_reg;
	241	}
	242	st = iio_priv(indio_dev);
3ec36a2c	243	st->chip_info = chip_info;
b5a49481	244
3ec36a2c	245	dev_set_drvdata(dev, indio_dev);
86729fc4	246	st->reg = reg;
3ec36a2c	247	st->dev = dev;
b5a49481	248
3ec36a2c JFD	249	/* Establish that the iio_dev is a child of the device */
	250	indio_dev->dev.parent = dev;
	251	indio_dev->name = name;
83f0f572	252	indio_dev->info = &ad5446_info;
86729fc4	253	indio_dev->modes = INDIO_DIRECT_MODE;
33ad6b21 LPC	254	indio_dev->channels = &st->chip_info->channel;
33ad6b21 LPC	255	indio_dev->num_channels = 1;
b5a49481	256
09d48aa9 LPC	257	st->pwr_down_mode = MODE_PWRDWN_1k;
09d48aa9 LPC	258
4e5d3f92	259	if (st->chip_info->int_vref_mv)
bbed4dc7	260	st->vref_mv = st->chip_info->int_vref_mv;
4e5d3f92 LPC	261	else if (voltage_uv)
	262	st->vref_mv = voltage_uv / 1000;
	263	else
3ec36a2c	264	dev_warn(dev, "reference voltage unspecified\n");
b5a49481	265
86729fc4	266	ret = iio_device_register(indio_dev);
b5a49481	267	if (ret)
ba727295	268	goto error_disable_reg;
b5a49481 MH	269
	270	return 0;
	271
b5a49481	272	error_disable_reg:
86729fc4 JC	273	if (!IS_ERR(reg))
86729fc4 JC	274	regulator_disable(reg);
b5a49481 MH	275	return ret;
	276	}
	277
3ec36a2c	278	static int ad5446_remove(struct device *dev)
b5a49481	279	{
3ec36a2c	280	struct iio_dev *indio_dev = dev_get_drvdata(dev);
86729fc4	281	struct ad5446_state *st = iio_priv(indio_dev);
b5a49481 MH	282
b5a49481 MH	283	iio_device_unregister(indio_dev);
ba727295	284	if (!IS_ERR(st->reg))
d2fffd6c	285	regulator_disable(st->reg);
d2fffd6c	286
b5a49481 MH	287	return 0;
	288	}
	289
3ec36a2c JFD	290	#if IS_ENABLED(CONFIG_SPI_MASTER)
	291
	292	static int ad5446_write(struct ad5446_state *st, unsigned val)
	293	{
	294	struct spi_device *spi = to_spi_device(st->dev);
	295	__be16 data = cpu_to_be16(val);
	296
	297	return spi_write(spi, &data, sizeof(data));
	298	}
	299
	300	static int ad5660_write(struct ad5446_state *st, unsigned val)
	301	{
	302	struct spi_device *spi = to_spi_device(st->dev);
	303	uint8_t data[3];
	304
	305	data[0] = (val >> 16) & 0xFF;
	306	data[1] = (val >> 8) & 0xFF;
	307	data[2] = val & 0xFF;
	308
	309	return spi_write(spi, data, sizeof(data));
	310	}
	311
	312	/**
	313	* ad5446_supported_spi_device_ids:
	314	* The AD5620/40/60 parts are available in different fixed internal reference
	315	* voltage options. The actual part numbers may look differently
	316	* (and a bit cryptic), however this style is used to make clear which
	317	* parts are supported here.
	318	*/
	319	enum ad5446_supported_spi_device_ids {
2fafbce2 LPC	320	ID_AD5300,
	321	ID_AD5310,
	322	ID_AD5320,
3ec36a2c JFD	323	ID_AD5444,
	324	ID_AD5446,
	325	ID_AD5450,
	326	ID_AD5451,
	327	ID_AD5541A,
	328	ID_AD5512A,
	329	ID_AD5553,
	330	ID_AD5601,
	331	ID_AD5611,
	332	ID_AD5621,
4fa2a9e4	333	ID_AD5641,
3ec36a2c JFD	334	ID_AD5620_2500,
	335	ID_AD5620_1250,
	336	ID_AD5640_2500,
	337	ID_AD5640_1250,
	338	ID_AD5660_2500,
	339	ID_AD5660_1250,
	340	ID_AD5662,
	341	};
	342
	343	static const struct ad5446_chip_info ad5446_spi_chip_info[] = {
2fafbce2 LPC	344	[ID_AD5300] = {
	345	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
	346	.write = ad5446_write,
	347	},
	348	[ID_AD5310] = {
	349	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
	350	.write = ad5446_write,
	351	},
	352	[ID_AD5320] = {
	353	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
	354	.write = ad5446_write,
	355	},
3ec36a2c JFD	356	[ID_AD5444] = {
	357	.channel = AD5446_CHANNEL(12, 16, 2),
	358	.write = ad5446_write,
	359	},
	360	[ID_AD5446] = {
	361	.channel = AD5446_CHANNEL(14, 16, 0),
	362	.write = ad5446_write,
	363	},
	364	[ID_AD5450] = {
	365	.channel = AD5446_CHANNEL(8, 16, 6),
	366	.write = ad5446_write,
	367	},
	368	[ID_AD5451] = {
	369	.channel = AD5446_CHANNEL(10, 16, 4),
	370	.write = ad5446_write,
	371	},
	372	[ID_AD5541A] = {
	373	.channel = AD5446_CHANNEL(16, 16, 0),
	374	.write = ad5446_write,
	375	},
	376	[ID_AD5512A] = {
	377	.channel = AD5446_CHANNEL(12, 16, 4),
	378	.write = ad5446_write,
	379	},
	380	[ID_AD5553] = {
	381	.channel = AD5446_CHANNEL(14, 16, 0),
	382	.write = ad5446_write,
	383	},
	384	[ID_AD5601] = {
	385	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 6),
	386	.write = ad5446_write,
	387	},
	388	[ID_AD5611] = {
	389	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 4),
	390	.write = ad5446_write,
	391	},
	392	[ID_AD5621] = {
	393	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
	394	.write = ad5446_write,
	395	},
4fa2a9e4 AM	396	[ID_AD5641] = {
	397	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
	398	.write = ad5446_write,
	399	},
3ec36a2c JFD	400	[ID_AD5620_2500] = {
	401	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
	402	.int_vref_mv = 2500,
	403	.write = ad5446_write,
	404	},
	405	[ID_AD5620_1250] = {
	406	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 2),
	407	.int_vref_mv = 1250,
	408	.write = ad5446_write,
	409	},
	410	[ID_AD5640_2500] = {
	411	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
	412	.int_vref_mv = 2500,
	413	.write = ad5446_write,
	414	},
	415	[ID_AD5640_1250] = {
	416	.channel = AD5446_CHANNEL_POWERDOWN(14, 16, 0),
	417	.int_vref_mv = 1250,
	418	.write = ad5446_write,
	419	},
	420	[ID_AD5660_2500] = {
	421	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	422	.int_vref_mv = 2500,
	423	.write = ad5660_write,
	424	},
	425	[ID_AD5660_1250] = {
	426	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	427	.int_vref_mv = 1250,
	428	.write = ad5660_write,
	429	},
	430	[ID_AD5662] = {
	431	.channel = AD5446_CHANNEL_POWERDOWN(16, 16, 0),
	432	.write = ad5660_write,
	433	},
	434	};
	435
	436	static const struct spi_device_id ad5446_spi_ids[] = {
2fafbce2 LPC	437	{"ad5300", ID_AD5300},
	438	{"ad5310", ID_AD5310},
	439	{"ad5320", ID_AD5320},
b5a49481 MH	440	{"ad5444", ID_AD5444},
b5a49481 MH	441	{"ad5446", ID_AD5446},
779c0c46 LPC	442	{"ad5450", ID_AD5450},
	443	{"ad5451", ID_AD5451},
	444	{"ad5452", ID_AD5444}, /* ad5452 is compatible to the ad5444 */
	445	{"ad5453", ID_AD5446}, /* ad5453 is compatible to the ad5446 */
b5a49481	446	{"ad5512a", ID_AD5512A},
67d1c1f4	447	{"ad5541a", ID_AD5541A},
11a7df48 LPC	448	{"ad5542a", ID_AD5541A}, /* ad5541a and ad5542a are compatible */
11a7df48 LPC	449	{"ad5543", ID_AD5541A}, /* ad5541a and ad5543 are compatible */
bd51c0b0	450	{"ad5553", ID_AD5553},
2b61535a MH	451	{"ad5601", ID_AD5601},
	452	{"ad5611", ID_AD5611},
	453	{"ad5621", ID_AD5621},
4fa2a9e4	454	{"ad5641", ID_AD5641},
d846263d MH	455	{"ad5620-2500", ID_AD5620_2500}, /* AD5620/40/60: */
	456	{"ad5620-1250", ID_AD5620_1250}, /* part numbers may look differently */
	457	{"ad5640-2500", ID_AD5640_2500},
	458	{"ad5640-1250", ID_AD5640_1250},
	459	{"ad5660-2500", ID_AD5660_2500},
	460	{"ad5660-1250", ID_AD5660_1250},
18e5ab31	461	{"ad5662", ID_AD5662},
9cad3b98 LW	462	{"dac081s101", ID_AD5300}, /* compatible Texas Instruments chips */
	463	{"dac101s101", ID_AD5310},
	464	{"dac121s101", ID_AD5320},
49b3f874	465	{"dac7512", ID_AD5320},
b5a49481 MH	466	{}
b5a49481 MH	467	};
3ec36a2c JFD	468	MODULE_DEVICE_TABLE(spi, ad5446_spi_ids);
3ec36a2c JFD	469
49b3f874 LW	470	#ifdef CONFIG_OF
	471	static const struct of_device_id ad5446_of_ids[] = {
	472	{ .compatible = "ti,dac7512" },
	473	{ }
	474	};
	475	MODULE_DEVICE_TABLE(of, ad5446_of_ids);
	476	#endif
	477
fc52692c	478	static int ad5446_spi_probe(struct spi_device *spi)
3ec36a2c JFD	479	{
	480	const struct spi_device_id *id = spi_get_device_id(spi);
	481
	482	return ad5446_probe(&spi->dev, id->name,
	483	&ad5446_spi_chip_info[id->driver_data]);
	484	}
b5a49481	485
fc52692c	486	static int ad5446_spi_remove(struct spi_device *spi)
3ec36a2c JFD	487	{
	488	return ad5446_remove(&spi->dev);
	489	}
	490
	491	static struct spi_driver ad5446_spi_driver = {
b5a49481 MH	492	.driver = {
b5a49481 MH	493	.name = "ad5446",
49b3f874	494	.of_match_table = of_match_ptr(ad5446_of_ids),
b5a49481	495	},
3ec36a2c	496	.probe = ad5446_spi_probe,
fc52692c	497	.remove = ad5446_spi_remove,
3ec36a2c JFD	498	.id_table = ad5446_spi_ids,
	499	};
	500
	501	static int __init ad5446_spi_register_driver(void)
	502	{
	503	return spi_register_driver(&ad5446_spi_driver);
	504	}
	505
	506	static void ad5446_spi_unregister_driver(void)
	507	{
	508	spi_unregister_driver(&ad5446_spi_driver);
	509	}
	510
	511	#else
	512
	513	static inline int ad5446_spi_register_driver(void) { return 0; }
	514	static inline void ad5446_spi_unregister_driver(void) { }
	515
	516	#endif
	517
	518	#if IS_ENABLED(CONFIG_I2C)
	519
	520	static int ad5622_write(struct ad5446_state *st, unsigned val)
	521	{
	522	struct i2c_client *client = to_i2c_client(st->dev);
	523	__be16 data = cpu_to_be16(val);
	524
	525	return i2c_master_send(client, (char *)&data, sizeof(data));
	526	}
	527
	528	/**
	529	* ad5446_supported_i2c_device_ids:
	530	* The AD5620/40/60 parts are available in different fixed internal reference
	531	* voltage options. The actual part numbers may look differently
	532	* (and a bit cryptic), however this style is used to make clear which
	533	* parts are supported here.
	534	*/
	535	enum ad5446_supported_i2c_device_ids {
	536	ID_AD5602,
	537	ID_AD5612,
	538	ID_AD5622,
	539	};
	540
	541	static const struct ad5446_chip_info ad5446_i2c_chip_info[] = {
	542	[ID_AD5602] = {
	543	.channel = AD5446_CHANNEL_POWERDOWN(8, 16, 4),
	544	.write = ad5622_write,
	545	},
	546	[ID_AD5612] = {
	547	.channel = AD5446_CHANNEL_POWERDOWN(10, 16, 2),
	548	.write = ad5622_write,
	549	},
	550	[ID_AD5622] = {
	551	.channel = AD5446_CHANNEL_POWERDOWN(12, 16, 0),
	552	.write = ad5622_write,
	553	},
b5a49481	554	};
3ec36a2c	555
fc52692c GKH	556	static int ad5446_i2c_probe(struct i2c_client *i2c,
fc52692c GKH	557	const struct i2c_device_id *id)
3ec36a2c JFD	558	{
	559	return ad5446_probe(&i2c->dev, id->name,
	560	&ad5446_i2c_chip_info[id->driver_data]);
	561	}
	562
fc52692c	563	static int ad5446_i2c_remove(struct i2c_client *i2c)
3ec36a2c JFD	564	{
	565	return ad5446_remove(&i2c->dev);
	566	}
	567
	568	static const struct i2c_device_id ad5446_i2c_ids[] = {
bf832380 LPC	569	{"ad5301", ID_AD5602},
	570	{"ad5311", ID_AD5612},
	571	{"ad5321", ID_AD5622},
3ec36a2c JFD	572	{"ad5602", ID_AD5602},
	573	{"ad5612", ID_AD5612},
	574	{"ad5622", ID_AD5622},
	575	{}
	576	};
	577	MODULE_DEVICE_TABLE(i2c, ad5446_i2c_ids);
	578
	579	static struct i2c_driver ad5446_i2c_driver = {
	580	.driver = {
	581	.name = "ad5446",
3ec36a2c JFD	582	},
3ec36a2c JFD	583	.probe = ad5446_i2c_probe,
fc52692c	584	.remove = ad5446_i2c_remove,
3ec36a2c JFD	585	.id_table = ad5446_i2c_ids,
	586	};
	587
	588	static int __init ad5446_i2c_register_driver(void)
	589	{
	590	return i2c_add_driver(&ad5446_i2c_driver);
	591	}
	592
	593	static void __exit ad5446_i2c_unregister_driver(void)
	594	{
	595	i2c_del_driver(&ad5446_i2c_driver);
	596	}
	597
	598	#else
	599
	600	static inline int ad5446_i2c_register_driver(void) { return 0; }
	601	static inline void ad5446_i2c_unregister_driver(void) { }
	602
	603	#endif
	604
	605	static int __init ad5446_init(void)
	606	{
	607	int ret;
	608
	609	ret = ad5446_spi_register_driver();
	610	if (ret)
	611	return ret;
	612
	613	ret = ad5446_i2c_register_driver();
	614	if (ret) {
	615	ad5446_spi_unregister_driver();
	616	return ret;
	617	}
	618
	619	return 0;
	620	}
	621	module_init(ad5446_init);
	622
	623	static void __exit ad5446_exit(void)
	624	{
	625	ad5446_i2c_unregister_driver();
	626	ad5446_spi_unregister_driver();
	627	}
	628	module_exit(ad5446_exit);
b5a49481	629
9920ed25	630	MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
b5a49481 MH	631	MODULE_DESCRIPTION("Analog Devices AD5444/AD5446 DAC");
b5a49481 MH	632	MODULE_LICENSE("GPL v2");