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Commit | Line | Data |
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87aec56e AD |
1 | /* |
2 | * AFE4404 Heart Rate Monitors and Low-Cost Pulse Oximeters | |
3 | * | |
f59e6b5a | 4 | * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ |
87aec56e AD |
5 | * Andrew F. Davis <afd@ti.com> |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | */ | |
16 | ||
17 | #include <linux/device.h> | |
18 | #include <linux/err.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/i2c.h> | |
21 | #include <linux/kernel.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/regmap.h> | |
24 | #include <linux/sysfs.h> | |
25 | #include <linux/regulator/consumer.h> | |
26 | ||
27 | #include <linux/iio/iio.h> | |
28 | #include <linux/iio/sysfs.h> | |
29 | #include <linux/iio/buffer.h> | |
30 | #include <linux/iio/trigger.h> | |
31 | #include <linux/iio/triggered_buffer.h> | |
32 | #include <linux/iio/trigger_consumer.h> | |
33 | ||
34 | #include "afe440x.h" | |
35 | ||
36 | #define AFE4404_DRIVER_NAME "afe4404" | |
37 | ||
38 | /* AFE4404 registers */ | |
39 | #define AFE4404_TIA_GAIN_SEP 0x20 | |
40 | #define AFE4404_TIA_GAIN 0x21 | |
41 | #define AFE4404_PROG_TG_STC 0x34 | |
42 | #define AFE4404_PROG_TG_ENDC 0x35 | |
43 | #define AFE4404_LED3LEDSTC 0x36 | |
44 | #define AFE4404_LED3LEDENDC 0x37 | |
45 | #define AFE4404_CLKDIV_PRF 0x39 | |
46 | #define AFE4404_OFFDAC 0x3a | |
47 | #define AFE4404_DEC 0x3d | |
48 | #define AFE4404_AVG_LED2_ALED2VAL 0x3f | |
49 | #define AFE4404_AVG_LED1_ALED1VAL 0x40 | |
50 | ||
0825cce2 AD |
51 | /* AFE4404 CONTROL2 register fields */ |
52 | #define AFE440X_CONTROL2_OSC_ENABLE BIT(9) | |
87aec56e | 53 | |
b36e8257 AD |
54 | enum afe4404_fields { |
55 | /* Gains */ | |
56 | F_TIA_GAIN_SEP, F_TIA_CF_SEP, | |
57 | F_TIA_GAIN, TIA_CF, | |
58 | ||
59 | /* LED Current */ | |
60 | F_ILED1, F_ILED2, F_ILED3, | |
61 | ||
62 | /* Offset DAC */ | |
63 | F_OFFDAC_AMB2, F_OFFDAC_LED1, F_OFFDAC_AMB1, F_OFFDAC_LED2, | |
64 | ||
65 | /* sentinel */ | |
66 | F_MAX_FIELDS | |
67 | }; | |
68 | ||
69 | static const struct reg_field afe4404_reg_fields[] = { | |
70 | /* Gains */ | |
71 | [F_TIA_GAIN_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 0, 2), | |
72 | [F_TIA_CF_SEP] = REG_FIELD(AFE4404_TIA_GAIN_SEP, 3, 5), | |
73 | [F_TIA_GAIN] = REG_FIELD(AFE4404_TIA_GAIN, 0, 2), | |
74 | [TIA_CF] = REG_FIELD(AFE4404_TIA_GAIN, 3, 5), | |
75 | /* LED Current */ | |
76 | [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 5), | |
77 | [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 6, 11), | |
78 | [F_ILED3] = REG_FIELD(AFE440X_LEDCNTRL, 12, 17), | |
79 | /* Offset DAC */ | |
80 | [F_OFFDAC_AMB2] = REG_FIELD(AFE4404_OFFDAC, 0, 4), | |
81 | [F_OFFDAC_LED1] = REG_FIELD(AFE4404_OFFDAC, 5, 9), | |
82 | [F_OFFDAC_AMB1] = REG_FIELD(AFE4404_OFFDAC, 10, 14), | |
83 | [F_OFFDAC_LED2] = REG_FIELD(AFE4404_OFFDAC, 15, 19), | |
84 | }; | |
85 | ||
87aec56e | 86 | /** |
f59e6b5a AD |
87 | * struct afe4404_data - AFE4404 device instance data |
88 | * @dev: Device structure | |
89 | * @regmap: Register map of the device | |
b36e8257 | 90 | * @fields: Register fields of the device |
f59e6b5a AD |
91 | * @regulator: Pointer to the regulator for the IC |
92 | * @trig: IIO trigger for this device | |
93 | * @irq: ADC_RDY line interrupt number | |
87aec56e AD |
94 | */ |
95 | struct afe4404_data { | |
96 | struct device *dev; | |
97 | struct regmap *regmap; | |
b36e8257 | 98 | struct regmap_field *fields[F_MAX_FIELDS]; |
87aec56e AD |
99 | struct regulator *regulator; |
100 | struct iio_trigger *trig; | |
101 | int irq; | |
102 | }; | |
103 | ||
104 | enum afe4404_chan_id { | |
24b9dea7 AD |
105 | LED2 = 1, |
106 | ALED2, | |
87aec56e AD |
107 | LED1, |
108 | ALED1, | |
87aec56e | 109 | LED2_ALED2, |
24b9dea7 | 110 | LED1_ALED1, |
87aec56e AD |
111 | }; |
112 | ||
b36e8257 AD |
113 | static const unsigned int afe4404_channel_values[] = { |
114 | [LED2] = AFE440X_LED2VAL, | |
115 | [ALED2] = AFE440X_ALED2VAL, | |
116 | [LED1] = AFE440X_LED1VAL, | |
117 | [ALED1] = AFE440X_ALED1VAL, | |
118 | [LED2_ALED2] = AFE440X_LED2_ALED2VAL, | |
119 | [LED1_ALED1] = AFE440X_LED1_ALED1VAL, | |
120 | }; | |
121 | ||
122 | static const unsigned int afe4404_channel_leds[] = { | |
3ff34ee2 AD |
123 | [LED2] = F_ILED2, |
124 | [ALED2] = F_ILED3, | |
125 | [LED1] = F_ILED1, | |
b36e8257 AD |
126 | }; |
127 | ||
128 | static const unsigned int afe4404_channel_offdacs[] = { | |
129 | [LED2] = F_OFFDAC_LED2, | |
130 | [ALED2] = F_OFFDAC_AMB2, | |
131 | [LED1] = F_OFFDAC_LED1, | |
132 | [ALED1] = F_OFFDAC_AMB1, | |
87aec56e AD |
133 | }; |
134 | ||
135 | static const struct iio_chan_spec afe4404_channels[] = { | |
136 | /* ADC values */ | |
24b9dea7 AD |
137 | AFE440X_INTENSITY_CHAN(LED2, BIT(IIO_CHAN_INFO_OFFSET)), |
138 | AFE440X_INTENSITY_CHAN(ALED2, BIT(IIO_CHAN_INFO_OFFSET)), | |
139 | AFE440X_INTENSITY_CHAN(LED1, BIT(IIO_CHAN_INFO_OFFSET)), | |
140 | AFE440X_INTENSITY_CHAN(ALED1, BIT(IIO_CHAN_INFO_OFFSET)), | |
141 | AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), | |
142 | AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), | |
87aec56e | 143 | /* LED current */ |
3ff34ee2 AD |
144 | AFE440X_CURRENT_CHAN(LED2), |
145 | AFE440X_CURRENT_CHAN(ALED2), | |
146 | AFE440X_CURRENT_CHAN(LED1), | |
87aec56e AD |
147 | }; |
148 | ||
149 | static const struct afe440x_val_table afe4404_res_table[] = { | |
150 | { .integer = 500000, .fract = 0 }, | |
151 | { .integer = 250000, .fract = 0 }, | |
152 | { .integer = 100000, .fract = 0 }, | |
153 | { .integer = 50000, .fract = 0 }, | |
154 | { .integer = 25000, .fract = 0 }, | |
155 | { .integer = 10000, .fract = 0 }, | |
156 | { .integer = 1000000, .fract = 0 }, | |
157 | { .integer = 2000000, .fract = 0 }, | |
158 | }; | |
1276187c | 159 | AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4404_res_table); |
87aec56e AD |
160 | |
161 | static const struct afe440x_val_table afe4404_cap_table[] = { | |
162 | { .integer = 0, .fract = 5000 }, | |
163 | { .integer = 0, .fract = 2500 }, | |
164 | { .integer = 0, .fract = 10000 }, | |
165 | { .integer = 0, .fract = 7500 }, | |
166 | { .integer = 0, .fract = 20000 }, | |
167 | { .integer = 0, .fract = 17500 }, | |
168 | { .integer = 0, .fract = 25000 }, | |
169 | { .integer = 0, .fract = 22500 }, | |
170 | }; | |
1276187c | 171 | AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4404_cap_table); |
87aec56e AD |
172 | |
173 | static ssize_t afe440x_show_register(struct device *dev, | |
174 | struct device_attribute *attr, | |
175 | char *buf) | |
176 | { | |
177 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
178 | struct afe4404_data *afe = iio_priv(indio_dev); | |
179 | struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); | |
81f51727 | 180 | unsigned int reg_val; |
87aec56e | 181 | int vals[2]; |
81f51727 | 182 | int ret; |
87aec56e | 183 | |
b36e8257 | 184 | ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); |
87aec56e AD |
185 | if (ret) |
186 | return ret; | |
187 | ||
81f51727 | 188 | if (reg_val >= afe440x_attr->table_size) |
87aec56e | 189 | return -EINVAL; |
87aec56e | 190 | |
81f51727 AD |
191 | vals[0] = afe440x_attr->val_table[reg_val].integer; |
192 | vals[1] = afe440x_attr->val_table[reg_val].fract; | |
193 | ||
194 | return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); | |
87aec56e AD |
195 | } |
196 | ||
197 | static ssize_t afe440x_store_register(struct device *dev, | |
198 | struct device_attribute *attr, | |
199 | const char *buf, size_t count) | |
200 | { | |
201 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
202 | struct afe4404_data *afe = iio_priv(indio_dev); | |
203 | struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); | |
204 | int val, integer, fract, ret; | |
205 | ||
206 | ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); | |
207 | if (ret) | |
208 | return ret; | |
209 | ||
81f51727 AD |
210 | for (val = 0; val < afe440x_attr->table_size; val++) |
211 | if (afe440x_attr->val_table[val].integer == integer && | |
212 | afe440x_attr->val_table[val].fract == fract) | |
213 | break; | |
214 | if (val == afe440x_attr->table_size) | |
87aec56e | 215 | return -EINVAL; |
87aec56e | 216 | |
b36e8257 | 217 | ret = regmap_field_write(afe->fields[afe440x_attr->field], val); |
87aec56e AD |
218 | if (ret) |
219 | return ret; | |
220 | ||
221 | return count; | |
222 | } | |
223 | ||
1276187c AD |
224 | static AFE440X_ATTR(in_intensity1_resistance, F_TIA_GAIN_SEP, afe4404_res_table); |
225 | static AFE440X_ATTR(in_intensity1_capacitance, F_TIA_CF_SEP, afe4404_cap_table); | |
87aec56e | 226 | |
1276187c AD |
227 | static AFE440X_ATTR(in_intensity2_resistance, F_TIA_GAIN_SEP, afe4404_res_table); |
228 | static AFE440X_ATTR(in_intensity2_capacitance, F_TIA_CF_SEP, afe4404_cap_table); | |
229 | ||
230 | static AFE440X_ATTR(in_intensity3_resistance, F_TIA_GAIN, afe4404_res_table); | |
231 | static AFE440X_ATTR(in_intensity3_capacitance, TIA_CF, afe4404_cap_table); | |
232 | ||
233 | static AFE440X_ATTR(in_intensity4_resistance, F_TIA_GAIN, afe4404_res_table); | |
234 | static AFE440X_ATTR(in_intensity4_capacitance, TIA_CF, afe4404_cap_table); | |
87aec56e AD |
235 | |
236 | static struct attribute *afe440x_attributes[] = { | |
1276187c AD |
237 | &dev_attr_in_intensity_resistance_available.attr, |
238 | &dev_attr_in_intensity_capacitance_available.attr, | |
239 | &afe440x_attr_in_intensity1_resistance.dev_attr.attr, | |
240 | &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, | |
241 | &afe440x_attr_in_intensity2_resistance.dev_attr.attr, | |
242 | &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, | |
243 | &afe440x_attr_in_intensity3_resistance.dev_attr.attr, | |
244 | &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, | |
245 | &afe440x_attr_in_intensity4_resistance.dev_attr.attr, | |
246 | &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, | |
87aec56e AD |
247 | NULL |
248 | }; | |
249 | ||
250 | static const struct attribute_group afe440x_attribute_group = { | |
251 | .attrs = afe440x_attributes | |
252 | }; | |
253 | ||
254 | static int afe4404_read_raw(struct iio_dev *indio_dev, | |
255 | struct iio_chan_spec const *chan, | |
256 | int *val, int *val2, long mask) | |
257 | { | |
258 | struct afe4404_data *afe = iio_priv(indio_dev); | |
b36e8257 AD |
259 | unsigned int value_reg = afe4404_channel_values[chan->address]; |
260 | unsigned int led_field = afe4404_channel_leds[chan->address]; | |
261 | unsigned int offdac_field = afe4404_channel_offdacs[chan->address]; | |
87aec56e AD |
262 | int ret; |
263 | ||
264 | switch (chan->type) { | |
265 | case IIO_INTENSITY: | |
266 | switch (mask) { | |
267 | case IIO_CHAN_INFO_RAW: | |
b36e8257 | 268 | ret = regmap_read(afe->regmap, value_reg, val); |
87aec56e AD |
269 | if (ret) |
270 | return ret; | |
271 | return IIO_VAL_INT; | |
272 | case IIO_CHAN_INFO_OFFSET: | |
b36e8257 | 273 | ret = regmap_field_read(afe->fields[offdac_field], val); |
87aec56e AD |
274 | if (ret) |
275 | return ret; | |
87aec56e AD |
276 | return IIO_VAL_INT; |
277 | } | |
278 | break; | |
279 | case IIO_CURRENT: | |
280 | switch (mask) { | |
281 | case IIO_CHAN_INFO_RAW: | |
b36e8257 | 282 | ret = regmap_field_read(afe->fields[led_field], val); |
87aec56e AD |
283 | if (ret) |
284 | return ret; | |
87aec56e AD |
285 | return IIO_VAL_INT; |
286 | case IIO_CHAN_INFO_SCALE: | |
287 | *val = 0; | |
288 | *val2 = 800000; | |
289 | return IIO_VAL_INT_PLUS_MICRO; | |
290 | } | |
291 | break; | |
292 | default: | |
293 | break; | |
294 | } | |
295 | ||
296 | return -EINVAL; | |
297 | } | |
298 | ||
299 | static int afe4404_write_raw(struct iio_dev *indio_dev, | |
300 | struct iio_chan_spec const *chan, | |
301 | int val, int val2, long mask) | |
302 | { | |
303 | struct afe4404_data *afe = iio_priv(indio_dev); | |
b36e8257 AD |
304 | unsigned int led_field = afe4404_channel_leds[chan->address]; |
305 | unsigned int offdac_field = afe4404_channel_offdacs[chan->address]; | |
87aec56e AD |
306 | |
307 | switch (chan->type) { | |
308 | case IIO_INTENSITY: | |
309 | switch (mask) { | |
310 | case IIO_CHAN_INFO_OFFSET: | |
b36e8257 | 311 | return regmap_field_write(afe->fields[offdac_field], val); |
87aec56e AD |
312 | } |
313 | break; | |
314 | case IIO_CURRENT: | |
315 | switch (mask) { | |
316 | case IIO_CHAN_INFO_RAW: | |
b36e8257 | 317 | return regmap_field_write(afe->fields[led_field], val); |
87aec56e AD |
318 | } |
319 | break; | |
320 | default: | |
321 | break; | |
322 | } | |
323 | ||
324 | return -EINVAL; | |
325 | } | |
326 | ||
327 | static const struct iio_info afe4404_iio_info = { | |
328 | .attrs = &afe440x_attribute_group, | |
329 | .read_raw = afe4404_read_raw, | |
330 | .write_raw = afe4404_write_raw, | |
331 | .driver_module = THIS_MODULE, | |
332 | }; | |
333 | ||
334 | static irqreturn_t afe4404_trigger_handler(int irq, void *private) | |
335 | { | |
336 | struct iio_poll_func *pf = private; | |
337 | struct iio_dev *indio_dev = pf->indio_dev; | |
338 | struct afe4404_data *afe = iio_priv(indio_dev); | |
339 | int ret, bit, i = 0; | |
340 | s32 buffer[10]; | |
341 | ||
342 | for_each_set_bit(bit, indio_dev->active_scan_mask, | |
343 | indio_dev->masklength) { | |
b36e8257 | 344 | ret = regmap_read(afe->regmap, afe4404_channel_values[bit], |
87aec56e AD |
345 | &buffer[i++]); |
346 | if (ret) | |
347 | goto err; | |
348 | } | |
349 | ||
350 | iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); | |
351 | err: | |
352 | iio_trigger_notify_done(indio_dev->trig); | |
353 | ||
354 | return IRQ_HANDLED; | |
355 | } | |
356 | ||
357 | static const struct iio_trigger_ops afe4404_trigger_ops = { | |
358 | .owner = THIS_MODULE, | |
359 | }; | |
360 | ||
361 | /* Default timings from data-sheet */ | |
362 | #define AFE4404_TIMING_PAIRS \ | |
363 | { AFE440X_PRPCOUNT, 39999 }, \ | |
364 | { AFE440X_LED2LEDSTC, 0 }, \ | |
365 | { AFE440X_LED2LEDENDC, 398 }, \ | |
366 | { AFE440X_LED2STC, 80 }, \ | |
367 | { AFE440X_LED2ENDC, 398 }, \ | |
368 | { AFE440X_ADCRSTSTCT0, 5600 }, \ | |
369 | { AFE440X_ADCRSTENDCT0, 5606 }, \ | |
370 | { AFE440X_LED2CONVST, 5607 }, \ | |
371 | { AFE440X_LED2CONVEND, 6066 }, \ | |
372 | { AFE4404_LED3LEDSTC, 400 }, \ | |
373 | { AFE4404_LED3LEDENDC, 798 }, \ | |
374 | { AFE440X_ALED2STC, 480 }, \ | |
375 | { AFE440X_ALED2ENDC, 798 }, \ | |
376 | { AFE440X_ADCRSTSTCT1, 6068 }, \ | |
377 | { AFE440X_ADCRSTENDCT1, 6074 }, \ | |
378 | { AFE440X_ALED2CONVST, 6075 }, \ | |
379 | { AFE440X_ALED2CONVEND, 6534 }, \ | |
380 | { AFE440X_LED1LEDSTC, 800 }, \ | |
381 | { AFE440X_LED1LEDENDC, 1198 }, \ | |
382 | { AFE440X_LED1STC, 880 }, \ | |
383 | { AFE440X_LED1ENDC, 1198 }, \ | |
384 | { AFE440X_ADCRSTSTCT2, 6536 }, \ | |
385 | { AFE440X_ADCRSTENDCT2, 6542 }, \ | |
386 | { AFE440X_LED1CONVST, 6543 }, \ | |
387 | { AFE440X_LED1CONVEND, 7003 }, \ | |
388 | { AFE440X_ALED1STC, 1280 }, \ | |
389 | { AFE440X_ALED1ENDC, 1598 }, \ | |
390 | { AFE440X_ADCRSTSTCT3, 7005 }, \ | |
391 | { AFE440X_ADCRSTENDCT3, 7011 }, \ | |
392 | { AFE440X_ALED1CONVST, 7012 }, \ | |
393 | { AFE440X_ALED1CONVEND, 7471 }, \ | |
394 | { AFE440X_PDNCYCLESTC, 7671 }, \ | |
395 | { AFE440X_PDNCYCLEENDC, 39199 } | |
396 | ||
397 | static const struct reg_sequence afe4404_reg_sequences[] = { | |
398 | AFE4404_TIMING_PAIRS, | |
399 | { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, | |
81f51727 | 400 | { AFE4404_TIA_GAIN_SEP, AFE440X_TIAGAIN_ENSEPGAIN }, |
0825cce2 | 401 | { AFE440X_CONTROL2, AFE440X_CONTROL2_OSC_ENABLE }, |
87aec56e AD |
402 | }; |
403 | ||
404 | static const struct regmap_range afe4404_yes_ranges[] = { | |
405 | regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), | |
406 | regmap_reg_range(AFE4404_AVG_LED2_ALED2VAL, AFE4404_AVG_LED1_ALED1VAL), | |
407 | }; | |
408 | ||
409 | static const struct regmap_access_table afe4404_volatile_table = { | |
410 | .yes_ranges = afe4404_yes_ranges, | |
411 | .n_yes_ranges = ARRAY_SIZE(afe4404_yes_ranges), | |
412 | }; | |
413 | ||
414 | static const struct regmap_config afe4404_regmap_config = { | |
415 | .reg_bits = 8, | |
416 | .val_bits = 24, | |
417 | ||
418 | .max_register = AFE4404_AVG_LED1_ALED1VAL, | |
419 | .cache_type = REGCACHE_RBTREE, | |
420 | .volatile_table = &afe4404_volatile_table, | |
421 | }; | |
422 | ||
87aec56e AD |
423 | static const struct of_device_id afe4404_of_match[] = { |
424 | { .compatible = "ti,afe4404", }, | |
425 | { /* sentinel */ } | |
426 | }; | |
427 | MODULE_DEVICE_TABLE(of, afe4404_of_match); | |
87aec56e | 428 | |
0e6071ab | 429 | static int __maybe_unused afe4404_suspend(struct device *dev) |
87aec56e AD |
430 | { |
431 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
432 | struct afe4404_data *afe = iio_priv(indio_dev); | |
433 | int ret; | |
434 | ||
435 | ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, | |
436 | AFE440X_CONTROL2_PDN_AFE, | |
437 | AFE440X_CONTROL2_PDN_AFE); | |
438 | if (ret) | |
439 | return ret; | |
440 | ||
441 | ret = regulator_disable(afe->regulator); | |
442 | if (ret) { | |
443 | dev_err(dev, "Unable to disable regulator\n"); | |
444 | return ret; | |
445 | } | |
446 | ||
447 | return 0; | |
448 | } | |
449 | ||
0e6071ab | 450 | static int __maybe_unused afe4404_resume(struct device *dev) |
87aec56e AD |
451 | { |
452 | struct iio_dev *indio_dev = dev_to_iio_dev(dev); | |
453 | struct afe4404_data *afe = iio_priv(indio_dev); | |
454 | int ret; | |
455 | ||
456 | ret = regulator_enable(afe->regulator); | |
457 | if (ret) { | |
458 | dev_err(dev, "Unable to enable regulator\n"); | |
459 | return ret; | |
460 | } | |
461 | ||
462 | ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, | |
463 | AFE440X_CONTROL2_PDN_AFE, 0); | |
464 | if (ret) | |
465 | return ret; | |
466 | ||
467 | return 0; | |
468 | } | |
469 | ||
470 | static SIMPLE_DEV_PM_OPS(afe4404_pm_ops, afe4404_suspend, afe4404_resume); | |
471 | ||
472 | static int afe4404_probe(struct i2c_client *client, | |
473 | const struct i2c_device_id *id) | |
474 | { | |
475 | struct iio_dev *indio_dev; | |
476 | struct afe4404_data *afe; | |
b36e8257 | 477 | int i, ret; |
87aec56e AD |
478 | |
479 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*afe)); | |
480 | if (!indio_dev) | |
481 | return -ENOMEM; | |
482 | ||
483 | afe = iio_priv(indio_dev); | |
484 | i2c_set_clientdata(client, indio_dev); | |
485 | ||
486 | afe->dev = &client->dev; | |
487 | afe->irq = client->irq; | |
488 | ||
489 | afe->regmap = devm_regmap_init_i2c(client, &afe4404_regmap_config); | |
490 | if (IS_ERR(afe->regmap)) { | |
491 | dev_err(afe->dev, "Unable to allocate register map\n"); | |
492 | return PTR_ERR(afe->regmap); | |
493 | } | |
494 | ||
b36e8257 AD |
495 | for (i = 0; i < F_MAX_FIELDS; i++) { |
496 | afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, | |
497 | afe4404_reg_fields[i]); | |
498 | if (IS_ERR(afe->fields[i])) { | |
499 | dev_err(afe->dev, "Unable to allocate regmap fields\n"); | |
500 | return PTR_ERR(afe->fields[i]); | |
501 | } | |
502 | } | |
503 | ||
87aec56e AD |
504 | afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); |
505 | if (IS_ERR(afe->regulator)) { | |
506 | dev_err(afe->dev, "Unable to get regulator\n"); | |
507 | return PTR_ERR(afe->regulator); | |
508 | } | |
509 | ret = regulator_enable(afe->regulator); | |
510 | if (ret) { | |
511 | dev_err(afe->dev, "Unable to enable regulator\n"); | |
512 | return ret; | |
513 | } | |
514 | ||
515 | ret = regmap_write(afe->regmap, AFE440X_CONTROL0, | |
516 | AFE440X_CONTROL0_SW_RESET); | |
517 | if (ret) { | |
518 | dev_err(afe->dev, "Unable to reset device\n"); | |
519 | goto disable_reg; | |
520 | } | |
521 | ||
522 | ret = regmap_multi_reg_write(afe->regmap, afe4404_reg_sequences, | |
523 | ARRAY_SIZE(afe4404_reg_sequences)); | |
524 | if (ret) { | |
525 | dev_err(afe->dev, "Unable to set register defaults\n"); | |
526 | goto disable_reg; | |
527 | } | |
528 | ||
529 | indio_dev->modes = INDIO_DIRECT_MODE; | |
530 | indio_dev->dev.parent = afe->dev; | |
531 | indio_dev->channels = afe4404_channels; | |
532 | indio_dev->num_channels = ARRAY_SIZE(afe4404_channels); | |
533 | indio_dev->name = AFE4404_DRIVER_NAME; | |
534 | indio_dev->info = &afe4404_iio_info; | |
535 | ||
536 | if (afe->irq > 0) { | |
537 | afe->trig = devm_iio_trigger_alloc(afe->dev, | |
538 | "%s-dev%d", | |
539 | indio_dev->name, | |
540 | indio_dev->id); | |
541 | if (!afe->trig) { | |
542 | dev_err(afe->dev, "Unable to allocate IIO trigger\n"); | |
543 | ret = -ENOMEM; | |
544 | goto disable_reg; | |
545 | } | |
546 | ||
547 | iio_trigger_set_drvdata(afe->trig, indio_dev); | |
548 | ||
549 | afe->trig->ops = &afe4404_trigger_ops; | |
550 | afe->trig->dev.parent = afe->dev; | |
551 | ||
552 | ret = iio_trigger_register(afe->trig); | |
553 | if (ret) { | |
554 | dev_err(afe->dev, "Unable to register IIO trigger\n"); | |
555 | goto disable_reg; | |
556 | } | |
557 | ||
558 | ret = devm_request_threaded_irq(afe->dev, afe->irq, | |
559 | iio_trigger_generic_data_rdy_poll, | |
560 | NULL, IRQF_ONESHOT, | |
561 | AFE4404_DRIVER_NAME, | |
562 | afe->trig); | |
563 | if (ret) { | |
564 | dev_err(afe->dev, "Unable to request IRQ\n"); | |
565 | goto disable_reg; | |
566 | } | |
567 | } | |
568 | ||
569 | ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, | |
570 | afe4404_trigger_handler, NULL); | |
571 | if (ret) { | |
572 | dev_err(afe->dev, "Unable to setup buffer\n"); | |
573 | goto unregister_trigger; | |
574 | } | |
575 | ||
576 | ret = iio_device_register(indio_dev); | |
577 | if (ret) { | |
578 | dev_err(afe->dev, "Unable to register IIO device\n"); | |
579 | goto unregister_triggered_buffer; | |
580 | } | |
581 | ||
582 | return 0; | |
583 | ||
584 | unregister_triggered_buffer: | |
585 | iio_triggered_buffer_cleanup(indio_dev); | |
586 | unregister_trigger: | |
587 | if (afe->irq > 0) | |
588 | iio_trigger_unregister(afe->trig); | |
589 | disable_reg: | |
590 | regulator_disable(afe->regulator); | |
591 | ||
592 | return ret; | |
593 | } | |
594 | ||
595 | static int afe4404_remove(struct i2c_client *client) | |
596 | { | |
597 | struct iio_dev *indio_dev = i2c_get_clientdata(client); | |
598 | struct afe4404_data *afe = iio_priv(indio_dev); | |
599 | int ret; | |
600 | ||
601 | iio_device_unregister(indio_dev); | |
602 | ||
603 | iio_triggered_buffer_cleanup(indio_dev); | |
604 | ||
605 | if (afe->irq > 0) | |
606 | iio_trigger_unregister(afe->trig); | |
607 | ||
608 | ret = regulator_disable(afe->regulator); | |
609 | if (ret) { | |
610 | dev_err(afe->dev, "Unable to disable regulator\n"); | |
611 | return ret; | |
612 | } | |
613 | ||
614 | return 0; | |
615 | } | |
616 | ||
617 | static const struct i2c_device_id afe4404_ids[] = { | |
618 | { "afe4404", 0 }, | |
619 | { /* sentinel */ } | |
620 | }; | |
621 | MODULE_DEVICE_TABLE(i2c, afe4404_ids); | |
622 | ||
623 | static struct i2c_driver afe4404_i2c_driver = { | |
624 | .driver = { | |
625 | .name = AFE4404_DRIVER_NAME, | |
daffd7a7 | 626 | .of_match_table = afe4404_of_match, |
87aec56e AD |
627 | .pm = &afe4404_pm_ops, |
628 | }, | |
629 | .probe = afe4404_probe, | |
630 | .remove = afe4404_remove, | |
631 | .id_table = afe4404_ids, | |
632 | }; | |
633 | module_i2c_driver(afe4404_i2c_driver); | |
634 | ||
635 | MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); | |
f59e6b5a | 636 | MODULE_DESCRIPTION("TI AFE4404 Heart Rate Monitor and Pulse Oximeter AFE"); |
87aec56e | 637 | MODULE_LICENSE("GPL v2"); |