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CommitLineData
20ffac27
DB		 1/*
2 * KMX61 - Kionix 6-axis Accelerometer/Magnetometer
3 *
4 * Copyright (c) 2014, Intel Corporation.
5 *
6 * This file is subject to the terms and conditions of version 2 of
7 * the GNU General Public License. See the file COPYING in the main
8 * directory of this archive for more details.
9 *
10 * IIO driver for KMX61 (7-bit I2C slave address 0x0E or 0x0F).
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/i2c.h>
b25862c5
DB		 16#include <linux/acpi.h>
17#include <linux/gpio/consumer.h>
aff8609a 18#include <linux/interrupt.h>
3b9c40e6 19#include <linux/pm.h>
aff8609a 20#include <linux/pm_runtime.h>
20ffac27
DB		 21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
fd3ae7a9 23#include <linux/iio/events.h>
c3a23ecc
DB		 24#include <linux/iio/trigger.h>
25#include <linux/iio/buffer.h>
26#include <linux/iio/triggered_buffer.h>
27#include <linux/iio/trigger_consumer.h>
20ffac27
DB		 28
29#define KMX61_DRV_NAME "kmx61"
b25862c5 30#define KMX61_GPIO_NAME "kmx61_int"
c3a23ecc 31#define KMX61_IRQ_NAME "kmx61_event"
20ffac27
DB		 32
33#define KMX61_REG_WHO_AM_I 0x00
fd3ae7a9
DB		 34#define KMX61_REG_INS1 0x01
35#define KMX61_REG_INS2 0x02
20ffac27
DB		 36
37/*
38 * three 16-bit accelerometer output registers for X/Y/Z axis
39 * we use only XOUT_L as a base register, all other addresses
40 * can be obtained by applying an offset and are provided here
41 * only for clarity.
42 */
43#define KMX61_ACC_XOUT_L 0x0A
44#define KMX61_ACC_XOUT_H 0x0B
45#define KMX61_ACC_YOUT_L 0x0C
46#define KMX61_ACC_YOUT_H 0x0D
47#define KMX61_ACC_ZOUT_L 0x0E
48#define KMX61_ACC_ZOUT_H 0x0F
49
50/*
51 * one 16-bit temperature output register
52 */
53#define KMX61_TEMP_L 0x10
54#define KMX61_TEMP_H 0x11
55
56/*
57 * three 16-bit magnetometer output registers for X/Y/Z axis
58 */
59#define KMX61_MAG_XOUT_L 0x12
60#define KMX61_MAG_XOUT_H 0x13
61#define KMX61_MAG_YOUT_L 0x14
62#define KMX61_MAG_YOUT_H 0x15
63#define KMX61_MAG_ZOUT_L 0x16
64#define KMX61_MAG_ZOUT_H 0x17
65
c3a23ecc 66#define KMX61_REG_INL 0x28
20ffac27
DB		 67#define KMX61_REG_STBY 0x29
68#define KMX61_REG_CTRL1 0x2A
fd3ae7a9 69#define KMX61_REG_CTRL2 0x2B
20ffac27 70#define KMX61_REG_ODCNTL 0x2C
c3a23ecc 71#define KMX61_REG_INC1 0x2D
20ffac27 72
fd3ae7a9
DB		 73#define KMX61_REG_WUF_THRESH 0x3D
74#define KMX61_REG_WUF_TIMER 0x3E
75
20ffac27
DB		 76#define KMX61_ACC_STBY_BIT BIT(0)
77#define KMX61_MAG_STBY_BIT BIT(1)
78#define KMX61_ACT_STBY_BIT BIT(7)
79
80#define KMX61_ALL_STBY (KMX61_ACC_STBY_BIT | KMX61_MAG_STBY_BIT)
81
fd3ae7a9
DB		 82#define KMX61_REG_INS1_BIT_WUFS BIT(1)
83
84#define KMX61_REG_INS2_BIT_ZP BIT(0)
85#define KMX61_REG_INS2_BIT_ZN BIT(1)
86#define KMX61_REG_INS2_BIT_YP BIT(2)
87#define KMX61_REG_INS2_BIT_YN BIT(3)
88#define KMX61_REG_INS2_BIT_XP BIT(4)
89#define KMX61_REG_INS2_BIT_XN BIT(5)
90
20ffac27
DB		 91#define KMX61_REG_CTRL1_GSEL_MASK 0x03
92
c3a23ecc
DB		 93#define KMX61_REG_CTRL1_BIT_RES BIT(4)
94#define KMX61_REG_CTRL1_BIT_DRDYE BIT(5)
fd3ae7a9
DB		 95#define KMX61_REG_CTRL1_BIT_WUFE BIT(6)
96#define KMX61_REG_CTRL1_BIT_BTSE BIT(7)
c3a23ecc 97
fd3ae7a9 98#define KMX61_REG_INC1_BIT_WUFS BIT(0)
c3a23ecc
DB		 99#define KMX61_REG_INC1_BIT_DRDYM BIT(1)
100#define KMX61_REG_INC1_BIT_DRDYA BIT(2)
101#define KMX61_REG_INC1_BIT_IEN BIT(5)
102
20ffac27
DB		 103#define KMX61_ACC_ODR_SHIFT 0
104#define KMX61_MAG_ODR_SHIFT 4
105#define KMX61_ACC_ODR_MASK 0x0F
106#define KMX61_MAG_ODR_MASK 0xF0
107
fd3ae7a9
DB		 108#define KMX61_OWUF_MASK 0x7
109
110#define KMX61_DEFAULT_WAKE_THRESH 1
111#define KMX61_DEFAULT_WAKE_DURATION 1
112
aff8609a
DB		 113#define KMX61_SLEEP_DELAY_MS 2000
114
20ffac27
DB		 115#define KMX61_CHIP_ID 0x12
116
117/* KMX61 devices */
118#define KMX61_ACC 0x01
119#define KMX61_MAG 0x02
120
121struct kmx61_data {
122 struct i2c_client *client;
123
124 /* serialize access to non-atomic ops, e.g set_mode */
125 struct mutex lock;
126
127 /* standby state */
128 bool acc_stby;
129 bool mag_stby;
130
aff8609a
DB		 131 /* power state */
132 bool acc_ps;
133 bool mag_ps;
134
20ffac27
DB		 135 /* config bits */
136 u8 range;
137 u8 odr_bits;
fd3ae7a9
DB		 138 u8 wake_thresh;
139 u8 wake_duration;
20ffac27
DB		 140
141 /* accelerometer specific data */
142 struct iio_dev *acc_indio_dev;
c3a23ecc 143 struct iio_trigger *acc_dready_trig;
fd3ae7a9 144 struct iio_trigger *motion_trig;
c3a23ecc 145 bool acc_dready_trig_on;
fd3ae7a9
DB		 146 bool motion_trig_on;
147 bool ev_enable_state;
20ffac27
DB		 148
149 /* magnetometer specific data */
150 struct iio_dev *mag_indio_dev;
c3a23ecc
DB		 151 struct iio_trigger *mag_dready_trig;
152 bool mag_dready_trig_on;
20ffac27
DB		 153};
154
155enum kmx61_range {
156 KMX61_RANGE_2G,
157 KMX61_RANGE_4G,
158 KMX61_RANGE_8G,
159};
160
161enum kmx61_axis {
162 KMX61_AXIS_X,
163 KMX61_AXIS_Y,
164 KMX61_AXIS_Z,
165};
166
167static const u16 kmx61_uscale_table[] = {9582, 19163, 38326};
168
169static const struct {
170 int val;
171 int val2;
a36385a2
DB		 172} kmx61_samp_freq_table[] = { {12, 500000},
173 {25, 0},
174 {50, 0},
175 {100, 0},
176 {200, 0},
177 {400, 0},
178 {800, 0},
179 {1600, 0},
180 {0, 781000},
181 {1, 563000},
182 {3, 125000},
183 {6, 250000} };
20ffac27 184
fd3ae7a9
DB		 185static const struct {
186 int val;
187 int val2;
188 int odr_bits;
189} kmx61_wake_up_odr_table[] = { {0, 781000, 0x00},
190 {1, 563000, 0x01},
191 {3, 125000, 0x02},
192 {6, 250000, 0x03},
193 {12, 500000, 0x04},
194 {25, 0, 0x05},
195 {50, 0, 0x06},
196 {100, 0, 0x06},
197 {200, 0, 0x06},
198 {400, 0, 0x06},
199 {800, 0, 0x06},
200 {1600, 0, 0x06} };
201
20ffac27
DB		 202static IIO_CONST_ATTR(accel_scale_available, "0.009582 0.019163 0.038326");
203static IIO_CONST_ATTR(magn_scale_available, "0.001465");
204static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
205 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800");
206
207static struct attribute *kmx61_acc_attributes[] = {
208 &iio_const_attr_accel_scale_available.dev_attr.attr,
209 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
210 NULL,
211};
212
213static struct attribute *kmx61_mag_attributes[] = {
214 &iio_const_attr_magn_scale_available.dev_attr.attr,
215 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
216 NULL,
217};
218
219static const struct attribute_group kmx61_acc_attribute_group = {
220 .attrs = kmx61_acc_attributes,
221};
222
223static const struct attribute_group kmx61_mag_attribute_group = {
224 .attrs = kmx61_mag_attributes,
225};
226
fd3ae7a9
DB		 227static const struct iio_event_spec kmx61_event = {
228 .type = IIO_EV_TYPE_THRESH,
229 .dir = IIO_EV_DIR_EITHER,
230 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
231 BIT(IIO_EV_INFO_ENABLE) |
232 BIT(IIO_EV_INFO_PERIOD),
233};
234
20ffac27
DB		 235#define KMX61_ACC_CHAN(_axis) { \
236 .type = IIO_ACCEL, \
237 .modified = 1, \
238 .channel2 = IIO_MOD_ ## _axis, \
239 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
240 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
241 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
242 .address = KMX61_ACC, \
243 .scan_index = KMX61_AXIS_ ## _axis, \
244 .scan_type = { \
245 .sign = 's', \
246 .realbits = 12, \
247 .storagebits = 16, \
248 .shift = 4, \
249 .endianness = IIO_LE, \
250 }, \
fd3ae7a9
DB		 251 .event_spec = &kmx61_event, \
252 .num_event_specs = 1 \
20ffac27
DB		 253}
254
255#define KMX61_MAG_CHAN(_axis) { \
256 .type = IIO_MAGN, \
257 .modified = 1, \
258 .channel2 = IIO_MOD_ ## _axis, \
259 .address = KMX61_MAG, \
260 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
261 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
262 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
263 .scan_index = KMX61_AXIS_ ## _axis, \
264 .scan_type = { \
265 .sign = 's', \
266 .realbits = 14, \
267 .storagebits = 16, \
268 .shift = 2, \
269 .endianness = IIO_LE, \
270 }, \
271}
272
273static const struct iio_chan_spec kmx61_acc_channels[] = {
274 KMX61_ACC_CHAN(X),
275 KMX61_ACC_CHAN(Y),
276 KMX61_ACC_CHAN(Z),
277};
278
279static const struct iio_chan_spec kmx61_mag_channels[] = {
280 KMX61_MAG_CHAN(X),
281 KMX61_MAG_CHAN(Y),
282 KMX61_MAG_CHAN(Z),
283};
284
285static void kmx61_set_data(struct iio_dev *indio_dev, struct kmx61_data *data)
286{
287 struct kmx61_data **priv = iio_priv(indio_dev);
288
289 *priv = data;
290}
291
292static struct kmx61_data *kmx61_get_data(struct iio_dev *indio_dev)
293{
294 return *(struct kmx61_data **)iio_priv(indio_dev);
295}
296
297static int kmx61_convert_freq_to_bit(int val, int val2)
298{
299 int i;
300
301 for (i = 0; i < ARRAY_SIZE(kmx61_samp_freq_table); i++)
302 if (val == kmx61_samp_freq_table[i].val &&
303 val2 == kmx61_samp_freq_table[i].val2)
a36385a2 304 return i;
fd3ae7a9
DB		 305 return -EINVAL;
306}
307
fd3ae7a9
DB		 308static int kmx61_convert_wake_up_odr_to_bit(int val, int val2)
309{
310 int i;
311
312 for (i = 0; i < ARRAY_SIZE(kmx61_wake_up_odr_table); ++i)
313 if (kmx61_wake_up_odr_table[i].val == val &&
314 kmx61_wake_up_odr_table[i].val2 == val2)
315 return kmx61_wake_up_odr_table[i].odr_bits;
316 return -EINVAL;
317}
318
20ffac27
DB		 319/**
320 * kmx61_set_mode() - set KMX61 device operating mode
321 * @data - kmx61 device private data pointer
322 * @mode - bitmask, indicating operating mode for @device
323 * @device - bitmask, indicating device for which @mode needs to be set
324 * @update - update stby bits stored in device's private @data
325 *
326 * For each sensor (accelerometer/magnetometer) there are two operating modes
327 * STANDBY and OPERATION. Neither accel nor magn can be disabled independently
328 * if they are both enabled. Internal sensors state is saved in acc_stby and
329 * mag_stby members of driver's private @data.
330 */
331static int kmx61_set_mode(struct kmx61_data *data, u8 mode, u8 device,
332 bool update)
333{
334 int ret;
335 int acc_stby = -1, mag_stby = -1;
336
337 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
338 if (ret < 0) {
339 dev_err(&data->client->dev, "Error reading reg_stby\n");
340 return ret;
341 }
342 if (device & KMX61_ACC) {
343 if (mode & KMX61_ACC_STBY_BIT) {
344 ret |= KMX61_ACC_STBY_BIT;
345 acc_stby = 1;
346 } else {
347 ret &= ~KMX61_ACC_STBY_BIT;
348 acc_stby = 0;
349 }
350 }
351
352 if (device & KMX61_MAG) {
353 if (mode & KMX61_MAG_STBY_BIT) {
354 ret |= KMX61_MAG_STBY_BIT;
355 mag_stby = 1;
356 } else {
357 ret &= ~KMX61_MAG_STBY_BIT;
358 mag_stby = 0;
359 }
360 }
361
362 if (mode & KMX61_ACT_STBY_BIT)
363 ret |= KMX61_ACT_STBY_BIT;
364
365 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_STBY, ret);
366 if (ret < 0) {
367 dev_err(&data->client->dev, "Error writing reg_stby\n");
368 return ret;
369 }
370
371 if (acc_stby != -1 && update)
372 data->acc_stby = acc_stby;
373 if (mag_stby != -1 && update)
374 data->mag_stby = mag_stby;
375
376 return 0;
377}
378
379static int kmx61_get_mode(struct kmx61_data *data, u8 *mode, u8 device)
380{
381 int ret;
382
383 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_STBY);
384 if (ret < 0) {
385 dev_err(&data->client->dev, "Error reading reg_stby\n");
386 return ret;
387 }
388 *mode = 0;
389
390 if (device & KMX61_ACC) {
391 if (ret & KMX61_ACC_STBY_BIT)
392 *mode |= KMX61_ACC_STBY_BIT;
393 else
394 *mode &= ~KMX61_ACC_STBY_BIT;
395 }
396
397 if (device & KMX61_MAG) {
398 if (ret & KMX61_MAG_STBY_BIT)
399 *mode |= KMX61_MAG_STBY_BIT;
400 else
401 *mode &= ~KMX61_MAG_STBY_BIT;
402 }
403
404 return 0;
405}
406
ebd16366 407static int kmx61_set_wake_up_odr(struct kmx61_data *data, int val, int val2)
fd3ae7a9
DB		 408{
409 int ret, odr_bits;
410
411 odr_bits = kmx61_convert_wake_up_odr_to_bit(val, val2);
412 if (odr_bits < 0)
413 return odr_bits;
414
415 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL2,
416 odr_bits);
417 if (ret < 0)
418 dev_err(&data->client->dev, "Error writing reg_ctrl2\n");
419 return ret;
420}
421
20ffac27
DB		 422static int kmx61_set_odr(struct kmx61_data *data, int val, int val2, u8 device)
423{
424 int ret;
425 u8 mode;
426 int lodr_bits, odr_bits;
427
428 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
429 if (ret < 0)
430 return ret;
431
432 lodr_bits = kmx61_convert_freq_to_bit(val, val2);
433 if (lodr_bits < 0)
434 return lodr_bits;
435
436 /* To change ODR, accel and magn must be in STDBY */
437 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
438 true);
439 if (ret < 0)
440 return ret;
441
442 odr_bits = 0;
443 if (device & KMX61_ACC)
444 odr_bits |= lodr_bits << KMX61_ACC_ODR_SHIFT;
445 if (device & KMX61_MAG)
446 odr_bits |= lodr_bits << KMX61_MAG_ODR_SHIFT;
447
448 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_ODCNTL,
449 odr_bits);
450 if (ret < 0)
451 return ret;
452
4e843977
DB		 453 data->odr_bits = odr_bits;
454
fd3ae7a9
DB		 455 if (device & KMX61_ACC) {
456 ret = kmx61_set_wake_up_odr(data, val, val2);
457 if (ret)
458 return ret;
459 }
460
20ffac27
DB		 461 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
462}
463
464static int kmx61_get_odr(struct kmx61_data *data, int *val, int *val2,
465 u8 device)
a36385a2 466{
20ffac27
DB		 467 u8 lodr_bits;
468
469 if (device & KMX61_ACC)
470 lodr_bits = (data->odr_bits >> KMX61_ACC_ODR_SHIFT) &
471 KMX61_ACC_ODR_MASK;
472 else if (device & KMX61_MAG)
473 lodr_bits = (data->odr_bits >> KMX61_MAG_ODR_SHIFT) &
474 KMX61_MAG_ODR_MASK;
475 else
476 return -EINVAL;
477
a36385a2
DB		 478 if (lodr_bits >= ARRAY_SIZE(kmx61_samp_freq_table))
479 return -EINVAL;
480
481 *val = kmx61_samp_freq_table[lodr_bits].val;
482 *val2 = kmx61_samp_freq_table[lodr_bits].val2;
483
484 return 0;
20ffac27
DB		 485}
486
487static int kmx61_set_range(struct kmx61_data *data, u8 range)
488{
489 int ret;
490
491 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
492 if (ret < 0) {
493 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
494 return ret;
495 }
496
497 ret &= ~KMX61_REG_CTRL1_GSEL_MASK;
498 ret |= range & KMX61_REG_CTRL1_GSEL_MASK;
499
500 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
501 if (ret < 0) {
502 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
503 return ret;
504 }
505
506 data->range = range;
507
508 return 0;
509}
510
511static int kmx61_set_scale(struct kmx61_data *data, u16 uscale)
512{
513 int ret, i;
514 u8 mode;
515
516 for (i = 0; i < ARRAY_SIZE(kmx61_uscale_table); i++) {
517 if (kmx61_uscale_table[i] == uscale) {
518 ret = kmx61_get_mode(data, &mode,
519 KMX61_ACC | KMX61_MAG);
520 if (ret < 0)
521 return ret;
522
523 ret = kmx61_set_mode(data, KMX61_ALL_STBY,
524 KMX61_ACC | KMX61_MAG, true);
525 if (ret < 0)
526 return ret;
527
528 ret = kmx61_set_range(data, i);
529 if (ret < 0)
530 return ret;
531
532 return kmx61_set_mode(data, mode,
533 KMX61_ACC | KMX61_MAG, true);
534 }
535 }
536 return -EINVAL;
537}
538
539static int kmx61_chip_init(struct kmx61_data *data)
540{
fd3ae7a9 541 int ret, val, val2;
20ffac27
DB		 542
543 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_WHO_AM_I);
544 if (ret < 0) {
545 dev_err(&data->client->dev, "Error reading who_am_i\n");
546 return ret;
547 }
548
549 if (ret != KMX61_CHIP_ID) {
550 dev_err(&data->client->dev,
551 "Wrong chip id, got %x expected %x\n",
552 ret, KMX61_CHIP_ID);
553 return -EINVAL;
554 }
555
556 /* set accel 12bit, 4g range */
557 ret = kmx61_set_range(data, KMX61_RANGE_4G);
558 if (ret < 0)
559 return ret;
560
561 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_ODCNTL);
562 if (ret < 0) {
563 dev_err(&data->client->dev, "Error reading reg_odcntl\n");
564 return ret;
565 }
566 data->odr_bits = ret;
567
a36385a2
DB		 568 /*
569 * set output data rate for wake up (motion detection) function
570 * to match data rate for accelerometer sampling
571 */
572 ret = kmx61_get_odr(data, &val, &val2, KMX61_ACC);
fd3ae7a9
DB		 573 if (ret < 0)
574 return ret;
575
576 ret = kmx61_set_wake_up_odr(data, val, val2);
577 if (ret < 0)
578 return ret;
579
20ffac27
DB		 580 /* set acc/magn to OPERATION mode */
581 ret = kmx61_set_mode(data, 0, KMX61_ACC | KMX61_MAG, true);
582 if (ret < 0)
583 return ret;
584
fd3ae7a9
DB		 585 data->wake_thresh = KMX61_DEFAULT_WAKE_THRESH;
586 data->wake_duration = KMX61_DEFAULT_WAKE_DURATION;
587
20ffac27
DB		 588 return 0;
589}
590
c3a23ecc
DB		 591static int kmx61_setup_new_data_interrupt(struct kmx61_data *data,
592 bool status, u8 device)
593{
594 u8 mode;
595 int ret;
596
597 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
598 if (ret < 0)
599 return ret;
600
601 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
602 if (ret < 0)
603 return ret;
604
605 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
606 if (ret < 0) {
607 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
608 return ret;
609 }
610
611 if (status) {
612 ret |= KMX61_REG_INC1_BIT_IEN;
613 if (device & KMX61_ACC)
614 ret |= KMX61_REG_INC1_BIT_DRDYA;
615 if (device & KMX61_MAG)
616 ret |= KMX61_REG_INC1_BIT_DRDYM;
617 } else {
618 ret &= ~KMX61_REG_INC1_BIT_IEN;
619 if (device & KMX61_ACC)
620 ret &= ~KMX61_REG_INC1_BIT_DRDYA;
621 if (device & KMX61_MAG)
622 ret &= ~KMX61_REG_INC1_BIT_DRDYM;
623 }
624 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
625 if (ret < 0) {
626 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n");
627 return ret;
628 }
629
630 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
631 if (ret < 0) {
632 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
633 return ret;
634 }
635
636 if (status)
637 ret |= KMX61_REG_CTRL1_BIT_DRDYE;
638 else
639 ret &= ~KMX61_REG_CTRL1_BIT_DRDYE;
640
641 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
642 if (ret < 0) {
643 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
644 return ret;
645 }
646
28ff344e 647 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
c3a23ecc
DB		 648}
649
fd3ae7a9
DB		 650static int kmx61_chip_update_thresholds(struct kmx61_data *data)
651{
652 int ret;
653
654 ret = i2c_smbus_write_byte_data(data->client,
655 KMX61_REG_WUF_TIMER,
656 data->wake_duration);
657 if (ret < 0) {
658 dev_err(&data->client->dev, "Errow writing reg_wuf_timer\n");
659 return ret;
660 }
661
662 ret = i2c_smbus_write_byte_data(data->client,
663 KMX61_REG_WUF_THRESH,
664 data->wake_thresh);
28ff344e 665 if (ret < 0)
fd3ae7a9 666 dev_err(&data->client->dev, "Error writing reg_wuf_thresh\n");
fd3ae7a9 667
28ff344e 668 return ret;
fd3ae7a9
DB		 669}
670
671static int kmx61_setup_any_motion_interrupt(struct kmx61_data *data,
0475c685 672 bool status)
fd3ae7a9
DB		 673{
674 u8 mode;
675 int ret;
676
677 ret = kmx61_get_mode(data, &mode, KMX61_ACC | KMX61_MAG);
678 if (ret < 0)
679 return ret;
680
681 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
682 if (ret < 0)
683 return ret;
684
685 ret = kmx61_chip_update_thresholds(data);
686 if (ret < 0)
687 return ret;
688
689 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INC1);
690 if (ret < 0) {
691 dev_err(&data->client->dev, "Error reading reg_inc1\n");
692 return ret;
693 }
694 if (status)
695 ret |= (KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
696 else
697 ret &= ~(KMX61_REG_INC1_BIT_IEN | KMX61_REG_INC1_BIT_WUFS);
698
699 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_INC1, ret);
700 if (ret < 0) {
701 dev_err(&data->client->dev, "Error writing reg_inc1\n");
702 return ret;
703 }
704
705 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
706 if (ret < 0) {
707 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
708 return ret;
709 }
710
711 if (status)
712 ret |= KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE;
713 else
714 ret &= ~(KMX61_REG_CTRL1_BIT_WUFE | KMX61_REG_CTRL1_BIT_BTSE);
715
716 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
717 if (ret < 0) {
718 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
719 return ret;
720 }
721 mode |= KMX61_ACT_STBY_BIT;
28ff344e 722 return kmx61_set_mode(data, mode, KMX61_ACC | KMX61_MAG, true);
fd3ae7a9
DB		 723}
724
aff8609a
DB		 725/**
726 * kmx61_set_power_state() - set power state for kmx61 @device
727 * @data - kmx61 device private pointer
728 * @on - power state to be set for @device
729 * @device - bitmask indicating device for which @on state needs to be set
730 *
731 * Notice that when ACC power state needs to be set to ON and MAG is in
732 * OPERATION then we know that kmx61_runtime_resume was already called
733 * so we must set ACC OPERATION mode here. The same happens when MAG power
734 * state needs to be set to ON and ACC is in OPERATION.
735 */
736static int kmx61_set_power_state(struct kmx61_data *data, bool on, u8 device)
737{
df1fad80 738#ifdef CONFIG_PM
aff8609a
DB		 739 int ret;
740
741 if (device & KMX61_ACC) {
742 if (on && !data->acc_ps && !data->mag_stby) {
743 ret = kmx61_set_mode(data, 0, KMX61_ACC, true);
744 if (ret < 0)
745 return ret;
746 }
747 data->acc_ps = on;
748 }
749 if (device & KMX61_MAG) {
750 if (on && !data->mag_ps && !data->acc_stby) {
751 ret = kmx61_set_mode(data, 0, KMX61_MAG, true);
752 if (ret < 0)
753 return ret;
754 }
755 data->mag_ps = on;
756 }
757
758 if (on) {
759 ret = pm_runtime_get_sync(&data->client->dev);
760 } else {
761 pm_runtime_mark_last_busy(&data->client->dev);
762 ret = pm_runtime_put_autosuspend(&data->client->dev);
763 }
764 if (ret < 0) {
765 dev_err(&data->client->dev,
766 "Failed: kmx61_set_power_state for %d, ret %d\n",
767 on, ret);
768 if (on)
769 pm_runtime_put_noidle(&data->client->dev);
770
771 return ret;
772 }
773#endif
774 return 0;
775}
776
20ffac27
DB		 777static int kmx61_read_measurement(struct kmx61_data *data, u8 base, u8 offset)
778{
779 int ret;
780 u8 reg = base + offset * 2;
781
782 ret = i2c_smbus_read_word_data(data->client, reg);
783 if (ret < 0)
784 dev_err(&data->client->dev, "failed to read reg at %x\n", reg);
785
786 return ret;
787}
788
789static int kmx61_read_raw(struct iio_dev *indio_dev,
790 struct iio_chan_spec const *chan, int *val,
791 int *val2, long mask)
792{
793 int ret;
794 u8 base_reg;
795 struct kmx61_data *data = kmx61_get_data(indio_dev);
796
797 switch (mask) {
798 case IIO_CHAN_INFO_RAW:
799 switch (chan->type) {
800 case IIO_ACCEL:
801 base_reg = KMX61_ACC_XOUT_L;
802 break;
803 case IIO_MAGN:
804 base_reg = KMX61_MAG_XOUT_L;
805 break;
806 default:
807 return -EINVAL;
808 }
809 mutex_lock(&data->lock);
810
a3da4fa3
DB		 811 ret = kmx61_set_power_state(data, true, chan->address);
812 if (ret) {
813 mutex_unlock(&data->lock);
814 return ret;
815 }
816
20ffac27
DB		 817 ret = kmx61_read_measurement(data, base_reg, chan->scan_index);
818 if (ret < 0) {
aff8609a 819 kmx61_set_power_state(data, false, chan->address);
20ffac27
DB		 820 mutex_unlock(&data->lock);
821 return ret;
822 }
823 *val = sign_extend32(ret >> chan->scan_type.shift,
824 chan->scan_type.realbits - 1);
a3da4fa3 825 ret = kmx61_set_power_state(data, false, chan->address);
20ffac27
DB		 826
827 mutex_unlock(&data->lock);
a3da4fa3
DB		 828 if (ret)
829 return ret;
20ffac27
DB		 830 return IIO_VAL_INT;
831 case IIO_CHAN_INFO_SCALE:
832 switch (chan->type) {
833 case IIO_ACCEL:
834 *val = 0;
835 *val2 = kmx61_uscale_table[data->range];
836 return IIO_VAL_INT_PLUS_MICRO;
837 case IIO_MAGN:
838 /* 14 bits res, 1465 microGauss per magn count */
839 *val = 0;
840 *val2 = 1465;
841 return IIO_VAL_INT_PLUS_MICRO;
842 default:
843 return -EINVAL;
844 }
845 case IIO_CHAN_INFO_SAMP_FREQ:
846 if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
847 return -EINVAL;
848
849 mutex_lock(&data->lock);
850 ret = kmx61_get_odr(data, val, val2, chan->address);
851 mutex_unlock(&data->lock);
852 if (ret)
853 return -EINVAL;
854 return IIO_VAL_INT_PLUS_MICRO;
855 }
856 return -EINVAL;
857}
858
859static int kmx61_write_raw(struct iio_dev *indio_dev,
860 struct iio_chan_spec const *chan, int val,
861 int val2, long mask)
862{
863 int ret;
864 struct kmx61_data *data = kmx61_get_data(indio_dev);
865
866 switch (mask) {
867 case IIO_CHAN_INFO_SAMP_FREQ:
868 if (chan->type != IIO_ACCEL && chan->type != IIO_MAGN)
869 return -EINVAL;
870
871 mutex_lock(&data->lock);
872 ret = kmx61_set_odr(data, val, val2, chan->address);
873 mutex_unlock(&data->lock);
874 return ret;
875 case IIO_CHAN_INFO_SCALE:
876 switch (chan->type) {
877 case IIO_ACCEL:
878 if (val != 0)
879 return -EINVAL;
880 mutex_lock(&data->lock);
881 ret = kmx61_set_scale(data, val2);
882 mutex_unlock(&data->lock);
883 return ret;
884 default:
885 return -EINVAL;
886 }
887 default:
888 return -EINVAL;
889 }
890}
891
fd3ae7a9
DB		 892static int kmx61_read_event(struct iio_dev *indio_dev,
893 const struct iio_chan_spec *chan,
894 enum iio_event_type type,
895 enum iio_event_direction dir,
896 enum iio_event_info info,
897 int *val, int *val2)
898{
899 struct kmx61_data *data = kmx61_get_data(indio_dev);
900
901 *val2 = 0;
902 switch (info) {
903 case IIO_EV_INFO_VALUE:
904 *val = data->wake_thresh;
28ff344e 905 return IIO_VAL_INT;
fd3ae7a9
DB		 906 case IIO_EV_INFO_PERIOD:
907 *val = data->wake_duration;
28ff344e 908 return IIO_VAL_INT;
fd3ae7a9
DB		 909 default:
910 return -EINVAL;
911 }
fd3ae7a9
DB		 912}
913
914static int kmx61_write_event(struct iio_dev *indio_dev,
dfb12ede
DB		 915 const struct iio_chan_spec *chan,
916 enum iio_event_type type,
917 enum iio_event_direction dir,
918 enum iio_event_info info,
919 int val, int val2)
fd3ae7a9
DB		 920{
921 struct kmx61_data *data = kmx61_get_data(indio_dev);
922
923 if (data->ev_enable_state)
924 return -EBUSY;
925
926 switch (info) {
927 case IIO_EV_INFO_VALUE:
928 data->wake_thresh = val;
28ff344e 929 return IIO_VAL_INT;
fd3ae7a9
DB		 930 case IIO_EV_INFO_PERIOD:
931 data->wake_duration = val;
28ff344e 932 return IIO_VAL_INT;
fd3ae7a9
DB		 933 default:
934 return -EINVAL;
935 }
fd3ae7a9
DB		 936}
937
938static int kmx61_read_event_config(struct iio_dev *indio_dev,
939 const struct iio_chan_spec *chan,
940 enum iio_event_type type,
941 enum iio_event_direction dir)
942{
943 struct kmx61_data *data = kmx61_get_data(indio_dev);
944
945 return data->ev_enable_state;
946}
947
948static int kmx61_write_event_config(struct iio_dev *indio_dev,
dfb12ede
DB		 949 const struct iio_chan_spec *chan,
950 enum iio_event_type type,
951 enum iio_event_direction dir,
952 int state)
fd3ae7a9
DB		 953{
954 struct kmx61_data *data = kmx61_get_data(indio_dev);
28ff344e 955 int ret = 0;
fd3ae7a9
DB		 956
957 if (state && data->ev_enable_state)
958 return 0;
959
960 mutex_lock(&data->lock);
961
962 if (!state && data->motion_trig_on) {
d4a4ae04 963 data->ev_enable_state = false;
28ff344e 964 goto err_unlock;
fd3ae7a9
DB		 965 }
966
967 ret = kmx61_set_power_state(data, state, KMX61_ACC);
28ff344e
DB		 968 if (ret < 0)
969 goto err_unlock;
fd3ae7a9 970
0475c685 971 ret = kmx61_setup_any_motion_interrupt(data, state);
fd3ae7a9
DB		 972 if (ret < 0) {
973 kmx61_set_power_state(data, false, KMX61_ACC);
28ff344e 974 goto err_unlock;
fd3ae7a9
DB		 975 }
976
977 data->ev_enable_state = state;
28ff344e
DB		 978
979err_unlock:
fd3ae7a9
DB		 980 mutex_unlock(&data->lock);
981
28ff344e 982 return ret;
fd3ae7a9
DB		 983}
984
c3a23ecc
DB		 985static int kmx61_acc_validate_trigger(struct iio_dev *indio_dev,
986 struct iio_trigger *trig)
987{
988 struct kmx61_data *data = kmx61_get_data(indio_dev);
989
fd3ae7a9 990 if (data->acc_dready_trig != trig && data->motion_trig != trig)
c3a23ecc
DB		 991 return -EINVAL;
992
993 return 0;
994}
995
996static int kmx61_mag_validate_trigger(struct iio_dev *indio_dev,
997 struct iio_trigger *trig)
998{
999 struct kmx61_data *data = kmx61_get_data(indio_dev);
1000
1001 if (data->mag_dready_trig != trig)
1002 return -EINVAL;
1003
1004 return 0;
1005}
1006
20ffac27
DB		 1007static const struct iio_info kmx61_acc_info = {
1008 .driver_module = THIS_MODULE,
1009 .read_raw = kmx61_read_raw,
1010 .write_raw = kmx61_write_raw,
1011 .attrs = &kmx61_acc_attribute_group,
fd3ae7a9
DB		 1012 .read_event_value = kmx61_read_event,
1013 .write_event_value = kmx61_write_event,
1014 .read_event_config = kmx61_read_event_config,
1015 .write_event_config = kmx61_write_event_config,
c3a23ecc 1016 .validate_trigger = kmx61_acc_validate_trigger,
20ffac27
DB		 1017};
1018
1019static const struct iio_info kmx61_mag_info = {
1020 .driver_module = THIS_MODULE,
1021 .read_raw = kmx61_read_raw,
1022 .write_raw = kmx61_write_raw,
1023 .attrs = &kmx61_mag_attribute_group,
c3a23ecc 1024 .validate_trigger = kmx61_mag_validate_trigger,
20ffac27
DB		 1025};
1026
c3a23ecc
DB		 1027
1028static int kmx61_data_rdy_trigger_set_state(struct iio_trigger *trig,
1029 bool state)
1030{
1031 int ret = 0;
1032 u8 device;
1033
1034 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
fd3ae7a9 1035 struct kmx61_data *data = kmx61_get_data(indio_dev);
c3a23ecc
DB		 1036
1037 mutex_lock(&data->lock);
1038
fd3ae7a9
DB		 1039 if (!state && data->ev_enable_state && data->motion_trig_on) {
1040 data->motion_trig_on = false;
28ff344e 1041 goto err_unlock;
fd3ae7a9
DB		 1042 }
1043
dbdd0e2d 1044 if (data->acc_dready_trig == trig || data->motion_trig == trig)
c3a23ecc
DB		 1045 device = KMX61_ACC;
1046 else
1047 device = KMX61_MAG;
1048
1049 ret = kmx61_set_power_state(data, state, device);
28ff344e
DB		 1050 if (ret < 0)
1051 goto err_unlock;
c3a23ecc 1052
fd3ae7a9
DB		 1053 if (data->acc_dready_trig == trig || data->mag_dready_trig == trig)
1054 ret = kmx61_setup_new_data_interrupt(data, state, device);
1055 else
0475c685 1056 ret = kmx61_setup_any_motion_interrupt(data, state);
c3a23ecc
DB		 1057 if (ret < 0) {
1058 kmx61_set_power_state(data, false, device);
28ff344e 1059 goto err_unlock;
c3a23ecc
DB		 1060 }
1061
1062 if (data->acc_dready_trig == trig)
1063 data->acc_dready_trig_on = state;
fd3ae7a9 1064 else if (data->mag_dready_trig == trig)
c3a23ecc 1065 data->mag_dready_trig_on = state;
fd3ae7a9
DB		 1066 else
1067 data->motion_trig_on = state;
28ff344e 1068err_unlock:
c3a23ecc
DB		 1069 mutex_unlock(&data->lock);
1070
28ff344e 1071 return ret;
c3a23ecc
DB		 1072}
1073
1074static int kmx61_trig_try_reenable(struct iio_trigger *trig)
1075{
1076 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1077 struct kmx61_data *data = kmx61_get_data(indio_dev);
1078 int ret;
1079
1080 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
1081 if (ret < 0) {
1082 dev_err(&data->client->dev, "Error reading reg_inl\n");
1083 return ret;
1084 }
1085
1086 return 0;
1087}
1088
1089static const struct iio_trigger_ops kmx61_trigger_ops = {
1090 .set_trigger_state = kmx61_data_rdy_trigger_set_state,
1091 .try_reenable = kmx61_trig_try_reenable,
1092 .owner = THIS_MODULE,
1093};
1094
fd3ae7a9
DB		 1095static irqreturn_t kmx61_event_handler(int irq, void *private)
1096{
1097 struct kmx61_data *data = private;
1098 struct iio_dev *indio_dev = data->acc_indio_dev;
1099 int ret;
1100
1101 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS1);
1102 if (ret < 0) {
1103 dev_err(&data->client->dev, "Error reading reg_ins1\n");
1104 goto ack_intr;
1105 }
1106
1107 if (ret & KMX61_REG_INS1_BIT_WUFS) {
1108 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INS2);
1109 if (ret < 0) {
1110 dev_err(&data->client->dev, "Error reading reg_ins2\n");
1111 goto ack_intr;
1112 }
1113
1114 if (ret & KMX61_REG_INS2_BIT_XN)
1115 iio_push_event(indio_dev,
1116 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1117 0,
1118 IIO_MOD_X,
1119 IIO_EV_TYPE_THRESH,
1120 IIO_EV_DIR_FALLING),
1121 0);
1122
1123 if (ret & KMX61_REG_INS2_BIT_XP)
1124 iio_push_event(indio_dev,
1125 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1126 0,
1127 IIO_MOD_X,
1128 IIO_EV_TYPE_THRESH,
1129 IIO_EV_DIR_RISING),
1130 0);
1131
1132 if (ret & KMX61_REG_INS2_BIT_YN)
1133 iio_push_event(indio_dev,
1134 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1135 0,
1136 IIO_MOD_Y,
1137 IIO_EV_TYPE_THRESH,
1138 IIO_EV_DIR_FALLING),
1139 0);
1140
1141 if (ret & KMX61_REG_INS2_BIT_YP)
1142 iio_push_event(indio_dev,
1143 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1144 0,
1145 IIO_MOD_Y,
1146 IIO_EV_TYPE_THRESH,
1147 IIO_EV_DIR_RISING),
1148 0);
1149
1150 if (ret & KMX61_REG_INS2_BIT_ZN)
1151 iio_push_event(indio_dev,
1152 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1153 0,
1154 IIO_MOD_Z,
1155 IIO_EV_TYPE_THRESH,
1156 IIO_EV_DIR_FALLING),
1157 0);
1158
1159 if (ret & KMX61_REG_INS2_BIT_ZP)
1160 iio_push_event(indio_dev,
1161 IIO_MOD_EVENT_CODE(IIO_ACCEL,
1162 0,
1163 IIO_MOD_Z,
1164 IIO_EV_TYPE_THRESH,
1165 IIO_EV_DIR_RISING),
1166 0);
1167 }
1168
1169ack_intr:
1170 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_CTRL1);
1171 if (ret < 0)
1172 dev_err(&data->client->dev, "Error reading reg_ctrl1\n");
1173
1174 ret |= KMX61_REG_CTRL1_BIT_RES;
1175 ret = i2c_smbus_write_byte_data(data->client, KMX61_REG_CTRL1, ret);
1176 if (ret < 0)
28ff344e 1177 dev_err(&data->client->dev, "Error writing reg_ctrl1\n");
fd3ae7a9
DB		 1178
1179 ret = i2c_smbus_read_byte_data(data->client, KMX61_REG_INL);
1180 if (ret < 0)
1181 dev_err(&data->client->dev, "Error reading reg_inl\n");
1182
fd3ae7a9
DB		 1183 return IRQ_HANDLED;
1184}
1185
c3a23ecc
DB		 1186static irqreturn_t kmx61_data_rdy_trig_poll(int irq, void *private)
1187{
1188 struct kmx61_data *data = private;
1189
1190 if (data->acc_dready_trig_on)
1191 iio_trigger_poll(data->acc_dready_trig);
1192 if (data->mag_dready_trig_on)
1193 iio_trigger_poll(data->mag_dready_trig);
1194
fd3ae7a9
DB		 1195 if (data->motion_trig_on)
1196 iio_trigger_poll(data->motion_trig);
1197
1198 if (data->ev_enable_state)
1199 return IRQ_WAKE_THREAD;
c3a23ecc
DB		 1200 return IRQ_HANDLED;
1201}
1202
1203static irqreturn_t kmx61_trigger_handler(int irq, void *p)
1204{
1205 struct iio_poll_func *pf = p;
1206 struct iio_dev *indio_dev = pf->indio_dev;
1207 struct kmx61_data *data = kmx61_get_data(indio_dev);
1208 int bit, ret, i = 0;
6a191c70 1209 u8 base;
c3a23ecc
DB		 1210 s16 buffer[8];
1211
6a191c70
DB		 1212 if (indio_dev == data->acc_indio_dev)
1213 base = KMX61_ACC_XOUT_L;
1214 else
1215 base = KMX61_MAG_XOUT_L;
1216
c3a23ecc 1217 mutex_lock(&data->lock);
70dddeee 1218 for_each_set_bit(bit, indio_dev->active_scan_mask,
c3a23ecc 1219 indio_dev->masklength) {
6a191c70 1220 ret = kmx61_read_measurement(data, base, bit);
c3a23ecc
DB		 1221 if (ret < 0) {
1222 mutex_unlock(&data->lock);
1223 goto err;
1224 }
1225 buffer[i++] = ret;
1226 }
1227 mutex_unlock(&data->lock);
1228
1229 iio_push_to_buffers(indio_dev, buffer);
1230err:
1231 iio_trigger_notify_done(indio_dev->trig);
1232
1233 return IRQ_HANDLED;
1234}
1235
b25862c5
DB		 1236static const char *kmx61_match_acpi_device(struct device *dev)
1237{
1238 const struct acpi_device_id *id;
1239
1240 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1241 if (!id)
1242 return NULL;
1243 return dev_name(dev);
1244}
1245
1246static int kmx61_gpio_probe(struct i2c_client *client, struct kmx61_data *data)
1247{
1248 struct device *dev;
1249 struct gpio_desc *gpio;
1250 int ret;
1251
1252 if (!client)
1253 return -EINVAL;
1254
1255 dev = &client->dev;
1256
1257 /* data ready gpio interrupt pin */
b457f53a 1258 gpio = devm_gpiod_get_index(dev, KMX61_GPIO_NAME, 0, GPIOD_IN);
b25862c5
DB		 1259 if (IS_ERR(gpio)) {
1260 dev_err(dev, "acpi gpio get index failed\n");
1261 return PTR_ERR(gpio);
1262 }
1263
b25862c5
DB		 1264 ret = gpiod_to_irq(gpio);
1265
1266 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1267 return ret;
1268}
1269
20ffac27
DB		 1270static struct iio_dev *kmx61_indiodev_setup(struct kmx61_data *data,
1271 const struct iio_info *info,
1272 const struct iio_chan_spec *chan,
1273 int num_channels,
1274 const char *name)
1275{
1276 struct iio_dev *indio_dev;
1277
1278 indio_dev = devm_iio_device_alloc(&data->client->dev, sizeof(data));
1279 if (!indio_dev)
1280 return ERR_PTR(-ENOMEM);
1281
1282 kmx61_set_data(indio_dev, data);
1283
1284 indio_dev->dev.parent = &data->client->dev;
1285 indio_dev->channels = chan;
1286 indio_dev->num_channels = num_channels;
1287 indio_dev->name = name;
1288 indio_dev->modes = INDIO_DIRECT_MODE;
1289 indio_dev->info = info;
1290
1291 return indio_dev;
1292}
1293
c3a23ecc
DB		 1294static struct iio_trigger *kmx61_trigger_setup(struct kmx61_data *data,
1295 struct iio_dev *indio_dev,
1296 const char *tag)
1297{
1298 struct iio_trigger *trig;
1299 int ret;
1300
1301 trig = devm_iio_trigger_alloc(&data->client->dev,
1302 "%s-%s-dev%d",
1303 indio_dev->name,
1304 tag,
1305 indio_dev->id);
1306 if (!trig)
1307 return ERR_PTR(-ENOMEM);
1308
1309 trig->dev.parent = &data->client->dev;
1310 trig->ops = &kmx61_trigger_ops;
1311 iio_trigger_set_drvdata(trig, indio_dev);
1312
1313 ret = iio_trigger_register(trig);
1314 if (ret)
1315 return ERR_PTR(ret);
1316
1317 return trig;
1318}
1319
20ffac27
DB		 1320static int kmx61_probe(struct i2c_client *client,
1321 const struct i2c_device_id *id)
1322{
1323 int ret;
1324 struct kmx61_data *data;
1325 const char *name = NULL;
1326
1327 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
1328 if (!data)
1329 return -ENOMEM;
1330
1331 i2c_set_clientdata(client, data);
1332 data->client = client;
1333
1334 mutex_init(&data->lock);
1335
b25862c5
DB		 1336 if (id)
1337 name = id->name;
1338 else if (ACPI_HANDLE(&client->dev))
1339 name = kmx61_match_acpi_device(&client->dev);
1340 else
1341 return -ENODEV;
1342
20ffac27
DB		 1343 data->acc_indio_dev =
1344 kmx61_indiodev_setup(data, &kmx61_acc_info,
1345 kmx61_acc_channels,
1346 ARRAY_SIZE(kmx61_acc_channels),
1347 name);
1348 if (IS_ERR(data->acc_indio_dev))
1349 return PTR_ERR(data->acc_indio_dev);
1350
1351 data->mag_indio_dev =
1352 kmx61_indiodev_setup(data, &kmx61_mag_info,
1353 kmx61_mag_channels,
1354 ARRAY_SIZE(kmx61_mag_channels),
1355 name);
1356 if (IS_ERR(data->mag_indio_dev))
1357 return PTR_ERR(data->mag_indio_dev);
1358
1359 ret = kmx61_chip_init(data);
1360 if (ret < 0)
1361 return ret;
1362
b25862c5
DB		 1363 if (client->irq < 0)
1364 client->irq = kmx61_gpio_probe(client, data);
1365
c3a23ecc
DB		 1366 if (client->irq >= 0) {
1367 ret = devm_request_threaded_irq(&client->dev, client->irq,
1368 kmx61_data_rdy_trig_poll,
fd3ae7a9 1369 kmx61_event_handler,
c3a23ecc
DB		 1370 IRQF_TRIGGER_RISING,
1371 KMX61_IRQ_NAME,
1372 data);
1373 if (ret)
1374 goto err_chip_uninit;
1375
1376 data->acc_dready_trig =
1377 kmx61_trigger_setup(data, data->acc_indio_dev,
1378 "dready");
28ff344e
DB		 1379 if (IS_ERR(data->acc_dready_trig)) {
1380 ret = PTR_ERR(data->acc_dready_trig);
1381 goto err_chip_uninit;
1382 }
c3a23ecc
DB		 1383
1384 data->mag_dready_trig =
1385 kmx61_trigger_setup(data, data->mag_indio_dev,
1386 "dready");
1387 if (IS_ERR(data->mag_dready_trig)) {
1388 ret = PTR_ERR(data->mag_dready_trig);
28ff344e 1389 goto err_trigger_unregister_acc_dready;
c3a23ecc
DB		 1390 }
1391
fd3ae7a9
DB		 1392 data->motion_trig =
1393 kmx61_trigger_setup(data, data->acc_indio_dev,
1394 "any-motion");
1395 if (IS_ERR(data->motion_trig)) {
1396 ret = PTR_ERR(data->motion_trig);
28ff344e 1397 goto err_trigger_unregister_mag_dready;
fd3ae7a9
DB		 1398 }
1399
c3a23ecc
DB		 1400 ret = iio_triggered_buffer_setup(data->acc_indio_dev,
1401 &iio_pollfunc_store_time,
1402 kmx61_trigger_handler,
1403 NULL);
1404 if (ret < 0) {
1405 dev_err(&data->client->dev,
1406 "Failed to setup acc triggered buffer\n");
28ff344e 1407 goto err_trigger_unregister_motion;
c3a23ecc
DB		 1408 }
1409
1410 ret = iio_triggered_buffer_setup(data->mag_indio_dev,
1411 &iio_pollfunc_store_time,
1412 kmx61_trigger_handler,
1413 NULL);
1414 if (ret < 0) {
1415 dev_err(&data->client->dev,
1416 "Failed to setup mag triggered buffer\n");
28ff344e 1417 goto err_buffer_cleanup_acc;
c3a23ecc
DB		 1418 }
1419 }
1420
20ffac27
DB		 1421 ret = iio_device_register(data->acc_indio_dev);
1422 if (ret < 0) {
1423 dev_err(&client->dev, "Failed to register acc iio device\n");
28ff344e 1424 goto err_buffer_cleanup_mag;
20ffac27
DB		 1425 }
1426
1427 ret = iio_device_register(data->mag_indio_dev);
1428 if (ret < 0) {
1429 dev_err(&client->dev, "Failed to register mag iio device\n");
aff8609a 1430 goto err_iio_unregister_acc;
20ffac27
DB		 1431 }
1432
aff8609a
DB		 1433 ret = pm_runtime_set_active(&client->dev);
1434 if (ret < 0)
1435 goto err_iio_unregister_mag;
1436
1437 pm_runtime_enable(&client->dev);
1438 pm_runtime_set_autosuspend_delay(&client->dev, KMX61_SLEEP_DELAY_MS);
1439 pm_runtime_use_autosuspend(&client->dev);
1440
20ffac27
DB		 1441 return 0;
1442
aff8609a
DB		 1443err_iio_unregister_mag:
1444 iio_device_unregister(data->mag_indio_dev);
1445err_iio_unregister_acc:
20ffac27 1446 iio_device_unregister(data->acc_indio_dev);
28ff344e
DB		 1447err_buffer_cleanup_mag:
1448 if (client->irq >= 0)
c3a23ecc 1449 iio_triggered_buffer_cleanup(data->mag_indio_dev);
28ff344e
DB		 1450err_buffer_cleanup_acc:
1451 if (client->irq >= 0)
1452 iio_triggered_buffer_cleanup(data->acc_indio_dev);
1453err_trigger_unregister_motion:
1454 iio_trigger_unregister(data->motion_trig);
1455err_trigger_unregister_mag_dready:
1456 iio_trigger_unregister(data->mag_dready_trig);
1457err_trigger_unregister_acc_dready:
1458 iio_trigger_unregister(data->acc_dready_trig);
20ffac27
DB		 1459err_chip_uninit:
1460 kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1461 return ret;
1462}
1463
1464static int kmx61_remove(struct i2c_client *client)
1465{
1466 struct kmx61_data *data = i2c_get_clientdata(client);
1467
aff8609a
DB		 1468 pm_runtime_disable(&client->dev);
1469 pm_runtime_set_suspended(&client->dev);
1470 pm_runtime_put_noidle(&client->dev);
1471
20ffac27
DB		 1472 iio_device_unregister(data->acc_indio_dev);
1473 iio_device_unregister(data->mag_indio_dev);
1474
c3a23ecc
DB		 1475 if (client->irq >= 0) {
1476 iio_triggered_buffer_cleanup(data->acc_indio_dev);
1477 iio_triggered_buffer_cleanup(data->mag_indio_dev);
1478 iio_trigger_unregister(data->acc_dready_trig);
1479 iio_trigger_unregister(data->mag_dready_trig);
fd3ae7a9 1480 iio_trigger_unregister(data->motion_trig);
c3a23ecc
DB		 1481 }
1482
20ffac27
DB		 1483 mutex_lock(&data->lock);
1484 kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1485 mutex_unlock(&data->lock);
1486
1487 return 0;
1488}
1489
3b9c40e6
DB		 1490#ifdef CONFIG_PM_SLEEP
1491static int kmx61_suspend(struct device *dev)
1492{
1493 int ret;
1494 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1495
1496 mutex_lock(&data->lock);
1497 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG,
1498 false);
1499 mutex_unlock(&data->lock);
1500
1501 return ret;
1502}
1503
1504static int kmx61_resume(struct device *dev)
1505{
1506 u8 stby = 0;
1507 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1508
1509 if (data->acc_stby)
1510 stby |= KMX61_ACC_STBY_BIT;
1511 if (data->mag_stby)
1512 stby |= KMX61_MAG_STBY_BIT;
1513
1514 return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
1515}
1516#endif
aff8609a 1517
df1fad80 1518#ifdef CONFIG_PM
aff8609a
DB		 1519static int kmx61_runtime_suspend(struct device *dev)
1520{
1521 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1522 int ret;
1523
1524 mutex_lock(&data->lock);
1525 ret = kmx61_set_mode(data, KMX61_ALL_STBY, KMX61_ACC | KMX61_MAG, true);
1526 mutex_unlock(&data->lock);
1527
1528 return ret;
1529}
1530
1531static int kmx61_runtime_resume(struct device *dev)
1532{
1533 struct kmx61_data *data = i2c_get_clientdata(to_i2c_client(dev));
1534 u8 stby = 0;
1535
1536 if (!data->acc_ps)
1537 stby |= KMX61_ACC_STBY_BIT;
1538 if (!data->mag_ps)
1539 stby |= KMX61_MAG_STBY_BIT;
1540
1541 return kmx61_set_mode(data, stby, KMX61_ACC | KMX61_MAG, true);
1542}
1543#endif
1544
1545static const struct dev_pm_ops kmx61_pm_ops = {
3b9c40e6 1546 SET_SYSTEM_SLEEP_PM_OPS(kmx61_suspend, kmx61_resume)
aff8609a
DB		 1547 SET_RUNTIME_PM_OPS(kmx61_runtime_suspend, kmx61_runtime_resume, NULL)
1548};
1549
b25862c5
DB		 1550static const struct acpi_device_id kmx61_acpi_match[] = {
1551 {"KMX61021", 0},
1552 {}
1553};
1554
1555MODULE_DEVICE_TABLE(acpi, kmx61_acpi_match);
1556
20ffac27
DB		 1557static const struct i2c_device_id kmx61_id[] = {
1558 {"kmx611021", 0},
1559 {}
1560};
1561
1562MODULE_DEVICE_TABLE(i2c, kmx61_id);
1563
1564static struct i2c_driver kmx61_driver = {
1565 .driver = {
1566 .name = KMX61_DRV_NAME,
b25862c5 1567 .acpi_match_table = ACPI_PTR(kmx61_acpi_match),
aff8609a 1568 .pm = &kmx61_pm_ops,
20ffac27
DB		 1569 },
1570 .probe = kmx61_probe,
1571 .remove = kmx61_remove,
1572 .id_table = kmx61_id,
1573};
1574
1575module_i2c_driver(kmx61_driver);
1576
1577MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
1578MODULE_DESCRIPTION("KMX61 accelerometer/magnetometer driver");
1579MODULE_LICENSE("GPL v2");
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