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iio: imu: st_lsm6dsx: move decimator info in st_lsm6dsx_sensor_settings
[mirror_ubuntu-jammy-kernel.git] / drivers / iio / imu / st_lsm6dsx / st_lsm6dsx_core.c
CommitLineData
290a6ce1
LB		 1/*
2 * STMicroelectronics st_lsm6dsx sensor driver
3 *
4 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer
5 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial
6 * interface standard output.
7 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale
8 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of
9 * +-125/+-245/+-500/+-1000/+-2000 dps
10 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer
11 * allowing dynamic batching of sensor data.
12 *
13 * Supported sensors:
14 * - LSM6DS3:
15 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
16 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
17 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
18 * - FIFO size: 8KB
19 *
df47710a 20 * - LSM6DS3H/LSM6DSL/LSM6DSM:
290a6ce1
LB		 21 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416
22 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16
23 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000
24 * - FIFO size: 4KB
25 *
26 * Copyright 2016 STMicroelectronics Inc.
27 *
28 * Lorenzo Bianconi <lorenzo.bianconi@st.com>
29 * Denis Ciocca <denis.ciocca@st.com>
30 *
31 * Licensed under the GPL-2.
32 */
33
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/delay.h>
37#include <linux/iio/iio.h>
38#include <linux/iio/sysfs.h>
d3f77058 39#include <linux/pm.h>
290a6ce1 40
dba32904
LB		 41#include <linux/platform_data/st_sensors_pdata.h>
42
290a6ce1
LB		 43#include "st_lsm6dsx.h"
44
290a6ce1 45#define ST_LSM6DSX_REG_INT1_ADDR 0x0d
dba32904 46#define ST_LSM6DSX_REG_INT2_ADDR 0x0e
290a6ce1
LB		 47#define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK BIT(3)
48#define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f
49#define ST_LSM6DSX_REG_RESET_ADDR 0x12
50#define ST_LSM6DSX_REG_RESET_MASK BIT(0)
51#define ST_LSM6DSX_REG_BDU_ADDR 0x12
52#define ST_LSM6DSX_REG_BDU_MASK BIT(6)
53#define ST_LSM6DSX_REG_INT2_ON_INT1_ADDR 0x13
54#define ST_LSM6DSX_REG_INT2_ON_INT1_MASK BIT(5)
290a6ce1
LB		 55
56#define ST_LSM6DSX_REG_ACC_ODR_ADDR 0x10
57#define ST_LSM6DSX_REG_ACC_ODR_MASK GENMASK(7, 4)
58#define ST_LSM6DSX_REG_ACC_FS_ADDR 0x10
59#define ST_LSM6DSX_REG_ACC_FS_MASK GENMASK(3, 2)
60#define ST_LSM6DSX_REG_ACC_OUT_X_L_ADDR 0x28
61#define ST_LSM6DSX_REG_ACC_OUT_Y_L_ADDR 0x2a
62#define ST_LSM6DSX_REG_ACC_OUT_Z_L_ADDR 0x2c
63
64#define ST_LSM6DSX_REG_GYRO_ODR_ADDR 0x11
65#define ST_LSM6DSX_REG_GYRO_ODR_MASK GENMASK(7, 4)
66#define ST_LSM6DSX_REG_GYRO_FS_ADDR 0x11
67#define ST_LSM6DSX_REG_GYRO_FS_MASK GENMASK(3, 2)
68#define ST_LSM6DSX_REG_GYRO_OUT_X_L_ADDR 0x22
69#define ST_LSM6DSX_REG_GYRO_OUT_Y_L_ADDR 0x24
70#define ST_LSM6DSX_REG_GYRO_OUT_Z_L_ADDR 0x26
71
290a6ce1
LB		 72#define ST_LSM6DSX_ACC_FS_2G_GAIN IIO_G_TO_M_S_2(61)
73#define ST_LSM6DSX_ACC_FS_4G_GAIN IIO_G_TO_M_S_2(122)
74#define ST_LSM6DSX_ACC_FS_8G_GAIN IIO_G_TO_M_S_2(244)
75#define ST_LSM6DSX_ACC_FS_16G_GAIN IIO_G_TO_M_S_2(488)
76
dfebd8d8
LB		 77#define ST_LSM6DSX_GYRO_FS_245_GAIN IIO_DEGREE_TO_RAD(8750)
78#define ST_LSM6DSX_GYRO_FS_500_GAIN IIO_DEGREE_TO_RAD(17500)
79#define ST_LSM6DSX_GYRO_FS_1000_GAIN IIO_DEGREE_TO_RAD(35000)
290a6ce1
LB		 80#define ST_LSM6DSX_GYRO_FS_2000_GAIN IIO_DEGREE_TO_RAD(70000)
81
82struct st_lsm6dsx_odr {
83 u16 hz;
84 u8 val;
85};
86
87#define ST_LSM6DSX_ODR_LIST_SIZE 6
88struct st_lsm6dsx_odr_table_entry {
89 struct st_lsm6dsx_reg reg;
90 struct st_lsm6dsx_odr odr_avl[ST_LSM6DSX_ODR_LIST_SIZE];
91};
92
93static const struct st_lsm6dsx_odr_table_entry st_lsm6dsx_odr_table[] = {
94 [ST_LSM6DSX_ID_ACC] = {
95 .reg = {
96 .addr = ST_LSM6DSX_REG_ACC_ODR_ADDR,
97 .mask = ST_LSM6DSX_REG_ACC_ODR_MASK,
98 },
99 .odr_avl[0] = { 13, 0x01 },
100 .odr_avl[1] = { 26, 0x02 },
101 .odr_avl[2] = { 52, 0x03 },
102 .odr_avl[3] = { 104, 0x04 },
103 .odr_avl[4] = { 208, 0x05 },
104 .odr_avl[5] = { 416, 0x06 },
105 },
106 [ST_LSM6DSX_ID_GYRO] = {
107 .reg = {
108 .addr = ST_LSM6DSX_REG_GYRO_ODR_ADDR,
109 .mask = ST_LSM6DSX_REG_GYRO_ODR_MASK,
110 },
111 .odr_avl[0] = { 13, 0x01 },
112 .odr_avl[1] = { 26, 0x02 },
113 .odr_avl[2] = { 52, 0x03 },
114 .odr_avl[3] = { 104, 0x04 },
115 .odr_avl[4] = { 208, 0x05 },
116 .odr_avl[5] = { 416, 0x06 },
117 }
118};
119
120struct st_lsm6dsx_fs {
121 u32 gain;
122 u8 val;
123};
124
125#define ST_LSM6DSX_FS_LIST_SIZE 4
126struct st_lsm6dsx_fs_table_entry {
127 struct st_lsm6dsx_reg reg;
128 struct st_lsm6dsx_fs fs_avl[ST_LSM6DSX_FS_LIST_SIZE];
129};
130
131static const struct st_lsm6dsx_fs_table_entry st_lsm6dsx_fs_table[] = {
132 [ST_LSM6DSX_ID_ACC] = {
133 .reg = {
134 .addr = ST_LSM6DSX_REG_ACC_FS_ADDR,
135 .mask = ST_LSM6DSX_REG_ACC_FS_MASK,
136 },
137 .fs_avl[0] = { ST_LSM6DSX_ACC_FS_2G_GAIN, 0x0 },
138 .fs_avl[1] = { ST_LSM6DSX_ACC_FS_4G_GAIN, 0x2 },
139 .fs_avl[2] = { ST_LSM6DSX_ACC_FS_8G_GAIN, 0x3 },
140 .fs_avl[3] = { ST_LSM6DSX_ACC_FS_16G_GAIN, 0x1 },
141 },
142 [ST_LSM6DSX_ID_GYRO] = {
143 .reg = {
144 .addr = ST_LSM6DSX_REG_GYRO_FS_ADDR,
145 .mask = ST_LSM6DSX_REG_GYRO_FS_MASK,
146 },
147 .fs_avl[0] = { ST_LSM6DSX_GYRO_FS_245_GAIN, 0x0 },
148 .fs_avl[1] = { ST_LSM6DSX_GYRO_FS_500_GAIN, 0x1 },
149 .fs_avl[2] = { ST_LSM6DSX_GYRO_FS_1000_GAIN, 0x2 },
150 .fs_avl[3] = { ST_LSM6DSX_GYRO_FS_2000_GAIN, 0x3 },
151 }
152};
153
154static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = {
155 {
d068e4a0 156 .wai = 0x69,
8f2a88a2 157 .max_fifo_size = 1365,
d068e4a0
LB		 158 .id = {
159 [0] = ST_LSM6DS3_ID,
160 },
7ca3ac9e
LB		 161 .decimator = {
162 [ST_LSM6DSX_ID_ACC] = {
163 .addr = 0x08,
164 .mask = GENMASK(2, 0),
165 },
166 [ST_LSM6DSX_ID_GYRO] = {
167 .addr = 0x08,
168 .mask = GENMASK(5, 3),
169 },
170 },
290a6ce1 171 },
df47710a
LB		 172 {
173 .wai = 0x69,
8f2a88a2 174 .max_fifo_size = 682,
df47710a
LB		 175 .id = {
176 [0] = ST_LSM6DS3H_ID,
177 },
7ca3ac9e
LB		 178 .decimator = {
179 [ST_LSM6DSX_ID_ACC] = {
180 .addr = 0x08,
181 .mask = GENMASK(2, 0),
182 },
183 [ST_LSM6DSX_ID_GYRO] = {
184 .addr = 0x08,
185 .mask = GENMASK(5, 3),
186 },
187 },
df47710a 188 },
290a6ce1 189 {
d068e4a0 190 .wai = 0x6a,
8f2a88a2 191 .max_fifo_size = 682,
d068e4a0 192 .id = {
0b2a3e5f
LB		 193 [0] = ST_LSM6DSL_ID,
194 [1] = ST_LSM6DSM_ID,
d068e4a0 195 },
7ca3ac9e
LB		 196 .decimator = {
197 [ST_LSM6DSX_ID_ACC] = {
198 .addr = 0x08,
199 .mask = GENMASK(2, 0),
200 },
201 [ST_LSM6DSX_ID_GYRO] = {
202 .addr = 0x08,
203 .mask = GENMASK(5, 3),
204 },
205 },
290a6ce1
LB		 206 },
207};
208
209#define ST_LSM6DSX_CHANNEL(chan_type, addr, mod, scan_idx) \
210{ \
211 .type = chan_type, \
212 .address = addr, \
213 .modified = 1, \
214 .channel2 = mod, \
215 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
216 BIT(IIO_CHAN_INFO_SCALE), \
217 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
218 .scan_index = scan_idx, \
219 .scan_type = { \
220 .sign = 's', \
221 .realbits = 16, \
222 .storagebits = 16, \
223 .endianness = IIO_LE, \
224 }, \
225}
226
227static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = {
228 ST_LSM6DSX_CHANNEL(IIO_ACCEL, ST_LSM6DSX_REG_ACC_OUT_X_L_ADDR,
229 IIO_MOD_X, 0),
230 ST_LSM6DSX_CHANNEL(IIO_ACCEL, ST_LSM6DSX_REG_ACC_OUT_Y_L_ADDR,
231 IIO_MOD_Y, 1),
232 ST_LSM6DSX_CHANNEL(IIO_ACCEL, ST_LSM6DSX_REG_ACC_OUT_Z_L_ADDR,
233 IIO_MOD_Z, 2),
234 IIO_CHAN_SOFT_TIMESTAMP(3),
235};
236
237static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = {
238 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, ST_LSM6DSX_REG_GYRO_OUT_X_L_ADDR,
239 IIO_MOD_X, 0),
240 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, ST_LSM6DSX_REG_GYRO_OUT_Y_L_ADDR,
241 IIO_MOD_Y, 1),
242 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, ST_LSM6DSX_REG_GYRO_OUT_Z_L_ADDR,
243 IIO_MOD_Z, 2),
244 IIO_CHAN_SOFT_TIMESTAMP(3),
245};
246
247int st_lsm6dsx_write_with_mask(struct st_lsm6dsx_hw *hw, u8 addr, u8 mask,
248 u8 val)
249{
250 u8 data;
251 int err;
252
253 mutex_lock(&hw->lock);
254
255 err = hw->tf->read(hw->dev, addr, sizeof(data), &data);
256 if (err < 0) {
257 dev_err(hw->dev, "failed to read %02x register\n", addr);
258 goto out;
259 }
260
261 data = (data & ~mask) | ((val << __ffs(mask)) & mask);
262
263 err = hw->tf->write(hw->dev, addr, sizeof(data), &data);
264 if (err < 0)
265 dev_err(hw->dev, "failed to write %02x register\n", addr);
266
267out:
268 mutex_unlock(&hw->lock);
269
270 return err;
271}
272
273static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id)
274{
d068e4a0 275 int err, i, j;
290a6ce1
LB		 276 u8 data;
277
278 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) {
d068e4a0
LB		 279 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) {
280 if (id == st_lsm6dsx_sensor_settings[i].id[j])
281 break;
282 }
283 if (j < ST_LSM6DSX_MAX_ID)
290a6ce1
LB		 284 break;
285 }
286
287 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) {
288 dev_err(hw->dev, "unsupported hw id [%02x]\n", id);
289 return -ENODEV;
290 }
291
292 err = hw->tf->read(hw->dev, ST_LSM6DSX_REG_WHOAMI_ADDR, sizeof(data),
293 &data);
294 if (err < 0) {
295 dev_err(hw->dev, "failed to read whoami register\n");
296 return err;
297 }
298
299 if (data != st_lsm6dsx_sensor_settings[i].wai) {
300 dev_err(hw->dev, "unsupported whoami [%02x]\n", data);
301 return -ENODEV;
302 }
303
304 hw->settings = &st_lsm6dsx_sensor_settings[i];
305
306 return 0;
307}
308
309static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor,
310 u32 gain)
311{
312 enum st_lsm6dsx_sensor_id id = sensor->id;
313 int i, err;
314 u8 val;
315
316 for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++)
317 if (st_lsm6dsx_fs_table[id].fs_avl[i].gain == gain)
318 break;
319
320 if (i == ST_LSM6DSX_FS_LIST_SIZE)
321 return -EINVAL;
322
323 val = st_lsm6dsx_fs_table[id].fs_avl[i].val;
324 err = st_lsm6dsx_write_with_mask(sensor->hw,
325 st_lsm6dsx_fs_table[id].reg.addr,
326 st_lsm6dsx_fs_table[id].reg.mask,
327 val);
328 if (err < 0)
329 return err;
330
331 sensor->gain = gain;
332
333 return 0;
334}
335
2ccc1503
LB		 336static int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr,
337 u8 *val)
290a6ce1 338{
2ccc1503 339 int i;
290a6ce1
LB		 340
341 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++)
2ccc1503 342 if (st_lsm6dsx_odr_table[sensor->id].odr_avl[i].hz == odr)
290a6ce1
LB		 343 break;
344
345 if (i == ST_LSM6DSX_ODR_LIST_SIZE)
346 return -EINVAL;
347
2ccc1503 348 *val = st_lsm6dsx_odr_table[sensor->id].odr_avl[i].val;
290a6ce1
LB		 349
350 return 0;
351}
352
2ccc1503
LB		 353static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 odr)
354{
355 enum st_lsm6dsx_sensor_id id = sensor->id;
356 int err;
357 u8 val;
358
359 err = st_lsm6dsx_check_odr(sensor, odr, &val);
360 if (err < 0)
361 return err;
362
363 return st_lsm6dsx_write_with_mask(sensor->hw,
364 st_lsm6dsx_odr_table[id].reg.addr,
365 st_lsm6dsx_odr_table[id].reg.mask,
366 val);
367}
368
290a6ce1
LB		 369int st_lsm6dsx_sensor_enable(struct st_lsm6dsx_sensor *sensor)
370{
371 int err;
372
373 err = st_lsm6dsx_set_odr(sensor, sensor->odr);
374 if (err < 0)
375 return err;
376
377 sensor->hw->enable_mask |= BIT(sensor->id);
378
379 return 0;
380}
381
382int st_lsm6dsx_sensor_disable(struct st_lsm6dsx_sensor *sensor)
383{
384 enum st_lsm6dsx_sensor_id id = sensor->id;
385 int err;
386
387 err = st_lsm6dsx_write_with_mask(sensor->hw,
388 st_lsm6dsx_odr_table[id].reg.addr,
389 st_lsm6dsx_odr_table[id].reg.mask, 0);
390 if (err < 0)
391 return err;
392
393 sensor->hw->enable_mask &= ~BIT(id);
394
395 return 0;
396}
397
398static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor,
399 u8 addr, int *val)
400{
401 int err, delay;
402 __le16 data;
403
404 err = st_lsm6dsx_sensor_enable(sensor);
405 if (err < 0)
406 return err;
407
408 delay = 1000000 / sensor->odr;
409 usleep_range(delay, 2 * delay);
410
411 err = sensor->hw->tf->read(sensor->hw->dev, addr, sizeof(data),
412 (u8 *)&data);
413 if (err < 0)
414 return err;
415
416 st_lsm6dsx_sensor_disable(sensor);
417
418 *val = (s16)data;
419
420 return IIO_VAL_INT;
421}
422
423static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev,
424 struct iio_chan_spec const *ch,
425 int *val, int *val2, long mask)
426{
427 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
428 int ret;
429
430 switch (mask) {
431 case IIO_CHAN_INFO_RAW:
432 ret = iio_device_claim_direct_mode(iio_dev);
433 if (ret)
434 break;
435
436 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val);
437 iio_device_release_direct_mode(iio_dev);
438 break;
439 case IIO_CHAN_INFO_SAMP_FREQ:
440 *val = sensor->odr;
441 ret = IIO_VAL_INT;
442 break;
443 case IIO_CHAN_INFO_SCALE:
444 *val = 0;
445 *val2 = sensor->gain;
446 ret = IIO_VAL_INT_PLUS_MICRO;
447 break;
448 default:
449 ret = -EINVAL;
450 break;
451 }
452
453 return ret;
454}
455
456static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev,
457 struct iio_chan_spec const *chan,
458 int val, int val2, long mask)
459{
460 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
461 int err;
462
463 err = iio_device_claim_direct_mode(iio_dev);
464 if (err)
465 return err;
466
467 switch (mask) {
468 case IIO_CHAN_INFO_SCALE:
469 err = st_lsm6dsx_set_full_scale(sensor, val2);
470 break;
2ccc1503
LB		 471 case IIO_CHAN_INFO_SAMP_FREQ: {
472 u8 data;
473
474 err = st_lsm6dsx_check_odr(sensor, val, &data);
5e3c3e33
LB		 475 if (!err)
476 sensor->odr = val;
290a6ce1 477 break;
2ccc1503 478 }
290a6ce1
LB		 479 default:
480 err = -EINVAL;
481 break;
482 }
483
484 iio_device_release_direct_mode(iio_dev);
485
486 return err;
487}
488
489static int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val)
490{
491 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev);
492 struct st_lsm6dsx_hw *hw = sensor->hw;
8f2a88a2 493 int err;
290a6ce1 494
8f2a88a2 495 if (val < 1 || val > hw->settings->max_fifo_size)
290a6ce1
LB		 496 return -EINVAL;
497
498 err = st_lsm6dsx_update_watermark(sensor, val);
499 if (err < 0)
500 return err;
501
502 sensor->watermark = val;
503
504 return 0;
505}
506
507static ssize_t
508st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev,
509 struct device_attribute *attr,
510 char *buf)
511{
512 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
513 enum st_lsm6dsx_sensor_id id = sensor->id;
514 int i, len = 0;
515
516 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++)
517 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
518 st_lsm6dsx_odr_table[id].odr_avl[i].hz);
519 buf[len - 1] = '\n';
520
521 return len;
522}
523
524static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev,
525 struct device_attribute *attr,
526 char *buf)
527{
528 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev));
529 enum st_lsm6dsx_sensor_id id = sensor->id;
530 int i, len = 0;
531
532 for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++)
533 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ",
534 st_lsm6dsx_fs_table[id].fs_avl[i].gain);
535 buf[len - 1] = '\n';
536
537 return len;
538}
539
540static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail);
541static IIO_DEVICE_ATTR(in_accel_scale_available, 0444,
542 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
543static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444,
544 st_lsm6dsx_sysfs_scale_avail, NULL, 0);
545
546static struct attribute *st_lsm6dsx_acc_attributes[] = {
547 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
548 &iio_dev_attr_in_accel_scale_available.dev_attr.attr,
549 NULL,
550};
551
552static const struct attribute_group st_lsm6dsx_acc_attribute_group = {
553 .attrs = st_lsm6dsx_acc_attributes,
554};
555
556static const struct iio_info st_lsm6dsx_acc_info = {
290a6ce1
LB		 557 .attrs = &st_lsm6dsx_acc_attribute_group,
558 .read_raw = st_lsm6dsx_read_raw,
559 .write_raw = st_lsm6dsx_write_raw,
560 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
561};
562
563static struct attribute *st_lsm6dsx_gyro_attributes[] = {
564 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
565 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr,
566 NULL,
567};
568
569static const struct attribute_group st_lsm6dsx_gyro_attribute_group = {
570 .attrs = st_lsm6dsx_gyro_attributes,
571};
572
573static const struct iio_info st_lsm6dsx_gyro_info = {
290a6ce1
LB		 574 .attrs = &st_lsm6dsx_gyro_attribute_group,
575 .read_raw = st_lsm6dsx_read_raw,
576 .write_raw = st_lsm6dsx_write_raw,
577 .hwfifo_set_watermark = st_lsm6dsx_set_watermark,
578};
579
580static const unsigned long st_lsm6dsx_available_scan_masks[] = {0x7, 0x0};
581
dba32904
LB		 582static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin)
583{
584 struct device_node *np = hw->dev->of_node;
dba32904
LB		 585
586 if (!np)
587 return -EINVAL;
588
bf235277 589 return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin);
dba32904
LB		 590}
591
592static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg)
593{
594 int err = 0, drdy_pin;
595
596 if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) {
597 struct st_sensors_platform_data *pdata;
598 struct device *dev = hw->dev;
599
600 pdata = (struct st_sensors_platform_data *)dev->platform_data;
601 drdy_pin = pdata ? pdata->drdy_int_pin : 1;
602 }
603
604 switch (drdy_pin) {
605 case 1:
606 *drdy_reg = ST_LSM6DSX_REG_INT1_ADDR;
607 break;
608 case 2:
609 *drdy_reg = ST_LSM6DSX_REG_INT2_ADDR;
610 break;
611 default:
612 dev_err(hw->dev, "unsupported data ready pin\n");
613 err = -EINVAL;
614 break;
615 }
616
617 return err;
618}
619
290a6ce1
LB		 620static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw)
621{
dba32904 622 u8 data, drdy_int_reg;
290a6ce1 623 int err;
290a6ce1
LB		 624
625 data = ST_LSM6DSX_REG_RESET_MASK;
626 err = hw->tf->write(hw->dev, ST_LSM6DSX_REG_RESET_ADDR, sizeof(data),
627 &data);
628 if (err < 0)
629 return err;
630
631 msleep(200);
632
290a6ce1
LB		 633 /* enable Block Data Update */
634 err = st_lsm6dsx_write_with_mask(hw, ST_LSM6DSX_REG_BDU_ADDR,
635 ST_LSM6DSX_REG_BDU_MASK, 1);
636 if (err < 0)
637 return err;
638
290a6ce1 639 /* enable FIFO watermak interrupt */
dba32904 640 err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg);
290a6ce1
LB		 641 if (err < 0)
642 return err;
643
dba32904
LB		 644 return st_lsm6dsx_write_with_mask(hw, drdy_int_reg,
645 ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, 1);
290a6ce1
LB		 646}
647
648static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw,
510c0106
LB		 649 enum st_lsm6dsx_sensor_id id,
650 const char *name)
290a6ce1
LB		 651{
652 struct st_lsm6dsx_sensor *sensor;
653 struct iio_dev *iio_dev;
654
655 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor));
656 if (!iio_dev)
657 return NULL;
658
659 iio_dev->modes = INDIO_DIRECT_MODE;
660 iio_dev->dev.parent = hw->dev;
661 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks;
662
663 sensor = iio_priv(iio_dev);
664 sensor->id = id;
665 sensor->hw = hw;
666 sensor->odr = st_lsm6dsx_odr_table[id].odr_avl[0].hz;
667 sensor->gain = st_lsm6dsx_fs_table[id].fs_avl[0].gain;
668 sensor->watermark = 1;
669
670 switch (id) {
671 case ST_LSM6DSX_ID_ACC:
672 iio_dev->channels = st_lsm6dsx_acc_channels;
673 iio_dev->num_channels = ARRAY_SIZE(st_lsm6dsx_acc_channels);
290a6ce1
LB		 674 iio_dev->info = &st_lsm6dsx_acc_info;
675
510c0106
LB		 676 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel",
677 name);
290a6ce1
LB		 678 break;
679 case ST_LSM6DSX_ID_GYRO:
680 iio_dev->channels = st_lsm6dsx_gyro_channels;
681 iio_dev->num_channels = ARRAY_SIZE(st_lsm6dsx_gyro_channels);
290a6ce1
LB		 682 iio_dev->info = &st_lsm6dsx_gyro_info;
683
510c0106
LB		 684 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro",
685 name);
290a6ce1
LB		 686 break;
687 default:
688 return NULL;
689 }
510c0106 690 iio_dev->name = sensor->name;
290a6ce1
LB		 691
692 return iio_dev;
693}
694
510c0106 695int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, const char *name,
290a6ce1
LB		 696 const struct st_lsm6dsx_transfer_function *tf_ops)
697{
698 struct st_lsm6dsx_hw *hw;
699 int i, err;
700
701 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL);
702 if (!hw)
703 return -ENOMEM;
704
705 dev_set_drvdata(dev, (void *)hw);
706
707 mutex_init(&hw->lock);
708 mutex_init(&hw->fifo_lock);
709
710 hw->dev = dev;
711 hw->irq = irq;
712 hw->tf = tf_ops;
713
714 err = st_lsm6dsx_check_whoami(hw, hw_id);
715 if (err < 0)
716 return err;
717
718 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
510c0106 719 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name);
290a6ce1
LB		 720 if (!hw->iio_devs[i])
721 return -ENOMEM;
722 }
723
724 err = st_lsm6dsx_init_device(hw);
725 if (err < 0)
726 return err;
727
728 if (hw->irq > 0) {
729 err = st_lsm6dsx_fifo_setup(hw);
730 if (err < 0)
731 return err;
732 }
733
734 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
735 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]);
736 if (err)
737 return err;
738 }
739
740 return 0;
741}
742EXPORT_SYMBOL(st_lsm6dsx_probe);
743
3cec4850 744static int __maybe_unused st_lsm6dsx_suspend(struct device *dev)
d3f77058
LB		 745{
746 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
747 struct st_lsm6dsx_sensor *sensor;
748 int i, err = 0;
749
750 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
751 sensor = iio_priv(hw->iio_devs[i]);
752 if (!(hw->enable_mask & BIT(sensor->id)))
753 continue;
754
755 err = st_lsm6dsx_write_with_mask(hw,
756 st_lsm6dsx_odr_table[sensor->id].reg.addr,
757 st_lsm6dsx_odr_table[sensor->id].reg.mask, 0);
758 if (err < 0)
759 return err;
760 }
761
762 if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS)
763 err = st_lsm6dsx_flush_fifo(hw);
764
765 return err;
766}
767
3cec4850 768static int __maybe_unused st_lsm6dsx_resume(struct device *dev)
d3f77058
LB		 769{
770 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev);
771 struct st_lsm6dsx_sensor *sensor;
772 int i, err = 0;
773
774 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) {
775 sensor = iio_priv(hw->iio_devs[i]);
776 if (!(hw->enable_mask & BIT(sensor->id)))
777 continue;
778
779 err = st_lsm6dsx_set_odr(sensor, sensor->odr);
780 if (err < 0)
781 return err;
782 }
783
784 if (hw->enable_mask)
785 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT);
786
787 return err;
788}
d3f77058
LB		 789
790const struct dev_pm_ops st_lsm6dsx_pm_ops = {
791 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume)
792};
793EXPORT_SYMBOL(st_lsm6dsx_pm_ops);
794
290a6ce1
LB		 795MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>");
796MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>");
797MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver");
798MODULE_LICENSE("GPL v2");
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