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bf29fbea JA |
1 | /* |
2 | * Copyright (C) 2013 Samsung Electronics Co., Ltd. | |
3 | * Author: Jacek Anaszewski <j.anaszewski@samsung.com> | |
4 | * | |
5 | * IIO features supported by the driver: | |
6 | * | |
7 | * Read-only raw channels: | |
89a9430f PM |
8 | * - illuminance_clear [lux] |
9 | * - illuminance_ir | |
bf29fbea JA |
10 | * - proximity |
11 | * | |
12 | * Triggered buffer: | |
89a9430f PM |
13 | * - illuminance_clear |
14 | * - illuminance_ir | |
bf29fbea JA |
15 | * - proximity |
16 | * | |
17 | * Events: | |
18 | * - illuminance_clear (rising and falling) | |
19 | * - proximity (rising and falling) | |
20 | * - both falling and rising thresholds for the proximity events | |
21 | * must be set to the values greater than 0. | |
22 | * | |
23 | * The driver supports triggered buffers for all the three | |
24 | * channels as well as high and low threshold events for the | |
25 | * illuminance_clear and proxmimity channels. Triggers | |
26 | * can be enabled simultaneously with both illuminance_clear | |
27 | * events. Proximity events cannot be enabled simultaneously | |
28 | * with any triggers or illuminance events. Enabling/disabling | |
29 | * one of the proximity events automatically enables/disables | |
30 | * the other one. | |
31 | * | |
32 | * This program is free software; you can redistribute it and/or modify | |
33 | * it under the terms of the GNU General Public License version 2, as | |
34 | * published by the Free Software Foundation. | |
35 | */ | |
36 | ||
37 | #include <linux/debugfs.h> | |
38 | #include <linux/delay.h> | |
39 | #include <linux/i2c.h> | |
40 | #include <linux/interrupt.h> | |
41 | #include <linux/irq.h> | |
42 | #include <linux/irq_work.h> | |
43 | #include <linux/module.h> | |
44 | #include <linux/mutex.h> | |
43e01bed | 45 | #include <linux/of.h> |
bf29fbea JA |
46 | #include <linux/regmap.h> |
47 | #include <linux/regulator/consumer.h> | |
48 | #include <linux/slab.h> | |
9f59f970 | 49 | #include <asm/unaligned.h> |
bf29fbea JA |
50 | #include <linux/iio/buffer.h> |
51 | #include <linux/iio/events.h> | |
52 | #include <linux/iio/iio.h> | |
53 | #include <linux/iio/sysfs.h> | |
54 | #include <linux/iio/trigger.h> | |
55 | #include <linux/iio/trigger_consumer.h> | |
56 | #include <linux/iio/triggered_buffer.h> | |
57 | ||
58 | #define GP2A_I2C_NAME "gp2ap020a00f" | |
59 | ||
60 | /* Registers */ | |
61 | #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */ | |
62 | #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */ | |
63 | #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */ | |
64 | #define GP2AP020A00F_LED_REG 0x03 /* LED reg */ | |
65 | #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */ | |
66 | #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */ | |
67 | #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */ | |
68 | #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */ | |
69 | #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */ | |
70 | #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */ | |
71 | #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */ | |
72 | #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */ | |
73 | #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */ | |
74 | #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */ | |
75 | #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */ | |
76 | #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */ | |
77 | #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */ | |
78 | #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */ | |
79 | #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */ | |
80 | ||
81 | /* OP_REG bits */ | |
82 | #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */ | |
83 | #define GP2AP020A00F_OP3_SHUTDOWN 0x00 | |
84 | #define GP2AP020A00F_OP3_OPERATION 0x80 | |
85 | #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */ | |
86 | #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00 | |
87 | #define GP2AP020A00F_OP2_CONT_OPERATION 0x40 | |
88 | #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */ | |
89 | #define GP2AP020A00F_OP_ALS_AND_PS 0x00 | |
90 | #define GP2AP020A00F_OP_ALS 0x10 | |
91 | #define GP2AP020A00F_OP_PS 0x20 | |
92 | #define GP2AP020A00F_OP_DEBUG 0x30 | |
93 | #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */ | |
94 | #define GP2AP020A00F_PROX_NON_DETECT 0x00 | |
95 | #define GP2AP020A00F_PROX_DETECT 0x08 | |
96 | #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */ | |
97 | #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */ | |
98 | #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */ | |
99 | #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00 | |
100 | #define GP2AP020A00F_TYPE_AUTO_CALC 0x01 | |
101 | ||
102 | /* ALS_REG bits */ | |
103 | #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */ | |
104 | #define GP2AP020A00F_PRST_ONCE 0x00 | |
105 | #define GP2AP020A00F_PRST_4_CYCLES 0x40 | |
106 | #define GP2AP020A00F_PRST_8_CYCLES 0x80 | |
107 | #define GP2AP020A00F_PRST_16_CYCLES 0xc0 | |
108 | #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */ | |
109 | #define GP2AP020A00F_RES_A_800ms 0x00 | |
110 | #define GP2AP020A00F_RES_A_400ms 0x08 | |
111 | #define GP2AP020A00F_RES_A_200ms 0x10 | |
112 | #define GP2AP020A00F_RES_A_100ms 0x18 | |
113 | #define GP2AP020A00F_RES_A_25ms 0x20 | |
114 | #define GP2AP020A00F_RES_A_6_25ms 0x28 | |
115 | #define GP2AP020A00F_RES_A_1_56ms 0x30 | |
116 | #define GP2AP020A00F_RES_A_0_39ms 0x38 | |
117 | #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */ | |
118 | #define GP2AP020A00F_RANGE_A_x1 0x00 | |
119 | #define GP2AP020A00F_RANGE_A_x2 0x01 | |
120 | #define GP2AP020A00F_RANGE_A_x4 0x02 | |
121 | #define GP2AP020A00F_RANGE_A_x8 0x03 | |
122 | #define GP2AP020A00F_RANGE_A_x16 0x04 | |
123 | #define GP2AP020A00F_RANGE_A_x32 0x05 | |
124 | #define GP2AP020A00F_RANGE_A_x64 0x06 | |
125 | #define GP2AP020A00F_RANGE_A_x128 0x07 | |
126 | ||
127 | /* PS_REG bits */ | |
128 | #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */ | |
129 | #define GP2AP020A00F_ALC_ON 0x80 | |
130 | #define GP2AP020A00F_ALC_OFF 0x00 | |
131 | #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */ | |
132 | #define GP2AP020A00F_INTTYPE_LEVEL 0x00 | |
133 | #define GP2AP020A00F_INTTYPE_PULSE 0x40 | |
134 | #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */ | |
135 | #define GP2AP020A00F_RES_P_800ms_x2 0x00 | |
136 | #define GP2AP020A00F_RES_P_400ms_x2 0x08 | |
137 | #define GP2AP020A00F_RES_P_200ms_x2 0x10 | |
138 | #define GP2AP020A00F_RES_P_100ms_x2 0x18 | |
139 | #define GP2AP020A00F_RES_P_25ms_x2 0x20 | |
140 | #define GP2AP020A00F_RES_P_6_25ms_x2 0x28 | |
141 | #define GP2AP020A00F_RES_P_1_56ms_x2 0x30 | |
142 | #define GP2AP020A00F_RES_P_0_39ms_x2 0x38 | |
143 | #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */ | |
144 | #define GP2AP020A00F_RANGE_P_x1 0x00 | |
145 | #define GP2AP020A00F_RANGE_P_x2 0x01 | |
146 | #define GP2AP020A00F_RANGE_P_x4 0x02 | |
147 | #define GP2AP020A00F_RANGE_P_x8 0x03 | |
148 | #define GP2AP020A00F_RANGE_P_x16 0x04 | |
149 | #define GP2AP020A00F_RANGE_P_x32 0x05 | |
150 | #define GP2AP020A00F_RANGE_P_x64 0x06 | |
151 | #define GP2AP020A00F_RANGE_P_x128 0x07 | |
152 | ||
153 | /* LED reg bits */ | |
154 | #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */ | |
155 | #define GP2AP020A00F_INTVAL_0 0x00 | |
156 | #define GP2AP020A00F_INTVAL_4 0x40 | |
157 | #define GP2AP020A00F_INTVAL_8 0x80 | |
158 | #define GP2AP020A00F_INTVAL_16 0xc0 | |
159 | #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */ | |
160 | #define GP2AP020A00F_IS_13_8mA 0x00 | |
161 | #define GP2AP020A00F_IS_27_5mA 0x10 | |
162 | #define GP2AP020A00F_IS_55mA 0x20 | |
163 | #define GP2AP020A00F_IS_110mA 0x30 | |
164 | #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */ | |
165 | #define GP2AP020A00F_PIN_ALS_OR_PS 0x00 | |
166 | #define GP2AP020A00F_PIN_ALS 0x04 | |
167 | #define GP2AP020A00F_PIN_PS 0x08 | |
168 | #define GP2AP020A00F_PIN_PS_DETECT 0x0c | |
169 | #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */ | |
170 | #define GP2AP020A00F_FREQ_327_5kHz 0x00 | |
171 | #define GP2AP020A00F_FREQ_81_8kHz 0x02 | |
172 | #define GP2AP020A00F_RST 0x01 /* Software reset */ | |
173 | ||
174 | #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0 | |
175 | #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1 | |
176 | #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2 | |
177 | #define GP2AP020A00F_CHAN_TIMESTAMP 3 | |
178 | ||
179 | #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000) | |
180 | #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \ | |
181 | (chan) * 2) | |
182 | #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \ | |
183 | (th_val_id) * 2) | |
184 | #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2) | |
185 | ||
186 | #define GP2AP020A00F_SUBTRACT_MODE 0 | |
187 | #define GP2AP020A00F_ADD_MODE 1 | |
188 | ||
189 | #define GP2AP020A00F_MAX_CHANNELS 3 | |
190 | ||
191 | enum gp2ap020a00f_opmode { | |
192 | GP2AP020A00F_OPMODE_READ_RAW_CLEAR, | |
193 | GP2AP020A00F_OPMODE_READ_RAW_IR, | |
194 | GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY, | |
195 | GP2AP020A00F_OPMODE_ALS, | |
196 | GP2AP020A00F_OPMODE_PS, | |
197 | GP2AP020A00F_OPMODE_ALS_AND_PS, | |
198 | GP2AP020A00F_OPMODE_PROX_DETECT, | |
199 | GP2AP020A00F_OPMODE_SHUTDOWN, | |
200 | GP2AP020A00F_NUM_OPMODES, | |
201 | }; | |
202 | ||
203 | enum gp2ap020a00f_cmd { | |
204 | GP2AP020A00F_CMD_READ_RAW_CLEAR, | |
205 | GP2AP020A00F_CMD_READ_RAW_IR, | |
206 | GP2AP020A00F_CMD_READ_RAW_PROXIMITY, | |
207 | GP2AP020A00F_CMD_TRIGGER_CLEAR_EN, | |
208 | GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS, | |
209 | GP2AP020A00F_CMD_TRIGGER_IR_EN, | |
210 | GP2AP020A00F_CMD_TRIGGER_IR_DIS, | |
211 | GP2AP020A00F_CMD_TRIGGER_PROX_EN, | |
212 | GP2AP020A00F_CMD_TRIGGER_PROX_DIS, | |
213 | GP2AP020A00F_CMD_ALS_HIGH_EV_EN, | |
214 | GP2AP020A00F_CMD_ALS_HIGH_EV_DIS, | |
215 | GP2AP020A00F_CMD_ALS_LOW_EV_EN, | |
216 | GP2AP020A00F_CMD_ALS_LOW_EV_DIS, | |
217 | GP2AP020A00F_CMD_PROX_HIGH_EV_EN, | |
218 | GP2AP020A00F_CMD_PROX_HIGH_EV_DIS, | |
219 | GP2AP020A00F_CMD_PROX_LOW_EV_EN, | |
220 | GP2AP020A00F_CMD_PROX_LOW_EV_DIS, | |
221 | }; | |
222 | ||
223 | enum gp2ap020a00f_flags { | |
224 | GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, | |
225 | GP2AP020A00F_FLAG_ALS_IR_TRIGGER, | |
226 | GP2AP020A00F_FLAG_PROX_TRIGGER, | |
227 | GP2AP020A00F_FLAG_PROX_RISING_EV, | |
228 | GP2AP020A00F_FLAG_PROX_FALLING_EV, | |
229 | GP2AP020A00F_FLAG_ALS_RISING_EV, | |
230 | GP2AP020A00F_FLAG_ALS_FALLING_EV, | |
231 | GP2AP020A00F_FLAG_LUX_MODE_HI, | |
232 | GP2AP020A00F_FLAG_DATA_READY, | |
233 | }; | |
234 | ||
235 | enum gp2ap020a00f_thresh_val_id { | |
236 | GP2AP020A00F_THRESH_TL, | |
237 | GP2AP020A00F_THRESH_TH, | |
238 | GP2AP020A00F_THRESH_PL, | |
239 | GP2AP020A00F_THRESH_PH, | |
240 | }; | |
241 | ||
242 | struct gp2ap020a00f_data { | |
243 | const struct gp2ap020a00f_platform_data *pdata; | |
244 | struct i2c_client *client; | |
245 | struct mutex lock; | |
246 | char *buffer; | |
247 | struct regulator *vled_reg; | |
248 | unsigned long flags; | |
249 | enum gp2ap020a00f_opmode cur_opmode; | |
250 | struct iio_trigger *trig; | |
251 | struct regmap *regmap; | |
252 | unsigned int thresh_val[4]; | |
253 | u8 debug_reg_addr; | |
254 | struct irq_work work; | |
255 | wait_queue_head_t data_ready_queue; | |
256 | }; | |
257 | ||
258 | static const u8 gp2ap020a00f_reg_init_tab[] = { | |
259 | [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN, | |
260 | [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms | | |
261 | GP2AP020A00F_RANGE_A_x8, | |
262 | [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON | | |
263 | GP2AP020A00F_RES_P_1_56ms_x2 | | |
264 | GP2AP020A00F_RANGE_P_x4, | |
265 | [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 | | |
266 | GP2AP020A00F_IS_110mA | | |
267 | GP2AP020A00F_FREQ_327_5kHz, | |
268 | [GP2AP020A00F_TL_L_REG] = 0, | |
269 | [GP2AP020A00F_TL_H_REG] = 0, | |
270 | [GP2AP020A00F_TH_L_REG] = 0, | |
271 | [GP2AP020A00F_TH_H_REG] = 0, | |
272 | [GP2AP020A00F_PL_L_REG] = 0, | |
273 | [GP2AP020A00F_PL_H_REG] = 0, | |
274 | [GP2AP020A00F_PH_L_REG] = 0, | |
275 | [GP2AP020A00F_PH_H_REG] = 0, | |
276 | }; | |
277 | ||
278 | static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg) | |
279 | { | |
280 | switch (reg) { | |
281 | case GP2AP020A00F_OP_REG: | |
282 | case GP2AP020A00F_D0_L_REG: | |
283 | case GP2AP020A00F_D0_H_REG: | |
284 | case GP2AP020A00F_D1_L_REG: | |
285 | case GP2AP020A00F_D1_H_REG: | |
286 | case GP2AP020A00F_D2_L_REG: | |
287 | case GP2AP020A00F_D2_H_REG: | |
288 | return true; | |
289 | default: | |
290 | return false; | |
291 | } | |
292 | } | |
293 | ||
294 | static const struct regmap_config gp2ap020a00f_regmap_config = { | |
295 | .reg_bits = 8, | |
296 | .val_bits = 8, | |
297 | ||
298 | .max_register = GP2AP020A00F_D2_H_REG, | |
299 | .cache_type = REGCACHE_RBTREE, | |
300 | ||
301 | .volatile_reg = gp2ap020a00f_is_volatile_reg, | |
302 | }; | |
303 | ||
304 | static const struct gp2ap020a00f_mutable_config_regs { | |
305 | u8 op_reg; | |
306 | u8 als_reg; | |
307 | u8 ps_reg; | |
308 | u8 led_reg; | |
309 | } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = { | |
310 | [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = { | |
311 | GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION | |
312 | | GP2AP020A00F_OP3_OPERATION | |
313 | | GP2AP020A00F_TYPE_AUTO_CALC, | |
314 | GP2AP020A00F_PRST_ONCE, | |
315 | GP2AP020A00F_INTTYPE_LEVEL, | |
316 | GP2AP020A00F_PIN_ALS | |
317 | }, | |
318 | [GP2AP020A00F_OPMODE_READ_RAW_IR] = { | |
319 | GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION | |
320 | | GP2AP020A00F_OP3_OPERATION | |
321 | | GP2AP020A00F_TYPE_MANUAL_CALC, | |
322 | GP2AP020A00F_PRST_ONCE, | |
323 | GP2AP020A00F_INTTYPE_LEVEL, | |
324 | GP2AP020A00F_PIN_ALS | |
325 | }, | |
326 | [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = { | |
327 | GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION | |
328 | | GP2AP020A00F_OP3_OPERATION | |
329 | | GP2AP020A00F_TYPE_MANUAL_CALC, | |
330 | GP2AP020A00F_PRST_ONCE, | |
331 | GP2AP020A00F_INTTYPE_LEVEL, | |
332 | GP2AP020A00F_PIN_PS | |
333 | }, | |
334 | [GP2AP020A00F_OPMODE_PROX_DETECT] = { | |
335 | GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION | |
336 | | GP2AP020A00F_OP3_OPERATION | |
337 | | GP2AP020A00F_TYPE_MANUAL_CALC, | |
338 | GP2AP020A00F_PRST_4_CYCLES, | |
339 | GP2AP020A00F_INTTYPE_PULSE, | |
340 | GP2AP020A00F_PIN_PS_DETECT | |
341 | }, | |
342 | [GP2AP020A00F_OPMODE_ALS] = { | |
343 | GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION | |
344 | | GP2AP020A00F_OP3_OPERATION | |
345 | | GP2AP020A00F_TYPE_AUTO_CALC, | |
346 | GP2AP020A00F_PRST_ONCE, | |
347 | GP2AP020A00F_INTTYPE_LEVEL, | |
348 | GP2AP020A00F_PIN_ALS | |
349 | }, | |
350 | [GP2AP020A00F_OPMODE_PS] = { | |
351 | GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION | |
352 | | GP2AP020A00F_OP3_OPERATION | |
353 | | GP2AP020A00F_TYPE_MANUAL_CALC, | |
354 | GP2AP020A00F_PRST_4_CYCLES, | |
355 | GP2AP020A00F_INTTYPE_LEVEL, | |
356 | GP2AP020A00F_PIN_PS | |
357 | }, | |
358 | [GP2AP020A00F_OPMODE_ALS_AND_PS] = { | |
359 | GP2AP020A00F_OP_ALS_AND_PS | |
360 | | GP2AP020A00F_OP2_CONT_OPERATION | |
361 | | GP2AP020A00F_OP3_OPERATION | |
362 | | GP2AP020A00F_TYPE_AUTO_CALC, | |
363 | GP2AP020A00F_PRST_4_CYCLES, | |
364 | GP2AP020A00F_INTTYPE_LEVEL, | |
365 | GP2AP020A00F_PIN_ALS_OR_PS | |
366 | }, | |
367 | [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, }, | |
368 | }; | |
369 | ||
370 | static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data, | |
371 | enum gp2ap020a00f_opmode op) | |
372 | { | |
373 | unsigned int op_reg_val; | |
374 | int err; | |
375 | ||
376 | if (op != GP2AP020A00F_OPMODE_SHUTDOWN) { | |
377 | err = regmap_read(data->regmap, GP2AP020A00F_OP_REG, | |
378 | &op_reg_val); | |
379 | if (err < 0) | |
380 | return err; | |
381 | /* | |
382 | * Shutdown the device if the operation being executed entails | |
383 | * mode transition. | |
384 | */ | |
385 | if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) != | |
386 | (op_reg_val & GP2AP020A00F_OP_MASK)) { | |
387 | /* set shutdown mode */ | |
388 | err = regmap_update_bits(data->regmap, | |
389 | GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK, | |
390 | GP2AP020A00F_OP3_SHUTDOWN); | |
391 | if (err < 0) | |
392 | return err; | |
393 | } | |
394 | ||
395 | err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG, | |
396 | GP2AP020A00F_PRST_MASK, opmode_regs_settings[op] | |
397 | .als_reg); | |
398 | if (err < 0) | |
399 | return err; | |
400 | ||
401 | err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG, | |
402 | GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op] | |
403 | .ps_reg); | |
404 | if (err < 0) | |
405 | return err; | |
406 | ||
407 | err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG, | |
408 | GP2AP020A00F_PIN_MASK, opmode_regs_settings[op] | |
409 | .led_reg); | |
410 | if (err < 0) | |
411 | return err; | |
412 | } | |
413 | ||
414 | /* Set OP_REG and apply operation mode (power on / off) */ | |
415 | err = regmap_update_bits(data->regmap, | |
416 | GP2AP020A00F_OP_REG, | |
417 | GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK | | |
418 | GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK, | |
419 | opmode_regs_settings[op].op_reg); | |
420 | if (err < 0) | |
421 | return err; | |
422 | ||
423 | data->cur_opmode = op; | |
424 | ||
425 | return 0; | |
426 | } | |
427 | ||
428 | static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data) | |
429 | { | |
430 | return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) || | |
431 | test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) || | |
432 | test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) || | |
433 | test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags); | |
434 | } | |
435 | ||
436 | static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data) | |
437 | { | |
438 | return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) || | |
439 | test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags); | |
440 | } | |
441 | ||
442 | static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data, | |
443 | enum gp2ap020a00f_thresh_val_id th_val_id, | |
444 | bool enable) | |
445 | { | |
446 | __le16 thresh_buf = 0; | |
447 | unsigned int thresh_reg_val; | |
448 | ||
449 | if (!enable) | |
450 | thresh_reg_val = 0; | |
451 | else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) && | |
452 | th_val_id != GP2AP020A00F_THRESH_PL && | |
453 | th_val_id != GP2AP020A00F_THRESH_PH) | |
454 | /* | |
455 | * For the high lux mode ALS threshold has to be scaled down | |
456 | * to allow for proper comparison with the output value. | |
457 | */ | |
458 | thresh_reg_val = data->thresh_val[th_val_id] / 16; | |
459 | else | |
460 | thresh_reg_val = data->thresh_val[th_val_id] > 16000 ? | |
461 | 16000 : | |
462 | data->thresh_val[th_val_id]; | |
463 | ||
464 | thresh_buf = cpu_to_le16(thresh_reg_val); | |
465 | ||
466 | return regmap_bulk_write(data->regmap, | |
467 | GP2AP020A00F_THRESH_REG(th_val_id), | |
468 | (u8 *)&thresh_buf, 2); | |
469 | } | |
470 | ||
471 | static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data, | |
472 | enum gp2ap020a00f_opmode diff_mode, int add_sub) | |
473 | { | |
474 | enum gp2ap020a00f_opmode new_mode; | |
475 | ||
476 | if (diff_mode != GP2AP020A00F_OPMODE_ALS && | |
477 | diff_mode != GP2AP020A00F_OPMODE_PS) | |
478 | return -EINVAL; | |
479 | ||
480 | if (add_sub == GP2AP020A00F_ADD_MODE) { | |
481 | if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN) | |
482 | new_mode = diff_mode; | |
483 | else | |
484 | new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS; | |
485 | } else { | |
486 | if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS) | |
487 | new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ? | |
488 | GP2AP020A00F_OPMODE_PS : | |
489 | GP2AP020A00F_OPMODE_ALS; | |
490 | else | |
491 | new_mode = GP2AP020A00F_OPMODE_SHUTDOWN; | |
492 | } | |
493 | ||
494 | return gp2ap020a00f_set_operation_mode(data, new_mode); | |
495 | } | |
496 | ||
497 | static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data, | |
498 | enum gp2ap020a00f_cmd cmd) | |
499 | { | |
500 | int err = 0; | |
501 | ||
502 | switch (cmd) { | |
503 | case GP2AP020A00F_CMD_READ_RAW_CLEAR: | |
504 | if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN) | |
505 | return -EBUSY; | |
506 | err = gp2ap020a00f_set_operation_mode(data, | |
507 | GP2AP020A00F_OPMODE_READ_RAW_CLEAR); | |
508 | break; | |
509 | case GP2AP020A00F_CMD_READ_RAW_IR: | |
510 | if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN) | |
511 | return -EBUSY; | |
512 | err = gp2ap020a00f_set_operation_mode(data, | |
513 | GP2AP020A00F_OPMODE_READ_RAW_IR); | |
514 | break; | |
515 | case GP2AP020A00F_CMD_READ_RAW_PROXIMITY: | |
516 | if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN) | |
517 | return -EBUSY; | |
518 | err = gp2ap020a00f_set_operation_mode(data, | |
519 | GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY); | |
520 | break; | |
521 | case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN: | |
522 | if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT) | |
523 | return -EBUSY; | |
524 | if (!gp2ap020a00f_als_enabled(data)) | |
525 | err = gp2ap020a00f_alter_opmode(data, | |
526 | GP2AP020A00F_OPMODE_ALS, | |
527 | GP2AP020A00F_ADD_MODE); | |
528 | set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags); | |
529 | break; | |
530 | case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS: | |
531 | clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags); | |
532 | if (gp2ap020a00f_als_enabled(data)) | |
533 | break; | |
534 | err = gp2ap020a00f_alter_opmode(data, | |
535 | GP2AP020A00F_OPMODE_ALS, | |
536 | GP2AP020A00F_SUBTRACT_MODE); | |
537 | break; | |
538 | case GP2AP020A00F_CMD_TRIGGER_IR_EN: | |
539 | if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT) | |
540 | return -EBUSY; | |
541 | if (!gp2ap020a00f_als_enabled(data)) | |
542 | err = gp2ap020a00f_alter_opmode(data, | |
543 | GP2AP020A00F_OPMODE_ALS, | |
544 | GP2AP020A00F_ADD_MODE); | |
545 | set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags); | |
546 | break; | |
547 | case GP2AP020A00F_CMD_TRIGGER_IR_DIS: | |
548 | clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags); | |
549 | if (gp2ap020a00f_als_enabled(data)) | |
550 | break; | |
551 | err = gp2ap020a00f_alter_opmode(data, | |
552 | GP2AP020A00F_OPMODE_ALS, | |
553 | GP2AP020A00F_SUBTRACT_MODE); | |
554 | break; | |
555 | case GP2AP020A00F_CMD_TRIGGER_PROX_EN: | |
556 | if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT) | |
557 | return -EBUSY; | |
558 | err = gp2ap020a00f_alter_opmode(data, | |
559 | GP2AP020A00F_OPMODE_PS, | |
560 | GP2AP020A00F_ADD_MODE); | |
561 | set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags); | |
562 | break; | |
563 | case GP2AP020A00F_CMD_TRIGGER_PROX_DIS: | |
564 | clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags); | |
565 | err = gp2ap020a00f_alter_opmode(data, | |
566 | GP2AP020A00F_OPMODE_PS, | |
567 | GP2AP020A00F_SUBTRACT_MODE); | |
568 | break; | |
569 | case GP2AP020A00F_CMD_ALS_HIGH_EV_EN: | |
570 | if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) | |
571 | return 0; | |
572 | if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT) | |
573 | return -EBUSY; | |
574 | if (!gp2ap020a00f_als_enabled(data)) { | |
575 | err = gp2ap020a00f_alter_opmode(data, | |
576 | GP2AP020A00F_OPMODE_ALS, | |
577 | GP2AP020A00F_ADD_MODE); | |
578 | if (err < 0) | |
579 | return err; | |
580 | } | |
581 | set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags); | |
582 | err = gp2ap020a00f_write_event_threshold(data, | |
583 | GP2AP020A00F_THRESH_TH, true); | |
584 | break; | |
585 | case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS: | |
586 | if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) | |
587 | return 0; | |
588 | clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags); | |
589 | if (!gp2ap020a00f_als_enabled(data)) { | |
590 | err = gp2ap020a00f_alter_opmode(data, | |
591 | GP2AP020A00F_OPMODE_ALS, | |
592 | GP2AP020A00F_SUBTRACT_MODE); | |
593 | if (err < 0) | |
594 | return err; | |
595 | } | |
596 | err = gp2ap020a00f_write_event_threshold(data, | |
597 | GP2AP020A00F_THRESH_TH, false); | |
598 | break; | |
599 | case GP2AP020A00F_CMD_ALS_LOW_EV_EN: | |
600 | if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) | |
601 | return 0; | |
602 | if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT) | |
603 | return -EBUSY; | |
604 | if (!gp2ap020a00f_als_enabled(data)) { | |
605 | err = gp2ap020a00f_alter_opmode(data, | |
606 | GP2AP020A00F_OPMODE_ALS, | |
607 | GP2AP020A00F_ADD_MODE); | |
608 | if (err < 0) | |
609 | return err; | |
610 | } | |
611 | set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags); | |
612 | err = gp2ap020a00f_write_event_threshold(data, | |
613 | GP2AP020A00F_THRESH_TL, true); | |
614 | break; | |
615 | case GP2AP020A00F_CMD_ALS_LOW_EV_DIS: | |
616 | if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) | |
617 | return 0; | |
618 | clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags); | |
619 | if (!gp2ap020a00f_als_enabled(data)) { | |
620 | err = gp2ap020a00f_alter_opmode(data, | |
621 | GP2AP020A00F_OPMODE_ALS, | |
622 | GP2AP020A00F_SUBTRACT_MODE); | |
623 | if (err < 0) | |
624 | return err; | |
625 | } | |
626 | err = gp2ap020a00f_write_event_threshold(data, | |
627 | GP2AP020A00F_THRESH_TL, false); | |
628 | break; | |
629 | case GP2AP020A00F_CMD_PROX_HIGH_EV_EN: | |
630 | if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags)) | |
631 | return 0; | |
632 | if (gp2ap020a00f_als_enabled(data) || | |
633 | data->cur_opmode == GP2AP020A00F_OPMODE_PS) | |
634 | return -EBUSY; | |
635 | if (!gp2ap020a00f_prox_detect_enabled(data)) { | |
636 | err = gp2ap020a00f_set_operation_mode(data, | |
637 | GP2AP020A00F_OPMODE_PROX_DETECT); | |
638 | if (err < 0) | |
639 | return err; | |
640 | } | |
641 | set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags); | |
642 | err = gp2ap020a00f_write_event_threshold(data, | |
643 | GP2AP020A00F_THRESH_PH, true); | |
644 | break; | |
645 | case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS: | |
646 | if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags)) | |
647 | return 0; | |
648 | clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags); | |
649 | err = gp2ap020a00f_set_operation_mode(data, | |
650 | GP2AP020A00F_OPMODE_SHUTDOWN); | |
651 | if (err < 0) | |
652 | return err; | |
653 | err = gp2ap020a00f_write_event_threshold(data, | |
654 | GP2AP020A00F_THRESH_PH, false); | |
655 | break; | |
656 | case GP2AP020A00F_CMD_PROX_LOW_EV_EN: | |
657 | if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags)) | |
658 | return 0; | |
659 | if (gp2ap020a00f_als_enabled(data) || | |
660 | data->cur_opmode == GP2AP020A00F_OPMODE_PS) | |
661 | return -EBUSY; | |
662 | if (!gp2ap020a00f_prox_detect_enabled(data)) { | |
663 | err = gp2ap020a00f_set_operation_mode(data, | |
664 | GP2AP020A00F_OPMODE_PROX_DETECT); | |
665 | if (err < 0) | |
666 | return err; | |
667 | } | |
668 | set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags); | |
669 | err = gp2ap020a00f_write_event_threshold(data, | |
670 | GP2AP020A00F_THRESH_PL, true); | |
671 | break; | |
672 | case GP2AP020A00F_CMD_PROX_LOW_EV_DIS: | |
673 | if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags)) | |
674 | return 0; | |
675 | clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags); | |
676 | err = gp2ap020a00f_set_operation_mode(data, | |
677 | GP2AP020A00F_OPMODE_SHUTDOWN); | |
678 | if (err < 0) | |
679 | return err; | |
680 | err = gp2ap020a00f_write_event_threshold(data, | |
681 | GP2AP020A00F_THRESH_PL, false); | |
682 | break; | |
683 | } | |
684 | ||
685 | return err; | |
686 | } | |
687 | ||
688 | static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data) | |
689 | { | |
690 | int ret; | |
691 | ||
692 | ret = wait_event_timeout(data->data_ready_queue, | |
693 | test_bit(GP2AP020A00F_FLAG_DATA_READY, | |
694 | &data->flags), | |
695 | GP2AP020A00F_DATA_READY_TIMEOUT); | |
696 | clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags); | |
697 | ||
698 | return ret > 0 ? 0 : -ETIME; | |
699 | } | |
700 | ||
701 | static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data, | |
702 | unsigned int output_reg, int *val) | |
703 | { | |
704 | u8 reg_buf[2]; | |
705 | int err; | |
706 | ||
707 | err = wait_conversion_complete_irq(data); | |
708 | if (err < 0) | |
709 | dev_dbg(&data->client->dev, "data ready timeout\n"); | |
710 | ||
711 | err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2); | |
712 | if (err < 0) | |
713 | return err; | |
714 | ||
715 | *val = le16_to_cpup((__le16 *)reg_buf); | |
716 | ||
717 | return err; | |
718 | } | |
719 | ||
720 | static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data, | |
721 | int output_val) | |
722 | { | |
723 | u8 new_range = 0xff; | |
724 | int err; | |
725 | ||
726 | if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) { | |
727 | if (output_val > 16000) { | |
728 | set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags); | |
729 | new_range = GP2AP020A00F_RANGE_A_x128; | |
730 | } | |
731 | } else { | |
732 | if (output_val < 1000) { | |
733 | clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags); | |
734 | new_range = GP2AP020A00F_RANGE_A_x8; | |
735 | } | |
736 | } | |
737 | ||
738 | if (new_range != 0xff) { | |
739 | /* Clear als threshold registers to avoid spurious | |
740 | * events caused by lux mode transition. | |
741 | */ | |
742 | err = gp2ap020a00f_write_event_threshold(data, | |
743 | GP2AP020A00F_THRESH_TH, false); | |
744 | if (err < 0) { | |
745 | dev_err(&data->client->dev, | |
746 | "Clearing als threshold register failed.\n"); | |
747 | return false; | |
748 | } | |
749 | ||
750 | err = gp2ap020a00f_write_event_threshold(data, | |
751 | GP2AP020A00F_THRESH_TL, false); | |
752 | if (err < 0) { | |
753 | dev_err(&data->client->dev, | |
754 | "Clearing als threshold register failed.\n"); | |
755 | return false; | |
756 | } | |
757 | ||
758 | /* Change lux mode */ | |
759 | err = regmap_update_bits(data->regmap, | |
760 | GP2AP020A00F_OP_REG, | |
761 | GP2AP020A00F_OP3_MASK, | |
762 | GP2AP020A00F_OP3_SHUTDOWN); | |
763 | ||
764 | if (err < 0) { | |
765 | dev_err(&data->client->dev, | |
766 | "Shutting down the device failed.\n"); | |
767 | return false; | |
768 | } | |
769 | ||
770 | err = regmap_update_bits(data->regmap, | |
771 | GP2AP020A00F_ALS_REG, | |
772 | GP2AP020A00F_RANGE_A_MASK, | |
773 | new_range); | |
774 | ||
775 | if (err < 0) { | |
776 | dev_err(&data->client->dev, | |
777 | "Adjusting device lux mode failed.\n"); | |
778 | return false; | |
779 | } | |
780 | ||
781 | err = regmap_update_bits(data->regmap, | |
782 | GP2AP020A00F_OP_REG, | |
783 | GP2AP020A00F_OP3_MASK, | |
784 | GP2AP020A00F_OP3_OPERATION); | |
785 | ||
786 | if (err < 0) { | |
787 | dev_err(&data->client->dev, | |
788 | "Powering up the device failed.\n"); | |
789 | return false; | |
790 | } | |
791 | ||
792 | /* Adjust als threshold register values to the new lux mode */ | |
793 | if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) { | |
794 | err = gp2ap020a00f_write_event_threshold(data, | |
795 | GP2AP020A00F_THRESH_TH, true); | |
796 | if (err < 0) { | |
797 | dev_err(&data->client->dev, | |
798 | "Adjusting als threshold value failed.\n"); | |
799 | return false; | |
800 | } | |
801 | } | |
802 | ||
803 | if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) { | |
804 | err = gp2ap020a00f_write_event_threshold(data, | |
805 | GP2AP020A00F_THRESH_TL, true); | |
806 | if (err < 0) { | |
807 | dev_err(&data->client->dev, | |
808 | "Adjusting als threshold value failed.\n"); | |
809 | return false; | |
810 | } | |
811 | } | |
812 | ||
813 | return true; | |
814 | } | |
815 | ||
816 | return false; | |
817 | } | |
818 | ||
819 | static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data, | |
820 | int *output_val) | |
821 | { | |
822 | if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) | |
823 | *output_val *= 16; | |
824 | } | |
825 | ||
826 | static void gp2ap020a00f_iio_trigger_work(struct irq_work *work) | |
827 | { | |
828 | struct gp2ap020a00f_data *data = | |
829 | container_of(work, struct gp2ap020a00f_data, work); | |
830 | ||
398fd22b | 831 | iio_trigger_poll(data->trig); |
bf29fbea JA |
832 | } |
833 | ||
834 | static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data) | |
835 | { | |
836 | struct iio_dev *indio_dev = data; | |
837 | struct gp2ap020a00f_data *priv = iio_priv(indio_dev); | |
838 | unsigned int op_reg_val; | |
839 | int ret; | |
840 | ||
841 | /* Read interrupt flags */ | |
842 | ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val); | |
843 | if (ret < 0) | |
844 | return IRQ_HANDLED; | |
845 | ||
846 | if (gp2ap020a00f_prox_detect_enabled(priv)) { | |
847 | if (op_reg_val & GP2AP020A00F_PROX_DETECT) { | |
848 | iio_push_event(indio_dev, | |
849 | IIO_UNMOD_EVENT_CODE( | |
850 | IIO_PROXIMITY, | |
851 | GP2AP020A00F_SCAN_MODE_PROXIMITY, | |
852 | IIO_EV_TYPE_ROC, | |
853 | IIO_EV_DIR_RISING), | |
bc2b7dab | 854 | iio_get_time_ns(indio_dev)); |
bf29fbea JA |
855 | } else { |
856 | iio_push_event(indio_dev, | |
857 | IIO_UNMOD_EVENT_CODE( | |
858 | IIO_PROXIMITY, | |
859 | GP2AP020A00F_SCAN_MODE_PROXIMITY, | |
860 | IIO_EV_TYPE_ROC, | |
861 | IIO_EV_DIR_FALLING), | |
bc2b7dab | 862 | iio_get_time_ns(indio_dev)); |
bf29fbea JA |
863 | } |
864 | } | |
865 | ||
866 | return IRQ_HANDLED; | |
867 | } | |
868 | ||
869 | static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data) | |
870 | { | |
871 | struct iio_dev *indio_dev = data; | |
872 | struct gp2ap020a00f_data *priv = iio_priv(indio_dev); | |
873 | u8 op_reg_flags, d0_reg_buf[2]; | |
874 | unsigned int output_val, op_reg_val; | |
875 | int thresh_val_id, ret; | |
876 | ||
877 | /* Read interrupt flags */ | |
878 | ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, | |
879 | &op_reg_val); | |
880 | if (ret < 0) | |
881 | goto done; | |
882 | ||
883 | op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P | |
884 | | GP2AP020A00F_PROX_DETECT); | |
885 | ||
886 | op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P | |
887 | & ~GP2AP020A00F_PROX_DETECT); | |
888 | ||
889 | /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */ | |
890 | if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) { | |
891 | ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG, | |
892 | op_reg_val); | |
893 | if (ret < 0) | |
894 | goto done; | |
895 | } | |
896 | ||
897 | if (op_reg_flags & GP2AP020A00F_FLAG_A) { | |
898 | /* Check D0 register to assess if the lux mode | |
899 | * transition is required. | |
900 | */ | |
901 | ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG, | |
902 | d0_reg_buf, 2); | |
903 | if (ret < 0) | |
904 | goto done; | |
905 | ||
906 | output_val = le16_to_cpup((__le16 *)d0_reg_buf); | |
907 | ||
908 | if (gp2ap020a00f_adjust_lux_mode(priv, output_val)) | |
909 | goto done; | |
910 | ||
911 | gp2ap020a00f_output_to_lux(priv, &output_val); | |
912 | ||
913 | /* | |
914 | * We need to check output value to distinguish | |
915 | * between high and low ambient light threshold event. | |
916 | */ | |
917 | if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) { | |
918 | thresh_val_id = | |
919 | GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG); | |
920 | if (output_val > priv->thresh_val[thresh_val_id]) | |
921 | iio_push_event(indio_dev, | |
922 | IIO_MOD_EVENT_CODE( | |
923 | IIO_LIGHT, | |
924 | GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR, | |
925 | IIO_MOD_LIGHT_CLEAR, | |
926 | IIO_EV_TYPE_THRESH, | |
927 | IIO_EV_DIR_RISING), | |
bc2b7dab | 928 | iio_get_time_ns(indio_dev)); |
bf29fbea JA |
929 | } |
930 | ||
931 | if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) { | |
932 | thresh_val_id = | |
933 | GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG); | |
934 | if (output_val < priv->thresh_val[thresh_val_id]) | |
935 | iio_push_event(indio_dev, | |
936 | IIO_MOD_EVENT_CODE( | |
937 | IIO_LIGHT, | |
938 | GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR, | |
939 | IIO_MOD_LIGHT_CLEAR, | |
940 | IIO_EV_TYPE_THRESH, | |
941 | IIO_EV_DIR_FALLING), | |
bc2b7dab | 942 | iio_get_time_ns(indio_dev)); |
bf29fbea JA |
943 | } |
944 | } | |
945 | ||
946 | if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR || | |
947 | priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR || | |
948 | priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) { | |
949 | set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags); | |
950 | wake_up(&priv->data_ready_queue); | |
951 | goto done; | |
952 | } | |
953 | ||
954 | if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) || | |
955 | test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) || | |
956 | test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags)) | |
957 | /* This fires off the trigger. */ | |
958 | irq_work_queue(&priv->work); | |
959 | ||
960 | done: | |
961 | return IRQ_HANDLED; | |
962 | } | |
963 | ||
964 | static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data) | |
965 | { | |
966 | struct iio_poll_func *pf = data; | |
967 | struct iio_dev *indio_dev = pf->indio_dev; | |
968 | struct gp2ap020a00f_data *priv = iio_priv(indio_dev); | |
969 | size_t d_size = 0; | |
bf29fbea JA |
970 | int i, out_val, ret; |
971 | ||
972 | for_each_set_bit(i, indio_dev->active_scan_mask, | |
973 | indio_dev->masklength) { | |
974 | ret = regmap_bulk_read(priv->regmap, | |
975 | GP2AP020A00F_DATA_REG(i), | |
976 | &priv->buffer[d_size], 2); | |
977 | if (ret < 0) | |
978 | goto done; | |
979 | ||
980 | if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR || | |
981 | i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) { | |
982 | out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]); | |
983 | gp2ap020a00f_output_to_lux(priv, &out_val); | |
9f59f970 VT |
984 | |
985 | put_unaligned_le32(out_val, &priv->buffer[d_size]); | |
bf29fbea JA |
986 | d_size += 4; |
987 | } else { | |
988 | d_size += 2; | |
989 | } | |
990 | } | |
991 | ||
3b271798 LPC |
992 | iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer, |
993 | pf->timestamp); | |
bf29fbea JA |
994 | done: |
995 | iio_trigger_notify_done(indio_dev->trig); | |
996 | ||
997 | return IRQ_HANDLED; | |
998 | } | |
999 | ||
5d6a25ba LPC |
1000 | static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan, |
1001 | enum iio_event_direction event_dir) | |
bf29fbea | 1002 | { |
5d6a25ba | 1003 | switch (chan->type) { |
bf29fbea JA |
1004 | case IIO_PROXIMITY: |
1005 | if (event_dir == IIO_EV_DIR_RISING) | |
1006 | return GP2AP020A00F_PH_L_REG; | |
1007 | else | |
1008 | return GP2AP020A00F_PL_L_REG; | |
1009 | case IIO_LIGHT: | |
1010 | if (event_dir == IIO_EV_DIR_RISING) | |
1011 | return GP2AP020A00F_TH_L_REG; | |
1012 | else | |
1013 | return GP2AP020A00F_TL_L_REG; | |
5d6a25ba LPC |
1014 | default: |
1015 | break; | |
bf29fbea JA |
1016 | } |
1017 | ||
1018 | return -EINVAL; | |
1019 | } | |
1020 | ||
1021 | static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev, | |
5d6a25ba LPC |
1022 | const struct iio_chan_spec *chan, |
1023 | enum iio_event_type type, | |
1024 | enum iio_event_direction dir, | |
1025 | enum iio_event_info info, | |
1026 | int val, int val2) | |
bf29fbea JA |
1027 | { |
1028 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1029 | bool event_en = false; | |
1030 | u8 thresh_val_id; | |
1031 | u8 thresh_reg_l; | |
1032 | int err = 0; | |
1033 | ||
1034 | mutex_lock(&data->lock); | |
1035 | ||
5d6a25ba | 1036 | thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir); |
bf29fbea JA |
1037 | thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l); |
1038 | ||
1039 | if (thresh_val_id > GP2AP020A00F_THRESH_PH) { | |
1040 | err = -EINVAL; | |
1041 | goto error_unlock; | |
1042 | } | |
1043 | ||
1044 | switch (thresh_reg_l) { | |
1045 | case GP2AP020A00F_TH_L_REG: | |
1046 | event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, | |
1047 | &data->flags); | |
1048 | break; | |
1049 | case GP2AP020A00F_TL_L_REG: | |
1050 | event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, | |
1051 | &data->flags); | |
1052 | break; | |
1053 | case GP2AP020A00F_PH_L_REG: | |
1054 | if (val == 0) { | |
1055 | err = -EINVAL; | |
1056 | goto error_unlock; | |
1057 | } | |
1058 | event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, | |
1059 | &data->flags); | |
1060 | break; | |
1061 | case GP2AP020A00F_PL_L_REG: | |
1062 | if (val == 0) { | |
1063 | err = -EINVAL; | |
1064 | goto error_unlock; | |
1065 | } | |
1066 | event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, | |
1067 | &data->flags); | |
1068 | break; | |
1069 | } | |
1070 | ||
1071 | data->thresh_val[thresh_val_id] = val; | |
1072 | err = gp2ap020a00f_write_event_threshold(data, thresh_val_id, | |
1073 | event_en); | |
1074 | error_unlock: | |
1075 | mutex_unlock(&data->lock); | |
1076 | ||
1077 | return err; | |
1078 | } | |
1079 | ||
1080 | static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev, | |
5d6a25ba LPC |
1081 | const struct iio_chan_spec *chan, |
1082 | enum iio_event_type type, | |
1083 | enum iio_event_direction dir, | |
1084 | enum iio_event_info info, | |
1085 | int *val, int *val2) | |
bf29fbea JA |
1086 | { |
1087 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1088 | u8 thresh_reg_l; | |
5d6a25ba | 1089 | int err = IIO_VAL_INT; |
bf29fbea JA |
1090 | |
1091 | mutex_lock(&data->lock); | |
1092 | ||
5d6a25ba | 1093 | thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir); |
bf29fbea JA |
1094 | |
1095 | if (thresh_reg_l > GP2AP020A00F_PH_L_REG) { | |
1096 | err = -EINVAL; | |
1097 | goto error_unlock; | |
1098 | } | |
1099 | ||
1100 | *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)]; | |
1101 | ||
1102 | error_unlock: | |
1103 | mutex_unlock(&data->lock); | |
1104 | ||
1105 | return err; | |
1106 | } | |
1107 | ||
1108 | static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev, | |
5d6a25ba | 1109 | int state) |
bf29fbea JA |
1110 | { |
1111 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1112 | enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev; | |
1113 | int err; | |
1114 | ||
1115 | cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN : | |
1116 | GP2AP020A00F_CMD_PROX_HIGH_EV_DIS; | |
1117 | cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN : | |
1118 | GP2AP020A00F_CMD_PROX_LOW_EV_DIS; | |
1119 | ||
1120 | /* | |
1121 | * In order to enable proximity detection feature in the device | |
1122 | * both high and low threshold registers have to be written | |
1123 | * with different values, greater than zero. | |
1124 | */ | |
1125 | if (state) { | |
1126 | if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0) | |
1127 | return -EINVAL; | |
1128 | ||
1129 | if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0) | |
1130 | return -EINVAL; | |
1131 | } | |
1132 | ||
1133 | err = gp2ap020a00f_exec_cmd(data, cmd_high_ev); | |
1134 | if (err < 0) | |
1135 | return err; | |
1136 | ||
1137 | err = gp2ap020a00f_exec_cmd(data, cmd_low_ev); | |
1138 | if (err < 0) | |
1139 | return err; | |
1140 | ||
1141 | free_irq(data->client->irq, indio_dev); | |
1142 | ||
1143 | if (state) | |
1144 | err = request_threaded_irq(data->client->irq, NULL, | |
1145 | &gp2ap020a00f_prox_sensing_handler, | |
1146 | IRQF_TRIGGER_RISING | | |
1147 | IRQF_TRIGGER_FALLING | | |
1148 | IRQF_ONESHOT, | |
1149 | "gp2ap020a00f_prox_sensing", | |
1150 | indio_dev); | |
1151 | else { | |
1152 | err = request_threaded_irq(data->client->irq, NULL, | |
1153 | &gp2ap020a00f_thresh_event_handler, | |
1154 | IRQF_TRIGGER_FALLING | | |
1155 | IRQF_ONESHOT, | |
1156 | "gp2ap020a00f_thresh_event", | |
1157 | indio_dev); | |
1158 | } | |
1159 | ||
1160 | return err; | |
1161 | } | |
1162 | ||
1163 | static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev, | |
5d6a25ba LPC |
1164 | const struct iio_chan_spec *chan, |
1165 | enum iio_event_type type, | |
1166 | enum iio_event_direction dir, | |
1167 | int state) | |
bf29fbea JA |
1168 | { |
1169 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1170 | enum gp2ap020a00f_cmd cmd; | |
1171 | int err; | |
1172 | ||
1173 | mutex_lock(&data->lock); | |
1174 | ||
5d6a25ba | 1175 | switch (chan->type) { |
bf29fbea | 1176 | case IIO_PROXIMITY: |
5d6a25ba | 1177 | err = gp2ap020a00f_write_prox_event_config(indio_dev, state); |
bf29fbea JA |
1178 | break; |
1179 | case IIO_LIGHT: | |
5d6a25ba | 1180 | if (dir == IIO_EV_DIR_RISING) { |
bf29fbea JA |
1181 | cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN : |
1182 | GP2AP020A00F_CMD_ALS_HIGH_EV_DIS; | |
1183 | err = gp2ap020a00f_exec_cmd(data, cmd); | |
1184 | } else { | |
1185 | cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN : | |
1186 | GP2AP020A00F_CMD_ALS_LOW_EV_DIS; | |
1187 | err = gp2ap020a00f_exec_cmd(data, cmd); | |
1188 | } | |
1189 | break; | |
1190 | default: | |
1191 | err = -EINVAL; | |
1192 | } | |
1193 | ||
1194 | mutex_unlock(&data->lock); | |
1195 | ||
1196 | return err; | |
1197 | } | |
1198 | ||
1199 | static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev, | |
5d6a25ba LPC |
1200 | const struct iio_chan_spec *chan, |
1201 | enum iio_event_type type, | |
1202 | enum iio_event_direction dir) | |
bf29fbea JA |
1203 | { |
1204 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1205 | int event_en = 0; | |
1206 | ||
1207 | mutex_lock(&data->lock); | |
1208 | ||
5d6a25ba | 1209 | switch (chan->type) { |
bf29fbea | 1210 | case IIO_PROXIMITY: |
5d6a25ba | 1211 | if (dir == IIO_EV_DIR_RISING) |
bf29fbea JA |
1212 | event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, |
1213 | &data->flags); | |
1214 | else | |
1215 | event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, | |
1216 | &data->flags); | |
1217 | break; | |
1218 | case IIO_LIGHT: | |
5d6a25ba | 1219 | if (dir == IIO_EV_DIR_RISING) |
bf29fbea JA |
1220 | event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, |
1221 | &data->flags); | |
1222 | else | |
1223 | event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, | |
1224 | &data->flags); | |
1225 | break; | |
5d6a25ba LPC |
1226 | default: |
1227 | event_en = -EINVAL; | |
1228 | break; | |
bf29fbea JA |
1229 | } |
1230 | ||
1231 | mutex_unlock(&data->lock); | |
1232 | ||
1233 | return event_en; | |
1234 | } | |
1235 | ||
1236 | static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data, | |
1237 | struct iio_chan_spec const *chan, int *val) | |
1238 | { | |
1239 | enum gp2ap020a00f_cmd cmd; | |
1240 | int err; | |
1241 | ||
1242 | switch (chan->scan_index) { | |
1243 | case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR: | |
1244 | cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR; | |
1245 | break; | |
1246 | case GP2AP020A00F_SCAN_MODE_LIGHT_IR: | |
1247 | cmd = GP2AP020A00F_CMD_READ_RAW_IR; | |
1248 | break; | |
1249 | case GP2AP020A00F_SCAN_MODE_PROXIMITY: | |
1250 | cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY; | |
1251 | break; | |
1252 | default: | |
1253 | return -EINVAL; | |
1254 | } | |
1255 | ||
1256 | err = gp2ap020a00f_exec_cmd(data, cmd); | |
1257 | if (err < 0) { | |
1258 | dev_err(&data->client->dev, | |
1259 | "gp2ap020a00f_exec_cmd failed\n"); | |
1260 | goto error_ret; | |
1261 | } | |
1262 | ||
1263 | err = gp2ap020a00f_read_output(data, chan->address, val); | |
1264 | if (err < 0) | |
1265 | dev_err(&data->client->dev, | |
1266 | "gp2ap020a00f_read_output failed\n"); | |
1267 | ||
1268 | err = gp2ap020a00f_set_operation_mode(data, | |
1269 | GP2AP020A00F_OPMODE_SHUTDOWN); | |
1270 | if (err < 0) | |
1271 | dev_err(&data->client->dev, | |
1272 | "Failed to shut down the device.\n"); | |
1273 | ||
1274 | if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR || | |
1275 | cmd == GP2AP020A00F_CMD_READ_RAW_IR) | |
1276 | gp2ap020a00f_output_to_lux(data, val); | |
1277 | ||
1278 | error_ret: | |
1279 | return err; | |
1280 | } | |
1281 | ||
1282 | static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev, | |
1283 | struct iio_chan_spec const *chan, | |
1284 | int *val, int *val2, | |
1285 | long mask) | |
1286 | { | |
1287 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1288 | int err = -EINVAL; | |
1289 | ||
dfc07df0 AS |
1290 | if (mask == IIO_CHAN_INFO_RAW) { |
1291 | err = iio_device_claim_direct_mode(indio_dev); | |
1292 | if (err) | |
1293 | return err; | |
bf29fbea JA |
1294 | |
1295 | err = gp2ap020a00f_read_channel(data, chan, val); | |
dfc07df0 | 1296 | iio_device_release_direct_mode(indio_dev); |
bf29fbea | 1297 | } |
bf29fbea JA |
1298 | return err < 0 ? err : IIO_VAL_INT; |
1299 | } | |
1300 | ||
5d6a25ba LPC |
1301 | static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = { |
1302 | { | |
1303 | .type = IIO_EV_TYPE_THRESH, | |
1304 | .dir = IIO_EV_DIR_RISING, | |
1305 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | | |
1306 | BIT(IIO_EV_INFO_ENABLE), | |
1307 | }, { | |
1308 | .type = IIO_EV_TYPE_THRESH, | |
1309 | .dir = IIO_EV_DIR_FALLING, | |
1310 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | | |
1311 | BIT(IIO_EV_INFO_ENABLE), | |
1312 | }, | |
1313 | }; | |
1314 | ||
1315 | static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = { | |
1316 | { | |
1317 | .type = IIO_EV_TYPE_ROC, | |
1318 | .dir = IIO_EV_DIR_RISING, | |
1319 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | | |
1320 | BIT(IIO_EV_INFO_ENABLE), | |
1321 | }, { | |
1322 | .type = IIO_EV_TYPE_ROC, | |
1323 | .dir = IIO_EV_DIR_FALLING, | |
1324 | .mask_separate = BIT(IIO_EV_INFO_VALUE) | | |
1325 | BIT(IIO_EV_INFO_ENABLE), | |
1326 | }, | |
1327 | }; | |
1328 | ||
bf29fbea JA |
1329 | static const struct iio_chan_spec gp2ap020a00f_channels[] = { |
1330 | { | |
1331 | .type = IIO_LIGHT, | |
1332 | .channel2 = IIO_MOD_LIGHT_CLEAR, | |
1333 | .modified = 1, | |
1334 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | |
1335 | .scan_type = { | |
1336 | .sign = 'u', | |
1337 | .realbits = 24, | |
1338 | .shift = 0, | |
1339 | .storagebits = 32, | |
1340 | .endianness = IIO_LE, | |
1341 | }, | |
1342 | .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR, | |
1343 | .address = GP2AP020A00F_D0_L_REG, | |
5d6a25ba LPC |
1344 | .event_spec = gp2ap020a00f_event_spec_light, |
1345 | .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light), | |
bf29fbea JA |
1346 | }, |
1347 | { | |
1348 | .type = IIO_LIGHT, | |
1349 | .channel2 = IIO_MOD_LIGHT_IR, | |
1350 | .modified = 1, | |
1351 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | |
1352 | .scan_type = { | |
1353 | .sign = 'u', | |
1354 | .realbits = 24, | |
1355 | .shift = 0, | |
1356 | .storagebits = 32, | |
1357 | .endianness = IIO_LE, | |
1358 | }, | |
1359 | .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR, | |
1360 | .address = GP2AP020A00F_D1_L_REG, | |
1361 | }, | |
1362 | { | |
1363 | .type = IIO_PROXIMITY, | |
1364 | .modified = 0, | |
1365 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), | |
1366 | .scan_type = { | |
1367 | .sign = 'u', | |
1368 | .realbits = 16, | |
1369 | .shift = 0, | |
1370 | .storagebits = 16, | |
1371 | .endianness = IIO_LE, | |
1372 | }, | |
1373 | .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY, | |
1374 | .address = GP2AP020A00F_D2_L_REG, | |
5d6a25ba LPC |
1375 | .event_spec = gp2ap020a00f_event_spec_prox, |
1376 | .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox), | |
bf29fbea JA |
1377 | }, |
1378 | IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP), | |
1379 | }; | |
1380 | ||
1381 | static const struct iio_info gp2ap020a00f_info = { | |
1382 | .read_raw = &gp2ap020a00f_read_raw, | |
cb955852 LPC |
1383 | .read_event_value = &gp2ap020a00f_read_event_val, |
1384 | .read_event_config = &gp2ap020a00f_read_event_config, | |
1385 | .write_event_value = &gp2ap020a00f_write_event_val, | |
1386 | .write_event_config = &gp2ap020a00f_write_event_config, | |
bf29fbea JA |
1387 | }; |
1388 | ||
1389 | static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev) | |
1390 | { | |
1391 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1392 | int i, err = 0; | |
1393 | ||
1394 | mutex_lock(&data->lock); | |
1395 | ||
1396 | /* | |
1397 | * Enable triggers according to the scan_mask. Enabling either | |
1398 | * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS | |
1399 | * module in the device, which generates samples in both D0 (clear) | |
1400 | * and D1 (ir) registers. As the two registers are bound to the | |
1401 | * two separate IIO channels they are treated in the driver logic | |
1402 | * as if they were controlled independently. | |
1403 | */ | |
1404 | for_each_set_bit(i, indio_dev->active_scan_mask, | |
1405 | indio_dev->masklength) { | |
1406 | switch (i) { | |
1407 | case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR: | |
1408 | err = gp2ap020a00f_exec_cmd(data, | |
1409 | GP2AP020A00F_CMD_TRIGGER_CLEAR_EN); | |
1410 | break; | |
1411 | case GP2AP020A00F_SCAN_MODE_LIGHT_IR: | |
1412 | err = gp2ap020a00f_exec_cmd(data, | |
1413 | GP2AP020A00F_CMD_TRIGGER_IR_EN); | |
1414 | break; | |
1415 | case GP2AP020A00F_SCAN_MODE_PROXIMITY: | |
1416 | err = gp2ap020a00f_exec_cmd(data, | |
1417 | GP2AP020A00F_CMD_TRIGGER_PROX_EN); | |
1418 | break; | |
1419 | } | |
1420 | } | |
1421 | ||
1422 | if (err < 0) | |
1423 | goto error_unlock; | |
1424 | ||
1425 | data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL); | |
1426 | if (!data->buffer) { | |
1427 | err = -ENOMEM; | |
1428 | goto error_unlock; | |
1429 | } | |
1430 | ||
1431 | err = iio_triggered_buffer_postenable(indio_dev); | |
1432 | ||
1433 | error_unlock: | |
1434 | mutex_unlock(&data->lock); | |
1435 | ||
1436 | return err; | |
1437 | } | |
1438 | ||
1439 | static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev) | |
1440 | { | |
1441 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1442 | int i, err; | |
1443 | ||
1444 | mutex_lock(&data->lock); | |
1445 | ||
1446 | err = iio_triggered_buffer_predisable(indio_dev); | |
1447 | if (err < 0) | |
1448 | goto error_unlock; | |
1449 | ||
1450 | for_each_set_bit(i, indio_dev->active_scan_mask, | |
1451 | indio_dev->masklength) { | |
1452 | switch (i) { | |
1453 | case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR: | |
1454 | err = gp2ap020a00f_exec_cmd(data, | |
1455 | GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS); | |
1456 | break; | |
1457 | case GP2AP020A00F_SCAN_MODE_LIGHT_IR: | |
1458 | err = gp2ap020a00f_exec_cmd(data, | |
1459 | GP2AP020A00F_CMD_TRIGGER_IR_DIS); | |
1460 | break; | |
1461 | case GP2AP020A00F_SCAN_MODE_PROXIMITY: | |
1462 | err = gp2ap020a00f_exec_cmd(data, | |
1463 | GP2AP020A00F_CMD_TRIGGER_PROX_DIS); | |
1464 | break; | |
1465 | } | |
1466 | } | |
1467 | ||
1468 | if (err == 0) | |
1469 | kfree(data->buffer); | |
1470 | ||
1471 | error_unlock: | |
1472 | mutex_unlock(&data->lock); | |
1473 | ||
1474 | return err; | |
1475 | } | |
1476 | ||
1477 | static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = { | |
bf29fbea JA |
1478 | .postenable = &gp2ap020a00f_buffer_postenable, |
1479 | .predisable = &gp2ap020a00f_buffer_predisable, | |
1480 | }; | |
1481 | ||
1482 | static const struct iio_trigger_ops gp2ap020a00f_trigger_ops = { | |
bf29fbea JA |
1483 | }; |
1484 | ||
1485 | static int gp2ap020a00f_probe(struct i2c_client *client, | |
1486 | const struct i2c_device_id *id) | |
1487 | { | |
1488 | struct gp2ap020a00f_data *data; | |
1489 | struct iio_dev *indio_dev; | |
1490 | struct regmap *regmap; | |
1491 | int err; | |
1492 | ||
1493 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); | |
1494 | if (!indio_dev) | |
1495 | return -ENOMEM; | |
1496 | ||
1497 | data = iio_priv(indio_dev); | |
1498 | ||
1499 | data->vled_reg = devm_regulator_get(&client->dev, "vled"); | |
1500 | if (IS_ERR(data->vled_reg)) | |
1501 | return PTR_ERR(data->vled_reg); | |
1502 | ||
1503 | err = regulator_enable(data->vled_reg); | |
1504 | if (err) | |
1505 | return err; | |
1506 | ||
1507 | regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config); | |
1508 | if (IS_ERR(regmap)) { | |
1509 | dev_err(&client->dev, "Regmap initialization failed.\n"); | |
1510 | err = PTR_ERR(regmap); | |
1511 | goto error_regulator_disable; | |
1512 | } | |
1513 | ||
1514 | /* Initialize device registers */ | |
1515 | err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG, | |
1516 | gp2ap020a00f_reg_init_tab, | |
1517 | ARRAY_SIZE(gp2ap020a00f_reg_init_tab)); | |
1518 | ||
1519 | if (err < 0) { | |
1520 | dev_err(&client->dev, "Device initialization failed.\n"); | |
1521 | goto error_regulator_disable; | |
1522 | } | |
1523 | ||
1524 | i2c_set_clientdata(client, indio_dev); | |
1525 | ||
1526 | data->client = client; | |
1527 | data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN; | |
1528 | data->regmap = regmap; | |
1529 | init_waitqueue_head(&data->data_ready_queue); | |
1530 | ||
1531 | mutex_init(&data->lock); | |
1532 | indio_dev->dev.parent = &client->dev; | |
1533 | indio_dev->channels = gp2ap020a00f_channels; | |
1534 | indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels); | |
1535 | indio_dev->info = &gp2ap020a00f_info; | |
1536 | indio_dev->name = id->name; | |
1537 | indio_dev->modes = INDIO_DIRECT_MODE; | |
1538 | ||
1539 | /* Allocate buffer */ | |
1540 | err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, | |
1541 | &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops); | |
1542 | if (err < 0) | |
1543 | goto error_regulator_disable; | |
1544 | ||
1545 | /* Allocate trigger */ | |
1546 | data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger", | |
1547 | indio_dev->name); | |
1548 | if (data->trig == NULL) { | |
1549 | err = -ENOMEM; | |
1550 | dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n"); | |
1551 | goto error_uninit_buffer; | |
1552 | } | |
1553 | ||
1554 | /* This needs to be requested here for read_raw calls to work. */ | |
1555 | err = request_threaded_irq(client->irq, NULL, | |
1556 | &gp2ap020a00f_thresh_event_handler, | |
1557 | IRQF_TRIGGER_FALLING | | |
1558 | IRQF_ONESHOT, | |
1559 | "gp2ap020a00f_als_event", | |
1560 | indio_dev); | |
1561 | if (err < 0) { | |
1562 | dev_err(&client->dev, "Irq request failed.\n"); | |
1563 | goto error_uninit_buffer; | |
1564 | } | |
1565 | ||
1566 | data->trig->ops = &gp2ap020a00f_trigger_ops; | |
1567 | data->trig->dev.parent = &data->client->dev; | |
1568 | ||
1569 | init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work); | |
1570 | ||
1571 | err = iio_trigger_register(data->trig); | |
1572 | if (err < 0) { | |
1573 | dev_err(&client->dev, "Failed to register iio trigger.\n"); | |
1574 | goto error_free_irq; | |
1575 | } | |
1576 | ||
1577 | err = iio_device_register(indio_dev); | |
1578 | if (err < 0) | |
1579 | goto error_trigger_unregister; | |
1580 | ||
1581 | return 0; | |
1582 | ||
1583 | error_trigger_unregister: | |
1584 | iio_trigger_unregister(data->trig); | |
1585 | error_free_irq: | |
1586 | free_irq(client->irq, indio_dev); | |
1587 | error_uninit_buffer: | |
1588 | iio_triggered_buffer_cleanup(indio_dev); | |
1589 | error_regulator_disable: | |
1590 | regulator_disable(data->vled_reg); | |
1591 | ||
1592 | return err; | |
1593 | } | |
1594 | ||
1595 | static int gp2ap020a00f_remove(struct i2c_client *client) | |
1596 | { | |
1597 | struct iio_dev *indio_dev = i2c_get_clientdata(client); | |
1598 | struct gp2ap020a00f_data *data = iio_priv(indio_dev); | |
1599 | int err; | |
1600 | ||
1601 | err = gp2ap020a00f_set_operation_mode(data, | |
1602 | GP2AP020A00F_OPMODE_SHUTDOWN); | |
1603 | if (err < 0) | |
1604 | dev_err(&indio_dev->dev, "Failed to power off the device.\n"); | |
1605 | ||
1606 | iio_device_unregister(indio_dev); | |
1607 | iio_trigger_unregister(data->trig); | |
1608 | free_irq(client->irq, indio_dev); | |
1609 | iio_triggered_buffer_cleanup(indio_dev); | |
1610 | regulator_disable(data->vled_reg); | |
1611 | ||
1612 | return 0; | |
1613 | } | |
1614 | ||
1615 | static const struct i2c_device_id gp2ap020a00f_id[] = { | |
1616 | { GP2A_I2C_NAME, 0 }, | |
1617 | { } | |
1618 | }; | |
1619 | ||
1620 | MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id); | |
1621 | ||
1622 | #ifdef CONFIG_OF | |
1623 | static const struct of_device_id gp2ap020a00f_of_match[] = { | |
1624 | { .compatible = "sharp,gp2ap020a00f" }, | |
1625 | { } | |
1626 | }; | |
119c4fce | 1627 | MODULE_DEVICE_TABLE(of, gp2ap020a00f_of_match); |
bf29fbea JA |
1628 | #endif |
1629 | ||
1630 | static struct i2c_driver gp2ap020a00f_driver = { | |
1631 | .driver = { | |
1632 | .name = GP2A_I2C_NAME, | |
1633 | .of_match_table = of_match_ptr(gp2ap020a00f_of_match), | |
bf29fbea JA |
1634 | }, |
1635 | .probe = gp2ap020a00f_probe, | |
1636 | .remove = gp2ap020a00f_remove, | |
1637 | .id_table = gp2ap020a00f_id, | |
1638 | }; | |
1639 | ||
1640 | module_i2c_driver(gp2ap020a00f_driver); | |
1641 | ||
1642 | MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>"); | |
1643 | MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver"); | |
1644 | MODULE_LICENSE("GPL v2"); |