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Commit | Line | Data |
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efa86e9f DB |
1 | /* |
2 | * RPR-0521 ROHM Ambient Light and Proximity Sensor | |
3 | * | |
4 | * Copyright (c) 2015, Intel Corporation. | |
5 | * | |
6 | * This file is subject to the terms and conditions of version 2 of | |
7 | * the GNU General Public License. See the file COPYING in the main | |
8 | * directory of this archive for more details. | |
9 | * | |
10 | * IIO driver for RPR-0521RS (7-bit I2C slave address 0x38). | |
11 | * | |
e12ffd24 | 12 | * TODO: illuminance channel |
efa86e9f DB |
13 | */ |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/regmap.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/acpi.h> | |
21 | ||
22 | #include <linux/iio/iio.h> | |
e12ffd24 MK |
23 | #include <linux/iio/buffer.h> |
24 | #include <linux/iio/trigger.h> | |
25 | #include <linux/iio/trigger_consumer.h> | |
26 | #include <linux/iio/triggered_buffer.h> | |
efa86e9f DB |
27 | #include <linux/iio/sysfs.h> |
28 | #include <linux/pm_runtime.h> | |
29 | ||
30 | #define RPR0521_REG_SYSTEM_CTRL 0x40 | |
31 | #define RPR0521_REG_MODE_CTRL 0x41 | |
32 | #define RPR0521_REG_ALS_CTRL 0x42 | |
33 | #define RPR0521_REG_PXS_CTRL 0x43 | |
34 | #define RPR0521_REG_PXS_DATA 0x44 /* 16-bit, little endian */ | |
35 | #define RPR0521_REG_ALS_DATA0 0x46 /* 16-bit, little endian */ | |
36 | #define RPR0521_REG_ALS_DATA1 0x48 /* 16-bit, little endian */ | |
e12ffd24 | 37 | #define RPR0521_REG_INTERRUPT 0x4A |
734c4423 | 38 | #define RPR0521_REG_PS_OFFSET_LSB 0x53 |
efa86e9f DB |
39 | #define RPR0521_REG_ID 0x92 |
40 | ||
41 | #define RPR0521_MODE_ALS_MASK BIT(7) | |
42 | #define RPR0521_MODE_PXS_MASK BIT(6) | |
43 | #define RPR0521_MODE_MEAS_TIME_MASK GENMASK(3, 0) | |
44 | #define RPR0521_ALS_DATA0_GAIN_MASK GENMASK(5, 4) | |
45 | #define RPR0521_ALS_DATA0_GAIN_SHIFT 4 | |
46 | #define RPR0521_ALS_DATA1_GAIN_MASK GENMASK(3, 2) | |
47 | #define RPR0521_ALS_DATA1_GAIN_SHIFT 2 | |
48 | #define RPR0521_PXS_GAIN_MASK GENMASK(5, 4) | |
49 | #define RPR0521_PXS_GAIN_SHIFT 4 | |
e12ffd24 MK |
50 | #define RPR0521_PXS_PERSISTENCE_MASK GENMASK(3, 0) |
51 | #define RPR0521_INTERRUPT_INT_TRIG_PS_MASK BIT(0) | |
52 | #define RPR0521_INTERRUPT_INT_TRIG_ALS_MASK BIT(1) | |
53 | #define RPR0521_INTERRUPT_INT_REASSERT_MASK BIT(3) | |
54 | #define RPR0521_INTERRUPT_ALS_INT_STATUS_MASK BIT(6) | |
55 | #define RPR0521_INTERRUPT_PS_INT_STATUS_MASK BIT(7) | |
efa86e9f DB |
56 | |
57 | #define RPR0521_MODE_ALS_ENABLE BIT(7) | |
58 | #define RPR0521_MODE_ALS_DISABLE 0x00 | |
59 | #define RPR0521_MODE_PXS_ENABLE BIT(6) | |
60 | #define RPR0521_MODE_PXS_DISABLE 0x00 | |
e12ffd24 MK |
61 | #define RPR0521_PXS_PERSISTENCE_DRDY 0x00 |
62 | ||
63 | #define RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE BIT(0) | |
64 | #define RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE 0x00 | |
65 | #define RPR0521_INTERRUPT_INT_TRIG_ALS_ENABLE BIT(1) | |
66 | #define RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE 0x00 | |
67 | #define RPR0521_INTERRUPT_INT_REASSERT_ENABLE BIT(3) | |
68 | #define RPR0521_INTERRUPT_INT_REASSERT_DISABLE 0x00 | |
efa86e9f DB |
69 | |
70 | #define RPR0521_MANUFACT_ID 0xE0 | |
71 | #define RPR0521_DEFAULT_MEAS_TIME 0x06 /* ALS - 100ms, PXS - 100ms */ | |
72 | ||
73 | #define RPR0521_DRV_NAME "RPR0521" | |
e12ffd24 | 74 | #define RPR0521_IRQ_NAME "rpr0521_event" |
efa86e9f DB |
75 | #define RPR0521_REGMAP_NAME "rpr0521_regmap" |
76 | ||
77 | #define RPR0521_SLEEP_DELAY_MS 2000 | |
78 | ||
79 | #define RPR0521_ALS_SCALE_AVAIL "0.007812 0.015625 0.5 1" | |
80 | #define RPR0521_PXS_SCALE_AVAIL "0.125 0.5 1" | |
81 | ||
82 | struct rpr0521_gain { | |
83 | int scale; | |
84 | int uscale; | |
85 | }; | |
86 | ||
87 | static const struct rpr0521_gain rpr0521_als_gain[4] = { | |
88 | {1, 0}, /* x1 */ | |
89 | {0, 500000}, /* x2 */ | |
90 | {0, 15625}, /* x64 */ | |
91 | {0, 7812}, /* x128 */ | |
92 | }; | |
93 | ||
94 | static const struct rpr0521_gain rpr0521_pxs_gain[3] = { | |
95 | {1, 0}, /* x1 */ | |
96 | {0, 500000}, /* x2 */ | |
97 | {0, 125000}, /* x4 */ | |
98 | }; | |
99 | ||
100 | enum rpr0521_channel { | |
9ece370b | 101 | RPR0521_CHAN_PXS, |
efa86e9f DB |
102 | RPR0521_CHAN_ALS_DATA0, |
103 | RPR0521_CHAN_ALS_DATA1, | |
efa86e9f DB |
104 | }; |
105 | ||
106 | struct rpr0521_reg_desc { | |
107 | u8 address; | |
108 | u8 device_mask; | |
109 | }; | |
110 | ||
111 | static const struct rpr0521_reg_desc rpr0521_data_reg[] = { | |
9ece370b MK |
112 | [RPR0521_CHAN_PXS] = { |
113 | .address = RPR0521_REG_PXS_DATA, | |
114 | .device_mask = RPR0521_MODE_PXS_MASK, | |
115 | }, | |
efa86e9f DB |
116 | [RPR0521_CHAN_ALS_DATA0] = { |
117 | .address = RPR0521_REG_ALS_DATA0, | |
118 | .device_mask = RPR0521_MODE_ALS_MASK, | |
119 | }, | |
120 | [RPR0521_CHAN_ALS_DATA1] = { | |
121 | .address = RPR0521_REG_ALS_DATA1, | |
122 | .device_mask = RPR0521_MODE_ALS_MASK, | |
123 | }, | |
efa86e9f DB |
124 | }; |
125 | ||
126 | static const struct rpr0521_gain_info { | |
127 | u8 reg; | |
128 | u8 mask; | |
129 | u8 shift; | |
130 | const struct rpr0521_gain *gain; | |
131 | int size; | |
132 | } rpr0521_gain[] = { | |
9ece370b MK |
133 | [RPR0521_CHAN_PXS] = { |
134 | .reg = RPR0521_REG_PXS_CTRL, | |
135 | .mask = RPR0521_PXS_GAIN_MASK, | |
136 | .shift = RPR0521_PXS_GAIN_SHIFT, | |
137 | .gain = rpr0521_pxs_gain, | |
138 | .size = ARRAY_SIZE(rpr0521_pxs_gain), | |
139 | }, | |
efa86e9f DB |
140 | [RPR0521_CHAN_ALS_DATA0] = { |
141 | .reg = RPR0521_REG_ALS_CTRL, | |
142 | .mask = RPR0521_ALS_DATA0_GAIN_MASK, | |
143 | .shift = RPR0521_ALS_DATA0_GAIN_SHIFT, | |
144 | .gain = rpr0521_als_gain, | |
145 | .size = ARRAY_SIZE(rpr0521_als_gain), | |
146 | }, | |
147 | [RPR0521_CHAN_ALS_DATA1] = { | |
148 | .reg = RPR0521_REG_ALS_CTRL, | |
149 | .mask = RPR0521_ALS_DATA1_GAIN_MASK, | |
150 | .shift = RPR0521_ALS_DATA1_GAIN_SHIFT, | |
151 | .gain = rpr0521_als_gain, | |
152 | .size = ARRAY_SIZE(rpr0521_als_gain), | |
153 | }, | |
efa86e9f DB |
154 | }; |
155 | ||
c91a88ef MK |
156 | struct rpr0521_samp_freq { |
157 | int als_hz; | |
158 | int als_uhz; | |
159 | int pxs_hz; | |
160 | int pxs_uhz; | |
161 | }; | |
162 | ||
163 | static const struct rpr0521_samp_freq rpr0521_samp_freq_i[13] = { | |
164 | /* {ALS, PXS}, W==currently writable option */ | |
165 | {0, 0, 0, 0}, /* W0000, 0=standby */ | |
166 | {0, 0, 100, 0}, /* 0001 */ | |
167 | {0, 0, 25, 0}, /* 0010 */ | |
168 | {0, 0, 10, 0}, /* 0011 */ | |
169 | {0, 0, 2, 500000}, /* 0100 */ | |
170 | {10, 0, 20, 0}, /* 0101 */ | |
171 | {10, 0, 10, 0}, /* W0110 */ | |
172 | {10, 0, 2, 500000}, /* 0111 */ | |
173 | {2, 500000, 20, 0}, /* 1000, measurement 100ms, sleep 300ms */ | |
174 | {2, 500000, 10, 0}, /* 1001, measurement 100ms, sleep 300ms */ | |
175 | {2, 500000, 0, 0}, /* 1010, high sensitivity mode */ | |
176 | {2, 500000, 2, 500000}, /* W1011, high sensitivity mode */ | |
177 | {20, 0, 20, 0} /* 1100, ALS_data x 0.5, see specification P.18 */ | |
178 | }; | |
179 | ||
efa86e9f DB |
180 | struct rpr0521_data { |
181 | struct i2c_client *client; | |
182 | ||
183 | /* protect device params updates (e.g state, gain) */ | |
184 | struct mutex lock; | |
185 | ||
186 | /* device active status */ | |
187 | bool als_dev_en; | |
188 | bool pxs_dev_en; | |
189 | ||
e12ffd24 MK |
190 | struct iio_trigger *drdy_trigger0; |
191 | s64 irq_timestamp; | |
192 | ||
484c314b | 193 | /* optimize runtime pm ops - enable/disable device only if needed */ |
efa86e9f DB |
194 | bool als_ps_need_en; |
195 | bool pxs_ps_need_en; | |
484c314b MK |
196 | bool als_need_dis; |
197 | bool pxs_need_dis; | |
efa86e9f DB |
198 | |
199 | struct regmap *regmap; | |
200 | }; | |
201 | ||
202 | static IIO_CONST_ATTR(in_intensity_scale_available, RPR0521_ALS_SCALE_AVAIL); | |
203 | static IIO_CONST_ATTR(in_proximity_scale_available, RPR0521_PXS_SCALE_AVAIL); | |
204 | ||
c91a88ef MK |
205 | /* |
206 | * Start with easy freq first, whole table of freq combinations is more | |
207 | * complicated. | |
208 | */ | |
209 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("2.5 10"); | |
210 | ||
efa86e9f DB |
211 | static struct attribute *rpr0521_attributes[] = { |
212 | &iio_const_attr_in_intensity_scale_available.dev_attr.attr, | |
213 | &iio_const_attr_in_proximity_scale_available.dev_attr.attr, | |
c91a88ef | 214 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, |
efa86e9f DB |
215 | NULL, |
216 | }; | |
217 | ||
218 | static const struct attribute_group rpr0521_attribute_group = { | |
219 | .attrs = rpr0521_attributes, | |
220 | }; | |
221 | ||
e12ffd24 MK |
222 | /* Order of the channel data in buffer */ |
223 | enum rpr0521_scan_index_order { | |
224 | RPR0521_CHAN_INDEX_PXS, | |
225 | RPR0521_CHAN_INDEX_BOTH, | |
226 | RPR0521_CHAN_INDEX_IR, | |
227 | }; | |
228 | ||
229 | static const unsigned long rpr0521_available_scan_masks[] = { | |
230 | BIT(RPR0521_CHAN_INDEX_PXS) | BIT(RPR0521_CHAN_INDEX_BOTH) | | |
231 | BIT(RPR0521_CHAN_INDEX_IR), | |
232 | 0 | |
233 | }; | |
234 | ||
efa86e9f | 235 | static const struct iio_chan_spec rpr0521_channels[] = { |
9ece370b MK |
236 | { |
237 | .type = IIO_PROXIMITY, | |
238 | .address = RPR0521_CHAN_PXS, | |
239 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | | |
240 | BIT(IIO_CHAN_INFO_OFFSET) | | |
241 | BIT(IIO_CHAN_INFO_SCALE), | |
242 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), | |
e12ffd24 MK |
243 | .scan_index = RPR0521_CHAN_INDEX_PXS, |
244 | .scan_type = { | |
245 | .sign = 'u', | |
246 | .realbits = 16, | |
247 | .storagebits = 16, | |
248 | .endianness = IIO_LE, | |
249 | }, | |
9ece370b | 250 | }, |
efa86e9f DB |
251 | { |
252 | .type = IIO_INTENSITY, | |
253 | .modified = 1, | |
254 | .address = RPR0521_CHAN_ALS_DATA0, | |
255 | .channel2 = IIO_MOD_LIGHT_BOTH, | |
256 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | | |
257 | BIT(IIO_CHAN_INFO_SCALE), | |
c91a88ef | 258 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), |
e12ffd24 MK |
259 | .scan_index = RPR0521_CHAN_INDEX_BOTH, |
260 | .scan_type = { | |
261 | .sign = 'u', | |
262 | .realbits = 16, | |
263 | .storagebits = 16, | |
264 | .endianness = IIO_LE, | |
265 | }, | |
efa86e9f DB |
266 | }, |
267 | { | |
268 | .type = IIO_INTENSITY, | |
269 | .modified = 1, | |
270 | .address = RPR0521_CHAN_ALS_DATA1, | |
271 | .channel2 = IIO_MOD_LIGHT_IR, | |
272 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | | |
273 | BIT(IIO_CHAN_INFO_SCALE), | |
c91a88ef | 274 | .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), |
e12ffd24 MK |
275 | .scan_index = RPR0521_CHAN_INDEX_IR, |
276 | .scan_type = { | |
277 | .sign = 'u', | |
278 | .realbits = 16, | |
279 | .storagebits = 16, | |
280 | .endianness = IIO_LE, | |
281 | }, | |
efa86e9f | 282 | }, |
efa86e9f DB |
283 | }; |
284 | ||
285 | static int rpr0521_als_enable(struct rpr0521_data *data, u8 status) | |
286 | { | |
287 | int ret; | |
288 | ||
289 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, | |
290 | RPR0521_MODE_ALS_MASK, | |
291 | status); | |
292 | if (ret < 0) | |
293 | return ret; | |
294 | ||
f87fa261 MK |
295 | if (status & RPR0521_MODE_ALS_MASK) |
296 | data->als_dev_en = true; | |
297 | else | |
298 | data->als_dev_en = false; | |
efa86e9f DB |
299 | |
300 | return 0; | |
301 | } | |
302 | ||
303 | static int rpr0521_pxs_enable(struct rpr0521_data *data, u8 status) | |
304 | { | |
305 | int ret; | |
306 | ||
307 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, | |
308 | RPR0521_MODE_PXS_MASK, | |
309 | status); | |
310 | if (ret < 0) | |
311 | return ret; | |
312 | ||
f87fa261 MK |
313 | if (status & RPR0521_MODE_PXS_MASK) |
314 | data->pxs_dev_en = true; | |
315 | else | |
316 | data->pxs_dev_en = false; | |
efa86e9f DB |
317 | |
318 | return 0; | |
319 | } | |
320 | ||
321 | /** | |
322 | * rpr0521_set_power_state - handles runtime PM state and sensors enabled status | |
323 | * | |
324 | * @data: rpr0521 device private data | |
325 | * @on: state to be set for devices in @device_mask | |
326 | * @device_mask: bitmask specifying for which device we need to update @on state | |
327 | * | |
484c314b MK |
328 | * Calls for this function must be balanced so that each ON should have matching |
329 | * OFF. Otherwise pm usage_count gets out of sync. | |
efa86e9f DB |
330 | */ |
331 | static int rpr0521_set_power_state(struct rpr0521_data *data, bool on, | |
332 | u8 device_mask) | |
333 | { | |
334 | #ifdef CONFIG_PM | |
335 | int ret; | |
efa86e9f DB |
336 | |
337 | if (device_mask & RPR0521_MODE_ALS_MASK) { | |
484c314b MK |
338 | data->als_ps_need_en = on; |
339 | data->als_need_dis = !on; | |
efa86e9f DB |
340 | } |
341 | ||
342 | if (device_mask & RPR0521_MODE_PXS_MASK) { | |
484c314b MK |
343 | data->pxs_ps_need_en = on; |
344 | data->pxs_need_dis = !on; | |
efa86e9f DB |
345 | } |
346 | ||
484c314b MK |
347 | /* |
348 | * On: _resume() is called only when we are suspended | |
349 | * Off: _suspend() is called after delay if _resume() is not | |
350 | * called before that. | |
351 | * Note: If either measurement is re-enabled before _suspend(), | |
352 | * both stay enabled until _suspend(). | |
353 | */ | |
efa86e9f DB |
354 | if (on) { |
355 | ret = pm_runtime_get_sync(&data->client->dev); | |
356 | } else { | |
357 | pm_runtime_mark_last_busy(&data->client->dev); | |
358 | ret = pm_runtime_put_autosuspend(&data->client->dev); | |
359 | } | |
360 | if (ret < 0) { | |
361 | dev_err(&data->client->dev, | |
362 | "Failed: rpr0521_set_power_state for %d, ret %d\n", | |
363 | on, ret); | |
364 | if (on) | |
365 | pm_runtime_put_noidle(&data->client->dev); | |
366 | ||
367 | return ret; | |
368 | } | |
484c314b MK |
369 | |
370 | if (on) { | |
371 | /* If _resume() was not called, enable measurement now. */ | |
372 | if (data->als_ps_need_en) { | |
373 | ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE); | |
374 | if (ret) | |
375 | return ret; | |
376 | data->als_ps_need_en = false; | |
377 | } | |
378 | ||
379 | if (data->pxs_ps_need_en) { | |
380 | ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE); | |
381 | if (ret) | |
382 | return ret; | |
383 | data->pxs_ps_need_en = false; | |
384 | } | |
385 | } | |
efa86e9f DB |
386 | #endif |
387 | return 0; | |
388 | } | |
389 | ||
e12ffd24 MK |
390 | /* Interrupt register tells if this sensor caused the interrupt or not. */ |
391 | static inline bool rpr0521_is_triggered(struct rpr0521_data *data) | |
392 | { | |
393 | int ret; | |
394 | int reg; | |
395 | ||
396 | ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, ®); | |
397 | if (ret < 0) | |
398 | return false; /* Reg read failed. */ | |
399 | if (reg & | |
400 | (RPR0521_INTERRUPT_ALS_INT_STATUS_MASK | | |
401 | RPR0521_INTERRUPT_PS_INT_STATUS_MASK)) | |
402 | return true; | |
403 | else | |
404 | return false; /* Int not from this sensor. */ | |
405 | } | |
406 | ||
407 | /* IRQ to trigger handler */ | |
408 | static irqreturn_t rpr0521_drdy_irq_handler(int irq, void *private) | |
409 | { | |
410 | struct iio_dev *indio_dev = private; | |
411 | struct rpr0521_data *data = iio_priv(indio_dev); | |
412 | ||
413 | data->irq_timestamp = iio_get_time_ns(indio_dev); | |
414 | /* | |
415 | * We need to wake the thread to read the interrupt reg. It | |
416 | * is not possible to do that here because regmap_read takes a | |
417 | * mutex. | |
418 | */ | |
419 | ||
420 | return IRQ_WAKE_THREAD; | |
421 | } | |
422 | ||
423 | static irqreturn_t rpr0521_drdy_irq_thread(int irq, void *private) | |
424 | { | |
425 | struct iio_dev *indio_dev = private; | |
426 | struct rpr0521_data *data = iio_priv(indio_dev); | |
427 | ||
428 | if (rpr0521_is_triggered(data)) { | |
429 | iio_trigger_poll_chained(data->drdy_trigger0); | |
430 | return IRQ_HANDLED; | |
431 | } | |
432 | ||
433 | return IRQ_NONE; | |
434 | } | |
435 | ||
436 | static irqreturn_t rpr0521_trigger_consumer_store_time(int irq, void *p) | |
437 | { | |
438 | struct iio_poll_func *pf = p; | |
439 | struct iio_dev *indio_dev = pf->indio_dev; | |
440 | ||
441 | /* Other trigger polls store time here. */ | |
442 | if (!iio_trigger_using_own(indio_dev)) | |
443 | pf->timestamp = iio_get_time_ns(indio_dev); | |
444 | ||
445 | return IRQ_WAKE_THREAD; | |
446 | } | |
447 | ||
448 | static irqreturn_t rpr0521_trigger_consumer_handler(int irq, void *p) | |
449 | { | |
450 | struct iio_poll_func *pf = p; | |
451 | struct iio_dev *indio_dev = pf->indio_dev; | |
452 | struct rpr0521_data *data = iio_priv(indio_dev); | |
453 | int err; | |
454 | ||
455 | u8 buffer[16]; /* 3 16-bit channels + padding + ts */ | |
456 | ||
457 | /* Use irq timestamp when reasonable. */ | |
458 | if (iio_trigger_using_own(indio_dev) && data->irq_timestamp) { | |
459 | pf->timestamp = data->irq_timestamp; | |
460 | data->irq_timestamp = 0; | |
461 | } | |
462 | /* Other chained trigger polls get timestamp only here. */ | |
463 | if (!pf->timestamp) | |
464 | pf->timestamp = iio_get_time_ns(indio_dev); | |
465 | ||
466 | err = regmap_bulk_read(data->regmap, RPR0521_REG_PXS_DATA, | |
467 | &buffer, | |
468 | (3 * 2) + 1); /* 3 * 16-bit + (discarded) int clear reg. */ | |
469 | if (!err) | |
470 | iio_push_to_buffers_with_timestamp(indio_dev, | |
471 | buffer, pf->timestamp); | |
472 | else | |
473 | dev_err(&data->client->dev, | |
474 | "Trigger consumer can't read from sensor.\n"); | |
475 | pf->timestamp = 0; | |
476 | ||
477 | iio_trigger_notify_done(indio_dev->trig); | |
478 | ||
479 | return IRQ_HANDLED; | |
480 | } | |
481 | ||
482 | static int rpr0521_write_int_enable(struct rpr0521_data *data) | |
483 | { | |
484 | int err; | |
485 | ||
486 | /* Interrupt after each measurement */ | |
487 | err = regmap_update_bits(data->regmap, RPR0521_REG_PXS_CTRL, | |
488 | RPR0521_PXS_PERSISTENCE_MASK, | |
489 | RPR0521_PXS_PERSISTENCE_DRDY); | |
490 | if (err) { | |
491 | dev_err(&data->client->dev, "PS control reg write fail.\n"); | |
492 | return -EBUSY; | |
493 | } | |
494 | ||
495 | /* Ignore latch and mode because of drdy */ | |
496 | err = regmap_write(data->regmap, RPR0521_REG_INTERRUPT, | |
497 | RPR0521_INTERRUPT_INT_REASSERT_DISABLE | | |
498 | RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE | | |
499 | RPR0521_INTERRUPT_INT_TRIG_PS_ENABLE | |
500 | ); | |
501 | if (err) { | |
502 | dev_err(&data->client->dev, "Interrupt setup write fail.\n"); | |
503 | return -EBUSY; | |
504 | } | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
509 | static int rpr0521_write_int_disable(struct rpr0521_data *data) | |
510 | { | |
511 | /* Don't care of clearing mode, assert and latch. */ | |
512 | return regmap_write(data->regmap, RPR0521_REG_INTERRUPT, | |
513 | RPR0521_INTERRUPT_INT_TRIG_ALS_DISABLE | | |
514 | RPR0521_INTERRUPT_INT_TRIG_PS_DISABLE | |
515 | ); | |
516 | } | |
517 | ||
518 | /* | |
519 | * Trigger producer enable / disable. Note that there will be trigs only when | |
520 | * measurement data is ready to be read. | |
521 | */ | |
522 | static int rpr0521_pxs_drdy_set_state(struct iio_trigger *trigger, | |
523 | bool enable_drdy) | |
524 | { | |
525 | struct iio_dev *indio_dev = iio_trigger_get_drvdata(trigger); | |
526 | struct rpr0521_data *data = iio_priv(indio_dev); | |
527 | int err; | |
528 | ||
529 | if (enable_drdy) | |
530 | err = rpr0521_write_int_enable(data); | |
531 | else | |
532 | err = rpr0521_write_int_disable(data); | |
533 | if (err) | |
534 | dev_err(&data->client->dev, "rpr0521_pxs_drdy_set_state failed\n"); | |
535 | ||
536 | return err; | |
537 | } | |
538 | ||
539 | static const struct iio_trigger_ops rpr0521_trigger_ops = { | |
540 | .set_trigger_state = rpr0521_pxs_drdy_set_state, | |
e12ffd24 MK |
541 | }; |
542 | ||
543 | ||
544 | static int rpr0521_buffer_preenable(struct iio_dev *indio_dev) | |
545 | { | |
546 | int err; | |
547 | struct rpr0521_data *data = iio_priv(indio_dev); | |
548 | ||
549 | mutex_lock(&data->lock); | |
550 | err = rpr0521_set_power_state(data, true, | |
551 | (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK)); | |
552 | mutex_unlock(&data->lock); | |
553 | if (err) | |
554 | dev_err(&data->client->dev, "_buffer_preenable fail\n"); | |
555 | ||
556 | return err; | |
557 | } | |
558 | ||
559 | static int rpr0521_buffer_postdisable(struct iio_dev *indio_dev) | |
560 | { | |
561 | int err; | |
562 | struct rpr0521_data *data = iio_priv(indio_dev); | |
563 | ||
564 | mutex_lock(&data->lock); | |
565 | err = rpr0521_set_power_state(data, false, | |
566 | (RPR0521_MODE_PXS_MASK | RPR0521_MODE_ALS_MASK)); | |
567 | mutex_unlock(&data->lock); | |
568 | if (err) | |
569 | dev_err(&data->client->dev, "_buffer_postdisable fail\n"); | |
570 | ||
571 | return err; | |
572 | } | |
573 | ||
574 | static const struct iio_buffer_setup_ops rpr0521_buffer_setup_ops = { | |
575 | .preenable = rpr0521_buffer_preenable, | |
576 | .postenable = iio_triggered_buffer_postenable, | |
577 | .predisable = iio_triggered_buffer_predisable, | |
578 | .postdisable = rpr0521_buffer_postdisable, | |
579 | }; | |
580 | ||
efa86e9f DB |
581 | static int rpr0521_get_gain(struct rpr0521_data *data, int chan, |
582 | int *val, int *val2) | |
583 | { | |
584 | int ret, reg, idx; | |
585 | ||
586 | ret = regmap_read(data->regmap, rpr0521_gain[chan].reg, ®); | |
587 | if (ret < 0) | |
588 | return ret; | |
589 | ||
590 | idx = (rpr0521_gain[chan].mask & reg) >> rpr0521_gain[chan].shift; | |
591 | *val = rpr0521_gain[chan].gain[idx].scale; | |
592 | *val2 = rpr0521_gain[chan].gain[idx].uscale; | |
593 | ||
594 | return 0; | |
595 | } | |
596 | ||
597 | static int rpr0521_set_gain(struct rpr0521_data *data, int chan, | |
598 | int val, int val2) | |
599 | { | |
600 | int i, idx = -EINVAL; | |
601 | ||
602 | /* get gain index */ | |
603 | for (i = 0; i < rpr0521_gain[chan].size; i++) | |
604 | if (val == rpr0521_gain[chan].gain[i].scale && | |
605 | val2 == rpr0521_gain[chan].gain[i].uscale) { | |
606 | idx = i; | |
607 | break; | |
608 | } | |
609 | ||
610 | if (idx < 0) | |
611 | return idx; | |
612 | ||
613 | return regmap_update_bits(data->regmap, rpr0521_gain[chan].reg, | |
614 | rpr0521_gain[chan].mask, | |
615 | idx << rpr0521_gain[chan].shift); | |
616 | } | |
617 | ||
c91a88ef MK |
618 | static int rpr0521_read_samp_freq(struct rpr0521_data *data, |
619 | enum iio_chan_type chan_type, | |
620 | int *val, int *val2) | |
621 | { | |
622 | int reg, ret; | |
623 | ||
624 | ret = regmap_read(data->regmap, RPR0521_REG_MODE_CTRL, ®); | |
625 | if (ret < 0) | |
626 | return ret; | |
627 | ||
628 | reg &= RPR0521_MODE_MEAS_TIME_MASK; | |
629 | if (reg >= ARRAY_SIZE(rpr0521_samp_freq_i)) | |
630 | return -EINVAL; | |
631 | ||
632 | switch (chan_type) { | |
633 | case IIO_INTENSITY: | |
634 | *val = rpr0521_samp_freq_i[reg].als_hz; | |
635 | *val2 = rpr0521_samp_freq_i[reg].als_uhz; | |
636 | return 0; | |
637 | ||
638 | case IIO_PROXIMITY: | |
639 | *val = rpr0521_samp_freq_i[reg].pxs_hz; | |
640 | *val2 = rpr0521_samp_freq_i[reg].pxs_uhz; | |
641 | return 0; | |
642 | ||
643 | default: | |
644 | return -EINVAL; | |
645 | } | |
646 | } | |
647 | ||
648 | static int rpr0521_write_samp_freq_common(struct rpr0521_data *data, | |
649 | enum iio_chan_type chan_type, | |
650 | int val, int val2) | |
651 | { | |
652 | int i; | |
653 | ||
654 | /* | |
655 | * Ignore channel | |
656 | * both pxs and als are setup only to same freq because of simplicity | |
657 | */ | |
658 | switch (val) { | |
659 | case 0: | |
660 | i = 0; | |
661 | break; | |
662 | ||
663 | case 2: | |
664 | if (val2 != 500000) | |
665 | return -EINVAL; | |
666 | ||
667 | i = 11; | |
668 | break; | |
669 | ||
670 | case 10: | |
671 | i = 6; | |
672 | break; | |
673 | ||
674 | default: | |
675 | return -EINVAL; | |
676 | } | |
677 | ||
678 | return regmap_update_bits(data->regmap, | |
679 | RPR0521_REG_MODE_CTRL, | |
680 | RPR0521_MODE_MEAS_TIME_MASK, | |
681 | i); | |
682 | } | |
683 | ||
734c4423 MK |
684 | static int rpr0521_read_ps_offset(struct rpr0521_data *data, int *offset) |
685 | { | |
686 | int ret; | |
687 | __le16 buffer; | |
688 | ||
689 | ret = regmap_bulk_read(data->regmap, | |
690 | RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer)); | |
691 | ||
692 | if (ret < 0) { | |
693 | dev_err(&data->client->dev, "Failed to read PS OFFSET register\n"); | |
694 | return ret; | |
695 | } | |
696 | *offset = le16_to_cpu(buffer); | |
697 | ||
698 | return ret; | |
699 | } | |
700 | ||
701 | static int rpr0521_write_ps_offset(struct rpr0521_data *data, int offset) | |
702 | { | |
703 | int ret; | |
704 | __le16 buffer; | |
705 | ||
706 | buffer = cpu_to_le16(offset & 0x3ff); | |
707 | ret = regmap_raw_write(data->regmap, | |
708 | RPR0521_REG_PS_OFFSET_LSB, &buffer, sizeof(buffer)); | |
709 | ||
710 | if (ret < 0) { | |
711 | dev_err(&data->client->dev, "Failed to write PS OFFSET register\n"); | |
712 | return ret; | |
713 | } | |
714 | ||
715 | return ret; | |
716 | } | |
717 | ||
efa86e9f DB |
718 | static int rpr0521_read_raw(struct iio_dev *indio_dev, |
719 | struct iio_chan_spec const *chan, int *val, | |
720 | int *val2, long mask) | |
721 | { | |
722 | struct rpr0521_data *data = iio_priv(indio_dev); | |
723 | int ret; | |
e12ffd24 | 724 | int busy; |
efa86e9f DB |
725 | u8 device_mask; |
726 | __le16 raw_data; | |
727 | ||
728 | switch (mask) { | |
729 | case IIO_CHAN_INFO_RAW: | |
730 | if (chan->type != IIO_INTENSITY && chan->type != IIO_PROXIMITY) | |
731 | return -EINVAL; | |
732 | ||
e12ffd24 MK |
733 | busy = iio_device_claim_direct_mode(indio_dev); |
734 | if (busy) | |
735 | return -EBUSY; | |
736 | ||
efa86e9f DB |
737 | device_mask = rpr0521_data_reg[chan->address].device_mask; |
738 | ||
739 | mutex_lock(&data->lock); | |
740 | ret = rpr0521_set_power_state(data, true, device_mask); | |
e12ffd24 MK |
741 | if (ret < 0) |
742 | goto rpr0521_read_raw_out; | |
efa86e9f DB |
743 | |
744 | ret = regmap_bulk_read(data->regmap, | |
745 | rpr0521_data_reg[chan->address].address, | |
ae591650 | 746 | &raw_data, sizeof(raw_data)); |
efa86e9f DB |
747 | if (ret < 0) { |
748 | rpr0521_set_power_state(data, false, device_mask); | |
e12ffd24 | 749 | goto rpr0521_read_raw_out; |
efa86e9f DB |
750 | } |
751 | ||
752 | ret = rpr0521_set_power_state(data, false, device_mask); | |
e12ffd24 MK |
753 | |
754 | rpr0521_read_raw_out: | |
efa86e9f | 755 | mutex_unlock(&data->lock); |
e12ffd24 | 756 | iio_device_release_direct_mode(indio_dev); |
efa86e9f DB |
757 | if (ret < 0) |
758 | return ret; | |
759 | ||
760 | *val = le16_to_cpu(raw_data); | |
761 | ||
762 | return IIO_VAL_INT; | |
624c389e | 763 | |
efa86e9f DB |
764 | case IIO_CHAN_INFO_SCALE: |
765 | mutex_lock(&data->lock); | |
766 | ret = rpr0521_get_gain(data, chan->address, val, val2); | |
767 | mutex_unlock(&data->lock); | |
768 | if (ret < 0) | |
769 | return ret; | |
770 | ||
771 | return IIO_VAL_INT_PLUS_MICRO; | |
624c389e | 772 | |
c91a88ef MK |
773 | case IIO_CHAN_INFO_SAMP_FREQ: |
774 | mutex_lock(&data->lock); | |
775 | ret = rpr0521_read_samp_freq(data, chan->type, val, val2); | |
776 | mutex_unlock(&data->lock); | |
777 | if (ret < 0) | |
778 | return ret; | |
779 | ||
780 | return IIO_VAL_INT_PLUS_MICRO; | |
781 | ||
734c4423 MK |
782 | case IIO_CHAN_INFO_OFFSET: |
783 | mutex_lock(&data->lock); | |
784 | ret = rpr0521_read_ps_offset(data, val); | |
785 | mutex_unlock(&data->lock); | |
786 | if (ret < 0) | |
787 | return ret; | |
788 | ||
789 | return IIO_VAL_INT; | |
790 | ||
efa86e9f DB |
791 | default: |
792 | return -EINVAL; | |
793 | } | |
794 | } | |
795 | ||
796 | static int rpr0521_write_raw(struct iio_dev *indio_dev, | |
797 | struct iio_chan_spec const *chan, int val, | |
798 | int val2, long mask) | |
799 | { | |
800 | struct rpr0521_data *data = iio_priv(indio_dev); | |
801 | int ret; | |
802 | ||
803 | switch (mask) { | |
804 | case IIO_CHAN_INFO_SCALE: | |
805 | mutex_lock(&data->lock); | |
806 | ret = rpr0521_set_gain(data, chan->address, val, val2); | |
807 | mutex_unlock(&data->lock); | |
808 | ||
809 | return ret; | |
624c389e | 810 | |
c91a88ef MK |
811 | case IIO_CHAN_INFO_SAMP_FREQ: |
812 | mutex_lock(&data->lock); | |
813 | ret = rpr0521_write_samp_freq_common(data, chan->type, | |
814 | val, val2); | |
815 | mutex_unlock(&data->lock); | |
816 | ||
817 | return ret; | |
818 | ||
734c4423 MK |
819 | case IIO_CHAN_INFO_OFFSET: |
820 | mutex_lock(&data->lock); | |
821 | ret = rpr0521_write_ps_offset(data, val); | |
822 | mutex_unlock(&data->lock); | |
823 | ||
824 | return ret; | |
825 | ||
efa86e9f DB |
826 | default: |
827 | return -EINVAL; | |
828 | } | |
829 | } | |
830 | ||
831 | static const struct iio_info rpr0521_info = { | |
efa86e9f DB |
832 | .read_raw = rpr0521_read_raw, |
833 | .write_raw = rpr0521_write_raw, | |
834 | .attrs = &rpr0521_attribute_group, | |
835 | }; | |
836 | ||
837 | static int rpr0521_init(struct rpr0521_data *data) | |
838 | { | |
839 | int ret; | |
840 | int id; | |
841 | ||
842 | ret = regmap_read(data->regmap, RPR0521_REG_ID, &id); | |
843 | if (ret < 0) { | |
844 | dev_err(&data->client->dev, "Failed to read REG_ID register\n"); | |
845 | return ret; | |
846 | } | |
847 | ||
848 | if (id != RPR0521_MANUFACT_ID) { | |
849 | dev_err(&data->client->dev, "Wrong id, got %x, expected %x\n", | |
850 | id, RPR0521_MANUFACT_ID); | |
851 | return -ENODEV; | |
852 | } | |
853 | ||
854 | /* set default measurement time - 100 ms for both ALS and PS */ | |
855 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, | |
856 | RPR0521_MODE_MEAS_TIME_MASK, | |
857 | RPR0521_DEFAULT_MEAS_TIME); | |
858 | if (ret) { | |
859 | pr_err("regmap_update_bits returned %d\n", ret); | |
860 | return ret; | |
861 | } | |
862 | ||
484c314b | 863 | #ifndef CONFIG_PM |
efa86e9f DB |
864 | ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE); |
865 | if (ret < 0) | |
866 | return ret; | |
867 | ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE); | |
868 | if (ret < 0) | |
869 | return ret; | |
484c314b | 870 | #endif |
efa86e9f | 871 | |
e12ffd24 MK |
872 | data->irq_timestamp = 0; |
873 | ||
efa86e9f DB |
874 | return 0; |
875 | } | |
876 | ||
877 | static int rpr0521_poweroff(struct rpr0521_data *data) | |
878 | { | |
879 | int ret; | |
e12ffd24 | 880 | int tmp; |
efa86e9f DB |
881 | |
882 | ret = regmap_update_bits(data->regmap, RPR0521_REG_MODE_CTRL, | |
883 | RPR0521_MODE_ALS_MASK | | |
884 | RPR0521_MODE_PXS_MASK, | |
885 | RPR0521_MODE_ALS_DISABLE | | |
886 | RPR0521_MODE_PXS_DISABLE); | |
887 | if (ret < 0) | |
888 | return ret; | |
889 | ||
890 | data->als_dev_en = false; | |
891 | data->pxs_dev_en = false; | |
892 | ||
e12ffd24 MK |
893 | /* |
894 | * Int pin keeps state after power off. Set pin to high impedance | |
895 | * mode to prevent power drain. | |
896 | */ | |
897 | ret = regmap_read(data->regmap, RPR0521_REG_INTERRUPT, &tmp); | |
898 | if (ret) { | |
899 | dev_err(&data->client->dev, "Failed to reset int pin.\n"); | |
900 | return ret; | |
901 | } | |
902 | ||
efa86e9f DB |
903 | return 0; |
904 | } | |
905 | ||
906 | static bool rpr0521_is_volatile_reg(struct device *dev, unsigned int reg) | |
907 | { | |
908 | switch (reg) { | |
909 | case RPR0521_REG_MODE_CTRL: | |
910 | case RPR0521_REG_ALS_CTRL: | |
911 | case RPR0521_REG_PXS_CTRL: | |
912 | return false; | |
913 | default: | |
914 | return true; | |
915 | } | |
916 | } | |
917 | ||
918 | static const struct regmap_config rpr0521_regmap_config = { | |
919 | .name = RPR0521_REGMAP_NAME, | |
920 | ||
921 | .reg_bits = 8, | |
922 | .val_bits = 8, | |
923 | ||
924 | .max_register = RPR0521_REG_ID, | |
925 | .cache_type = REGCACHE_RBTREE, | |
926 | .volatile_reg = rpr0521_is_volatile_reg, | |
927 | }; | |
928 | ||
929 | static int rpr0521_probe(struct i2c_client *client, | |
930 | const struct i2c_device_id *id) | |
931 | { | |
932 | struct rpr0521_data *data; | |
933 | struct iio_dev *indio_dev; | |
934 | struct regmap *regmap; | |
935 | int ret; | |
936 | ||
937 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); | |
938 | if (!indio_dev) | |
939 | return -ENOMEM; | |
940 | ||
941 | regmap = devm_regmap_init_i2c(client, &rpr0521_regmap_config); | |
942 | if (IS_ERR(regmap)) { | |
943 | dev_err(&client->dev, "regmap_init failed!\n"); | |
944 | return PTR_ERR(regmap); | |
945 | } | |
946 | ||
947 | data = iio_priv(indio_dev); | |
948 | i2c_set_clientdata(client, indio_dev); | |
949 | data->client = client; | |
950 | data->regmap = regmap; | |
951 | ||
952 | mutex_init(&data->lock); | |
953 | ||
954 | indio_dev->dev.parent = &client->dev; | |
955 | indio_dev->info = &rpr0521_info; | |
956 | indio_dev->name = RPR0521_DRV_NAME; | |
957 | indio_dev->channels = rpr0521_channels; | |
958 | indio_dev->num_channels = ARRAY_SIZE(rpr0521_channels); | |
959 | indio_dev->modes = INDIO_DIRECT_MODE; | |
960 | ||
961 | ret = rpr0521_init(data); | |
962 | if (ret < 0) { | |
963 | dev_err(&client->dev, "rpr0521 chip init failed\n"); | |
964 | return ret; | |
965 | } | |
efa86e9f DB |
966 | |
967 | ret = pm_runtime_set_active(&client->dev); | |
968 | if (ret < 0) | |
12d74949 | 969 | goto err_poweroff; |
efa86e9f DB |
970 | |
971 | pm_runtime_enable(&client->dev); | |
972 | pm_runtime_set_autosuspend_delay(&client->dev, RPR0521_SLEEP_DELAY_MS); | |
973 | pm_runtime_use_autosuspend(&client->dev); | |
974 | ||
e12ffd24 MK |
975 | /* |
976 | * If sensor write/read is needed in _probe after _use_autosuspend, | |
977 | * sensor needs to be _resumed first using rpr0521_set_power_state(). | |
978 | */ | |
979 | ||
980 | /* IRQ to trigger setup */ | |
981 | if (client->irq) { | |
982 | /* Trigger0 producer setup */ | |
983 | data->drdy_trigger0 = devm_iio_trigger_alloc( | |
984 | indio_dev->dev.parent, | |
985 | "%s-dev%d", indio_dev->name, indio_dev->id); | |
986 | if (!data->drdy_trigger0) { | |
987 | ret = -ENOMEM; | |
988 | goto err_pm_disable; | |
989 | } | |
990 | data->drdy_trigger0->dev.parent = indio_dev->dev.parent; | |
991 | data->drdy_trigger0->ops = &rpr0521_trigger_ops; | |
992 | indio_dev->available_scan_masks = rpr0521_available_scan_masks; | |
993 | iio_trigger_set_drvdata(data->drdy_trigger0, indio_dev); | |
994 | ||
995 | /* Ties irq to trigger producer handler. */ | |
996 | ret = devm_request_threaded_irq(&client->dev, client->irq, | |
997 | rpr0521_drdy_irq_handler, rpr0521_drdy_irq_thread, | |
998 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, | |
999 | RPR0521_IRQ_NAME, indio_dev); | |
1000 | if (ret < 0) { | |
1001 | dev_err(&client->dev, "request irq %d for trigger0 failed\n", | |
1002 | client->irq); | |
1003 | goto err_pm_disable; | |
1004 | } | |
1005 | ||
1006 | ret = devm_iio_trigger_register(indio_dev->dev.parent, | |
1007 | data->drdy_trigger0); | |
1008 | if (ret) { | |
1009 | dev_err(&client->dev, "iio trigger register failed\n"); | |
1010 | goto err_pm_disable; | |
1011 | } | |
1012 | ||
1013 | /* | |
1014 | * Now whole pipe from physical interrupt (irq defined by | |
1015 | * devicetree to device) to trigger0 output is set up. | |
1016 | */ | |
1017 | ||
1018 | /* Trigger consumer setup */ | |
1019 | ret = devm_iio_triggered_buffer_setup(indio_dev->dev.parent, | |
1020 | indio_dev, | |
1021 | rpr0521_trigger_consumer_store_time, | |
1022 | rpr0521_trigger_consumer_handler, | |
1023 | &rpr0521_buffer_setup_ops); | |
1024 | if (ret < 0) { | |
1025 | dev_err(&client->dev, "iio triggered buffer setup failed\n"); | |
1026 | goto err_pm_disable; | |
1027 | } | |
1028 | } | |
1029 | ||
12d74949 MK |
1030 | ret = iio_device_register(indio_dev); |
1031 | if (ret) | |
1032 | goto err_pm_disable; | |
1033 | ||
1034 | return 0; | |
1035 | ||
1036 | err_pm_disable: | |
1037 | pm_runtime_disable(&client->dev); | |
1038 | pm_runtime_set_suspended(&client->dev); | |
1039 | pm_runtime_put_noidle(&client->dev); | |
1040 | err_poweroff: | |
1041 | rpr0521_poweroff(data); | |
1042 | ||
1043 | return ret; | |
efa86e9f DB |
1044 | } |
1045 | ||
1046 | static int rpr0521_remove(struct i2c_client *client) | |
1047 | { | |
1048 | struct iio_dev *indio_dev = i2c_get_clientdata(client); | |
1049 | ||
7d0ead5c AR |
1050 | iio_device_unregister(indio_dev); |
1051 | ||
efa86e9f DB |
1052 | pm_runtime_disable(&client->dev); |
1053 | pm_runtime_set_suspended(&client->dev); | |
1054 | pm_runtime_put_noidle(&client->dev); | |
1055 | ||
efa86e9f DB |
1056 | rpr0521_poweroff(iio_priv(indio_dev)); |
1057 | ||
1058 | return 0; | |
1059 | } | |
1060 | ||
1061 | #ifdef CONFIG_PM | |
1062 | static int rpr0521_runtime_suspend(struct device *dev) | |
1063 | { | |
1064 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1065 | struct rpr0521_data *data = iio_priv(indio_dev); | |
1066 | int ret; | |
1067 | ||
efa86e9f | 1068 | mutex_lock(&data->lock); |
484c314b MK |
1069 | /* If measurements are enabled, enable them on resume */ |
1070 | if (!data->als_need_dis) | |
1071 | data->als_ps_need_en = data->als_dev_en; | |
1072 | if (!data->pxs_need_dis) | |
1073 | data->pxs_ps_need_en = data->pxs_dev_en; | |
1074 | ||
1075 | /* disable channels and sets {als,pxs}_dev_en to false */ | |
efa86e9f | 1076 | ret = rpr0521_poweroff(data); |
484c314b | 1077 | regcache_mark_dirty(data->regmap); |
efa86e9f DB |
1078 | mutex_unlock(&data->lock); |
1079 | ||
1080 | return ret; | |
1081 | } | |
1082 | ||
1083 | static int rpr0521_runtime_resume(struct device *dev) | |
1084 | { | |
1085 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
1086 | struct rpr0521_data *data = iio_priv(indio_dev); | |
1087 | int ret; | |
1088 | ||
484c314b | 1089 | regcache_sync(data->regmap); |
efa86e9f DB |
1090 | if (data->als_ps_need_en) { |
1091 | ret = rpr0521_als_enable(data, RPR0521_MODE_ALS_ENABLE); | |
1092 | if (ret < 0) | |
1093 | return ret; | |
1094 | data->als_ps_need_en = false; | |
1095 | } | |
1096 | ||
1097 | if (data->pxs_ps_need_en) { | |
1098 | ret = rpr0521_pxs_enable(data, RPR0521_MODE_PXS_ENABLE); | |
1099 | if (ret < 0) | |
1100 | return ret; | |
1101 | data->pxs_ps_need_en = false; | |
1102 | } | |
484c314b | 1103 | msleep(100); //wait for first measurement result |
efa86e9f DB |
1104 | |
1105 | return 0; | |
1106 | } | |
1107 | #endif | |
1108 | ||
1109 | static const struct dev_pm_ops rpr0521_pm_ops = { | |
1110 | SET_RUNTIME_PM_OPS(rpr0521_runtime_suspend, | |
1111 | rpr0521_runtime_resume, NULL) | |
1112 | }; | |
1113 | ||
1114 | static const struct acpi_device_id rpr0521_acpi_match[] = { | |
1115 | {"RPR0521", 0}, | |
1116 | { } | |
1117 | }; | |
1118 | MODULE_DEVICE_TABLE(acpi, rpr0521_acpi_match); | |
1119 | ||
1120 | static const struct i2c_device_id rpr0521_id[] = { | |
1121 | {"rpr0521", 0}, | |
1122 | { } | |
1123 | }; | |
1124 | ||
1125 | MODULE_DEVICE_TABLE(i2c, rpr0521_id); | |
1126 | ||
1127 | static struct i2c_driver rpr0521_driver = { | |
1128 | .driver = { | |
1129 | .name = RPR0521_DRV_NAME, | |
1130 | .pm = &rpr0521_pm_ops, | |
1131 | .acpi_match_table = ACPI_PTR(rpr0521_acpi_match), | |
1132 | }, | |
1133 | .probe = rpr0521_probe, | |
1134 | .remove = rpr0521_remove, | |
1135 | .id_table = rpr0521_id, | |
1136 | }; | |
1137 | ||
1138 | module_i2c_driver(rpr0521_driver); | |
1139 | ||
1140 | MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>"); | |
1141 | MODULE_DESCRIPTION("RPR0521 ROHM Ambient Light and Proximity Sensor driver"); | |
1142 | MODULE_LICENSE("GPL v2"); |