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ee1f1fa4 1/*
9c2251dd 2 * drivers/iio/light/tsl2563.c
ee1f1fa4
AK
3 *
4 * Copyright (C) 2008 Nokia Corporation
5 *
6 * Written by Timo O. Karjalainen <timo.o.karjalainen@nokia.com>
7 * Contact: Amit Kucheria <amit.kucheria@verdurent.com>
8 *
9 * Converted to IIO driver
10 * Amit Kucheria <amit.kucheria@verdurent.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * version 2 as published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 * 02110-1301 USA
25 */
26
27#include <linux/module.h>
28#include <linux/i2c.h>
29#include <linux/interrupt.h>
388be488 30#include <linux/irq.h>
ee1f1fa4
AK
31#include <linux/sched.h>
32#include <linux/mutex.h>
33#include <linux/delay.h>
ee1f1fa4 34#include <linux/pm.h>
ee1f1fa4 35#include <linux/err.h>
5a0e3ad6 36#include <linux/slab.h>
ee1f1fa4 37
06458e27
JC
38#include <linux/iio/iio.h>
39#include <linux/iio/sysfs.h>
40#include <linux/iio/events.h>
9c2251dd 41#include <linux/platform_data/tsl2563.h>
ee1f1fa4 42
ee1f1fa4 43/* Use this many bits for fraction part. */
5ade7633 44#define ADC_FRAC_BITS 14
ee1f1fa4
AK
45
46/* Given number of 1/10000's in ADC_FRAC_BITS precision. */
47#define FRAC10K(f) (((f) * (1L << (ADC_FRAC_BITS))) / (10000))
48
49/* Bits used for fraction in calibration coefficients.*/
5ade7633 50#define CALIB_FRAC_BITS 10
ee1f1fa4
AK
51/* 0.5 in CALIB_FRAC_BITS precision */
52#define CALIB_FRAC_HALF (1 << (CALIB_FRAC_BITS - 1))
53/* Make a fraction from a number n that was multiplied with b. */
54#define CALIB_FRAC(n, b) (((n) << CALIB_FRAC_BITS) / (b))
55/* Decimal 10^(digits in sysfs presentation) */
5ade7633 56#define CALIB_BASE_SYSFS 1000
ee1f1fa4 57
5ade7633
JC
58#define TSL2563_CMD 0x80
59#define TSL2563_CLEARINT 0x40
ee1f1fa4 60
5ade7633
JC
61#define TSL2563_REG_CTRL 0x00
62#define TSL2563_REG_TIMING 0x01
63#define TSL2563_REG_LOWLOW 0x02 /* data0 low threshold, 2 bytes */
64#define TSL2563_REG_LOWHIGH 0x03
65#define TSL2563_REG_HIGHLOW 0x04 /* data0 high threshold, 2 bytes */
66#define TSL2563_REG_HIGHHIGH 0x05
67#define TSL2563_REG_INT 0x06
68#define TSL2563_REG_ID 0x0a
69#define TSL2563_REG_DATA0LOW 0x0c /* broadband sensor value, 2 bytes */
70#define TSL2563_REG_DATA0HIGH 0x0d
71#define TSL2563_REG_DATA1LOW 0x0e /* infrared sensor value, 2 bytes */
72#define TSL2563_REG_DATA1HIGH 0x0f
ee1f1fa4 73
5ade7633
JC
74#define TSL2563_CMD_POWER_ON 0x03
75#define TSL2563_CMD_POWER_OFF 0x00
76#define TSL2563_CTRL_POWER_MASK 0x03
ee1f1fa4 77
5ade7633
JC
78#define TSL2563_TIMING_13MS 0x00
79#define TSL2563_TIMING_100MS 0x01
80#define TSL2563_TIMING_400MS 0x02
81#define TSL2563_TIMING_MASK 0x03
82#define TSL2563_TIMING_GAIN16 0x10
83#define TSL2563_TIMING_GAIN1 0x00
ee1f1fa4 84
5ade7633
JC
85#define TSL2563_INT_DISBLED 0x00
86#define TSL2563_INT_LEVEL 0x10
ee1f1fa4
AK
87#define TSL2563_INT_PERSIST(n) ((n) & 0x0F)
88
89struct tsl2563_gainlevel_coeff {
90 u8 gaintime;
91 u16 min;
92 u16 max;
93};
94
1ff7e1d8 95static const struct tsl2563_gainlevel_coeff tsl2563_gainlevel_table[] = {
ee1f1fa4
AK
96 {
97 .gaintime = TSL2563_TIMING_400MS | TSL2563_TIMING_GAIN16,
98 .min = 0,
99 .max = 65534,
100 }, {
101 .gaintime = TSL2563_TIMING_400MS | TSL2563_TIMING_GAIN1,
102 .min = 2048,
103 .max = 65534,
104 }, {
105 .gaintime = TSL2563_TIMING_100MS | TSL2563_TIMING_GAIN1,
106 .min = 4095,
107 .max = 37177,
108 }, {
109 .gaintime = TSL2563_TIMING_13MS | TSL2563_TIMING_GAIN1,
110 .min = 3000,
111 .max = 65535,
112 },
113};
114
115struct tsl2563_chip {
116 struct mutex lock;
117 struct i2c_client *client;
ee1f1fa4
AK
118 struct delayed_work poweroff_work;
119
120 /* Remember state for suspend and resume functions */
01788c53 121 bool suspended;
ee1f1fa4 122
1ff7e1d8 123 struct tsl2563_gainlevel_coeff const *gainlevel;
ee1f1fa4 124
ee1f1fa4
AK
125 u16 low_thres;
126 u16 high_thres;
127 u8 intr;
388be488 128 bool int_enabled;
ee1f1fa4
AK
129
130 /* Calibration coefficients */
131 u32 calib0;
132 u32 calib1;
133 int cover_comp_gain;
134
135 /* Cache current values, to be returned while suspended */
136 u32 data0;
137 u32 data1;
138};
139
ee1f1fa4
AK
140static int tsl2563_set_power(struct tsl2563_chip *chip, int on)
141{
142 struct i2c_client *client = chip->client;
143 u8 cmd;
144
145 cmd = on ? TSL2563_CMD_POWER_ON : TSL2563_CMD_POWER_OFF;
d9b42c01
BF
146 return i2c_smbus_write_byte_data(client,
147 TSL2563_CMD | TSL2563_REG_CTRL, cmd);
ee1f1fa4
AK
148}
149
150/*
151 * Return value is 0 for off, 1 for on, or a negative error
152 * code if reading failed.
153 */
154static int tsl2563_get_power(struct tsl2563_chip *chip)
155{
156 struct i2c_client *client = chip->client;
157 int ret;
ee1f1fa4 158
d9b42c01
BF
159 ret = i2c_smbus_read_byte_data(client, TSL2563_CMD | TSL2563_REG_CTRL);
160 if (ret < 0)
ee1f1fa4
AK
161 return ret;
162
d9b42c01 163 return (ret & TSL2563_CTRL_POWER_MASK) == TSL2563_CMD_POWER_ON;
ee1f1fa4
AK
164}
165
166static int tsl2563_configure(struct tsl2563_chip *chip)
167{
ee1f1fa4
AK
168 int ret;
169
d9b42c01
BF
170 ret = i2c_smbus_write_byte_data(chip->client,
171 TSL2563_CMD | TSL2563_REG_TIMING,
ee1f1fa4
AK
172 chip->gainlevel->gaintime);
173 if (ret)
388be488 174 goto error_ret;
d9b42c01
BF
175 ret = i2c_smbus_write_byte_data(chip->client,
176 TSL2563_CMD | TSL2563_REG_HIGHLOW,
388be488
JC
177 chip->high_thres & 0xFF);
178 if (ret)
179 goto error_ret;
d9b42c01
BF
180 ret = i2c_smbus_write_byte_data(chip->client,
181 TSL2563_CMD | TSL2563_REG_HIGHHIGH,
388be488
JC
182 (chip->high_thres >> 8) & 0xFF);
183 if (ret)
184 goto error_ret;
d9b42c01
BF
185 ret = i2c_smbus_write_byte_data(chip->client,
186 TSL2563_CMD | TSL2563_REG_LOWLOW,
388be488
JC
187 chip->low_thres & 0xFF);
188 if (ret)
189 goto error_ret;
d9b42c01
BF
190 ret = i2c_smbus_write_byte_data(chip->client,
191 TSL2563_CMD | TSL2563_REG_LOWHIGH,
388be488 192 (chip->low_thres >> 8) & 0xFF);
a9e244f6
JC
193/*
194 * Interrupt register is automatically written anyway if it is relevant
195 * so is not here.
196 */
388be488 197error_ret:
ee1f1fa4
AK
198 return ret;
199}
200
201static void tsl2563_poweroff_work(struct work_struct *work)
202{
203 struct tsl2563_chip *chip =
204 container_of(work, struct tsl2563_chip, poweroff_work.work);
205 tsl2563_set_power(chip, 0);
206}
207
208static int tsl2563_detect(struct tsl2563_chip *chip)
209{
210 int ret;
211
212 ret = tsl2563_set_power(chip, 1);
213 if (ret)
214 return ret;
215
216 ret = tsl2563_get_power(chip);
217 if (ret < 0)
218 return ret;
219
220 return ret ? 0 : -ENODEV;
221}
222
223static int tsl2563_read_id(struct tsl2563_chip *chip, u8 *id)
224{
225 struct i2c_client *client = chip->client;
226 int ret;
227
d9b42c01
BF
228 ret = i2c_smbus_read_byte_data(client, TSL2563_CMD | TSL2563_REG_ID);
229 if (ret < 0)
ee1f1fa4
AK
230 return ret;
231
22dc09ca
MJ
232 *id = ret;
233
ee1f1fa4
AK
234 return 0;
235}
236
237/*
238 * "Normalized" ADC value is one obtained with 400ms of integration time and
239 * 16x gain. This function returns the number of bits of shift needed to
240 * convert between normalized values and HW values obtained using given
241 * timing and gain settings.
242 */
6fa273c1 243static int tsl2563_adc_shiftbits(u8 timing)
ee1f1fa4
AK
244{
245 int shift = 0;
246
247 switch (timing & TSL2563_TIMING_MASK) {
248 case TSL2563_TIMING_13MS:
249 shift += 5;
250 break;
251 case TSL2563_TIMING_100MS:
252 shift += 2;
253 break;
254 case TSL2563_TIMING_400MS:
255 /* no-op */
256 break;
257 }
258
259 if (!(timing & TSL2563_TIMING_GAIN16))
260 shift += 4;
261
262 return shift;
263}
264
265/* Convert a HW ADC value to normalized scale. */
6fa273c1 266static u32 tsl2563_normalize_adc(u16 adc, u8 timing)
ee1f1fa4 267{
6fa273c1 268 return adc << tsl2563_adc_shiftbits(timing);
ee1f1fa4
AK
269}
270
271static void tsl2563_wait_adc(struct tsl2563_chip *chip)
272{
273 unsigned int delay;
274
275 switch (chip->gainlevel->gaintime & TSL2563_TIMING_MASK) {
276 case TSL2563_TIMING_13MS:
277 delay = 14;
278 break;
279 case TSL2563_TIMING_100MS:
280 delay = 101;
281 break;
282 default:
283 delay = 402;
284 }
285 /*
286 * TODO: Make sure that we wait at least required delay but why we
287 * have to extend it one tick more?
288 */
289 schedule_timeout_interruptible(msecs_to_jiffies(delay) + 2);
290}
291
292static int tsl2563_adjust_gainlevel(struct tsl2563_chip *chip, u16 adc)
293{
294 struct i2c_client *client = chip->client;
295
296 if (adc > chip->gainlevel->max || adc < chip->gainlevel->min) {
297
298 (adc > chip->gainlevel->max) ?
299 chip->gainlevel++ : chip->gainlevel--;
300
d9b42c01
BF
301 i2c_smbus_write_byte_data(client,
302 TSL2563_CMD | TSL2563_REG_TIMING,
303 chip->gainlevel->gaintime);
ee1f1fa4
AK
304
305 tsl2563_wait_adc(chip);
306 tsl2563_wait_adc(chip);
307
308 return 1;
309 } else
310 return 0;
311}
312
313static int tsl2563_get_adc(struct tsl2563_chip *chip)
314{
315 struct i2c_client *client = chip->client;
ee1f1fa4
AK
316 u16 adc0, adc1;
317 int retry = 1;
318 int ret = 0;
319
01788c53 320 if (chip->suspended)
ee1f1fa4
AK
321 goto out;
322
388be488
JC
323 if (!chip->int_enabled) {
324 cancel_delayed_work(&chip->poweroff_work);
325
326 if (!tsl2563_get_power(chip)) {
327 ret = tsl2563_set_power(chip, 1);
328 if (ret)
329 goto out;
330 ret = tsl2563_configure(chip);
331 if (ret)
332 goto out;
333 tsl2563_wait_adc(chip);
334 }
ee1f1fa4
AK
335 }
336
337 while (retry) {
d9b42c01
BF
338 ret = i2c_smbus_read_word_data(client,
339 TSL2563_CMD | TSL2563_REG_DATA0LOW);
340 if (ret < 0)
ee1f1fa4 341 goto out;
d9b42c01 342 adc0 = ret;
ee1f1fa4 343
d9b42c01
BF
344 ret = i2c_smbus_read_word_data(client,
345 TSL2563_CMD | TSL2563_REG_DATA1LOW);
346 if (ret < 0)
ee1f1fa4 347 goto out;
d9b42c01 348 adc1 = ret;
ee1f1fa4
AK
349
350 retry = tsl2563_adjust_gainlevel(chip, adc0);
351 }
352
6fa273c1
PM
353 chip->data0 = tsl2563_normalize_adc(adc0, chip->gainlevel->gaintime);
354 chip->data1 = tsl2563_normalize_adc(adc1, chip->gainlevel->gaintime);
ee1f1fa4 355
388be488
JC
356 if (!chip->int_enabled)
357 schedule_delayed_work(&chip->poweroff_work, 5 * HZ);
ee1f1fa4
AK
358
359 ret = 0;
360out:
361 return ret;
362}
363
6fa273c1 364static inline int tsl2563_calib_to_sysfs(u32 calib)
ee1f1fa4
AK
365{
366 return (int) (((calib * CALIB_BASE_SYSFS) +
367 CALIB_FRAC_HALF) >> CALIB_FRAC_BITS);
368}
369
6fa273c1 370static inline u32 tsl2563_calib_from_sysfs(int value)
ee1f1fa4
AK
371{
372 return (((u32) value) << CALIB_FRAC_BITS) / CALIB_BASE_SYSFS;
373}
374
375/*
376 * Conversions between lux and ADC values.
377 *
378 * The basic formula is lux = c0 * adc0 - c1 * adc1, where c0 and c1 are
379 * appropriate constants. Different constants are needed for different
380 * kinds of light, determined by the ratio adc1/adc0 (basically the ratio
381 * of the intensities in infrared and visible wavelengths). lux_table below
382 * lists the upper threshold of the adc1/adc0 ratio and the corresponding
383 * constants.
384 */
385
386struct tsl2563_lux_coeff {
387 unsigned long ch_ratio;
388 unsigned long ch0_coeff;
389 unsigned long ch1_coeff;
390};
391
392static const struct tsl2563_lux_coeff lux_table[] = {
393 {
394 .ch_ratio = FRAC10K(1300),
395 .ch0_coeff = FRAC10K(315),
396 .ch1_coeff = FRAC10K(262),
397 }, {
398 .ch_ratio = FRAC10K(2600),
399 .ch0_coeff = FRAC10K(337),
400 .ch1_coeff = FRAC10K(430),
401 }, {
402 .ch_ratio = FRAC10K(3900),
403 .ch0_coeff = FRAC10K(363),
404 .ch1_coeff = FRAC10K(529),
405 }, {
406 .ch_ratio = FRAC10K(5200),
407 .ch0_coeff = FRAC10K(392),
408 .ch1_coeff = FRAC10K(605),
409 }, {
410 .ch_ratio = FRAC10K(6500),
411 .ch0_coeff = FRAC10K(229),
412 .ch1_coeff = FRAC10K(291),
413 }, {
414 .ch_ratio = FRAC10K(8000),
415 .ch0_coeff = FRAC10K(157),
416 .ch1_coeff = FRAC10K(180),
417 }, {
418 .ch_ratio = FRAC10K(13000),
419 .ch0_coeff = FRAC10K(34),
420 .ch1_coeff = FRAC10K(26),
421 }, {
422 .ch_ratio = ULONG_MAX,
423 .ch0_coeff = 0,
424 .ch1_coeff = 0,
425 },
426};
427
a9e244f6 428/* Convert normalized, scaled ADC values to lux. */
6fa273c1 429static unsigned int tsl2563_adc_to_lux(u32 adc0, u32 adc1)
ee1f1fa4
AK
430{
431 const struct tsl2563_lux_coeff *lp = lux_table;
432 unsigned long ratio, lux, ch0 = adc0, ch1 = adc1;
433
434 ratio = ch0 ? ((ch1 << ADC_FRAC_BITS) / ch0) : ULONG_MAX;
435
436 while (lp->ch_ratio < ratio)
437 lp++;
438
439 lux = ch0 * lp->ch0_coeff - ch1 * lp->ch1_coeff;
440
441 return (unsigned int) (lux >> ADC_FRAC_BITS);
442}
443
ee1f1fa4 444/* Apply calibration coefficient to ADC count. */
6fa273c1 445static u32 tsl2563_calib_adc(u32 adc, u32 calib)
ee1f1fa4
AK
446{
447 unsigned long scaled = adc;
448
449 scaled *= calib;
450 scaled >>= CALIB_FRAC_BITS;
451
452 return (u32) scaled;
453}
454
cbcdf4dd
JC
455static int tsl2563_write_raw(struct iio_dev *indio_dev,
456 struct iio_chan_spec const *chan,
457 int val,
458 int val2,
459 long mask)
ee1f1fa4 460{
cbcdf4dd 461 struct tsl2563_chip *chip = iio_priv(indio_dev);
ee1f1fa4 462
3b5c1635
ID
463 if (mask != IIO_CHAN_INFO_CALIBSCALE)
464 return -EINVAL;
465 if (chan->channel2 == IIO_MOD_LIGHT_BOTH)
6fa273c1 466 chip->calib0 = tsl2563_calib_from_sysfs(val);
3b5c1635 467 else if (chan->channel2 == IIO_MOD_LIGHT_IR)
6fa273c1 468 chip->calib1 = tsl2563_calib_from_sysfs(val);
3b5c1635
ID
469 else
470 return -EINVAL;
ee1f1fa4 471
cbcdf4dd 472 return 0;
ee1f1fa4
AK
473}
474
cbcdf4dd
JC
475static int tsl2563_read_raw(struct iio_dev *indio_dev,
476 struct iio_chan_spec const *chan,
477 int *val,
478 int *val2,
3b5c1635 479 long mask)
ee1f1fa4 480{
cbcdf4dd
JC
481 int ret = -EINVAL;
482 u32 calib0, calib1;
483 struct tsl2563_chip *chip = iio_priv(indio_dev);
ee1f1fa4
AK
484
485 mutex_lock(&chip->lock);
3b5c1635 486 switch (mask) {
90354d00
JC
487 case IIO_CHAN_INFO_RAW:
488 case IIO_CHAN_INFO_PROCESSED:
cbcdf4dd
JC
489 switch (chan->type) {
490 case IIO_LIGHT:
491 ret = tsl2563_get_adc(chip);
492 if (ret)
493 goto error_ret;
6fa273c1 494 calib0 = tsl2563_calib_adc(chip->data0, chip->calib0) *
cbcdf4dd 495 chip->cover_comp_gain;
6fa273c1 496 calib1 = tsl2563_calib_adc(chip->data1, chip->calib1) *
cbcdf4dd 497 chip->cover_comp_gain;
6fa273c1 498 *val = tsl2563_adc_to_lux(calib0, calib1);
cbcdf4dd
JC
499 ret = IIO_VAL_INT;
500 break;
501 case IIO_INTENSITY:
502 ret = tsl2563_get_adc(chip);
503 if (ret)
504 goto error_ret;
3b5c1635 505 if (chan->channel2 == IIO_MOD_LIGHT_BOTH)
cbcdf4dd
JC
506 *val = chip->data0;
507 else
508 *val = chip->data1;
509 ret = IIO_VAL_INT;
510 break;
511 default:
512 break;
513 }
388be488 514 break;
cbcdf4dd 515
c8a9f805 516 case IIO_CHAN_INFO_CALIBSCALE:
3b5c1635 517 if (chan->channel2 == IIO_MOD_LIGHT_BOTH)
6fa273c1 518 *val = tsl2563_calib_to_sysfs(chip->calib0);
cbcdf4dd 519 else
6fa273c1 520 *val = tsl2563_calib_to_sysfs(chip->calib1);
cbcdf4dd 521 ret = IIO_VAL_INT;
388be488
JC
522 break;
523 default:
97d35f28
DC
524 ret = -EINVAL;
525 goto error_ret;
388be488 526 }
ee1f1fa4 527
cbcdf4dd
JC
528error_ret:
529 mutex_unlock(&chip->lock);
530 return ret;
e9124afa
JC
531}
532
6d59747e
LPC
533static const struct iio_event_spec tsl2563_events[] = {
534 {
535 .type = IIO_EV_TYPE_THRESH,
536 .dir = IIO_EV_DIR_RISING,
537 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
538 BIT(IIO_EV_INFO_ENABLE),
539 }, {
540 .type = IIO_EV_TYPE_THRESH,
541 .dir = IIO_EV_DIR_FALLING,
542 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
543 BIT(IIO_EV_INFO_ENABLE),
544 },
545};
546
cbcdf4dd 547static const struct iio_chan_spec tsl2563_channels[] = {
79939061
JC
548 {
549 .type = IIO_LIGHT,
550 .indexed = 1,
d292ef8d 551 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
79939061
JC
552 .channel = 0,
553 }, {
554 .type = IIO_INTENSITY,
555 .modified = 1,
556 .channel2 = IIO_MOD_LIGHT_BOTH,
d292ef8d
JC
557 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
558 BIT(IIO_CHAN_INFO_CALIBSCALE),
6d59747e
LPC
559 .event_spec = tsl2563_events,
560 .num_event_specs = ARRAY_SIZE(tsl2563_events),
79939061
JC
561 }, {
562 .type = IIO_INTENSITY,
563 .modified = 1,
a7e3bd66 564 .channel2 = IIO_MOD_LIGHT_IR,
d292ef8d
JC
565 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
566 BIT(IIO_CHAN_INFO_CALIBSCALE),
79939061 567 }
ee1f1fa4
AK
568};
569
cbcdf4dd 570static int tsl2563_read_thresh(struct iio_dev *indio_dev,
6d59747e
LPC
571 const struct iio_chan_spec *chan, enum iio_event_type type,
572 enum iio_event_direction dir, enum iio_event_info info, int *val,
573 int *val2)
388be488 574{
cbcdf4dd
JC
575 struct tsl2563_chip *chip = iio_priv(indio_dev);
576
6d59747e 577 switch (dir) {
cbcdf4dd
JC
578 case IIO_EV_DIR_RISING:
579 *val = chip->high_thres;
388be488 580 break;
cbcdf4dd
JC
581 case IIO_EV_DIR_FALLING:
582 *val = chip->low_thres;
388be488 583 break;
cbcdf4dd
JC
584 default:
585 return -EINVAL;
388be488 586 }
cbcdf4dd 587
6d59747e 588 return IIO_VAL_INT;
388be488
JC
589}
590
15fbc198 591static int tsl2563_write_thresh(struct iio_dev *indio_dev,
6d59747e
LPC
592 const struct iio_chan_spec *chan, enum iio_event_type type,
593 enum iio_event_direction dir, enum iio_event_info info, int val,
594 int val2)
388be488 595{
cbcdf4dd 596 struct tsl2563_chip *chip = iio_priv(indio_dev);
388be488 597 int ret;
cbcdf4dd 598 u8 address;
388be488 599
6d59747e 600 if (dir == IIO_EV_DIR_RISING)
cbcdf4dd
JC
601 address = TSL2563_REG_HIGHLOW;
602 else
603 address = TSL2563_REG_LOWLOW;
388be488 604 mutex_lock(&chip->lock);
d9b42c01
BF
605 ret = i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | address,
606 val & 0xFF);
388be488
JC
607 if (ret)
608 goto error_ret;
d9b42c01
BF
609 ret = i2c_smbus_write_byte_data(chip->client,
610 TSL2563_CMD | (address + 1),
611 (val >> 8) & 0xFF);
6d59747e 612 if (dir == IIO_EV_DIR_RISING)
388be488 613 chip->high_thres = val;
cbcdf4dd 614 else
388be488 615 chip->low_thres = val;
388be488
JC
616
617error_ret:
618 mutex_unlock(&chip->lock);
619
cbcdf4dd 620 return ret;
388be488
JC
621}
622
bdab1001 623static irqreturn_t tsl2563_event_handler(int irq, void *private)
388be488 624{
bdab1001 625 struct iio_dev *dev_info = private;
33789dce 626 struct tsl2563_chip *chip = iio_priv(dev_info);
388be488 627
5aa96188 628 iio_push_event(dev_info,
a3507e48 629 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY,
da1d8b68
JC
630 0,
631 IIO_EV_TYPE_THRESH,
632 IIO_EV_DIR_EITHER),
bc2b7dab 633 iio_get_time_ns(dev_info));
388be488 634
388be488 635 /* clear the interrupt and push the event */
d9b42c01 636 i2c_smbus_write_byte(chip->client, TSL2563_CMD | TSL2563_CLEARINT);
bdab1001 637 return IRQ_HANDLED;
388be488
JC
638}
639
cbcdf4dd 640static int tsl2563_write_interrupt_config(struct iio_dev *indio_dev,
6d59747e
LPC
641 const struct iio_chan_spec *chan, enum iio_event_type type,
642 enum iio_event_direction dir, int state)
388be488 643{
33789dce 644 struct tsl2563_chip *chip = iio_priv(indio_dev);
cbcdf4dd 645 int ret = 0;
388be488 646
388be488 647 mutex_lock(&chip->lock);
cbcdf4dd 648 if (state && !(chip->intr & 0x30)) {
388be488
JC
649 chip->intr &= ~0x30;
650 chip->intr |= 0x10;
651 /* ensure the chip is actually on */
652 cancel_delayed_work(&chip->poweroff_work);
653 if (!tsl2563_get_power(chip)) {
654 ret = tsl2563_set_power(chip, 1);
655 if (ret)
656 goto out;
657 ret = tsl2563_configure(chip);
658 if (ret)
659 goto out;
660 }
d9b42c01
BF
661 ret = i2c_smbus_write_byte_data(chip->client,
662 TSL2563_CMD | TSL2563_REG_INT,
663 chip->intr);
388be488
JC
664 chip->int_enabled = true;
665 }
666
cbcdf4dd 667 if (!state && (chip->intr & 0x30)) {
95273f89 668 chip->intr &= ~0x30;
d9b42c01
BF
669 ret = i2c_smbus_write_byte_data(chip->client,
670 TSL2563_CMD | TSL2563_REG_INT,
671 chip->intr);
388be488
JC
672 chip->int_enabled = false;
673 /* now the interrupt is not enabled, we can go to sleep */
674 schedule_delayed_work(&chip->poweroff_work, 5 * HZ);
675 }
676out:
677 mutex_unlock(&chip->lock);
678
cbcdf4dd 679 return ret;
388be488
JC
680}
681
cbcdf4dd 682static int tsl2563_read_interrupt_config(struct iio_dev *indio_dev,
6d59747e
LPC
683 const struct iio_chan_spec *chan, enum iio_event_type type,
684 enum iio_event_direction dir)
388be488 685{
cbcdf4dd 686 struct tsl2563_chip *chip = iio_priv(indio_dev);
cbcdf4dd 687 int ret;
388be488
JC
688
689 mutex_lock(&chip->lock);
d9b42c01
BF
690 ret = i2c_smbus_read_byte_data(chip->client,
691 TSL2563_CMD | TSL2563_REG_INT);
388be488
JC
692 mutex_unlock(&chip->lock);
693 if (ret < 0)
a722dcca 694 return ret;
388be488 695
a722dcca 696 return !!(ret & 0x30);
388be488 697}
388be488 698
6fe8135f
JC
699static const struct iio_info tsl2563_info_no_irq = {
700 .driver_module = THIS_MODULE,
9e4216fd
BF
701 .read_raw = &tsl2563_read_raw,
702 .write_raw = &tsl2563_write_raw,
6fe8135f
JC
703};
704
705static const struct iio_info tsl2563_info = {
706 .driver_module = THIS_MODULE,
6fe8135f
JC
707 .read_raw = &tsl2563_read_raw,
708 .write_raw = &tsl2563_write_raw,
cb955852
LPC
709 .read_event_value = &tsl2563_read_thresh,
710 .write_event_value = &tsl2563_write_thresh,
711 .read_event_config = &tsl2563_read_interrupt_config,
712 .write_event_config = &tsl2563_write_interrupt_config,
6fe8135f
JC
713};
714
4ae1c61f 715static int tsl2563_probe(struct i2c_client *client,
ee1f1fa4
AK
716 const struct i2c_device_id *device_id)
717{
33789dce 718 struct iio_dev *indio_dev;
ee1f1fa4
AK
719 struct tsl2563_chip *chip;
720 struct tsl2563_platform_data *pdata = client->dev.platform_data;
8175bff5 721 struct device_node *np = client->dev.of_node;
ee1f1fa4 722 int err = 0;
deda386d 723 u8 id = 0;
ee1f1fa4 724
bace48f4 725 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
33789dce 726 if (!indio_dev)
ee1f1fa4
AK
727 return -ENOMEM;
728
33789dce
JC
729 chip = iio_priv(indio_dev);
730
ee1f1fa4
AK
731 i2c_set_clientdata(client, chip);
732 chip->client = client;
733
734 err = tsl2563_detect(chip);
735 if (err) {
dbf717fd 736 dev_err(&client->dev, "detect error %d\n", -err);
bace48f4 737 return err;
ee1f1fa4
AK
738 }
739
740 err = tsl2563_read_id(chip, &id);
dbf717fd
GG
741 if (err) {
742 dev_err(&client->dev, "read id error %d\n", -err);
bace48f4 743 return err;
dbf717fd 744 }
ee1f1fa4
AK
745
746 mutex_init(&chip->lock);
747
748 /* Default values used until userspace says otherwise */
749 chip->low_thres = 0x0;
750 chip->high_thres = 0xffff;
751 chip->gainlevel = tsl2563_gainlevel_table;
752 chip->intr = TSL2563_INT_PERSIST(4);
6fa273c1
PM
753 chip->calib0 = tsl2563_calib_from_sysfs(CALIB_BASE_SYSFS);
754 chip->calib1 = tsl2563_calib_from_sysfs(CALIB_BASE_SYSFS);
ee1f1fa4
AK
755
756 if (pdata)
757 chip->cover_comp_gain = pdata->cover_comp_gain;
8175bff5
SR
758 else if (np)
759 of_property_read_u32(np, "amstaos,cover-comp-gain",
760 &chip->cover_comp_gain);
ee1f1fa4
AK
761 else
762 chip->cover_comp_gain = 1;
763
764 dev_info(&client->dev, "model %d, rev. %d\n", id >> 4, id & 0x0f);
cbcdf4dd
JC
765 indio_dev->name = client->name;
766 indio_dev->channels = tsl2563_channels;
767 indio_dev->num_channels = ARRAY_SIZE(tsl2563_channels);
33789dce 768 indio_dev->dev.parent = &client->dev;
33789dce 769 indio_dev->modes = INDIO_DIRECT_MODE;
dbf717fd 770
cbcdf4dd 771 if (client->irq)
6fe8135f
JC
772 indio_dev->info = &tsl2563_info;
773 else
774 indio_dev->info = &tsl2563_info_no_irq;
dbf717fd 775
388be488 776 if (client->irq) {
bace48f4 777 err = devm_request_threaded_irq(&client->dev, client->irq,
bdab1001
JC
778 NULL,
779 &tsl2563_event_handler,
780 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
781 "tsl2563_event",
782 indio_dev);
dbf717fd
GG
783 if (err) {
784 dev_err(&client->dev, "irq request error %d\n", -err);
bace48f4 785 return err;
dbf717fd 786 }
388be488 787 }
dbf717fd 788
ee1f1fa4 789 err = tsl2563_configure(chip);
dbf717fd
GG
790 if (err) {
791 dev_err(&client->dev, "configure error %d\n", -err);
bace48f4 792 return err;
dbf717fd 793 }
ee1f1fa4
AK
794
795 INIT_DELAYED_WORK(&chip->poweroff_work, tsl2563_poweroff_work);
dbf717fd 796
388be488 797 /* The interrupt cannot yet be enabled so this is fine without lock */
ee1f1fa4
AK
798 schedule_delayed_work(&chip->poweroff_work, 5 * HZ);
799
dbf717fd
GG
800 err = iio_device_register(indio_dev);
801 if (err) {
802 dev_err(&client->dev, "iio registration error %d\n", -err);
bace48f4 803 goto fail;
dbf717fd 804 }
26d25ae3 805
ee1f1fa4 806 return 0;
dbf717fd 807
bace48f4 808fail:
9e61d901 809 cancel_delayed_work_sync(&chip->poweroff_work);
ee1f1fa4
AK
810 return err;
811}
812
447d4f29 813static int tsl2563_remove(struct i2c_client *client)
ee1f1fa4
AK
814{
815 struct tsl2563_chip *chip = i2c_get_clientdata(client);
33789dce 816 struct iio_dev *indio_dev = iio_priv_to_dev(chip);
d2fffd6c
JC
817
818 iio_device_unregister(indio_dev);
388be488
JC
819 if (!chip->int_enabled)
820 cancel_delayed_work(&chip->poweroff_work);
821 /* Ensure that interrupts are disabled - then flush any bottom halves */
95273f89 822 chip->intr &= ~0x30;
d9b42c01
BF
823 i2c_smbus_write_byte_data(chip->client, TSL2563_CMD | TSL2563_REG_INT,
824 chip->intr);
388be488
JC
825 flush_scheduled_work();
826 tsl2563_set_power(chip, 0);
ee1f1fa4 827
ee1f1fa4
AK
828 return 0;
829}
830
01788c53
LPC
831#ifdef CONFIG_PM_SLEEP
832static int tsl2563_suspend(struct device *dev)
ee1f1fa4 833{
01788c53 834 struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev));
ee1f1fa4
AK
835 int ret;
836
837 mutex_lock(&chip->lock);
838
839 ret = tsl2563_set_power(chip, 0);
840 if (ret)
841 goto out;
842
01788c53 843 chip->suspended = true;
ee1f1fa4
AK
844
845out:
846 mutex_unlock(&chip->lock);
847 return ret;
848}
849
01788c53 850static int tsl2563_resume(struct device *dev)
ee1f1fa4 851{
01788c53 852 struct tsl2563_chip *chip = i2c_get_clientdata(to_i2c_client(dev));
ee1f1fa4
AK
853 int ret;
854
855 mutex_lock(&chip->lock);
856
857 ret = tsl2563_set_power(chip, 1);
858 if (ret)
859 goto out;
860
861 ret = tsl2563_configure(chip);
862 if (ret)
863 goto out;
864
01788c53 865 chip->suspended = false;
ee1f1fa4
AK
866
867out:
868 mutex_unlock(&chip->lock);
869 return ret;
870}
871
01788c53
LPC
872static SIMPLE_DEV_PM_OPS(tsl2563_pm_ops, tsl2563_suspend, tsl2563_resume);
873#define TSL2563_PM_OPS (&tsl2563_pm_ops)
874#else
875#define TSL2563_PM_OPS NULL
876#endif
877
ee1f1fa4 878static const struct i2c_device_id tsl2563_id[] = {
dbd5d239
JC
879 { "tsl2560", 0 },
880 { "tsl2561", 1 },
881 { "tsl2562", 2 },
882 { "tsl2563", 3 },
883 {}
ee1f1fa4
AK
884};
885MODULE_DEVICE_TABLE(i2c, tsl2563_id);
886
9d3922b2
JMC
887static const struct of_device_id tsl2563_of_match[] = {
888 { .compatible = "amstaos,tsl2560" },
889 { .compatible = "amstaos,tsl2561" },
890 { .compatible = "amstaos,tsl2562" },
891 { .compatible = "amstaos,tsl2563" },
892 {}
893};
894MODULE_DEVICE_TABLE(of, tsl2563_of_match);
895
ee1f1fa4
AK
896static struct i2c_driver tsl2563_i2c_driver = {
897 .driver = {
dbd5d239 898 .name = "tsl2563",
9d3922b2 899 .of_match_table = tsl2563_of_match,
01788c53 900 .pm = TSL2563_PM_OPS,
ee1f1fa4 901 },
ee1f1fa4 902 .probe = tsl2563_probe,
e543acf0 903 .remove = tsl2563_remove,
ee1f1fa4
AK
904 .id_table = tsl2563_id,
905};
6e5af184 906module_i2c_driver(tsl2563_i2c_driver);
ee1f1fa4
AK
907
908MODULE_AUTHOR("Nokia Corporation");
909MODULE_DESCRIPTION("tsl2563 light sensor driver");
910MODULE_LICENSE("GPL");