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abeb6b1e DB |
1 | /* |
2 | * MMC35240 - MEMSIC 3-axis Magnetic Sensor | |
3 | * | |
4 | * Copyright (c) 2015, Intel Corporation. | |
5 | * | |
6 | * This file is subject to the terms and conditions of version 2 of | |
7 | * the GNU General Public License. See the file COPYING in the main | |
8 | * directory of this archive for more details. | |
9 | * | |
10 | * IIO driver for MMC35240 (7-bit I2C slave address 0x30). | |
11 | * | |
12 | * TODO: offset, ACPI, continuous measurement mode, PM | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/init.h> | |
17 | #include <linux/i2c.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/regmap.h> | |
d11715f0 | 20 | #include <linux/acpi.h> |
553a776b | 21 | #include <linux/pm.h> |
abeb6b1e DB |
22 | |
23 | #include <linux/iio/iio.h> | |
24 | #include <linux/iio/sysfs.h> | |
25 | ||
26 | #define MMC35240_DRV_NAME "mmc35240" | |
27 | #define MMC35240_REGMAP_NAME "mmc35240_regmap" | |
28 | ||
29 | #define MMC35240_REG_XOUT_L 0x00 | |
30 | #define MMC35240_REG_XOUT_H 0x01 | |
31 | #define MMC35240_REG_YOUT_L 0x02 | |
32 | #define MMC35240_REG_YOUT_H 0x03 | |
33 | #define MMC35240_REG_ZOUT_L 0x04 | |
34 | #define MMC35240_REG_ZOUT_H 0x05 | |
35 | ||
36 | #define MMC35240_REG_STATUS 0x06 | |
37 | #define MMC35240_REG_CTRL0 0x07 | |
38 | #define MMC35240_REG_CTRL1 0x08 | |
39 | ||
40 | #define MMC35240_REG_ID 0x20 | |
41 | ||
42 | #define MMC35240_STATUS_MEAS_DONE_BIT BIT(0) | |
43 | ||
44 | #define MMC35240_CTRL0_REFILL_BIT BIT(7) | |
45 | #define MMC35240_CTRL0_RESET_BIT BIT(6) | |
46 | #define MMC35240_CTRL0_SET_BIT BIT(5) | |
47 | #define MMC35240_CTRL0_CMM_BIT BIT(1) | |
48 | #define MMC35240_CTRL0_TM_BIT BIT(0) | |
49 | ||
50 | /* output resolution bits */ | |
51 | #define MMC35240_CTRL1_BW0_BIT BIT(0) | |
52 | #define MMC35240_CTRL1_BW1_BIT BIT(1) | |
53 | ||
54 | #define MMC35240_CTRL1_BW_MASK (MMC35240_CTRL1_BW0_BIT | \ | |
55 | MMC35240_CTRL1_BW1_BIT) | |
56 | #define MMC35240_CTRL1_BW_SHIFT 0 | |
57 | ||
58 | #define MMC35240_WAIT_CHARGE_PUMP 50000 /* us */ | |
59 | #define MMC53240_WAIT_SET_RESET 1000 /* us */ | |
60 | ||
4892688d DB |
61 | /* |
62 | * Memsic OTP process code piece is put here for reference: | |
63 | * | |
64 | * #define OTP_CONVERT(REG) ((float)((REG) >=32 ? (32 - (REG)) : (REG)) * 0.006 | |
65 | * 1) For X axis, the COEFFICIENT is always 1. | |
66 | * 2) For Y axis, the COEFFICIENT is as below: | |
67 | * f_OTP_matrix[4] = OTP_CONVERT(((reg_data[1] & 0x03) << 4) | | |
68 | * (reg_data[2] >> 4)) + 1.0; | |
69 | * 3) For Z axis, the COEFFICIENT is as below: | |
70 | * f_OTP_matrix[8] = (OTP_CONVERT(reg_data[3] & 0x3f) + 1) * 1.35; | |
71 | * We implemented the OTP logic into driver. | |
72 | */ | |
73 | ||
74 | /* scale = 1000 here for Y otp */ | |
75 | #define MMC35240_OTP_CONVERT_Y(REG) (((REG) >= 32 ? (32 - (REG)) : (REG)) * 6) | |
76 | ||
77 | /* 0.6 * 1.35 = 0.81, scale 10000 for Z otp */ | |
78 | #define MMC35240_OTP_CONVERT_Z(REG) (((REG) >= 32 ? (32 - (REG)) : (REG)) * 81) | |
79 | ||
80 | #define MMC35240_X_COEFF(x) (x) | |
81 | #define MMC35240_Y_COEFF(y) (y + 1000) | |
82 | #define MMC35240_Z_COEFF(z) (z + 13500) | |
83 | ||
84 | #define MMC35240_OTP_START_ADDR 0x1B | |
85 | ||
abeb6b1e | 86 | enum mmc35240_resolution { |
c99389ad TB |
87 | MMC35240_16_BITS_SLOW = 0, /* 7.92 ms */ |
88 | MMC35240_16_BITS_FAST, /* 4.08 ms */ | |
89 | MMC35240_14_BITS, /* 2.16 ms */ | |
90 | MMC35240_12_BITS, /* 1.20 ms */ | |
abeb6b1e DB |
91 | }; |
92 | ||
93 | enum mmc35240_axis { | |
94 | AXIS_X = 0, | |
95 | AXIS_Y, | |
96 | AXIS_Z, | |
97 | }; | |
98 | ||
99 | static const struct { | |
100 | int sens[3]; /* sensitivity per X, Y, Z axis */ | |
101 | int nfo; /* null field output */ | |
102 | } mmc35240_props_table[] = { | |
c99389ad | 103 | /* 16 bits, 125Hz ODR */ |
abeb6b1e | 104 | { |
6b90da4b | 105 | {1024, 1024, 1024}, |
abeb6b1e DB |
106 | 32768, |
107 | }, | |
c99389ad | 108 | /* 16 bits, 250Hz ODR */ |
abeb6b1e DB |
109 | { |
110 | {1024, 1024, 770}, | |
111 | 32768, | |
112 | }, | |
c99389ad | 113 | /* 14 bits, 450Hz ODR */ |
abeb6b1e DB |
114 | { |
115 | {256, 256, 193}, | |
116 | 8192, | |
117 | }, | |
c99389ad | 118 | /* 12 bits, 800Hz ODR */ |
abeb6b1e DB |
119 | { |
120 | {64, 64, 48}, | |
121 | 2048, | |
122 | }, | |
123 | }; | |
124 | ||
125 | struct mmc35240_data { | |
126 | struct i2c_client *client; | |
127 | struct mutex mutex; | |
128 | struct regmap *regmap; | |
129 | enum mmc35240_resolution res; | |
4892688d DB |
130 | |
131 | /* OTP compensation */ | |
132 | int axis_coef[3]; | |
133 | int axis_scale[3]; | |
abeb6b1e DB |
134 | }; |
135 | ||
c99389ad TB |
136 | static const struct { |
137 | int val; | |
138 | int val2; | |
139 | } mmc35240_samp_freq[] = { {1, 500000}, | |
140 | {13, 0}, | |
141 | {25, 0}, | |
142 | {50, 0} }; | |
abeb6b1e | 143 | |
c99389ad | 144 | static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1.5 13 25 50"); |
abeb6b1e DB |
145 | |
146 | #define MMC35240_CHANNEL(_axis) { \ | |
147 | .type = IIO_MAGN, \ | |
148 | .modified = 1, \ | |
149 | .channel2 = IIO_MOD_ ## _axis, \ | |
150 | .address = AXIS_ ## _axis, \ | |
c2890547 DB |
151 | .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ |
152 | .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ | |
153 | BIT(IIO_CHAN_INFO_SCALE), \ | |
abeb6b1e DB |
154 | } |
155 | ||
156 | static const struct iio_chan_spec mmc35240_channels[] = { | |
157 | MMC35240_CHANNEL(X), | |
158 | MMC35240_CHANNEL(Y), | |
159 | MMC35240_CHANNEL(Z), | |
160 | }; | |
161 | ||
162 | static struct attribute *mmc35240_attributes[] = { | |
163 | &iio_const_attr_sampling_frequency_available.dev_attr.attr, | |
bd35a214 | 164 | NULL |
abeb6b1e DB |
165 | }; |
166 | ||
167 | static const struct attribute_group mmc35240_attribute_group = { | |
168 | .attrs = mmc35240_attributes, | |
169 | }; | |
170 | ||
171 | static int mmc35240_get_samp_freq_index(struct mmc35240_data *data, | |
172 | int val, int val2) | |
173 | { | |
174 | int i; | |
175 | ||
176 | for (i = 0; i < ARRAY_SIZE(mmc35240_samp_freq); i++) | |
c99389ad TB |
177 | if (mmc35240_samp_freq[i].val == val && |
178 | mmc35240_samp_freq[i].val2 == val2) | |
abeb6b1e DB |
179 | return i; |
180 | return -EINVAL; | |
181 | } | |
182 | ||
183 | static int mmc35240_hw_set(struct mmc35240_data *data, bool set) | |
184 | { | |
185 | int ret; | |
186 | u8 coil_bit; | |
187 | ||
188 | /* | |
189 | * Recharge the capacitor at VCAP pin, requested to be issued | |
190 | * before a SET/RESET command. | |
191 | */ | |
192 | ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL0, | |
193 | MMC35240_CTRL0_REFILL_BIT, | |
194 | MMC35240_CTRL0_REFILL_BIT); | |
195 | if (ret < 0) | |
196 | return ret; | |
197 | usleep_range(MMC35240_WAIT_CHARGE_PUMP, MMC35240_WAIT_CHARGE_PUMP + 1); | |
198 | ||
199 | if (set) | |
200 | coil_bit = MMC35240_CTRL0_SET_BIT; | |
201 | else | |
202 | coil_bit = MMC35240_CTRL0_RESET_BIT; | |
203 | ||
204 | return regmap_update_bits(data->regmap, MMC35240_REG_CTRL0, | |
3ceaa2c2 DB |
205 | coil_bit, coil_bit); |
206 | ||
abeb6b1e DB |
207 | } |
208 | ||
209 | static int mmc35240_init(struct mmc35240_data *data) | |
210 | { | |
4892688d | 211 | int ret, y_convert, z_convert; |
abeb6b1e | 212 | unsigned int reg_id; |
4892688d | 213 | u8 otp_data[6]; |
abeb6b1e DB |
214 | |
215 | ret = regmap_read(data->regmap, MMC35240_REG_ID, ®_id); | |
216 | if (ret < 0) { | |
217 | dev_err(&data->client->dev, "Error reading product id\n"); | |
218 | return ret; | |
219 | } | |
220 | ||
221 | dev_dbg(&data->client->dev, "MMC35240 chip id %x\n", reg_id); | |
222 | ||
223 | /* | |
224 | * make sure we restore sensor characteristics, by doing | |
225 | * a RESET/SET sequence | |
226 | */ | |
227 | ret = mmc35240_hw_set(data, false); | |
228 | if (ret < 0) | |
229 | return ret; | |
230 | usleep_range(MMC53240_WAIT_SET_RESET, MMC53240_WAIT_SET_RESET + 1); | |
231 | ||
232 | ret = mmc35240_hw_set(data, true); | |
233 | if (ret < 0) | |
234 | return ret; | |
235 | ||
236 | /* set default sampling frequency */ | |
4892688d DB |
237 | ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL1, |
238 | MMC35240_CTRL1_BW_MASK, | |
239 | data->res << MMC35240_CTRL1_BW_SHIFT); | |
240 | if (ret < 0) | |
241 | return ret; | |
242 | ||
243 | ret = regmap_bulk_read(data->regmap, MMC35240_OTP_START_ADDR, | |
244 | (u8 *)otp_data, sizeof(otp_data)); | |
245 | if (ret < 0) | |
246 | return ret; | |
247 | ||
248 | y_convert = MMC35240_OTP_CONVERT_Y(((otp_data[1] & 0x03) << 4) | | |
249 | (otp_data[2] >> 4)); | |
250 | z_convert = MMC35240_OTP_CONVERT_Z(otp_data[3] & 0x3f); | |
251 | ||
252 | data->axis_coef[0] = MMC35240_X_COEFF(1); | |
253 | data->axis_coef[1] = MMC35240_Y_COEFF(y_convert); | |
254 | data->axis_coef[2] = MMC35240_Z_COEFF(z_convert); | |
255 | ||
256 | data->axis_scale[0] = 1; | |
257 | data->axis_scale[1] = 1000; | |
258 | data->axis_scale[2] = 10000; | |
259 | ||
260 | return 0; | |
abeb6b1e DB |
261 | } |
262 | ||
263 | static int mmc35240_take_measurement(struct mmc35240_data *data) | |
264 | { | |
265 | int ret, tries = 100; | |
266 | unsigned int reg_status; | |
267 | ||
268 | ret = regmap_write(data->regmap, MMC35240_REG_CTRL0, | |
269 | MMC35240_CTRL0_TM_BIT); | |
270 | if (ret < 0) | |
271 | return ret; | |
272 | ||
273 | while (tries-- > 0) { | |
274 | ret = regmap_read(data->regmap, MMC35240_REG_STATUS, | |
275 | ®_status); | |
276 | if (ret < 0) | |
277 | return ret; | |
278 | if (reg_status & MMC35240_STATUS_MEAS_DONE_BIT) | |
279 | break; | |
787f55c4 DB |
280 | /* minimum wait time to complete measurement is 10 ms */ |
281 | usleep_range(10000, 11000); | |
abeb6b1e DB |
282 | } |
283 | ||
284 | if (tries < 0) { | |
285 | dev_err(&data->client->dev, "data not ready\n"); | |
286 | return -EIO; | |
287 | } | |
288 | ||
289 | return 0; | |
290 | } | |
291 | ||
292 | static int mmc35240_read_measurement(struct mmc35240_data *data, __le16 buf[3]) | |
293 | { | |
294 | int ret; | |
295 | ||
296 | ret = mmc35240_take_measurement(data); | |
297 | if (ret < 0) | |
298 | return ret; | |
299 | ||
300 | return regmap_bulk_read(data->regmap, MMC35240_REG_XOUT_L, (u8 *)buf, | |
301 | 3 * sizeof(__le16)); | |
302 | } | |
303 | ||
c2890547 DB |
304 | /** |
305 | * mmc35240_raw_to_mgauss - convert raw readings to milli gauss. Also apply | |
306 | compensation for output value. | |
307 | * | |
308 | * @data: device private data | |
309 | * @index: axis index for which we want the conversion | |
310 | * @buf: raw data to be converted, 2 bytes in little endian format | |
311 | * @val: compensated output reading (unit is milli gauss) | |
312 | * | |
313 | * Returns: 0 in case of success, -EINVAL when @index is not valid | |
314 | */ | |
315 | static int mmc35240_raw_to_mgauss(struct mmc35240_data *data, int index, | |
316 | __le16 buf[], int *val) | |
abeb6b1e DB |
317 | { |
318 | int raw_x, raw_y, raw_z; | |
319 | int sens_x, sens_y, sens_z; | |
320 | int nfo; | |
321 | ||
322 | raw_x = le16_to_cpu(buf[AXIS_X]); | |
323 | raw_y = le16_to_cpu(buf[AXIS_Y]); | |
324 | raw_z = le16_to_cpu(buf[AXIS_Z]); | |
325 | ||
326 | sens_x = mmc35240_props_table[data->res].sens[AXIS_X]; | |
327 | sens_y = mmc35240_props_table[data->res].sens[AXIS_Y]; | |
328 | sens_z = mmc35240_props_table[data->res].sens[AXIS_Z]; | |
329 | ||
330 | nfo = mmc35240_props_table[data->res].nfo; | |
331 | ||
332 | switch (index) { | |
333 | case AXIS_X: | |
c2890547 | 334 | *val = (raw_x - nfo) * 1000 / sens_x; |
abeb6b1e DB |
335 | break; |
336 | case AXIS_Y: | |
c2890547 DB |
337 | *val = (raw_y - nfo) * 1000 / sens_y - |
338 | (raw_z - nfo) * 1000 / sens_z; | |
abeb6b1e DB |
339 | break; |
340 | case AXIS_Z: | |
c2890547 DB |
341 | *val = (raw_y - nfo) * 1000 / sens_y + |
342 | (raw_z - nfo) * 1000 / sens_z; | |
abeb6b1e DB |
343 | break; |
344 | default: | |
345 | return -EINVAL; | |
346 | } | |
4892688d DB |
347 | /* apply OTP compensation */ |
348 | *val = (*val) * data->axis_coef[index] / data->axis_scale[index]; | |
349 | ||
abeb6b1e DB |
350 | return 0; |
351 | } | |
352 | ||
353 | static int mmc35240_read_raw(struct iio_dev *indio_dev, | |
354 | struct iio_chan_spec const *chan, int *val, | |
355 | int *val2, long mask) | |
356 | { | |
357 | struct mmc35240_data *data = iio_priv(indio_dev); | |
358 | int ret, i; | |
359 | unsigned int reg; | |
360 | __le16 buf[3]; | |
361 | ||
362 | switch (mask) { | |
c2890547 | 363 | case IIO_CHAN_INFO_RAW: |
abeb6b1e DB |
364 | mutex_lock(&data->mutex); |
365 | ret = mmc35240_read_measurement(data, buf); | |
366 | mutex_unlock(&data->mutex); | |
367 | if (ret < 0) | |
368 | return ret; | |
c2890547 | 369 | ret = mmc35240_raw_to_mgauss(data, chan->address, buf, val); |
abeb6b1e DB |
370 | if (ret < 0) |
371 | return ret; | |
c2890547 DB |
372 | return IIO_VAL_INT; |
373 | case IIO_CHAN_INFO_SCALE: | |
374 | *val = 0; | |
375 | *val2 = 1000; | |
abeb6b1e DB |
376 | return IIO_VAL_INT_PLUS_MICRO; |
377 | case IIO_CHAN_INFO_SAMP_FREQ: | |
378 | mutex_lock(&data->mutex); | |
379 | ret = regmap_read(data->regmap, MMC35240_REG_CTRL1, ®); | |
380 | mutex_unlock(&data->mutex); | |
381 | if (ret < 0) | |
382 | return ret; | |
383 | ||
384 | i = (reg & MMC35240_CTRL1_BW_MASK) >> MMC35240_CTRL1_BW_SHIFT; | |
5517547b | 385 | if (i < 0 || i >= ARRAY_SIZE(mmc35240_samp_freq)) |
abeb6b1e DB |
386 | return -EINVAL; |
387 | ||
c99389ad TB |
388 | *val = mmc35240_samp_freq[i].val; |
389 | *val2 = mmc35240_samp_freq[i].val2; | |
390 | return IIO_VAL_INT_PLUS_MICRO; | |
abeb6b1e DB |
391 | default: |
392 | return -EINVAL; | |
393 | } | |
394 | } | |
395 | ||
396 | static int mmc35240_write_raw(struct iio_dev *indio_dev, | |
397 | struct iio_chan_spec const *chan, int val, | |
398 | int val2, long mask) | |
399 | { | |
400 | struct mmc35240_data *data = iio_priv(indio_dev); | |
401 | int i, ret; | |
402 | ||
403 | switch (mask) { | |
404 | case IIO_CHAN_INFO_SAMP_FREQ: | |
405 | i = mmc35240_get_samp_freq_index(data, val, val2); | |
406 | if (i < 0) | |
407 | return -EINVAL; | |
408 | mutex_lock(&data->mutex); | |
409 | ret = regmap_update_bits(data->regmap, MMC35240_REG_CTRL1, | |
410 | MMC35240_CTRL1_BW_MASK, | |
411 | i << MMC35240_CTRL1_BW_SHIFT); | |
412 | mutex_unlock(&data->mutex); | |
413 | return ret; | |
414 | default: | |
415 | return -EINVAL; | |
416 | } | |
417 | } | |
418 | ||
419 | static const struct iio_info mmc35240_info = { | |
420 | .driver_module = THIS_MODULE, | |
421 | .read_raw = mmc35240_read_raw, | |
422 | .write_raw = mmc35240_write_raw, | |
423 | .attrs = &mmc35240_attribute_group, | |
424 | }; | |
425 | ||
426 | static bool mmc35240_is_writeable_reg(struct device *dev, unsigned int reg) | |
427 | { | |
428 | switch (reg) { | |
429 | case MMC35240_REG_CTRL0: | |
430 | case MMC35240_REG_CTRL1: | |
431 | return true; | |
432 | default: | |
433 | return false; | |
434 | } | |
435 | } | |
436 | ||
437 | static bool mmc35240_is_readable_reg(struct device *dev, unsigned int reg) | |
438 | { | |
439 | switch (reg) { | |
440 | case MMC35240_REG_XOUT_L: | |
441 | case MMC35240_REG_XOUT_H: | |
442 | case MMC35240_REG_YOUT_L: | |
443 | case MMC35240_REG_YOUT_H: | |
444 | case MMC35240_REG_ZOUT_L: | |
445 | case MMC35240_REG_ZOUT_H: | |
446 | case MMC35240_REG_STATUS: | |
447 | case MMC35240_REG_ID: | |
448 | return true; | |
449 | default: | |
450 | return false; | |
451 | } | |
452 | } | |
453 | ||
454 | static bool mmc35240_is_volatile_reg(struct device *dev, unsigned int reg) | |
455 | { | |
456 | switch (reg) { | |
457 | case MMC35240_REG_CTRL0: | |
458 | case MMC35240_REG_CTRL1: | |
459 | return false; | |
460 | default: | |
461 | return true; | |
462 | } | |
463 | } | |
464 | ||
465 | static struct reg_default mmc35240_reg_defaults[] = { | |
466 | { MMC35240_REG_CTRL0, 0x00 }, | |
467 | { MMC35240_REG_CTRL1, 0x00 }, | |
468 | }; | |
469 | ||
470 | static const struct regmap_config mmc35240_regmap_config = { | |
471 | .name = MMC35240_REGMAP_NAME, | |
472 | ||
473 | .reg_bits = 8, | |
474 | .val_bits = 8, | |
475 | ||
476 | .max_register = MMC35240_REG_ID, | |
477 | .cache_type = REGCACHE_FLAT, | |
478 | ||
479 | .writeable_reg = mmc35240_is_writeable_reg, | |
480 | .readable_reg = mmc35240_is_readable_reg, | |
481 | .volatile_reg = mmc35240_is_volatile_reg, | |
482 | ||
483 | .reg_defaults = mmc35240_reg_defaults, | |
484 | .num_reg_defaults = ARRAY_SIZE(mmc35240_reg_defaults), | |
485 | }; | |
486 | ||
487 | static int mmc35240_probe(struct i2c_client *client, | |
488 | const struct i2c_device_id *id) | |
489 | { | |
490 | struct mmc35240_data *data; | |
491 | struct iio_dev *indio_dev; | |
492 | struct regmap *regmap; | |
493 | int ret; | |
494 | ||
495 | indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); | |
496 | if (!indio_dev) | |
497 | return -ENOMEM; | |
498 | ||
499 | regmap = devm_regmap_init_i2c(client, &mmc35240_regmap_config); | |
500 | if (IS_ERR(regmap)) { | |
501 | dev_err(&client->dev, "regmap initialization failed\n"); | |
502 | return PTR_ERR(regmap); | |
503 | } | |
504 | ||
505 | data = iio_priv(indio_dev); | |
8b14821a | 506 | i2c_set_clientdata(client, indio_dev); |
abeb6b1e DB |
507 | data->client = client; |
508 | data->regmap = regmap; | |
509 | data->res = MMC35240_16_BITS_SLOW; | |
510 | ||
511 | mutex_init(&data->mutex); | |
512 | ||
513 | indio_dev->dev.parent = &client->dev; | |
514 | indio_dev->info = &mmc35240_info; | |
515 | indio_dev->name = MMC35240_DRV_NAME; | |
516 | indio_dev->channels = mmc35240_channels; | |
517 | indio_dev->num_channels = ARRAY_SIZE(mmc35240_channels); | |
518 | indio_dev->modes = INDIO_DIRECT_MODE; | |
519 | ||
520 | ret = mmc35240_init(data); | |
521 | if (ret < 0) { | |
522 | dev_err(&client->dev, "mmc35240 chip init failed\n"); | |
523 | return ret; | |
524 | } | |
525 | return devm_iio_device_register(&client->dev, indio_dev); | |
526 | } | |
527 | ||
553a776b DB |
528 | #ifdef CONFIG_PM_SLEEP |
529 | static int mmc35240_suspend(struct device *dev) | |
530 | { | |
531 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
532 | struct mmc35240_data *data = iio_priv(indio_dev); | |
533 | ||
534 | regcache_cache_only(data->regmap, true); | |
535 | ||
536 | return 0; | |
537 | } | |
538 | ||
539 | static int mmc35240_resume(struct device *dev) | |
540 | { | |
541 | struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); | |
542 | struct mmc35240_data *data = iio_priv(indio_dev); | |
543 | int ret; | |
544 | ||
545 | regcache_mark_dirty(data->regmap); | |
546 | ret = regcache_sync_region(data->regmap, MMC35240_REG_CTRL0, | |
547 | MMC35240_REG_CTRL1); | |
548 | if (ret < 0) | |
549 | dev_err(dev, "Failed to restore control registers\n"); | |
550 | ||
551 | regcache_cache_only(data->regmap, false); | |
552 | ||
553 | return 0; | |
554 | } | |
555 | #endif | |
556 | ||
557 | static const struct dev_pm_ops mmc35240_pm_ops = { | |
558 | SET_SYSTEM_SLEEP_PM_OPS(mmc35240_suspend, mmc35240_resume) | |
559 | }; | |
560 | ||
d11715f0 DB |
561 | static const struct acpi_device_id mmc35240_acpi_match[] = { |
562 | {"MMC35240", 0}, | |
563 | { }, | |
564 | }; | |
565 | MODULE_DEVICE_TABLE(acpi, mmc35240_acpi_match); | |
566 | ||
abeb6b1e | 567 | static const struct i2c_device_id mmc35240_id[] = { |
a52ffebc | 568 | {"mmc35240", 0}, |
abeb6b1e DB |
569 | {} |
570 | }; | |
571 | MODULE_DEVICE_TABLE(i2c, mmc35240_id); | |
572 | ||
573 | static struct i2c_driver mmc35240_driver = { | |
574 | .driver = { | |
575 | .name = MMC35240_DRV_NAME, | |
553a776b | 576 | .pm = &mmc35240_pm_ops, |
d11715f0 | 577 | .acpi_match_table = ACPI_PTR(mmc35240_acpi_match), |
abeb6b1e DB |
578 | }, |
579 | .probe = mmc35240_probe, | |
580 | .id_table = mmc35240_id, | |
581 | }; | |
582 | ||
583 | module_i2c_driver(mmc35240_driver); | |
584 | ||
585 | MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>"); | |
586 | MODULE_DESCRIPTION("MEMSIC MMC35240 magnetic sensor driver"); | |
587 | MODULE_LICENSE("GPL v2"); |