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1da177e4 LT |
1 | /* |
2 | * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved. | |
3 | * Copyright (c) 2004 Infinicon Corporation. All rights reserved. | |
4 | * Copyright (c) 2004 Intel Corporation. All rights reserved. | |
5 | * Copyright (c) 2004 Topspin Corporation. All rights reserved. | |
6 | * Copyright (c) 2004 Voltaire Corporation. All rights reserved. | |
2a1d9b7f | 7 | * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. |
33b9b3ee | 8 | * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved. |
1da177e4 LT |
9 | * |
10 | * This software is available to you under a choice of one of two | |
11 | * licenses. You may choose to be licensed under the terms of the GNU | |
12 | * General Public License (GPL) Version 2, available from the file | |
13 | * COPYING in the main directory of this source tree, or the | |
14 | * OpenIB.org BSD license below: | |
15 | * | |
16 | * Redistribution and use in source and binary forms, with or | |
17 | * without modification, are permitted provided that the following | |
18 | * conditions are met: | |
19 | * | |
20 | * - Redistributions of source code must retain the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer. | |
23 | * | |
24 | * - Redistributions in binary form must reproduce the above | |
25 | * copyright notice, this list of conditions and the following | |
26 | * disclaimer in the documentation and/or other materials | |
27 | * provided with the distribution. | |
28 | * | |
29 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
30 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
31 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
32 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
33 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
34 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
35 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
36 | * SOFTWARE. | |
1da177e4 LT |
37 | */ |
38 | ||
39 | #include <linux/errno.h> | |
40 | #include <linux/err.h> | |
b108d976 | 41 | #include <linux/export.h> |
8c65b4a6 | 42 | #include <linux/string.h> |
0e0ec7e0 | 43 | #include <linux/slab.h> |
dbf727de MB |
44 | #include <linux/in.h> |
45 | #include <linux/in6.h> | |
46 | #include <net/addrconf.h> | |
d291f1a6 | 47 | #include <linux/security.h> |
1da177e4 | 48 | |
a4d61e84 RD |
49 | #include <rdma/ib_verbs.h> |
50 | #include <rdma/ib_cache.h> | |
dd5f03be | 51 | #include <rdma/ib_addr.h> |
a060b562 | 52 | #include <rdma/rw.h> |
1da177e4 | 53 | |
ed4c54e5 | 54 | #include "core_priv.h" |
1da177e4 | 55 | |
2b1b5b60 SG |
56 | static const char * const ib_events[] = { |
57 | [IB_EVENT_CQ_ERR] = "CQ error", | |
58 | [IB_EVENT_QP_FATAL] = "QP fatal error", | |
59 | [IB_EVENT_QP_REQ_ERR] = "QP request error", | |
60 | [IB_EVENT_QP_ACCESS_ERR] = "QP access error", | |
61 | [IB_EVENT_COMM_EST] = "communication established", | |
62 | [IB_EVENT_SQ_DRAINED] = "send queue drained", | |
63 | [IB_EVENT_PATH_MIG] = "path migration successful", | |
64 | [IB_EVENT_PATH_MIG_ERR] = "path migration error", | |
65 | [IB_EVENT_DEVICE_FATAL] = "device fatal error", | |
66 | [IB_EVENT_PORT_ACTIVE] = "port active", | |
67 | [IB_EVENT_PORT_ERR] = "port error", | |
68 | [IB_EVENT_LID_CHANGE] = "LID change", | |
69 | [IB_EVENT_PKEY_CHANGE] = "P_key change", | |
70 | [IB_EVENT_SM_CHANGE] = "SM change", | |
71 | [IB_EVENT_SRQ_ERR] = "SRQ error", | |
72 | [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached", | |
73 | [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached", | |
74 | [IB_EVENT_CLIENT_REREGISTER] = "client reregister", | |
75 | [IB_EVENT_GID_CHANGE] = "GID changed", | |
76 | }; | |
77 | ||
db7489e0 | 78 | const char *__attribute_const__ ib_event_msg(enum ib_event_type event) |
2b1b5b60 SG |
79 | { |
80 | size_t index = event; | |
81 | ||
82 | return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ? | |
83 | ib_events[index] : "unrecognized event"; | |
84 | } | |
85 | EXPORT_SYMBOL(ib_event_msg); | |
86 | ||
87 | static const char * const wc_statuses[] = { | |
88 | [IB_WC_SUCCESS] = "success", | |
89 | [IB_WC_LOC_LEN_ERR] = "local length error", | |
90 | [IB_WC_LOC_QP_OP_ERR] = "local QP operation error", | |
91 | [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error", | |
92 | [IB_WC_LOC_PROT_ERR] = "local protection error", | |
93 | [IB_WC_WR_FLUSH_ERR] = "WR flushed", | |
94 | [IB_WC_MW_BIND_ERR] = "memory management operation error", | |
95 | [IB_WC_BAD_RESP_ERR] = "bad response error", | |
96 | [IB_WC_LOC_ACCESS_ERR] = "local access error", | |
97 | [IB_WC_REM_INV_REQ_ERR] = "invalid request error", | |
98 | [IB_WC_REM_ACCESS_ERR] = "remote access error", | |
99 | [IB_WC_REM_OP_ERR] = "remote operation error", | |
100 | [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded", | |
101 | [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded", | |
102 | [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error", | |
103 | [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request", | |
104 | [IB_WC_REM_ABORT_ERR] = "operation aborted", | |
105 | [IB_WC_INV_EECN_ERR] = "invalid EE context number", | |
106 | [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state", | |
107 | [IB_WC_FATAL_ERR] = "fatal error", | |
108 | [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error", | |
109 | [IB_WC_GENERAL_ERR] = "general error", | |
110 | }; | |
111 | ||
db7489e0 | 112 | const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status) |
2b1b5b60 SG |
113 | { |
114 | size_t index = status; | |
115 | ||
116 | return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ? | |
117 | wc_statuses[index] : "unrecognized status"; | |
118 | } | |
119 | EXPORT_SYMBOL(ib_wc_status_msg); | |
120 | ||
8385fd84 | 121 | __attribute_const__ int ib_rate_to_mult(enum ib_rate rate) |
bf6a9e31 JM |
122 | { |
123 | switch (rate) { | |
124 | case IB_RATE_2_5_GBPS: return 1; | |
125 | case IB_RATE_5_GBPS: return 2; | |
126 | case IB_RATE_10_GBPS: return 4; | |
127 | case IB_RATE_20_GBPS: return 8; | |
128 | case IB_RATE_30_GBPS: return 12; | |
129 | case IB_RATE_40_GBPS: return 16; | |
130 | case IB_RATE_60_GBPS: return 24; | |
131 | case IB_RATE_80_GBPS: return 32; | |
132 | case IB_RATE_120_GBPS: return 48; | |
133 | default: return -1; | |
134 | } | |
135 | } | |
136 | EXPORT_SYMBOL(ib_rate_to_mult); | |
137 | ||
8385fd84 | 138 | __attribute_const__ enum ib_rate mult_to_ib_rate(int mult) |
bf6a9e31 JM |
139 | { |
140 | switch (mult) { | |
141 | case 1: return IB_RATE_2_5_GBPS; | |
142 | case 2: return IB_RATE_5_GBPS; | |
143 | case 4: return IB_RATE_10_GBPS; | |
144 | case 8: return IB_RATE_20_GBPS; | |
145 | case 12: return IB_RATE_30_GBPS; | |
146 | case 16: return IB_RATE_40_GBPS; | |
147 | case 24: return IB_RATE_60_GBPS; | |
148 | case 32: return IB_RATE_80_GBPS; | |
149 | case 48: return IB_RATE_120_GBPS; | |
150 | default: return IB_RATE_PORT_CURRENT; | |
151 | } | |
152 | } | |
153 | EXPORT_SYMBOL(mult_to_ib_rate); | |
154 | ||
8385fd84 | 155 | __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate) |
71eeba16 MA |
156 | { |
157 | switch (rate) { | |
158 | case IB_RATE_2_5_GBPS: return 2500; | |
159 | case IB_RATE_5_GBPS: return 5000; | |
160 | case IB_RATE_10_GBPS: return 10000; | |
161 | case IB_RATE_20_GBPS: return 20000; | |
162 | case IB_RATE_30_GBPS: return 30000; | |
163 | case IB_RATE_40_GBPS: return 40000; | |
164 | case IB_RATE_60_GBPS: return 60000; | |
165 | case IB_RATE_80_GBPS: return 80000; | |
166 | case IB_RATE_120_GBPS: return 120000; | |
167 | case IB_RATE_14_GBPS: return 14062; | |
168 | case IB_RATE_56_GBPS: return 56250; | |
169 | case IB_RATE_112_GBPS: return 112500; | |
170 | case IB_RATE_168_GBPS: return 168750; | |
171 | case IB_RATE_25_GBPS: return 25781; | |
172 | case IB_RATE_100_GBPS: return 103125; | |
173 | case IB_RATE_200_GBPS: return 206250; | |
174 | case IB_RATE_300_GBPS: return 309375; | |
175 | default: return -1; | |
176 | } | |
177 | } | |
178 | EXPORT_SYMBOL(ib_rate_to_mbps); | |
179 | ||
8385fd84 | 180 | __attribute_const__ enum rdma_transport_type |
07ebafba TT |
181 | rdma_node_get_transport(enum rdma_node_type node_type) |
182 | { | |
183 | switch (node_type) { | |
184 | case RDMA_NODE_IB_CA: | |
185 | case RDMA_NODE_IB_SWITCH: | |
186 | case RDMA_NODE_IB_ROUTER: | |
187 | return RDMA_TRANSPORT_IB; | |
188 | case RDMA_NODE_RNIC: | |
189 | return RDMA_TRANSPORT_IWARP; | |
180771a3 | 190 | case RDMA_NODE_USNIC: |
5db5765e UM |
191 | return RDMA_TRANSPORT_USNIC; |
192 | case RDMA_NODE_USNIC_UDP: | |
248567f7 | 193 | return RDMA_TRANSPORT_USNIC_UDP; |
07ebafba TT |
194 | default: |
195 | BUG(); | |
196 | return 0; | |
197 | } | |
198 | } | |
199 | EXPORT_SYMBOL(rdma_node_get_transport); | |
200 | ||
a3f5adaf EC |
201 | enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num) |
202 | { | |
203 | if (device->get_link_layer) | |
204 | return device->get_link_layer(device, port_num); | |
205 | ||
206 | switch (rdma_node_get_transport(device->node_type)) { | |
207 | case RDMA_TRANSPORT_IB: | |
208 | return IB_LINK_LAYER_INFINIBAND; | |
209 | case RDMA_TRANSPORT_IWARP: | |
180771a3 | 210 | case RDMA_TRANSPORT_USNIC: |
248567f7 | 211 | case RDMA_TRANSPORT_USNIC_UDP: |
a3f5adaf EC |
212 | return IB_LINK_LAYER_ETHERNET; |
213 | default: | |
214 | return IB_LINK_LAYER_UNSPECIFIED; | |
215 | } | |
216 | } | |
217 | EXPORT_SYMBOL(rdma_port_get_link_layer); | |
218 | ||
1da177e4 LT |
219 | /* Protection domains */ |
220 | ||
96249d70 JG |
221 | /** |
222 | * ib_alloc_pd - Allocates an unused protection domain. | |
223 | * @device: The device on which to allocate the protection domain. | |
224 | * | |
225 | * A protection domain object provides an association between QPs, shared | |
226 | * receive queues, address handles, memory regions, and memory windows. | |
227 | * | |
228 | * Every PD has a local_dma_lkey which can be used as the lkey value for local | |
229 | * memory operations. | |
230 | */ | |
ed082d36 CH |
231 | struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags, |
232 | const char *caller) | |
1da177e4 LT |
233 | { |
234 | struct ib_pd *pd; | |
ed082d36 | 235 | int mr_access_flags = 0; |
1da177e4 | 236 | |
b5e81bf5 | 237 | pd = device->alloc_pd(device, NULL, NULL); |
96249d70 JG |
238 | if (IS_ERR(pd)) |
239 | return pd; | |
1da177e4 | 240 | |
96249d70 JG |
241 | pd->device = device; |
242 | pd->uobject = NULL; | |
50d46335 | 243 | pd->__internal_mr = NULL; |
96249d70 | 244 | atomic_set(&pd->usecnt, 0); |
ed082d36 | 245 | pd->flags = flags; |
1da177e4 | 246 | |
86bee4c9 | 247 | if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY) |
96249d70 | 248 | pd->local_dma_lkey = device->local_dma_lkey; |
ed082d36 CH |
249 | else |
250 | mr_access_flags |= IB_ACCESS_LOCAL_WRITE; | |
251 | ||
252 | if (flags & IB_PD_UNSAFE_GLOBAL_RKEY) { | |
253 | pr_warn("%s: enabling unsafe global rkey\n", caller); | |
254 | mr_access_flags |= IB_ACCESS_REMOTE_READ | IB_ACCESS_REMOTE_WRITE; | |
255 | } | |
256 | ||
257 | if (mr_access_flags) { | |
96249d70 JG |
258 | struct ib_mr *mr; |
259 | ||
5ef990f0 | 260 | mr = pd->device->get_dma_mr(pd, mr_access_flags); |
96249d70 JG |
261 | if (IS_ERR(mr)) { |
262 | ib_dealloc_pd(pd); | |
5ef990f0 | 263 | return ERR_CAST(mr); |
96249d70 | 264 | } |
1da177e4 | 265 | |
5ef990f0 CH |
266 | mr->device = pd->device; |
267 | mr->pd = pd; | |
268 | mr->uobject = NULL; | |
269 | mr->need_inval = false; | |
270 | ||
50d46335 | 271 | pd->__internal_mr = mr; |
ed082d36 CH |
272 | |
273 | if (!(device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)) | |
274 | pd->local_dma_lkey = pd->__internal_mr->lkey; | |
275 | ||
276 | if (flags & IB_PD_UNSAFE_GLOBAL_RKEY) | |
277 | pd->unsafe_global_rkey = pd->__internal_mr->rkey; | |
1da177e4 | 278 | } |
ed082d36 | 279 | |
1da177e4 LT |
280 | return pd; |
281 | } | |
ed082d36 | 282 | EXPORT_SYMBOL(__ib_alloc_pd); |
1da177e4 | 283 | |
7dd78647 JG |
284 | /** |
285 | * ib_dealloc_pd - Deallocates a protection domain. | |
286 | * @pd: The protection domain to deallocate. | |
287 | * | |
288 | * It is an error to call this function while any resources in the pd still | |
289 | * exist. The caller is responsible to synchronously destroy them and | |
290 | * guarantee no new allocations will happen. | |
291 | */ | |
292 | void ib_dealloc_pd(struct ib_pd *pd) | |
1da177e4 | 293 | { |
7dd78647 JG |
294 | int ret; |
295 | ||
50d46335 | 296 | if (pd->__internal_mr) { |
5ef990f0 | 297 | ret = pd->device->dereg_mr(pd->__internal_mr); |
7dd78647 | 298 | WARN_ON(ret); |
50d46335 | 299 | pd->__internal_mr = NULL; |
96249d70 | 300 | } |
1da177e4 | 301 | |
7dd78647 JG |
302 | /* uverbs manipulates usecnt with proper locking, while the kabi |
303 | requires the caller to guarantee we can't race here. */ | |
304 | WARN_ON(atomic_read(&pd->usecnt)); | |
1da177e4 | 305 | |
7dd78647 JG |
306 | /* Making delalloc_pd a void return is a WIP, no driver should return |
307 | an error here. */ | |
308 | ret = pd->device->dealloc_pd(pd); | |
309 | WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd"); | |
1da177e4 LT |
310 | } |
311 | EXPORT_SYMBOL(ib_dealloc_pd); | |
312 | ||
313 | /* Address handles */ | |
314 | ||
0a18cfe4 | 315 | struct ib_ah *rdma_create_ah(struct ib_pd *pd, struct rdma_ah_attr *ah_attr) |
1da177e4 LT |
316 | { |
317 | struct ib_ah *ah; | |
318 | ||
477864c8 | 319 | ah = pd->device->create_ah(pd, ah_attr, NULL); |
1da177e4 LT |
320 | |
321 | if (!IS_ERR(ah)) { | |
b5e81bf5 RD |
322 | ah->device = pd->device; |
323 | ah->pd = pd; | |
324 | ah->uobject = NULL; | |
44c58487 | 325 | ah->type = ah_attr->type; |
1da177e4 LT |
326 | atomic_inc(&pd->usecnt); |
327 | } | |
328 | ||
329 | return ah; | |
330 | } | |
0a18cfe4 | 331 | EXPORT_SYMBOL(rdma_create_ah); |
1da177e4 | 332 | |
850d8fd7 | 333 | int ib_get_rdma_header_version(const union rdma_network_hdr *hdr) |
c865f246 SK |
334 | { |
335 | const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh; | |
336 | struct iphdr ip4h_checked; | |
337 | const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh; | |
338 | ||
339 | /* If it's IPv6, the version must be 6, otherwise, the first | |
340 | * 20 bytes (before the IPv4 header) are garbled. | |
341 | */ | |
342 | if (ip6h->version != 6) | |
343 | return (ip4h->version == 4) ? 4 : 0; | |
344 | /* version may be 6 or 4 because the first 20 bytes could be garbled */ | |
345 | ||
346 | /* RoCE v2 requires no options, thus header length | |
347 | * must be 5 words | |
348 | */ | |
349 | if (ip4h->ihl != 5) | |
350 | return 6; | |
351 | ||
352 | /* Verify checksum. | |
353 | * We can't write on scattered buffers so we need to copy to | |
354 | * temp buffer. | |
355 | */ | |
356 | memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked)); | |
357 | ip4h_checked.check = 0; | |
358 | ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5); | |
359 | /* if IPv4 header checksum is OK, believe it */ | |
360 | if (ip4h->check == ip4h_checked.check) | |
361 | return 4; | |
362 | return 6; | |
363 | } | |
850d8fd7 | 364 | EXPORT_SYMBOL(ib_get_rdma_header_version); |
c865f246 SK |
365 | |
366 | static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device, | |
367 | u8 port_num, | |
368 | const struct ib_grh *grh) | |
369 | { | |
370 | int grh_version; | |
371 | ||
372 | if (rdma_protocol_ib(device, port_num)) | |
373 | return RDMA_NETWORK_IB; | |
374 | ||
850d8fd7 | 375 | grh_version = ib_get_rdma_header_version((union rdma_network_hdr *)grh); |
c865f246 SK |
376 | |
377 | if (grh_version == 4) | |
378 | return RDMA_NETWORK_IPV4; | |
379 | ||
380 | if (grh->next_hdr == IPPROTO_UDP) | |
381 | return RDMA_NETWORK_IPV6; | |
382 | ||
383 | return RDMA_NETWORK_ROCE_V1; | |
384 | } | |
385 | ||
dbf727de MB |
386 | struct find_gid_index_context { |
387 | u16 vlan_id; | |
c865f246 | 388 | enum ib_gid_type gid_type; |
dbf727de MB |
389 | }; |
390 | ||
391 | static bool find_gid_index(const union ib_gid *gid, | |
392 | const struct ib_gid_attr *gid_attr, | |
393 | void *context) | |
394 | { | |
395 | struct find_gid_index_context *ctx = | |
396 | (struct find_gid_index_context *)context; | |
397 | ||
c865f246 SK |
398 | if (ctx->gid_type != gid_attr->gid_type) |
399 | return false; | |
400 | ||
dbf727de MB |
401 | if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) || |
402 | (is_vlan_dev(gid_attr->ndev) && | |
403 | vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id)) | |
404 | return false; | |
405 | ||
406 | return true; | |
407 | } | |
408 | ||
409 | static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num, | |
410 | u16 vlan_id, const union ib_gid *sgid, | |
c865f246 | 411 | enum ib_gid_type gid_type, |
dbf727de MB |
412 | u16 *gid_index) |
413 | { | |
c865f246 SK |
414 | struct find_gid_index_context context = {.vlan_id = vlan_id, |
415 | .gid_type = gid_type}; | |
dbf727de MB |
416 | |
417 | return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index, | |
418 | &context, gid_index); | |
419 | } | |
420 | ||
850d8fd7 MS |
421 | int ib_get_gids_from_rdma_hdr(const union rdma_network_hdr *hdr, |
422 | enum rdma_network_type net_type, | |
423 | union ib_gid *sgid, union ib_gid *dgid) | |
c865f246 SK |
424 | { |
425 | struct sockaddr_in src_in; | |
426 | struct sockaddr_in dst_in; | |
427 | __be32 src_saddr, dst_saddr; | |
428 | ||
429 | if (!sgid || !dgid) | |
430 | return -EINVAL; | |
431 | ||
432 | if (net_type == RDMA_NETWORK_IPV4) { | |
433 | memcpy(&src_in.sin_addr.s_addr, | |
434 | &hdr->roce4grh.saddr, 4); | |
435 | memcpy(&dst_in.sin_addr.s_addr, | |
436 | &hdr->roce4grh.daddr, 4); | |
437 | src_saddr = src_in.sin_addr.s_addr; | |
438 | dst_saddr = dst_in.sin_addr.s_addr; | |
439 | ipv6_addr_set_v4mapped(src_saddr, | |
440 | (struct in6_addr *)sgid); | |
441 | ipv6_addr_set_v4mapped(dst_saddr, | |
442 | (struct in6_addr *)dgid); | |
443 | return 0; | |
444 | } else if (net_type == RDMA_NETWORK_IPV6 || | |
445 | net_type == RDMA_NETWORK_IB) { | |
446 | *dgid = hdr->ibgrh.dgid; | |
447 | *sgid = hdr->ibgrh.sgid; | |
448 | return 0; | |
449 | } else { | |
450 | return -EINVAL; | |
451 | } | |
452 | } | |
850d8fd7 | 453 | EXPORT_SYMBOL(ib_get_gids_from_rdma_hdr); |
c865f246 | 454 | |
28b5b3a2 GS |
455 | /* |
456 | * This function creates ah from the incoming packet. | |
457 | * Incoming packet has dgid of the receiver node on which this code is | |
458 | * getting executed and, sgid contains the GID of the sender. | |
459 | * | |
460 | * When resolving mac address of destination, the arrived dgid is used | |
461 | * as sgid and, sgid is used as dgid because sgid contains destinations | |
462 | * GID whom to respond to. | |
463 | * | |
464 | * This is why when calling rdma_addr_find_l2_eth_by_grh() function, the | |
465 | * position of arguments dgid and sgid do not match the order of the | |
466 | * parameters. | |
467 | */ | |
73cdaaee IW |
468 | int ib_init_ah_from_wc(struct ib_device *device, u8 port_num, |
469 | const struct ib_wc *wc, const struct ib_grh *grh, | |
90898850 | 470 | struct rdma_ah_attr *ah_attr) |
513789ed | 471 | { |
513789ed HR |
472 | u32 flow_class; |
473 | u16 gid_index; | |
474 | int ret; | |
c865f246 SK |
475 | enum rdma_network_type net_type = RDMA_NETWORK_IB; |
476 | enum ib_gid_type gid_type = IB_GID_TYPE_IB; | |
c3efe750 | 477 | int hoplimit = 0xff; |
c865f246 SK |
478 | union ib_gid dgid; |
479 | union ib_gid sgid; | |
513789ed | 480 | |
4e00d694 | 481 | memset(ah_attr, 0, sizeof *ah_attr); |
44c58487 | 482 | ah_attr->type = rdma_ah_find_type(device, port_num); |
227128fc | 483 | if (rdma_cap_eth_ah(device, port_num)) { |
c865f246 SK |
484 | if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE) |
485 | net_type = wc->network_hdr_type; | |
486 | else | |
487 | net_type = ib_get_net_type_by_grh(device, port_num, grh); | |
488 | gid_type = ib_network_to_gid_type(net_type); | |
489 | } | |
850d8fd7 MS |
490 | ret = ib_get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type, |
491 | &sgid, &dgid); | |
c865f246 SK |
492 | if (ret) |
493 | return ret; | |
494 | ||
495 | if (rdma_protocol_roce(device, port_num)) { | |
20029832 | 496 | int if_index = 0; |
dbf727de MB |
497 | u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ? |
498 | wc->vlan_id : 0xffff; | |
20029832 MB |
499 | struct net_device *idev; |
500 | struct net_device *resolved_dev; | |
dbf727de | 501 | |
dd5f03be MB |
502 | if (!(wc->wc_flags & IB_WC_GRH)) |
503 | return -EPROTOTYPE; | |
504 | ||
20029832 MB |
505 | if (!device->get_netdev) |
506 | return -EOPNOTSUPP; | |
507 | ||
508 | idev = device->get_netdev(device, port_num); | |
509 | if (!idev) | |
510 | return -ENODEV; | |
511 | ||
f7f4b23e | 512 | ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid, |
44c58487 | 513 | ah_attr->roce.dmac, |
f7f4b23e MB |
514 | wc->wc_flags & IB_WC_WITH_VLAN ? |
515 | NULL : &vlan_id, | |
c3efe750 | 516 | &if_index, &hoplimit); |
20029832 MB |
517 | if (ret) { |
518 | dev_put(idev); | |
519 | return ret; | |
dd5f03be | 520 | } |
dbf727de | 521 | |
20029832 | 522 | resolved_dev = dev_get_by_index(&init_net, if_index); |
20029832 MB |
523 | rcu_read_lock(); |
524 | if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev, | |
525 | resolved_dev)) | |
526 | ret = -EHOSTUNREACH; | |
527 | rcu_read_unlock(); | |
528 | dev_put(idev); | |
529 | dev_put(resolved_dev); | |
530 | if (ret) | |
531 | return ret; | |
532 | ||
dbf727de | 533 | ret = get_sgid_index_from_eth(device, port_num, vlan_id, |
c865f246 | 534 | &dgid, gid_type, &gid_index); |
dbf727de MB |
535 | if (ret) |
536 | return ret; | |
dd5f03be MB |
537 | } |
538 | ||
d8966fcd DC |
539 | rdma_ah_set_dlid(ah_attr, wc->slid); |
540 | rdma_ah_set_sl(ah_attr, wc->sl); | |
541 | rdma_ah_set_path_bits(ah_attr, wc->dlid_path_bits); | |
542 | rdma_ah_set_port_num(ah_attr, port_num); | |
513789ed HR |
543 | |
544 | if (wc->wc_flags & IB_WC_GRH) { | |
dbf727de | 545 | if (!rdma_cap_eth_ah(device, port_num)) { |
b3556005 EC |
546 | if (dgid.global.interface_id != cpu_to_be64(IB_SA_WELL_KNOWN_GUID)) { |
547 | ret = ib_find_cached_gid_by_port(device, &dgid, | |
548 | IB_GID_TYPE_IB, | |
549 | port_num, NULL, | |
550 | &gid_index); | |
551 | if (ret) | |
552 | return ret; | |
553 | } else { | |
554 | gid_index = 0; | |
555 | } | |
dbf727de | 556 | } |
513789ed | 557 | |
497677ab | 558 | flow_class = be32_to_cpu(grh->version_tclass_flow); |
d8966fcd DC |
559 | rdma_ah_set_grh(ah_attr, &sgid, |
560 | flow_class & 0xFFFFF, | |
561 | (u8)gid_index, hoplimit, | |
562 | (flow_class >> 20) & 0xFF); | |
563 | ||
513789ed | 564 | } |
4e00d694 SH |
565 | return 0; |
566 | } | |
567 | EXPORT_SYMBOL(ib_init_ah_from_wc); | |
568 | ||
73cdaaee IW |
569 | struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc, |
570 | const struct ib_grh *grh, u8 port_num) | |
4e00d694 | 571 | { |
90898850 | 572 | struct rdma_ah_attr ah_attr; |
4e00d694 SH |
573 | int ret; |
574 | ||
575 | ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr); | |
576 | if (ret) | |
577 | return ERR_PTR(ret); | |
513789ed | 578 | |
0a18cfe4 | 579 | return rdma_create_ah(pd, &ah_attr); |
513789ed HR |
580 | } |
581 | EXPORT_SYMBOL(ib_create_ah_from_wc); | |
582 | ||
67b985b6 | 583 | int rdma_modify_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr) |
1da177e4 | 584 | { |
44c58487 DC |
585 | if (ah->type != ah_attr->type) |
586 | return -EINVAL; | |
587 | ||
1da177e4 LT |
588 | return ah->device->modify_ah ? |
589 | ah->device->modify_ah(ah, ah_attr) : | |
590 | -ENOSYS; | |
591 | } | |
67b985b6 | 592 | EXPORT_SYMBOL(rdma_modify_ah); |
1da177e4 | 593 | |
bfbfd661 | 594 | int rdma_query_ah(struct ib_ah *ah, struct rdma_ah_attr *ah_attr) |
1da177e4 LT |
595 | { |
596 | return ah->device->query_ah ? | |
597 | ah->device->query_ah(ah, ah_attr) : | |
598 | -ENOSYS; | |
599 | } | |
bfbfd661 | 600 | EXPORT_SYMBOL(rdma_query_ah); |
1da177e4 | 601 | |
36523159 | 602 | int rdma_destroy_ah(struct ib_ah *ah) |
1da177e4 LT |
603 | { |
604 | struct ib_pd *pd; | |
605 | int ret; | |
606 | ||
607 | pd = ah->pd; | |
608 | ret = ah->device->destroy_ah(ah); | |
609 | if (!ret) | |
610 | atomic_dec(&pd->usecnt); | |
611 | ||
612 | return ret; | |
613 | } | |
36523159 | 614 | EXPORT_SYMBOL(rdma_destroy_ah); |
1da177e4 | 615 | |
d41fcc67 RD |
616 | /* Shared receive queues */ |
617 | ||
618 | struct ib_srq *ib_create_srq(struct ib_pd *pd, | |
619 | struct ib_srq_init_attr *srq_init_attr) | |
620 | { | |
621 | struct ib_srq *srq; | |
622 | ||
623 | if (!pd->device->create_srq) | |
624 | return ERR_PTR(-ENOSYS); | |
625 | ||
626 | srq = pd->device->create_srq(pd, srq_init_attr, NULL); | |
627 | ||
628 | if (!IS_ERR(srq)) { | |
629 | srq->device = pd->device; | |
630 | srq->pd = pd; | |
631 | srq->uobject = NULL; | |
632 | srq->event_handler = srq_init_attr->event_handler; | |
633 | srq->srq_context = srq_init_attr->srq_context; | |
96104eda | 634 | srq->srq_type = srq_init_attr->srq_type; |
418d5130 SH |
635 | if (srq->srq_type == IB_SRQT_XRC) { |
636 | srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd; | |
637 | srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq; | |
638 | atomic_inc(&srq->ext.xrc.xrcd->usecnt); | |
639 | atomic_inc(&srq->ext.xrc.cq->usecnt); | |
640 | } | |
d41fcc67 RD |
641 | atomic_inc(&pd->usecnt); |
642 | atomic_set(&srq->usecnt, 0); | |
643 | } | |
644 | ||
645 | return srq; | |
646 | } | |
647 | EXPORT_SYMBOL(ib_create_srq); | |
648 | ||
649 | int ib_modify_srq(struct ib_srq *srq, | |
650 | struct ib_srq_attr *srq_attr, | |
651 | enum ib_srq_attr_mask srq_attr_mask) | |
652 | { | |
7ce5eacb DB |
653 | return srq->device->modify_srq ? |
654 | srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) : | |
655 | -ENOSYS; | |
d41fcc67 RD |
656 | } |
657 | EXPORT_SYMBOL(ib_modify_srq); | |
658 | ||
659 | int ib_query_srq(struct ib_srq *srq, | |
660 | struct ib_srq_attr *srq_attr) | |
661 | { | |
662 | return srq->device->query_srq ? | |
663 | srq->device->query_srq(srq, srq_attr) : -ENOSYS; | |
664 | } | |
665 | EXPORT_SYMBOL(ib_query_srq); | |
666 | ||
667 | int ib_destroy_srq(struct ib_srq *srq) | |
668 | { | |
669 | struct ib_pd *pd; | |
418d5130 SH |
670 | enum ib_srq_type srq_type; |
671 | struct ib_xrcd *uninitialized_var(xrcd); | |
672 | struct ib_cq *uninitialized_var(cq); | |
d41fcc67 RD |
673 | int ret; |
674 | ||
675 | if (atomic_read(&srq->usecnt)) | |
676 | return -EBUSY; | |
677 | ||
678 | pd = srq->pd; | |
418d5130 SH |
679 | srq_type = srq->srq_type; |
680 | if (srq_type == IB_SRQT_XRC) { | |
681 | xrcd = srq->ext.xrc.xrcd; | |
682 | cq = srq->ext.xrc.cq; | |
683 | } | |
d41fcc67 RD |
684 | |
685 | ret = srq->device->destroy_srq(srq); | |
418d5130 | 686 | if (!ret) { |
d41fcc67 | 687 | atomic_dec(&pd->usecnt); |
418d5130 SH |
688 | if (srq_type == IB_SRQT_XRC) { |
689 | atomic_dec(&xrcd->usecnt); | |
690 | atomic_dec(&cq->usecnt); | |
691 | } | |
692 | } | |
d41fcc67 RD |
693 | |
694 | return ret; | |
695 | } | |
696 | EXPORT_SYMBOL(ib_destroy_srq); | |
697 | ||
1da177e4 LT |
698 | /* Queue pairs */ |
699 | ||
0e0ec7e0 SH |
700 | static void __ib_shared_qp_event_handler(struct ib_event *event, void *context) |
701 | { | |
702 | struct ib_qp *qp = context; | |
73c40c61 | 703 | unsigned long flags; |
0e0ec7e0 | 704 | |
73c40c61 | 705 | spin_lock_irqsave(&qp->device->event_handler_lock, flags); |
0e0ec7e0 | 706 | list_for_each_entry(event->element.qp, &qp->open_list, open_list) |
eec9e29f SP |
707 | if (event->element.qp->event_handler) |
708 | event->element.qp->event_handler(event, event->element.qp->qp_context); | |
73c40c61 | 709 | spin_unlock_irqrestore(&qp->device->event_handler_lock, flags); |
0e0ec7e0 SH |
710 | } |
711 | ||
d3d72d90 SH |
712 | static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp) |
713 | { | |
714 | mutex_lock(&xrcd->tgt_qp_mutex); | |
715 | list_add(&qp->xrcd_list, &xrcd->tgt_qp_list); | |
716 | mutex_unlock(&xrcd->tgt_qp_mutex); | |
717 | } | |
718 | ||
0e0ec7e0 SH |
719 | static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp, |
720 | void (*event_handler)(struct ib_event *, void *), | |
721 | void *qp_context) | |
d3d72d90 | 722 | { |
0e0ec7e0 SH |
723 | struct ib_qp *qp; |
724 | unsigned long flags; | |
d291f1a6 | 725 | int err; |
0e0ec7e0 SH |
726 | |
727 | qp = kzalloc(sizeof *qp, GFP_KERNEL); | |
728 | if (!qp) | |
729 | return ERR_PTR(-ENOMEM); | |
730 | ||
d291f1a6 DJ |
731 | qp->real_qp = real_qp; |
732 | err = ib_open_shared_qp_security(qp, real_qp->device); | |
733 | if (err) { | |
734 | kfree(qp); | |
735 | return ERR_PTR(err); | |
736 | } | |
737 | ||
0e0ec7e0 SH |
738 | qp->real_qp = real_qp; |
739 | atomic_inc(&real_qp->usecnt); | |
740 | qp->device = real_qp->device; | |
741 | qp->event_handler = event_handler; | |
742 | qp->qp_context = qp_context; | |
743 | qp->qp_num = real_qp->qp_num; | |
744 | qp->qp_type = real_qp->qp_type; | |
745 | ||
746 | spin_lock_irqsave(&real_qp->device->event_handler_lock, flags); | |
747 | list_add(&qp->open_list, &real_qp->open_list); | |
748 | spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags); | |
749 | ||
750 | return qp; | |
751 | } | |
752 | ||
753 | struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd, | |
754 | struct ib_qp_open_attr *qp_open_attr) | |
755 | { | |
756 | struct ib_qp *qp, *real_qp; | |
757 | ||
758 | if (qp_open_attr->qp_type != IB_QPT_XRC_TGT) | |
759 | return ERR_PTR(-EINVAL); | |
760 | ||
761 | qp = ERR_PTR(-EINVAL); | |
d3d72d90 | 762 | mutex_lock(&xrcd->tgt_qp_mutex); |
0e0ec7e0 SH |
763 | list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) { |
764 | if (real_qp->qp_num == qp_open_attr->qp_num) { | |
765 | qp = __ib_open_qp(real_qp, qp_open_attr->event_handler, | |
766 | qp_open_attr->qp_context); | |
767 | break; | |
768 | } | |
769 | } | |
d3d72d90 | 770 | mutex_unlock(&xrcd->tgt_qp_mutex); |
0e0ec7e0 | 771 | return qp; |
d3d72d90 | 772 | } |
0e0ec7e0 | 773 | EXPORT_SYMBOL(ib_open_qp); |
d3d72d90 | 774 | |
04c41bf3 CH |
775 | static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp, |
776 | struct ib_qp_init_attr *qp_init_attr) | |
777 | { | |
778 | struct ib_qp *real_qp = qp; | |
779 | ||
780 | qp->event_handler = __ib_shared_qp_event_handler; | |
781 | qp->qp_context = qp; | |
782 | qp->pd = NULL; | |
783 | qp->send_cq = qp->recv_cq = NULL; | |
784 | qp->srq = NULL; | |
785 | qp->xrcd = qp_init_attr->xrcd; | |
786 | atomic_inc(&qp_init_attr->xrcd->usecnt); | |
787 | INIT_LIST_HEAD(&qp->open_list); | |
788 | ||
789 | qp = __ib_open_qp(real_qp, qp_init_attr->event_handler, | |
790 | qp_init_attr->qp_context); | |
791 | if (!IS_ERR(qp)) | |
792 | __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp); | |
793 | else | |
794 | real_qp->device->destroy_qp(real_qp); | |
795 | return qp; | |
796 | } | |
797 | ||
1da177e4 LT |
798 | struct ib_qp *ib_create_qp(struct ib_pd *pd, |
799 | struct ib_qp_init_attr *qp_init_attr) | |
800 | { | |
04c41bf3 CH |
801 | struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device; |
802 | struct ib_qp *qp; | |
a060b562 CH |
803 | int ret; |
804 | ||
a9017e23 YH |
805 | if (qp_init_attr->rwq_ind_tbl && |
806 | (qp_init_attr->recv_cq || | |
807 | qp_init_attr->srq || qp_init_attr->cap.max_recv_wr || | |
808 | qp_init_attr->cap.max_recv_sge)) | |
809 | return ERR_PTR(-EINVAL); | |
810 | ||
a060b562 CH |
811 | /* |
812 | * If the callers is using the RDMA API calculate the resources | |
813 | * needed for the RDMA READ/WRITE operations. | |
814 | * | |
815 | * Note that these callers need to pass in a port number. | |
816 | */ | |
817 | if (qp_init_attr->cap.max_rdma_ctxs) | |
818 | rdma_rw_init_qp(device, qp_init_attr); | |
1da177e4 | 819 | |
b42b63cf | 820 | qp = device->create_qp(pd, qp_init_attr, NULL); |
04c41bf3 CH |
821 | if (IS_ERR(qp)) |
822 | return qp; | |
823 | ||
d291f1a6 DJ |
824 | ret = ib_create_qp_security(qp, device); |
825 | if (ret) { | |
826 | ib_destroy_qp(qp); | |
827 | return ERR_PTR(ret); | |
828 | } | |
829 | ||
04c41bf3 CH |
830 | qp->device = device; |
831 | qp->real_qp = qp; | |
832 | qp->uobject = NULL; | |
833 | qp->qp_type = qp_init_attr->qp_type; | |
a9017e23 | 834 | qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl; |
04c41bf3 CH |
835 | |
836 | atomic_set(&qp->usecnt, 0); | |
fffb0383 CH |
837 | qp->mrs_used = 0; |
838 | spin_lock_init(&qp->mr_lock); | |
a060b562 | 839 | INIT_LIST_HEAD(&qp->rdma_mrs); |
0e353e34 | 840 | INIT_LIST_HEAD(&qp->sig_mrs); |
fffb0383 | 841 | |
04c41bf3 CH |
842 | if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) |
843 | return ib_create_xrc_qp(qp, qp_init_attr); | |
844 | ||
845 | qp->event_handler = qp_init_attr->event_handler; | |
846 | qp->qp_context = qp_init_attr->qp_context; | |
847 | if (qp_init_attr->qp_type == IB_QPT_XRC_INI) { | |
848 | qp->recv_cq = NULL; | |
849 | qp->srq = NULL; | |
850 | } else { | |
851 | qp->recv_cq = qp_init_attr->recv_cq; | |
a9017e23 YH |
852 | if (qp_init_attr->recv_cq) |
853 | atomic_inc(&qp_init_attr->recv_cq->usecnt); | |
04c41bf3 CH |
854 | qp->srq = qp_init_attr->srq; |
855 | if (qp->srq) | |
856 | atomic_inc(&qp_init_attr->srq->usecnt); | |
1da177e4 LT |
857 | } |
858 | ||
04c41bf3 CH |
859 | qp->pd = pd; |
860 | qp->send_cq = qp_init_attr->send_cq; | |
861 | qp->xrcd = NULL; | |
862 | ||
863 | atomic_inc(&pd->usecnt); | |
a9017e23 YH |
864 | if (qp_init_attr->send_cq) |
865 | atomic_inc(&qp_init_attr->send_cq->usecnt); | |
866 | if (qp_init_attr->rwq_ind_tbl) | |
867 | atomic_inc(&qp->rwq_ind_tbl->usecnt); | |
a060b562 CH |
868 | |
869 | if (qp_init_attr->cap.max_rdma_ctxs) { | |
870 | ret = rdma_rw_init_mrs(qp, qp_init_attr); | |
871 | if (ret) { | |
872 | pr_err("failed to init MR pool ret= %d\n", ret); | |
873 | ib_destroy_qp(qp); | |
b6bc1c73 | 874 | return ERR_PTR(ret); |
a060b562 CH |
875 | } |
876 | } | |
877 | ||
632bc3f6 BVA |
878 | /* |
879 | * Note: all hw drivers guarantee that max_send_sge is lower than | |
880 | * the device RDMA WRITE SGE limit but not all hw drivers ensure that | |
881 | * max_send_sge <= max_sge_rd. | |
882 | */ | |
883 | qp->max_write_sge = qp_init_attr->cap.max_send_sge; | |
884 | qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge, | |
885 | device->attrs.max_sge_rd); | |
886 | ||
1da177e4 LT |
887 | return qp; |
888 | } | |
889 | EXPORT_SYMBOL(ib_create_qp); | |
890 | ||
8a51866f RD |
891 | static const struct { |
892 | int valid; | |
b42b63cf SH |
893 | enum ib_qp_attr_mask req_param[IB_QPT_MAX]; |
894 | enum ib_qp_attr_mask opt_param[IB_QPT_MAX]; | |
8a51866f RD |
895 | } qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = { |
896 | [IB_QPS_RESET] = { | |
897 | [IB_QPS_RESET] = { .valid = 1 }, | |
8a51866f RD |
898 | [IB_QPS_INIT] = { |
899 | .valid = 1, | |
900 | .req_param = { | |
901 | [IB_QPT_UD] = (IB_QP_PKEY_INDEX | | |
902 | IB_QP_PORT | | |
903 | IB_QP_QKEY), | |
c938a616 | 904 | [IB_QPT_RAW_PACKET] = IB_QP_PORT, |
8a51866f RD |
905 | [IB_QPT_UC] = (IB_QP_PKEY_INDEX | |
906 | IB_QP_PORT | | |
907 | IB_QP_ACCESS_FLAGS), | |
908 | [IB_QPT_RC] = (IB_QP_PKEY_INDEX | | |
909 | IB_QP_PORT | | |
910 | IB_QP_ACCESS_FLAGS), | |
b42b63cf SH |
911 | [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX | |
912 | IB_QP_PORT | | |
913 | IB_QP_ACCESS_FLAGS), | |
914 | [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX | | |
915 | IB_QP_PORT | | |
916 | IB_QP_ACCESS_FLAGS), | |
8a51866f RD |
917 | [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | |
918 | IB_QP_QKEY), | |
919 | [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | | |
920 | IB_QP_QKEY), | |
921 | } | |
922 | }, | |
923 | }, | |
924 | [IB_QPS_INIT] = { | |
925 | [IB_QPS_RESET] = { .valid = 1 }, | |
926 | [IB_QPS_ERR] = { .valid = 1 }, | |
927 | [IB_QPS_INIT] = { | |
928 | .valid = 1, | |
929 | .opt_param = { | |
930 | [IB_QPT_UD] = (IB_QP_PKEY_INDEX | | |
931 | IB_QP_PORT | | |
932 | IB_QP_QKEY), | |
933 | [IB_QPT_UC] = (IB_QP_PKEY_INDEX | | |
934 | IB_QP_PORT | | |
935 | IB_QP_ACCESS_FLAGS), | |
936 | [IB_QPT_RC] = (IB_QP_PKEY_INDEX | | |
937 | IB_QP_PORT | | |
938 | IB_QP_ACCESS_FLAGS), | |
b42b63cf SH |
939 | [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX | |
940 | IB_QP_PORT | | |
941 | IB_QP_ACCESS_FLAGS), | |
942 | [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX | | |
943 | IB_QP_PORT | | |
944 | IB_QP_ACCESS_FLAGS), | |
8a51866f RD |
945 | [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | |
946 | IB_QP_QKEY), | |
947 | [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | | |
948 | IB_QP_QKEY), | |
949 | } | |
950 | }, | |
951 | [IB_QPS_RTR] = { | |
952 | .valid = 1, | |
953 | .req_param = { | |
954 | [IB_QPT_UC] = (IB_QP_AV | | |
955 | IB_QP_PATH_MTU | | |
956 | IB_QP_DEST_QPN | | |
957 | IB_QP_RQ_PSN), | |
958 | [IB_QPT_RC] = (IB_QP_AV | | |
959 | IB_QP_PATH_MTU | | |
960 | IB_QP_DEST_QPN | | |
961 | IB_QP_RQ_PSN | | |
962 | IB_QP_MAX_DEST_RD_ATOMIC | | |
963 | IB_QP_MIN_RNR_TIMER), | |
b42b63cf SH |
964 | [IB_QPT_XRC_INI] = (IB_QP_AV | |
965 | IB_QP_PATH_MTU | | |
966 | IB_QP_DEST_QPN | | |
967 | IB_QP_RQ_PSN), | |
968 | [IB_QPT_XRC_TGT] = (IB_QP_AV | | |
969 | IB_QP_PATH_MTU | | |
970 | IB_QP_DEST_QPN | | |
971 | IB_QP_RQ_PSN | | |
972 | IB_QP_MAX_DEST_RD_ATOMIC | | |
973 | IB_QP_MIN_RNR_TIMER), | |
8a51866f RD |
974 | }, |
975 | .opt_param = { | |
976 | [IB_QPT_UD] = (IB_QP_PKEY_INDEX | | |
977 | IB_QP_QKEY), | |
978 | [IB_QPT_UC] = (IB_QP_ALT_PATH | | |
979 | IB_QP_ACCESS_FLAGS | | |
980 | IB_QP_PKEY_INDEX), | |
981 | [IB_QPT_RC] = (IB_QP_ALT_PATH | | |
982 | IB_QP_ACCESS_FLAGS | | |
983 | IB_QP_PKEY_INDEX), | |
b42b63cf SH |
984 | [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH | |
985 | IB_QP_ACCESS_FLAGS | | |
986 | IB_QP_PKEY_INDEX), | |
987 | [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH | | |
988 | IB_QP_ACCESS_FLAGS | | |
989 | IB_QP_PKEY_INDEX), | |
8a51866f RD |
990 | [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | |
991 | IB_QP_QKEY), | |
992 | [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | | |
993 | IB_QP_QKEY), | |
dd5f03be | 994 | }, |
dbf727de | 995 | }, |
8a51866f RD |
996 | }, |
997 | [IB_QPS_RTR] = { | |
998 | [IB_QPS_RESET] = { .valid = 1 }, | |
999 | [IB_QPS_ERR] = { .valid = 1 }, | |
1000 | [IB_QPS_RTS] = { | |
1001 | .valid = 1, | |
1002 | .req_param = { | |
1003 | [IB_QPT_UD] = IB_QP_SQ_PSN, | |
1004 | [IB_QPT_UC] = IB_QP_SQ_PSN, | |
1005 | [IB_QPT_RC] = (IB_QP_TIMEOUT | | |
1006 | IB_QP_RETRY_CNT | | |
1007 | IB_QP_RNR_RETRY | | |
1008 | IB_QP_SQ_PSN | | |
1009 | IB_QP_MAX_QP_RD_ATOMIC), | |
b42b63cf SH |
1010 | [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT | |
1011 | IB_QP_RETRY_CNT | | |
1012 | IB_QP_RNR_RETRY | | |
1013 | IB_QP_SQ_PSN | | |
1014 | IB_QP_MAX_QP_RD_ATOMIC), | |
1015 | [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT | | |
1016 | IB_QP_SQ_PSN), | |
8a51866f RD |
1017 | [IB_QPT_SMI] = IB_QP_SQ_PSN, |
1018 | [IB_QPT_GSI] = IB_QP_SQ_PSN, | |
1019 | }, | |
1020 | .opt_param = { | |
1021 | [IB_QPT_UD] = (IB_QP_CUR_STATE | | |
1022 | IB_QP_QKEY), | |
1023 | [IB_QPT_UC] = (IB_QP_CUR_STATE | | |
1024 | IB_QP_ALT_PATH | | |
1025 | IB_QP_ACCESS_FLAGS | | |
1026 | IB_QP_PATH_MIG_STATE), | |
1027 | [IB_QPT_RC] = (IB_QP_CUR_STATE | | |
1028 | IB_QP_ALT_PATH | | |
1029 | IB_QP_ACCESS_FLAGS | | |
1030 | IB_QP_MIN_RNR_TIMER | | |
1031 | IB_QP_PATH_MIG_STATE), | |
b42b63cf SH |
1032 | [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | |
1033 | IB_QP_ALT_PATH | | |
1034 | IB_QP_ACCESS_FLAGS | | |
1035 | IB_QP_PATH_MIG_STATE), | |
1036 | [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | | |
1037 | IB_QP_ALT_PATH | | |
1038 | IB_QP_ACCESS_FLAGS | | |
1039 | IB_QP_MIN_RNR_TIMER | | |
1040 | IB_QP_PATH_MIG_STATE), | |
8a51866f RD |
1041 | [IB_QPT_SMI] = (IB_QP_CUR_STATE | |
1042 | IB_QP_QKEY), | |
1043 | [IB_QPT_GSI] = (IB_QP_CUR_STATE | | |
1044 | IB_QP_QKEY), | |
528e5a1b | 1045 | [IB_QPT_RAW_PACKET] = IB_QP_RATE_LIMIT, |
8a51866f RD |
1046 | } |
1047 | } | |
1048 | }, | |
1049 | [IB_QPS_RTS] = { | |
1050 | [IB_QPS_RESET] = { .valid = 1 }, | |
1051 | [IB_QPS_ERR] = { .valid = 1 }, | |
1052 | [IB_QPS_RTS] = { | |
1053 | .valid = 1, | |
1054 | .opt_param = { | |
1055 | [IB_QPT_UD] = (IB_QP_CUR_STATE | | |
1056 | IB_QP_QKEY), | |
4546d31d DB |
1057 | [IB_QPT_UC] = (IB_QP_CUR_STATE | |
1058 | IB_QP_ACCESS_FLAGS | | |
8a51866f RD |
1059 | IB_QP_ALT_PATH | |
1060 | IB_QP_PATH_MIG_STATE), | |
4546d31d DB |
1061 | [IB_QPT_RC] = (IB_QP_CUR_STATE | |
1062 | IB_QP_ACCESS_FLAGS | | |
8a51866f RD |
1063 | IB_QP_ALT_PATH | |
1064 | IB_QP_PATH_MIG_STATE | | |
1065 | IB_QP_MIN_RNR_TIMER), | |
b42b63cf SH |
1066 | [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | |
1067 | IB_QP_ACCESS_FLAGS | | |
1068 | IB_QP_ALT_PATH | | |
1069 | IB_QP_PATH_MIG_STATE), | |
1070 | [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | | |
1071 | IB_QP_ACCESS_FLAGS | | |
1072 | IB_QP_ALT_PATH | | |
1073 | IB_QP_PATH_MIG_STATE | | |
1074 | IB_QP_MIN_RNR_TIMER), | |
8a51866f RD |
1075 | [IB_QPT_SMI] = (IB_QP_CUR_STATE | |
1076 | IB_QP_QKEY), | |
1077 | [IB_QPT_GSI] = (IB_QP_CUR_STATE | | |
1078 | IB_QP_QKEY), | |
528e5a1b | 1079 | [IB_QPT_RAW_PACKET] = IB_QP_RATE_LIMIT, |
8a51866f RD |
1080 | } |
1081 | }, | |
1082 | [IB_QPS_SQD] = { | |
1083 | .valid = 1, | |
1084 | .opt_param = { | |
1085 | [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY, | |
1086 | [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY, | |
1087 | [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY, | |
b42b63cf SH |
1088 | [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY, |
1089 | [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */ | |
8a51866f RD |
1090 | [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY, |
1091 | [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY | |
1092 | } | |
1093 | }, | |
1094 | }, | |
1095 | [IB_QPS_SQD] = { | |
1096 | [IB_QPS_RESET] = { .valid = 1 }, | |
1097 | [IB_QPS_ERR] = { .valid = 1 }, | |
1098 | [IB_QPS_RTS] = { | |
1099 | .valid = 1, | |
1100 | .opt_param = { | |
1101 | [IB_QPT_UD] = (IB_QP_CUR_STATE | | |
1102 | IB_QP_QKEY), | |
1103 | [IB_QPT_UC] = (IB_QP_CUR_STATE | | |
1104 | IB_QP_ALT_PATH | | |
1105 | IB_QP_ACCESS_FLAGS | | |
1106 | IB_QP_PATH_MIG_STATE), | |
1107 | [IB_QPT_RC] = (IB_QP_CUR_STATE | | |
1108 | IB_QP_ALT_PATH | | |
1109 | IB_QP_ACCESS_FLAGS | | |
1110 | IB_QP_MIN_RNR_TIMER | | |
1111 | IB_QP_PATH_MIG_STATE), | |
b42b63cf SH |
1112 | [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | |
1113 | IB_QP_ALT_PATH | | |
1114 | IB_QP_ACCESS_FLAGS | | |
1115 | IB_QP_PATH_MIG_STATE), | |
1116 | [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | | |
1117 | IB_QP_ALT_PATH | | |
1118 | IB_QP_ACCESS_FLAGS | | |
1119 | IB_QP_MIN_RNR_TIMER | | |
1120 | IB_QP_PATH_MIG_STATE), | |
8a51866f RD |
1121 | [IB_QPT_SMI] = (IB_QP_CUR_STATE | |
1122 | IB_QP_QKEY), | |
1123 | [IB_QPT_GSI] = (IB_QP_CUR_STATE | | |
1124 | IB_QP_QKEY), | |
1125 | } | |
1126 | }, | |
1127 | [IB_QPS_SQD] = { | |
1128 | .valid = 1, | |
1129 | .opt_param = { | |
1130 | [IB_QPT_UD] = (IB_QP_PKEY_INDEX | | |
1131 | IB_QP_QKEY), | |
1132 | [IB_QPT_UC] = (IB_QP_AV | | |
8a51866f RD |
1133 | IB_QP_ALT_PATH | |
1134 | IB_QP_ACCESS_FLAGS | | |
1135 | IB_QP_PKEY_INDEX | | |
1136 | IB_QP_PATH_MIG_STATE), | |
1137 | [IB_QPT_RC] = (IB_QP_PORT | | |
1138 | IB_QP_AV | | |
1139 | IB_QP_TIMEOUT | | |
1140 | IB_QP_RETRY_CNT | | |
1141 | IB_QP_RNR_RETRY | | |
1142 | IB_QP_MAX_QP_RD_ATOMIC | | |
1143 | IB_QP_MAX_DEST_RD_ATOMIC | | |
8a51866f RD |
1144 | IB_QP_ALT_PATH | |
1145 | IB_QP_ACCESS_FLAGS | | |
1146 | IB_QP_PKEY_INDEX | | |
1147 | IB_QP_MIN_RNR_TIMER | | |
1148 | IB_QP_PATH_MIG_STATE), | |
b42b63cf SH |
1149 | [IB_QPT_XRC_INI] = (IB_QP_PORT | |
1150 | IB_QP_AV | | |
1151 | IB_QP_TIMEOUT | | |
1152 | IB_QP_RETRY_CNT | | |
1153 | IB_QP_RNR_RETRY | | |
1154 | IB_QP_MAX_QP_RD_ATOMIC | | |
1155 | IB_QP_ALT_PATH | | |
1156 | IB_QP_ACCESS_FLAGS | | |
1157 | IB_QP_PKEY_INDEX | | |
1158 | IB_QP_PATH_MIG_STATE), | |
1159 | [IB_QPT_XRC_TGT] = (IB_QP_PORT | | |
1160 | IB_QP_AV | | |
1161 | IB_QP_TIMEOUT | | |
1162 | IB_QP_MAX_DEST_RD_ATOMIC | | |
1163 | IB_QP_ALT_PATH | | |
1164 | IB_QP_ACCESS_FLAGS | | |
1165 | IB_QP_PKEY_INDEX | | |
1166 | IB_QP_MIN_RNR_TIMER | | |
1167 | IB_QP_PATH_MIG_STATE), | |
8a51866f RD |
1168 | [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | |
1169 | IB_QP_QKEY), | |
1170 | [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | | |
1171 | IB_QP_QKEY), | |
1172 | } | |
1173 | } | |
1174 | }, | |
1175 | [IB_QPS_SQE] = { | |
1176 | [IB_QPS_RESET] = { .valid = 1 }, | |
1177 | [IB_QPS_ERR] = { .valid = 1 }, | |
1178 | [IB_QPS_RTS] = { | |
1179 | .valid = 1, | |
1180 | .opt_param = { | |
1181 | [IB_QPT_UD] = (IB_QP_CUR_STATE | | |
1182 | IB_QP_QKEY), | |
1183 | [IB_QPT_UC] = (IB_QP_CUR_STATE | | |
1184 | IB_QP_ACCESS_FLAGS), | |
1185 | [IB_QPT_SMI] = (IB_QP_CUR_STATE | | |
1186 | IB_QP_QKEY), | |
1187 | [IB_QPT_GSI] = (IB_QP_CUR_STATE | | |
1188 | IB_QP_QKEY), | |
1189 | } | |
1190 | } | |
1191 | }, | |
1192 | [IB_QPS_ERR] = { | |
1193 | [IB_QPS_RESET] = { .valid = 1 }, | |
1194 | [IB_QPS_ERR] = { .valid = 1 } | |
1195 | } | |
1196 | }; | |
1197 | ||
1198 | int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state, | |
dd5f03be MB |
1199 | enum ib_qp_type type, enum ib_qp_attr_mask mask, |
1200 | enum rdma_link_layer ll) | |
8a51866f RD |
1201 | { |
1202 | enum ib_qp_attr_mask req_param, opt_param; | |
1203 | ||
1204 | if (cur_state < 0 || cur_state > IB_QPS_ERR || | |
1205 | next_state < 0 || next_state > IB_QPS_ERR) | |
1206 | return 0; | |
1207 | ||
1208 | if (mask & IB_QP_CUR_STATE && | |
1209 | cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS && | |
1210 | cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE) | |
1211 | return 0; | |
1212 | ||
1213 | if (!qp_state_table[cur_state][next_state].valid) | |
1214 | return 0; | |
1215 | ||
1216 | req_param = qp_state_table[cur_state][next_state].req_param[type]; | |
1217 | opt_param = qp_state_table[cur_state][next_state].opt_param[type]; | |
1218 | ||
1219 | if ((mask & req_param) != req_param) | |
1220 | return 0; | |
1221 | ||
1222 | if (mask & ~(req_param | opt_param | IB_QP_STATE)) | |
1223 | return 0; | |
1224 | ||
1225 | return 1; | |
1226 | } | |
1227 | EXPORT_SYMBOL(ib_modify_qp_is_ok); | |
1228 | ||
c90ea9d8 | 1229 | int ib_resolve_eth_dmac(struct ib_device *device, |
90898850 | 1230 | struct rdma_ah_attr *ah_attr) |
ed4c54e5 OG |
1231 | { |
1232 | int ret = 0; | |
d8966fcd | 1233 | struct ib_global_route *grh; |
ed4c54e5 | 1234 | |
d8966fcd | 1235 | if (!rdma_is_port_valid(device, rdma_ah_get_port_num(ah_attr))) |
c90ea9d8 | 1236 | return -EINVAL; |
dbf727de | 1237 | |
44c58487 | 1238 | if (ah_attr->type != RDMA_AH_ATTR_TYPE_ROCE) |
c90ea9d8 | 1239 | return 0; |
dbf727de | 1240 | |
d8966fcd DC |
1241 | grh = rdma_ah_retrieve_grh(ah_attr); |
1242 | ||
1243 | if (rdma_link_local_addr((struct in6_addr *)grh->dgid.raw)) { | |
1244 | rdma_get_ll_mac((struct in6_addr *)grh->dgid.raw, | |
44c58487 | 1245 | ah_attr->roce.dmac); |
c90ea9d8 MS |
1246 | } else { |
1247 | union ib_gid sgid; | |
1248 | struct ib_gid_attr sgid_attr; | |
1249 | int ifindex; | |
1250 | int hop_limit; | |
1251 | ||
1252 | ret = ib_query_gid(device, | |
d8966fcd DC |
1253 | rdma_ah_get_port_num(ah_attr), |
1254 | grh->sgid_index, | |
c90ea9d8 MS |
1255 | &sgid, &sgid_attr); |
1256 | ||
1257 | if (ret || !sgid_attr.ndev) { | |
1258 | if (!ret) | |
1259 | ret = -ENXIO; | |
1260 | goto out; | |
1261 | } | |
dbf727de | 1262 | |
c90ea9d8 | 1263 | ifindex = sgid_attr.ndev->ifindex; |
c3efe750 | 1264 | |
d8966fcd DC |
1265 | ret = |
1266 | rdma_addr_find_l2_eth_by_grh(&sgid, &grh->dgid, | |
44c58487 | 1267 | ah_attr->roce.dmac, |
d8966fcd | 1268 | NULL, &ifindex, &hop_limit); |
c90ea9d8 MS |
1269 | |
1270 | dev_put(sgid_attr.ndev); | |
1271 | ||
d8966fcd | 1272 | grh->hop_limit = hop_limit; |
ed4c54e5 OG |
1273 | } |
1274 | out: | |
1275 | return ret; | |
1276 | } | |
dbf727de | 1277 | EXPORT_SYMBOL(ib_resolve_eth_dmac); |
ed4c54e5 | 1278 | |
a512c2fb PP |
1279 | /** |
1280 | * ib_modify_qp_with_udata - Modifies the attributes for the specified QP. | |
1281 | * @qp: The QP to modify. | |
1282 | * @attr: On input, specifies the QP attributes to modify. On output, | |
1283 | * the current values of selected QP attributes are returned. | |
1284 | * @attr_mask: A bit-mask used to specify which attributes of the QP | |
1285 | * are being modified. | |
1286 | * @udata: pointer to user's input output buffer information | |
1287 | * are being modified. | |
1288 | * It returns 0 on success and returns appropriate error code on error. | |
1289 | */ | |
1290 | int ib_modify_qp_with_udata(struct ib_qp *qp, struct ib_qp_attr *attr, | |
1291 | int attr_mask, struct ib_udata *udata) | |
1da177e4 | 1292 | { |
a512c2fb | 1293 | int ret; |
ed4c54e5 | 1294 | |
a512c2fb PP |
1295 | if (attr_mask & IB_QP_AV) { |
1296 | ret = ib_resolve_eth_dmac(qp->device, &attr->ah_attr); | |
c90ea9d8 MS |
1297 | if (ret) |
1298 | return ret; | |
1299 | } | |
a512c2fb PP |
1300 | return ib_security_modify_qp(qp, attr, attr_mask, udata); |
1301 | } | |
1302 | EXPORT_SYMBOL(ib_modify_qp_with_udata); | |
ed4c54e5 | 1303 | |
a512c2fb PP |
1304 | int ib_modify_qp(struct ib_qp *qp, |
1305 | struct ib_qp_attr *qp_attr, | |
1306 | int qp_attr_mask) | |
1307 | { | |
1308 | return ib_modify_qp_with_udata(qp, qp_attr, qp_attr_mask, NULL); | |
1da177e4 LT |
1309 | } |
1310 | EXPORT_SYMBOL(ib_modify_qp); | |
1311 | ||
1312 | int ib_query_qp(struct ib_qp *qp, | |
1313 | struct ib_qp_attr *qp_attr, | |
1314 | int qp_attr_mask, | |
1315 | struct ib_qp_init_attr *qp_init_attr) | |
1316 | { | |
1317 | return qp->device->query_qp ? | |
0e0ec7e0 | 1318 | qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) : |
1da177e4 LT |
1319 | -ENOSYS; |
1320 | } | |
1321 | EXPORT_SYMBOL(ib_query_qp); | |
1322 | ||
0e0ec7e0 SH |
1323 | int ib_close_qp(struct ib_qp *qp) |
1324 | { | |
1325 | struct ib_qp *real_qp; | |
1326 | unsigned long flags; | |
1327 | ||
1328 | real_qp = qp->real_qp; | |
1329 | if (real_qp == qp) | |
1330 | return -EINVAL; | |
1331 | ||
1332 | spin_lock_irqsave(&real_qp->device->event_handler_lock, flags); | |
1333 | list_del(&qp->open_list); | |
1334 | spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags); | |
1335 | ||
1336 | atomic_dec(&real_qp->usecnt); | |
d291f1a6 | 1337 | ib_close_shared_qp_security(qp->qp_sec); |
0e0ec7e0 SH |
1338 | kfree(qp); |
1339 | ||
1340 | return 0; | |
1341 | } | |
1342 | EXPORT_SYMBOL(ib_close_qp); | |
1343 | ||
1344 | static int __ib_destroy_shared_qp(struct ib_qp *qp) | |
1345 | { | |
1346 | struct ib_xrcd *xrcd; | |
1347 | struct ib_qp *real_qp; | |
1348 | int ret; | |
1349 | ||
1350 | real_qp = qp->real_qp; | |
1351 | xrcd = real_qp->xrcd; | |
1352 | ||
1353 | mutex_lock(&xrcd->tgt_qp_mutex); | |
1354 | ib_close_qp(qp); | |
1355 | if (atomic_read(&real_qp->usecnt) == 0) | |
1356 | list_del(&real_qp->xrcd_list); | |
1357 | else | |
1358 | real_qp = NULL; | |
1359 | mutex_unlock(&xrcd->tgt_qp_mutex); | |
1360 | ||
1361 | if (real_qp) { | |
1362 | ret = ib_destroy_qp(real_qp); | |
1363 | if (!ret) | |
1364 | atomic_dec(&xrcd->usecnt); | |
1365 | else | |
1366 | __ib_insert_xrcd_qp(xrcd, real_qp); | |
1367 | } | |
1368 | ||
1369 | return 0; | |
1370 | } | |
1371 | ||
1da177e4 LT |
1372 | int ib_destroy_qp(struct ib_qp *qp) |
1373 | { | |
1374 | struct ib_pd *pd; | |
1375 | struct ib_cq *scq, *rcq; | |
1376 | struct ib_srq *srq; | |
a9017e23 | 1377 | struct ib_rwq_ind_table *ind_tbl; |
d291f1a6 | 1378 | struct ib_qp_security *sec; |
1da177e4 LT |
1379 | int ret; |
1380 | ||
fffb0383 CH |
1381 | WARN_ON_ONCE(qp->mrs_used > 0); |
1382 | ||
0e0ec7e0 SH |
1383 | if (atomic_read(&qp->usecnt)) |
1384 | return -EBUSY; | |
1385 | ||
1386 | if (qp->real_qp != qp) | |
1387 | return __ib_destroy_shared_qp(qp); | |
1388 | ||
b42b63cf SH |
1389 | pd = qp->pd; |
1390 | scq = qp->send_cq; | |
1391 | rcq = qp->recv_cq; | |
1392 | srq = qp->srq; | |
a9017e23 | 1393 | ind_tbl = qp->rwq_ind_tbl; |
d291f1a6 DJ |
1394 | sec = qp->qp_sec; |
1395 | if (sec) | |
1396 | ib_destroy_qp_security_begin(sec); | |
1da177e4 | 1397 | |
a060b562 CH |
1398 | if (!qp->uobject) |
1399 | rdma_rw_cleanup_mrs(qp); | |
1400 | ||
1da177e4 LT |
1401 | ret = qp->device->destroy_qp(qp); |
1402 | if (!ret) { | |
b42b63cf SH |
1403 | if (pd) |
1404 | atomic_dec(&pd->usecnt); | |
1405 | if (scq) | |
1406 | atomic_dec(&scq->usecnt); | |
1407 | if (rcq) | |
1408 | atomic_dec(&rcq->usecnt); | |
1da177e4 LT |
1409 | if (srq) |
1410 | atomic_dec(&srq->usecnt); | |
a9017e23 YH |
1411 | if (ind_tbl) |
1412 | atomic_dec(&ind_tbl->usecnt); | |
d291f1a6 DJ |
1413 | if (sec) |
1414 | ib_destroy_qp_security_end(sec); | |
1415 | } else { | |
1416 | if (sec) | |
1417 | ib_destroy_qp_security_abort(sec); | |
1da177e4 LT |
1418 | } |
1419 | ||
1420 | return ret; | |
1421 | } | |
1422 | EXPORT_SYMBOL(ib_destroy_qp); | |
1423 | ||
1424 | /* Completion queues */ | |
1425 | ||
1426 | struct ib_cq *ib_create_cq(struct ib_device *device, | |
1427 | ib_comp_handler comp_handler, | |
1428 | void (*event_handler)(struct ib_event *, void *), | |
8e37210b MB |
1429 | void *cq_context, |
1430 | const struct ib_cq_init_attr *cq_attr) | |
1da177e4 LT |
1431 | { |
1432 | struct ib_cq *cq; | |
1433 | ||
8e37210b | 1434 | cq = device->create_cq(device, cq_attr, NULL, NULL); |
1da177e4 LT |
1435 | |
1436 | if (!IS_ERR(cq)) { | |
1437 | cq->device = device; | |
b5e81bf5 | 1438 | cq->uobject = NULL; |
1da177e4 LT |
1439 | cq->comp_handler = comp_handler; |
1440 | cq->event_handler = event_handler; | |
1441 | cq->cq_context = cq_context; | |
1442 | atomic_set(&cq->usecnt, 0); | |
1443 | } | |
1444 | ||
1445 | return cq; | |
1446 | } | |
1447 | EXPORT_SYMBOL(ib_create_cq); | |
1448 | ||
2dd57162 EC |
1449 | int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period) |
1450 | { | |
1451 | return cq->device->modify_cq ? | |
1452 | cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS; | |
1453 | } | |
1454 | EXPORT_SYMBOL(ib_modify_cq); | |
1455 | ||
1da177e4 LT |
1456 | int ib_destroy_cq(struct ib_cq *cq) |
1457 | { | |
1458 | if (atomic_read(&cq->usecnt)) | |
1459 | return -EBUSY; | |
1460 | ||
1461 | return cq->device->destroy_cq(cq); | |
1462 | } | |
1463 | EXPORT_SYMBOL(ib_destroy_cq); | |
1464 | ||
a74cd4af | 1465 | int ib_resize_cq(struct ib_cq *cq, int cqe) |
1da177e4 | 1466 | { |
40de2e54 | 1467 | return cq->device->resize_cq ? |
33b9b3ee | 1468 | cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS; |
1da177e4 LT |
1469 | } |
1470 | EXPORT_SYMBOL(ib_resize_cq); | |
1471 | ||
1472 | /* Memory regions */ | |
1473 | ||
1da177e4 LT |
1474 | int ib_dereg_mr(struct ib_mr *mr) |
1475 | { | |
ab67ed8d | 1476 | struct ib_pd *pd = mr->pd; |
1da177e4 LT |
1477 | int ret; |
1478 | ||
1da177e4 LT |
1479 | ret = mr->device->dereg_mr(mr); |
1480 | if (!ret) | |
1481 | atomic_dec(&pd->usecnt); | |
1482 | ||
1483 | return ret; | |
1484 | } | |
1485 | EXPORT_SYMBOL(ib_dereg_mr); | |
1486 | ||
9bee178b SG |
1487 | /** |
1488 | * ib_alloc_mr() - Allocates a memory region | |
1489 | * @pd: protection domain associated with the region | |
1490 | * @mr_type: memory region type | |
1491 | * @max_num_sg: maximum sg entries available for registration. | |
1492 | * | |
1493 | * Notes: | |
1494 | * Memory registeration page/sg lists must not exceed max_num_sg. | |
1495 | * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed | |
1496 | * max_num_sg * used_page_size. | |
1497 | * | |
1498 | */ | |
1499 | struct ib_mr *ib_alloc_mr(struct ib_pd *pd, | |
1500 | enum ib_mr_type mr_type, | |
1501 | u32 max_num_sg) | |
00f7ec36 SW |
1502 | { |
1503 | struct ib_mr *mr; | |
1504 | ||
d9f272c5 | 1505 | if (!pd->device->alloc_mr) |
00f7ec36 SW |
1506 | return ERR_PTR(-ENOSYS); |
1507 | ||
d9f272c5 | 1508 | mr = pd->device->alloc_mr(pd, mr_type, max_num_sg); |
00f7ec36 SW |
1509 | if (!IS_ERR(mr)) { |
1510 | mr->device = pd->device; | |
1511 | mr->pd = pd; | |
1512 | mr->uobject = NULL; | |
1513 | atomic_inc(&pd->usecnt); | |
d4a85c30 | 1514 | mr->need_inval = false; |
00f7ec36 SW |
1515 | } |
1516 | ||
1517 | return mr; | |
1518 | } | |
d9f272c5 | 1519 | EXPORT_SYMBOL(ib_alloc_mr); |
00f7ec36 | 1520 | |
1da177e4 LT |
1521 | /* "Fast" memory regions */ |
1522 | ||
1523 | struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd, | |
1524 | int mr_access_flags, | |
1525 | struct ib_fmr_attr *fmr_attr) | |
1526 | { | |
1527 | struct ib_fmr *fmr; | |
1528 | ||
1529 | if (!pd->device->alloc_fmr) | |
1530 | return ERR_PTR(-ENOSYS); | |
1531 | ||
1532 | fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr); | |
1533 | if (!IS_ERR(fmr)) { | |
1534 | fmr->device = pd->device; | |
1535 | fmr->pd = pd; | |
1536 | atomic_inc(&pd->usecnt); | |
1537 | } | |
1538 | ||
1539 | return fmr; | |
1540 | } | |
1541 | EXPORT_SYMBOL(ib_alloc_fmr); | |
1542 | ||
1543 | int ib_unmap_fmr(struct list_head *fmr_list) | |
1544 | { | |
1545 | struct ib_fmr *fmr; | |
1546 | ||
1547 | if (list_empty(fmr_list)) | |
1548 | return 0; | |
1549 | ||
1550 | fmr = list_entry(fmr_list->next, struct ib_fmr, list); | |
1551 | return fmr->device->unmap_fmr(fmr_list); | |
1552 | } | |
1553 | EXPORT_SYMBOL(ib_unmap_fmr); | |
1554 | ||
1555 | int ib_dealloc_fmr(struct ib_fmr *fmr) | |
1556 | { | |
1557 | struct ib_pd *pd; | |
1558 | int ret; | |
1559 | ||
1560 | pd = fmr->pd; | |
1561 | ret = fmr->device->dealloc_fmr(fmr); | |
1562 | if (!ret) | |
1563 | atomic_dec(&pd->usecnt); | |
1564 | ||
1565 | return ret; | |
1566 | } | |
1567 | EXPORT_SYMBOL(ib_dealloc_fmr); | |
1568 | ||
1569 | /* Multicast groups */ | |
1570 | ||
1571 | int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid) | |
1572 | { | |
c3bccbfb OG |
1573 | int ret; |
1574 | ||
0c33aeed JM |
1575 | if (!qp->device->attach_mcast) |
1576 | return -ENOSYS; | |
8561eae6 MR |
1577 | if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD || |
1578 | lid < be16_to_cpu(IB_MULTICAST_LID_BASE) || | |
1579 | lid == be16_to_cpu(IB_LID_PERMISSIVE)) | |
0c33aeed JM |
1580 | return -EINVAL; |
1581 | ||
c3bccbfb OG |
1582 | ret = qp->device->attach_mcast(qp, gid, lid); |
1583 | if (!ret) | |
1584 | atomic_inc(&qp->usecnt); | |
1585 | return ret; | |
1da177e4 LT |
1586 | } |
1587 | EXPORT_SYMBOL(ib_attach_mcast); | |
1588 | ||
1589 | int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid) | |
1590 | { | |
c3bccbfb OG |
1591 | int ret; |
1592 | ||
0c33aeed JM |
1593 | if (!qp->device->detach_mcast) |
1594 | return -ENOSYS; | |
8561eae6 MR |
1595 | if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD || |
1596 | lid < be16_to_cpu(IB_MULTICAST_LID_BASE) || | |
1597 | lid == be16_to_cpu(IB_LID_PERMISSIVE)) | |
0c33aeed JM |
1598 | return -EINVAL; |
1599 | ||
c3bccbfb OG |
1600 | ret = qp->device->detach_mcast(qp, gid, lid); |
1601 | if (!ret) | |
1602 | atomic_dec(&qp->usecnt); | |
1603 | return ret; | |
1da177e4 LT |
1604 | } |
1605 | EXPORT_SYMBOL(ib_detach_mcast); | |
59991f94 SH |
1606 | |
1607 | struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device) | |
1608 | { | |
1609 | struct ib_xrcd *xrcd; | |
1610 | ||
1611 | if (!device->alloc_xrcd) | |
1612 | return ERR_PTR(-ENOSYS); | |
1613 | ||
1614 | xrcd = device->alloc_xrcd(device, NULL, NULL); | |
1615 | if (!IS_ERR(xrcd)) { | |
1616 | xrcd->device = device; | |
53d0bd1e | 1617 | xrcd->inode = NULL; |
59991f94 | 1618 | atomic_set(&xrcd->usecnt, 0); |
d3d72d90 SH |
1619 | mutex_init(&xrcd->tgt_qp_mutex); |
1620 | INIT_LIST_HEAD(&xrcd->tgt_qp_list); | |
59991f94 SH |
1621 | } |
1622 | ||
1623 | return xrcd; | |
1624 | } | |
1625 | EXPORT_SYMBOL(ib_alloc_xrcd); | |
1626 | ||
1627 | int ib_dealloc_xrcd(struct ib_xrcd *xrcd) | |
1628 | { | |
d3d72d90 SH |
1629 | struct ib_qp *qp; |
1630 | int ret; | |
1631 | ||
59991f94 SH |
1632 | if (atomic_read(&xrcd->usecnt)) |
1633 | return -EBUSY; | |
1634 | ||
d3d72d90 SH |
1635 | while (!list_empty(&xrcd->tgt_qp_list)) { |
1636 | qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list); | |
1637 | ret = ib_destroy_qp(qp); | |
1638 | if (ret) | |
1639 | return ret; | |
1640 | } | |
1641 | ||
59991f94 SH |
1642 | return xrcd->device->dealloc_xrcd(xrcd); |
1643 | } | |
1644 | EXPORT_SYMBOL(ib_dealloc_xrcd); | |
319a441d | 1645 | |
5fd251c8 YH |
1646 | /** |
1647 | * ib_create_wq - Creates a WQ associated with the specified protection | |
1648 | * domain. | |
1649 | * @pd: The protection domain associated with the WQ. | |
1650 | * @wq_init_attr: A list of initial attributes required to create the | |
1651 | * WQ. If WQ creation succeeds, then the attributes are updated to | |
1652 | * the actual capabilities of the created WQ. | |
1653 | * | |
1654 | * wq_init_attr->max_wr and wq_init_attr->max_sge determine | |
1655 | * the requested size of the WQ, and set to the actual values allocated | |
1656 | * on return. | |
1657 | * If ib_create_wq() succeeds, then max_wr and max_sge will always be | |
1658 | * at least as large as the requested values. | |
1659 | */ | |
1660 | struct ib_wq *ib_create_wq(struct ib_pd *pd, | |
1661 | struct ib_wq_init_attr *wq_attr) | |
1662 | { | |
1663 | struct ib_wq *wq; | |
1664 | ||
1665 | if (!pd->device->create_wq) | |
1666 | return ERR_PTR(-ENOSYS); | |
1667 | ||
1668 | wq = pd->device->create_wq(pd, wq_attr, NULL); | |
1669 | if (!IS_ERR(wq)) { | |
1670 | wq->event_handler = wq_attr->event_handler; | |
1671 | wq->wq_context = wq_attr->wq_context; | |
1672 | wq->wq_type = wq_attr->wq_type; | |
1673 | wq->cq = wq_attr->cq; | |
1674 | wq->device = pd->device; | |
1675 | wq->pd = pd; | |
1676 | wq->uobject = NULL; | |
1677 | atomic_inc(&pd->usecnt); | |
1678 | atomic_inc(&wq_attr->cq->usecnt); | |
1679 | atomic_set(&wq->usecnt, 0); | |
1680 | } | |
1681 | return wq; | |
1682 | } | |
1683 | EXPORT_SYMBOL(ib_create_wq); | |
1684 | ||
1685 | /** | |
1686 | * ib_destroy_wq - Destroys the specified WQ. | |
1687 | * @wq: The WQ to destroy. | |
1688 | */ | |
1689 | int ib_destroy_wq(struct ib_wq *wq) | |
1690 | { | |
1691 | int err; | |
1692 | struct ib_cq *cq = wq->cq; | |
1693 | struct ib_pd *pd = wq->pd; | |
1694 | ||
1695 | if (atomic_read(&wq->usecnt)) | |
1696 | return -EBUSY; | |
1697 | ||
1698 | err = wq->device->destroy_wq(wq); | |
1699 | if (!err) { | |
1700 | atomic_dec(&pd->usecnt); | |
1701 | atomic_dec(&cq->usecnt); | |
1702 | } | |
1703 | return err; | |
1704 | } | |
1705 | EXPORT_SYMBOL(ib_destroy_wq); | |
1706 | ||
1707 | /** | |
1708 | * ib_modify_wq - Modifies the specified WQ. | |
1709 | * @wq: The WQ to modify. | |
1710 | * @wq_attr: On input, specifies the WQ attributes to modify. | |
1711 | * @wq_attr_mask: A bit-mask used to specify which attributes of the WQ | |
1712 | * are being modified. | |
1713 | * On output, the current values of selected WQ attributes are returned. | |
1714 | */ | |
1715 | int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, | |
1716 | u32 wq_attr_mask) | |
1717 | { | |
1718 | int err; | |
1719 | ||
1720 | if (!wq->device->modify_wq) | |
1721 | return -ENOSYS; | |
1722 | ||
1723 | err = wq->device->modify_wq(wq, wq_attr, wq_attr_mask, NULL); | |
1724 | return err; | |
1725 | } | |
1726 | EXPORT_SYMBOL(ib_modify_wq); | |
1727 | ||
6d39786b YH |
1728 | /* |
1729 | * ib_create_rwq_ind_table - Creates a RQ Indirection Table. | |
1730 | * @device: The device on which to create the rwq indirection table. | |
1731 | * @ib_rwq_ind_table_init_attr: A list of initial attributes required to | |
1732 | * create the Indirection Table. | |
1733 | * | |
1734 | * Note: The life time of ib_rwq_ind_table_init_attr->ind_tbl is not less | |
1735 | * than the created ib_rwq_ind_table object and the caller is responsible | |
1736 | * for its memory allocation/free. | |
1737 | */ | |
1738 | struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device, | |
1739 | struct ib_rwq_ind_table_init_attr *init_attr) | |
1740 | { | |
1741 | struct ib_rwq_ind_table *rwq_ind_table; | |
1742 | int i; | |
1743 | u32 table_size; | |
1744 | ||
1745 | if (!device->create_rwq_ind_table) | |
1746 | return ERR_PTR(-ENOSYS); | |
1747 | ||
1748 | table_size = (1 << init_attr->log_ind_tbl_size); | |
1749 | rwq_ind_table = device->create_rwq_ind_table(device, | |
1750 | init_attr, NULL); | |
1751 | if (IS_ERR(rwq_ind_table)) | |
1752 | return rwq_ind_table; | |
1753 | ||
1754 | rwq_ind_table->ind_tbl = init_attr->ind_tbl; | |
1755 | rwq_ind_table->log_ind_tbl_size = init_attr->log_ind_tbl_size; | |
1756 | rwq_ind_table->device = device; | |
1757 | rwq_ind_table->uobject = NULL; | |
1758 | atomic_set(&rwq_ind_table->usecnt, 0); | |
1759 | ||
1760 | for (i = 0; i < table_size; i++) | |
1761 | atomic_inc(&rwq_ind_table->ind_tbl[i]->usecnt); | |
1762 | ||
1763 | return rwq_ind_table; | |
1764 | } | |
1765 | EXPORT_SYMBOL(ib_create_rwq_ind_table); | |
1766 | ||
1767 | /* | |
1768 | * ib_destroy_rwq_ind_table - Destroys the specified Indirection Table. | |
1769 | * @wq_ind_table: The Indirection Table to destroy. | |
1770 | */ | |
1771 | int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *rwq_ind_table) | |
1772 | { | |
1773 | int err, i; | |
1774 | u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size); | |
1775 | struct ib_wq **ind_tbl = rwq_ind_table->ind_tbl; | |
1776 | ||
1777 | if (atomic_read(&rwq_ind_table->usecnt)) | |
1778 | return -EBUSY; | |
1779 | ||
1780 | err = rwq_ind_table->device->destroy_rwq_ind_table(rwq_ind_table); | |
1781 | if (!err) { | |
1782 | for (i = 0; i < table_size; i++) | |
1783 | atomic_dec(&ind_tbl[i]->usecnt); | |
1784 | } | |
1785 | ||
1786 | return err; | |
1787 | } | |
1788 | EXPORT_SYMBOL(ib_destroy_rwq_ind_table); | |
1789 | ||
319a441d HHZ |
1790 | struct ib_flow *ib_create_flow(struct ib_qp *qp, |
1791 | struct ib_flow_attr *flow_attr, | |
1792 | int domain) | |
1793 | { | |
1794 | struct ib_flow *flow_id; | |
1795 | if (!qp->device->create_flow) | |
1796 | return ERR_PTR(-ENOSYS); | |
1797 | ||
1798 | flow_id = qp->device->create_flow(qp, flow_attr, domain); | |
8ecc7985 | 1799 | if (!IS_ERR(flow_id)) { |
319a441d | 1800 | atomic_inc(&qp->usecnt); |
8ecc7985 MB |
1801 | flow_id->qp = qp; |
1802 | } | |
319a441d HHZ |
1803 | return flow_id; |
1804 | } | |
1805 | EXPORT_SYMBOL(ib_create_flow); | |
1806 | ||
1807 | int ib_destroy_flow(struct ib_flow *flow_id) | |
1808 | { | |
1809 | int err; | |
1810 | struct ib_qp *qp = flow_id->qp; | |
1811 | ||
1812 | err = qp->device->destroy_flow(flow_id); | |
1813 | if (!err) | |
1814 | atomic_dec(&qp->usecnt); | |
1815 | return err; | |
1816 | } | |
1817 | EXPORT_SYMBOL(ib_destroy_flow); | |
1b01d335 SG |
1818 | |
1819 | int ib_check_mr_status(struct ib_mr *mr, u32 check_mask, | |
1820 | struct ib_mr_status *mr_status) | |
1821 | { | |
1822 | return mr->device->check_mr_status ? | |
1823 | mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS; | |
1824 | } | |
1825 | EXPORT_SYMBOL(ib_check_mr_status); | |
4c67e2bf | 1826 | |
50174a7f EC |
1827 | int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port, |
1828 | int state) | |
1829 | { | |
1830 | if (!device->set_vf_link_state) | |
1831 | return -ENOSYS; | |
1832 | ||
1833 | return device->set_vf_link_state(device, vf, port, state); | |
1834 | } | |
1835 | EXPORT_SYMBOL(ib_set_vf_link_state); | |
1836 | ||
1837 | int ib_get_vf_config(struct ib_device *device, int vf, u8 port, | |
1838 | struct ifla_vf_info *info) | |
1839 | { | |
1840 | if (!device->get_vf_config) | |
1841 | return -ENOSYS; | |
1842 | ||
1843 | return device->get_vf_config(device, vf, port, info); | |
1844 | } | |
1845 | EXPORT_SYMBOL(ib_get_vf_config); | |
1846 | ||
1847 | int ib_get_vf_stats(struct ib_device *device, int vf, u8 port, | |
1848 | struct ifla_vf_stats *stats) | |
1849 | { | |
1850 | if (!device->get_vf_stats) | |
1851 | return -ENOSYS; | |
1852 | ||
1853 | return device->get_vf_stats(device, vf, port, stats); | |
1854 | } | |
1855 | EXPORT_SYMBOL(ib_get_vf_stats); | |
1856 | ||
1857 | int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid, | |
1858 | int type) | |
1859 | { | |
1860 | if (!device->set_vf_guid) | |
1861 | return -ENOSYS; | |
1862 | ||
1863 | return device->set_vf_guid(device, vf, port, guid, type); | |
1864 | } | |
1865 | EXPORT_SYMBOL(ib_set_vf_guid); | |
1866 | ||
4c67e2bf SG |
1867 | /** |
1868 | * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list | |
1869 | * and set it the memory region. | |
1870 | * @mr: memory region | |
1871 | * @sg: dma mapped scatterlist | |
1872 | * @sg_nents: number of entries in sg | |
ff2ba993 | 1873 | * @sg_offset: offset in bytes into sg |
4c67e2bf SG |
1874 | * @page_size: page vector desired page size |
1875 | * | |
1876 | * Constraints: | |
1877 | * - The first sg element is allowed to have an offset. | |
52746129 BVA |
1878 | * - Each sg element must either be aligned to page_size or virtually |
1879 | * contiguous to the previous element. In case an sg element has a | |
1880 | * non-contiguous offset, the mapping prefix will not include it. | |
4c67e2bf SG |
1881 | * - The last sg element is allowed to have length less than page_size. |
1882 | * - If sg_nents total byte length exceeds the mr max_num_sge * page_size | |
1883 | * then only max_num_sg entries will be mapped. | |
52746129 | 1884 | * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS, none of these |
f5aa9159 | 1885 | * constraints holds and the page_size argument is ignored. |
4c67e2bf SG |
1886 | * |
1887 | * Returns the number of sg elements that were mapped to the memory region. | |
1888 | * | |
1889 | * After this completes successfully, the memory region | |
1890 | * is ready for registration. | |
1891 | */ | |
ff2ba993 | 1892 | int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents, |
9aa8b321 | 1893 | unsigned int *sg_offset, unsigned int page_size) |
4c67e2bf SG |
1894 | { |
1895 | if (unlikely(!mr->device->map_mr_sg)) | |
1896 | return -ENOSYS; | |
1897 | ||
1898 | mr->page_size = page_size; | |
1899 | ||
ff2ba993 | 1900 | return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset); |
4c67e2bf SG |
1901 | } |
1902 | EXPORT_SYMBOL(ib_map_mr_sg); | |
1903 | ||
1904 | /** | |
1905 | * ib_sg_to_pages() - Convert the largest prefix of a sg list | |
1906 | * to a page vector | |
1907 | * @mr: memory region | |
1908 | * @sgl: dma mapped scatterlist | |
1909 | * @sg_nents: number of entries in sg | |
9aa8b321 BVA |
1910 | * @sg_offset_p: IN: start offset in bytes into sg |
1911 | * OUT: offset in bytes for element n of the sg of the first | |
1912 | * byte that has not been processed where n is the return | |
1913 | * value of this function. | |
4c67e2bf SG |
1914 | * @set_page: driver page assignment function pointer |
1915 | * | |
8f5ba10e | 1916 | * Core service helper for drivers to convert the largest |
4c67e2bf SG |
1917 | * prefix of given sg list to a page vector. The sg list |
1918 | * prefix converted is the prefix that meet the requirements | |
1919 | * of ib_map_mr_sg. | |
1920 | * | |
1921 | * Returns the number of sg elements that were assigned to | |
1922 | * a page vector. | |
1923 | */ | |
ff2ba993 | 1924 | int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents, |
9aa8b321 | 1925 | unsigned int *sg_offset_p, int (*set_page)(struct ib_mr *, u64)) |
4c67e2bf SG |
1926 | { |
1927 | struct scatterlist *sg; | |
b6aeb980 | 1928 | u64 last_end_dma_addr = 0; |
9aa8b321 | 1929 | unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0; |
4c67e2bf SG |
1930 | unsigned int last_page_off = 0; |
1931 | u64 page_mask = ~((u64)mr->page_size - 1); | |
8f5ba10e | 1932 | int i, ret; |
4c67e2bf | 1933 | |
9aa8b321 BVA |
1934 | if (unlikely(sg_nents <= 0 || sg_offset > sg_dma_len(&sgl[0]))) |
1935 | return -EINVAL; | |
1936 | ||
ff2ba993 | 1937 | mr->iova = sg_dma_address(&sgl[0]) + sg_offset; |
4c67e2bf SG |
1938 | mr->length = 0; |
1939 | ||
1940 | for_each_sg(sgl, sg, sg_nents, i) { | |
ff2ba993 | 1941 | u64 dma_addr = sg_dma_address(sg) + sg_offset; |
9aa8b321 | 1942 | u64 prev_addr = dma_addr; |
ff2ba993 | 1943 | unsigned int dma_len = sg_dma_len(sg) - sg_offset; |
4c67e2bf SG |
1944 | u64 end_dma_addr = dma_addr + dma_len; |
1945 | u64 page_addr = dma_addr & page_mask; | |
1946 | ||
8f5ba10e BVA |
1947 | /* |
1948 | * For the second and later elements, check whether either the | |
1949 | * end of element i-1 or the start of element i is not aligned | |
1950 | * on a page boundary. | |
1951 | */ | |
1952 | if (i && (last_page_off != 0 || page_addr != dma_addr)) { | |
1953 | /* Stop mapping if there is a gap. */ | |
1954 | if (last_end_dma_addr != dma_addr) | |
1955 | break; | |
1956 | ||
1957 | /* | |
1958 | * Coalesce this element with the last. If it is small | |
1959 | * enough just update mr->length. Otherwise start | |
1960 | * mapping from the next page. | |
1961 | */ | |
1962 | goto next_page; | |
4c67e2bf SG |
1963 | } |
1964 | ||
1965 | do { | |
8f5ba10e | 1966 | ret = set_page(mr, page_addr); |
9aa8b321 BVA |
1967 | if (unlikely(ret < 0)) { |
1968 | sg_offset = prev_addr - sg_dma_address(sg); | |
1969 | mr->length += prev_addr - dma_addr; | |
1970 | if (sg_offset_p) | |
1971 | *sg_offset_p = sg_offset; | |
1972 | return i || sg_offset ? i : ret; | |
1973 | } | |
1974 | prev_addr = page_addr; | |
8f5ba10e | 1975 | next_page: |
4c67e2bf SG |
1976 | page_addr += mr->page_size; |
1977 | } while (page_addr < end_dma_addr); | |
1978 | ||
1979 | mr->length += dma_len; | |
1980 | last_end_dma_addr = end_dma_addr; | |
4c67e2bf | 1981 | last_page_off = end_dma_addr & ~page_mask; |
ff2ba993 CH |
1982 | |
1983 | sg_offset = 0; | |
4c67e2bf SG |
1984 | } |
1985 | ||
9aa8b321 BVA |
1986 | if (sg_offset_p) |
1987 | *sg_offset_p = 0; | |
4c67e2bf SG |
1988 | return i; |
1989 | } | |
1990 | EXPORT_SYMBOL(ib_sg_to_pages); | |
765d6774 SW |
1991 | |
1992 | struct ib_drain_cqe { | |
1993 | struct ib_cqe cqe; | |
1994 | struct completion done; | |
1995 | }; | |
1996 | ||
1997 | static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) | |
1998 | { | |
1999 | struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe, | |
2000 | cqe); | |
2001 | ||
2002 | complete(&cqe->done); | |
2003 | } | |
2004 | ||
2005 | /* | |
2006 | * Post a WR and block until its completion is reaped for the SQ. | |
2007 | */ | |
2008 | static void __ib_drain_sq(struct ib_qp *qp) | |
2009 | { | |
f039f44f | 2010 | struct ib_cq *cq = qp->send_cq; |
765d6774 SW |
2011 | struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; |
2012 | struct ib_drain_cqe sdrain; | |
2013 | struct ib_send_wr swr = {}, *bad_swr; | |
2014 | int ret; | |
2015 | ||
765d6774 SW |
2016 | swr.wr_cqe = &sdrain.cqe; |
2017 | sdrain.cqe.done = ib_drain_qp_done; | |
2018 | init_completion(&sdrain.done); | |
2019 | ||
2020 | ret = ib_modify_qp(qp, &attr, IB_QP_STATE); | |
2021 | if (ret) { | |
2022 | WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); | |
2023 | return; | |
2024 | } | |
2025 | ||
2026 | ret = ib_post_send(qp, &swr, &bad_swr); | |
2027 | if (ret) { | |
2028 | WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); | |
2029 | return; | |
2030 | } | |
2031 | ||
f039f44f BVA |
2032 | if (cq->poll_ctx == IB_POLL_DIRECT) |
2033 | while (wait_for_completion_timeout(&sdrain.done, HZ / 10) <= 0) | |
2034 | ib_process_cq_direct(cq, -1); | |
2035 | else | |
2036 | wait_for_completion(&sdrain.done); | |
765d6774 SW |
2037 | } |
2038 | ||
2039 | /* | |
2040 | * Post a WR and block until its completion is reaped for the RQ. | |
2041 | */ | |
2042 | static void __ib_drain_rq(struct ib_qp *qp) | |
2043 | { | |
f039f44f | 2044 | struct ib_cq *cq = qp->recv_cq; |
765d6774 SW |
2045 | struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; |
2046 | struct ib_drain_cqe rdrain; | |
2047 | struct ib_recv_wr rwr = {}, *bad_rwr; | |
2048 | int ret; | |
2049 | ||
765d6774 SW |
2050 | rwr.wr_cqe = &rdrain.cqe; |
2051 | rdrain.cqe.done = ib_drain_qp_done; | |
2052 | init_completion(&rdrain.done); | |
2053 | ||
2054 | ret = ib_modify_qp(qp, &attr, IB_QP_STATE); | |
2055 | if (ret) { | |
2056 | WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); | |
2057 | return; | |
2058 | } | |
2059 | ||
2060 | ret = ib_post_recv(qp, &rwr, &bad_rwr); | |
2061 | if (ret) { | |
2062 | WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); | |
2063 | return; | |
2064 | } | |
2065 | ||
f039f44f BVA |
2066 | if (cq->poll_ctx == IB_POLL_DIRECT) |
2067 | while (wait_for_completion_timeout(&rdrain.done, HZ / 10) <= 0) | |
2068 | ib_process_cq_direct(cq, -1); | |
2069 | else | |
2070 | wait_for_completion(&rdrain.done); | |
765d6774 SW |
2071 | } |
2072 | ||
2073 | /** | |
2074 | * ib_drain_sq() - Block until all SQ CQEs have been consumed by the | |
2075 | * application. | |
2076 | * @qp: queue pair to drain | |
2077 | * | |
2078 | * If the device has a provider-specific drain function, then | |
2079 | * call that. Otherwise call the generic drain function | |
2080 | * __ib_drain_sq(). | |
2081 | * | |
2082 | * The caller must: | |
2083 | * | |
2084 | * ensure there is room in the CQ and SQ for the drain work request and | |
2085 | * completion. | |
2086 | * | |
f039f44f | 2087 | * allocate the CQ using ib_alloc_cq(). |
765d6774 SW |
2088 | * |
2089 | * ensure that there are no other contexts that are posting WRs concurrently. | |
2090 | * Otherwise the drain is not guaranteed. | |
2091 | */ | |
2092 | void ib_drain_sq(struct ib_qp *qp) | |
2093 | { | |
2094 | if (qp->device->drain_sq) | |
2095 | qp->device->drain_sq(qp); | |
2096 | else | |
2097 | __ib_drain_sq(qp); | |
2098 | } | |
2099 | EXPORT_SYMBOL(ib_drain_sq); | |
2100 | ||
2101 | /** | |
2102 | * ib_drain_rq() - Block until all RQ CQEs have been consumed by the | |
2103 | * application. | |
2104 | * @qp: queue pair to drain | |
2105 | * | |
2106 | * If the device has a provider-specific drain function, then | |
2107 | * call that. Otherwise call the generic drain function | |
2108 | * __ib_drain_rq(). | |
2109 | * | |
2110 | * The caller must: | |
2111 | * | |
2112 | * ensure there is room in the CQ and RQ for the drain work request and | |
2113 | * completion. | |
2114 | * | |
f039f44f | 2115 | * allocate the CQ using ib_alloc_cq(). |
765d6774 SW |
2116 | * |
2117 | * ensure that there are no other contexts that are posting WRs concurrently. | |
2118 | * Otherwise the drain is not guaranteed. | |
2119 | */ | |
2120 | void ib_drain_rq(struct ib_qp *qp) | |
2121 | { | |
2122 | if (qp->device->drain_rq) | |
2123 | qp->device->drain_rq(qp); | |
2124 | else | |
2125 | __ib_drain_rq(qp); | |
2126 | } | |
2127 | EXPORT_SYMBOL(ib_drain_rq); | |
2128 | ||
2129 | /** | |
2130 | * ib_drain_qp() - Block until all CQEs have been consumed by the | |
2131 | * application on both the RQ and SQ. | |
2132 | * @qp: queue pair to drain | |
2133 | * | |
2134 | * The caller must: | |
2135 | * | |
2136 | * ensure there is room in the CQ(s), SQ, and RQ for drain work requests | |
2137 | * and completions. | |
2138 | * | |
f039f44f | 2139 | * allocate the CQs using ib_alloc_cq(). |
765d6774 SW |
2140 | * |
2141 | * ensure that there are no other contexts that are posting WRs concurrently. | |
2142 | * Otherwise the drain is not guaranteed. | |
2143 | */ | |
2144 | void ib_drain_qp(struct ib_qp *qp) | |
2145 | { | |
2146 | ib_drain_sq(qp); | |
42235f80 SG |
2147 | if (!qp->srq) |
2148 | ib_drain_rq(qp); | |
765d6774 SW |
2149 | } |
2150 | EXPORT_SYMBOL(ib_drain_qp); |