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9a443537 | 1 | /* |
2 | * Copyright (c) 2016 Hisilicon Limited. | |
3 | * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved. | |
4 | * | |
5 | * This software is available to you under a choice of one of two | |
6 | * licenses. You may choose to be licensed under the terms of the GNU | |
7 | * General Public License (GPL) Version 2, available from the file | |
8 | * COPYING in the main directory of this source tree, or the | |
9 | * OpenIB.org BSD license below: | |
10 | * | |
11 | * Redistribution and use in source and binary forms, with or | |
12 | * without modification, are permitted provided that the following | |
13 | * conditions are met: | |
14 | * | |
15 | * - Redistributions of source code must retain the above | |
16 | * copyright notice, this list of conditions and the following | |
17 | * disclaimer. | |
18 | * | |
19 | * - Redistributions in binary form must reproduce the above | |
20 | * copyright notice, this list of conditions and the following | |
21 | * disclaimer in the documentation and/or other materials | |
22 | * provided with the distribution. | |
23 | * | |
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
31 | * SOFTWARE. | |
32 | */ | |
528f1deb | 33 | #include <linux/acpi.h> |
9a443537 | 34 | #include <linux/of_platform.h> |
35 | #include <rdma/ib_addr.h> | |
36 | #include <rdma/ib_smi.h> | |
37 | #include <rdma/ib_user_verbs.h> | |
82547469 | 38 | #include <rdma/ib_cache.h> |
9a443537 | 39 | #include "hns_roce_common.h" |
40 | #include "hns_roce_device.h" | |
41 | #include "hns_roce_user.h" | |
42 | #include "hns_roce_hem.h" | |
43 | ||
9a443537 | 44 | /** |
45 | * hns_get_gid_index - Get gid index. | |
46 | * @hr_dev: pointer to structure hns_roce_dev. | |
47 | * @port: port, value range: 0 ~ MAX | |
48 | * @gid_index: gid_index, value range: 0 ~ MAX | |
49 | * Description: | |
50 | * N ports shared gids, allocation method as follow: | |
51 | * GID[0][0], GID[1][0],.....GID[N - 1][0], | |
52 | * GID[0][0], GID[1][0],.....GID[N - 1][0], | |
53 | * And so on | |
54 | */ | |
55 | int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index) | |
56 | { | |
57 | return gid_index * hr_dev->caps.num_ports + port; | |
58 | } | |
59 | ||
9a443537 | 60 | static void hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr) |
61 | { | |
62 | u8 phy_port; | |
63 | u32 i = 0; | |
64 | ||
65 | if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM)) | |
66 | return; | |
67 | ||
68 | for (i = 0; i < MAC_ADDR_OCTET_NUM; i++) | |
69 | hr_dev->dev_addr[port][i] = addr[i]; | |
70 | ||
71 | phy_port = hr_dev->iboe.phy_port[port]; | |
72 | hr_dev->hw->set_mac(hr_dev, phy_port, addr); | |
73 | } | |
74 | ||
75 | static void hns_roce_set_mtu(struct hns_roce_dev *hr_dev, u8 port, int mtu) | |
76 | { | |
77 | u8 phy_port = hr_dev->iboe.phy_port[port]; | |
78 | enum ib_mtu tmp; | |
79 | ||
80 | tmp = iboe_get_mtu(mtu); | |
81 | if (!tmp) | |
82 | tmp = IB_MTU_256; | |
83 | ||
84 | hr_dev->hw->set_mtu(hr_dev, phy_port, tmp); | |
85 | } | |
86 | ||
82547469 SX |
87 | static int hns_roce_add_gid(struct ib_device *device, u8 port_num, |
88 | unsigned int index, const union ib_gid *gid, | |
89 | const struct ib_gid_attr *attr, void **context) | |
9a443537 | 90 | { |
82547469 SX |
91 | struct hns_roce_dev *hr_dev = to_hr_dev(device); |
92 | u8 port = port_num - 1; | |
93 | unsigned long flags; | |
94 | ||
95 | if (port >= hr_dev->caps.num_ports) | |
96 | return -EINVAL; | |
9a443537 | 97 | |
82547469 SX |
98 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); |
99 | ||
100 | hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid); | |
101 | ||
102 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); | |
103 | ||
104 | return 0; | |
105 | } | |
106 | ||
107 | static int hns_roce_del_gid(struct ib_device *device, u8 port_num, | |
108 | unsigned int index, void **context) | |
109 | { | |
110 | struct hns_roce_dev *hr_dev = to_hr_dev(device); | |
111 | union ib_gid zgid = { {0} }; | |
112 | u8 port = port_num - 1; | |
113 | unsigned long flags; | |
114 | ||
115 | if (port >= hr_dev->caps.num_ports) | |
116 | return -EINVAL; | |
117 | ||
118 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); | |
119 | ||
120 | hr_dev->hw->set_gid(hr_dev, port, index, &zgid); | |
121 | ||
122 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); | |
123 | ||
124 | return 0; | |
9a443537 | 125 | } |
126 | ||
127 | static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port, | |
128 | unsigned long event) | |
129 | { | |
130 | struct device *dev = &hr_dev->pdev->dev; | |
131 | struct net_device *netdev; | |
9a443537 | 132 | |
133 | netdev = hr_dev->iboe.netdevs[port]; | |
134 | if (!netdev) { | |
135 | dev_err(dev, "port(%d) can't find netdev\n", port); | |
136 | return -ENODEV; | |
137 | } | |
138 | ||
bfcc681b | 139 | spin_lock_bh(&hr_dev->iboe.lock); |
9a443537 | 140 | |
141 | switch (event) { | |
142 | case NETDEV_UP: | |
143 | case NETDEV_CHANGE: | |
144 | case NETDEV_REGISTER: | |
145 | case NETDEV_CHANGEADDR: | |
146 | hns_roce_set_mac(hr_dev, port, netdev->dev_addr); | |
9a443537 | 147 | break; |
148 | case NETDEV_DOWN: | |
149 | /* | |
e84e40be S |
150 | * In v1 engine, only support all ports closed together. |
151 | */ | |
9a443537 | 152 | break; |
153 | default: | |
154 | dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event)); | |
155 | break; | |
156 | } | |
157 | ||
bfcc681b | 158 | spin_unlock_bh(&hr_dev->iboe.lock); |
82547469 | 159 | return 0; |
9a443537 | 160 | } |
161 | ||
162 | static int hns_roce_netdev_event(struct notifier_block *self, | |
163 | unsigned long event, void *ptr) | |
164 | { | |
165 | struct net_device *dev = netdev_notifier_info_to_dev(ptr); | |
166 | struct hns_roce_ib_iboe *iboe = NULL; | |
167 | struct hns_roce_dev *hr_dev = NULL; | |
168 | u8 port = 0; | |
169 | int ret = 0; | |
170 | ||
171 | hr_dev = container_of(self, struct hns_roce_dev, iboe.nb); | |
172 | iboe = &hr_dev->iboe; | |
173 | ||
174 | for (port = 0; port < hr_dev->caps.num_ports; port++) { | |
175 | if (dev == iboe->netdevs[port]) { | |
176 | ret = handle_en_event(hr_dev, port, event); | |
177 | if (ret) | |
178 | return NOTIFY_DONE; | |
179 | break; | |
180 | } | |
181 | } | |
182 | ||
183 | return NOTIFY_DONE; | |
184 | } | |
185 | ||
82547469 | 186 | static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev) |
9a443537 | 187 | { |
82547469 | 188 | u8 i; |
9a443537 | 189 | |
190 | for (i = 0; i < hr_dev->caps.num_ports; i++) { | |
191 | hns_roce_set_mtu(hr_dev, i, | |
192 | ib_mtu_enum_to_int(hr_dev->caps.max_mtu)); | |
193 | hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr); | |
9a443537 | 194 | } |
195 | ||
82547469 | 196 | return 0; |
9a443537 | 197 | } |
198 | ||
199 | static int hns_roce_query_device(struct ib_device *ib_dev, | |
200 | struct ib_device_attr *props, | |
201 | struct ib_udata *uhw) | |
202 | { | |
203 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); | |
204 | ||
205 | memset(props, 0, sizeof(*props)); | |
206 | ||
207 | props->sys_image_guid = hr_dev->sys_image_guid; | |
208 | props->max_mr_size = (u64)(~(0ULL)); | |
209 | props->page_size_cap = hr_dev->caps.page_size_cap; | |
210 | props->vendor_id = hr_dev->vendor_id; | |
211 | props->vendor_part_id = hr_dev->vendor_part_id; | |
212 | props->hw_ver = hr_dev->hw_rev; | |
213 | props->max_qp = hr_dev->caps.num_qps; | |
214 | props->max_qp_wr = hr_dev->caps.max_wqes; | |
215 | props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT | | |
a74aab6c | 216 | IB_DEVICE_RC_RNR_NAK_GEN; |
9a443537 | 217 | props->max_sge = hr_dev->caps.max_sq_sg; |
218 | props->max_sge_rd = 1; | |
219 | props->max_cq = hr_dev->caps.num_cqs; | |
220 | props->max_cqe = hr_dev->caps.max_cqes; | |
221 | props->max_mr = hr_dev->caps.num_mtpts; | |
222 | props->max_pd = hr_dev->caps.num_pds; | |
223 | props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma; | |
224 | props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma; | |
225 | props->atomic_cap = IB_ATOMIC_NONE; | |
226 | props->max_pkeys = 1; | |
227 | props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay; | |
228 | ||
229 | return 0; | |
230 | } | |
231 | ||
2eefca27 LO |
232 | static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev, |
233 | u8 port_num) | |
234 | { | |
235 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); | |
236 | struct net_device *ndev; | |
237 | ||
238 | if (port_num < 1 || port_num > hr_dev->caps.num_ports) | |
239 | return NULL; | |
240 | ||
241 | rcu_read_lock(); | |
242 | ||
243 | ndev = hr_dev->iboe.netdevs[port_num - 1]; | |
244 | if (ndev) | |
245 | dev_hold(ndev); | |
246 | ||
247 | rcu_read_unlock(); | |
248 | return ndev; | |
249 | } | |
250 | ||
9a443537 | 251 | static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num, |
252 | struct ib_port_attr *props) | |
253 | { | |
254 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); | |
255 | struct device *dev = &hr_dev->pdev->dev; | |
256 | struct net_device *net_dev; | |
257 | unsigned long flags; | |
258 | enum ib_mtu mtu; | |
259 | u8 port; | |
260 | ||
261 | assert(port_num > 0); | |
262 | port = port_num - 1; | |
263 | ||
264 | memset(props, 0, sizeof(*props)); | |
265 | ||
266 | props->max_mtu = hr_dev->caps.max_mtu; | |
267 | props->gid_tbl_len = hr_dev->caps.gid_table_len[port]; | |
268 | props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP | | |
269 | IB_PORT_VENDOR_CLASS_SUP | | |
270 | IB_PORT_BOOT_MGMT_SUP; | |
271 | props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN; | |
272 | props->pkey_tbl_len = 1; | |
273 | props->active_width = IB_WIDTH_4X; | |
274 | props->active_speed = 1; | |
275 | ||
276 | spin_lock_irqsave(&hr_dev->iboe.lock, flags); | |
277 | ||
278 | net_dev = hr_dev->iboe.netdevs[port]; | |
279 | if (!net_dev) { | |
280 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); | |
281 | dev_err(dev, "find netdev %d failed!\r\n", port); | |
282 | return -EINVAL; | |
283 | } | |
284 | ||
285 | mtu = iboe_get_mtu(net_dev->mtu); | |
286 | props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256; | |
287 | props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ? | |
288 | IB_PORT_ACTIVE : IB_PORT_DOWN; | |
289 | props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3; | |
290 | ||
291 | spin_unlock_irqrestore(&hr_dev->iboe.lock, flags); | |
292 | ||
293 | return 0; | |
294 | } | |
295 | ||
296 | static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device, | |
297 | u8 port_num) | |
298 | { | |
299 | return IB_LINK_LAYER_ETHERNET; | |
300 | } | |
301 | ||
302 | static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index, | |
303 | union ib_gid *gid) | |
304 | { | |
9a443537 | 305 | return 0; |
306 | } | |
307 | ||
308 | static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index, | |
309 | u16 *pkey) | |
310 | { | |
311 | *pkey = PKEY_ID; | |
312 | ||
313 | return 0; | |
314 | } | |
315 | ||
316 | static int hns_roce_modify_device(struct ib_device *ib_dev, int mask, | |
317 | struct ib_device_modify *props) | |
318 | { | |
319 | unsigned long flags; | |
320 | ||
321 | if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) | |
322 | return -EOPNOTSUPP; | |
323 | ||
324 | if (mask & IB_DEVICE_MODIFY_NODE_DESC) { | |
325 | spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags); | |
326 | memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE); | |
327 | spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags); | |
328 | } | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
333 | static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask, | |
334 | struct ib_port_modify *props) | |
335 | { | |
336 | return 0; | |
337 | } | |
338 | ||
339 | static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev, | |
340 | struct ib_udata *udata) | |
341 | { | |
342 | int ret = 0; | |
343 | struct hns_roce_ucontext *context; | |
344 | struct hns_roce_ib_alloc_ucontext_resp resp; | |
345 | struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev); | |
346 | ||
347 | resp.qp_tab_size = hr_dev->caps.num_qps; | |
348 | ||
349 | context = kmalloc(sizeof(*context), GFP_KERNEL); | |
350 | if (!context) | |
351 | return ERR_PTR(-ENOMEM); | |
352 | ||
353 | ret = hns_roce_uar_alloc(hr_dev, &context->uar); | |
354 | if (ret) | |
355 | goto error_fail_uar_alloc; | |
356 | ||
357 | ret = ib_copy_to_udata(udata, &resp, sizeof(resp)); | |
358 | if (ret) | |
359 | goto error_fail_copy_to_udata; | |
360 | ||
361 | return &context->ibucontext; | |
362 | ||
363 | error_fail_copy_to_udata: | |
364 | hns_roce_uar_free(hr_dev, &context->uar); | |
365 | ||
366 | error_fail_uar_alloc: | |
367 | kfree(context); | |
368 | ||
369 | return ERR_PTR(ret); | |
370 | } | |
371 | ||
372 | static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext) | |
373 | { | |
374 | struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext); | |
375 | ||
376 | hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar); | |
377 | kfree(context); | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
382 | static int hns_roce_mmap(struct ib_ucontext *context, | |
383 | struct vm_area_struct *vma) | |
384 | { | |
8f3e9f3e WHX |
385 | struct hns_roce_dev *hr_dev = to_hr_dev(context->device); |
386 | ||
9a443537 | 387 | if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0) |
388 | return -EINVAL; | |
389 | ||
390 | if (vma->vm_pgoff == 0) { | |
391 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
392 | if (io_remap_pfn_range(vma, vma->vm_start, | |
393 | to_hr_ucontext(context)->uar.pfn, | |
394 | PAGE_SIZE, vma->vm_page_prot)) | |
395 | return -EAGAIN; | |
8f3e9f3e WHX |
396 | } else if (vma->vm_pgoff == 1 && hr_dev->hw_rev == HNS_ROCE_HW_VER1) { |
397 | /* vm_pgoff: 1 -- TPTR */ | |
398 | if (io_remap_pfn_range(vma, vma->vm_start, | |
399 | hr_dev->tptr_dma_addr >> PAGE_SHIFT, | |
400 | hr_dev->tptr_size, | |
401 | vma->vm_page_prot)) | |
402 | return -EAGAIN; | |
403 | } else | |
9a443537 | 404 | return -EINVAL; |
9a443537 | 405 | |
406 | return 0; | |
407 | } | |
408 | ||
409 | static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num, | |
410 | struct ib_port_immutable *immutable) | |
411 | { | |
412 | struct ib_port_attr attr; | |
413 | int ret; | |
414 | ||
415 | ret = hns_roce_query_port(ib_dev, port_num, &attr); | |
416 | if (ret) | |
417 | return ret; | |
418 | ||
419 | immutable->pkey_tbl_len = attr.pkey_tbl_len; | |
420 | immutable->gid_tbl_len = attr.gid_tbl_len; | |
421 | ||
422 | immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE; | |
423 | immutable->max_mad_size = IB_MGMT_MAD_SIZE; | |
424 | ||
425 | return 0; | |
426 | } | |
427 | ||
428 | static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev) | |
429 | { | |
430 | struct hns_roce_ib_iboe *iboe = &hr_dev->iboe; | |
431 | ||
432 | unregister_inetaddr_notifier(&iboe->nb_inet); | |
433 | unregister_netdevice_notifier(&iboe->nb); | |
434 | ib_unregister_device(&hr_dev->ib_dev); | |
435 | } | |
436 | ||
437 | static int hns_roce_register_device(struct hns_roce_dev *hr_dev) | |
438 | { | |
439 | int ret; | |
440 | struct hns_roce_ib_iboe *iboe = NULL; | |
441 | struct ib_device *ib_dev = NULL; | |
442 | struct device *dev = &hr_dev->pdev->dev; | |
443 | ||
444 | iboe = &hr_dev->iboe; | |
49fdf6bb | 445 | spin_lock_init(&iboe->lock); |
9a443537 | 446 | |
447 | ib_dev = &hr_dev->ib_dev; | |
448 | strlcpy(ib_dev->name, "hisi_%d", IB_DEVICE_NAME_MAX); | |
449 | ||
450 | ib_dev->owner = THIS_MODULE; | |
451 | ib_dev->node_type = RDMA_NODE_IB_CA; | |
452 | ib_dev->dma_device = dev; | |
453 | ||
454 | ib_dev->phys_port_cnt = hr_dev->caps.num_ports; | |
455 | ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey; | |
456 | ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors; | |
457 | ib_dev->uverbs_abi_ver = 1; | |
458 | ib_dev->uverbs_cmd_mask = | |
459 | (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) | | |
460 | (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) | | |
461 | (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) | | |
462 | (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) | | |
463 | (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) | | |
464 | (1ULL << IB_USER_VERBS_CMD_REG_MR) | | |
465 | (1ULL << IB_USER_VERBS_CMD_DEREG_MR) | | |
466 | (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | | |
467 | (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) | | |
468 | (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) | | |
469 | (1ULL << IB_USER_VERBS_CMD_CREATE_QP) | | |
470 | (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) | | |
471 | (1ULL << IB_USER_VERBS_CMD_QUERY_QP) | | |
472 | (1ULL << IB_USER_VERBS_CMD_DESTROY_QP); | |
473 | ||
474 | /* HCA||device||port */ | |
475 | ib_dev->modify_device = hns_roce_modify_device; | |
476 | ib_dev->query_device = hns_roce_query_device; | |
477 | ib_dev->query_port = hns_roce_query_port; | |
478 | ib_dev->modify_port = hns_roce_modify_port; | |
479 | ib_dev->get_link_layer = hns_roce_get_link_layer; | |
2eefca27 | 480 | ib_dev->get_netdev = hns_roce_get_netdev; |
9a443537 | 481 | ib_dev->query_gid = hns_roce_query_gid; |
82547469 SX |
482 | ib_dev->add_gid = hns_roce_add_gid; |
483 | ib_dev->del_gid = hns_roce_del_gid; | |
9a443537 | 484 | ib_dev->query_pkey = hns_roce_query_pkey; |
485 | ib_dev->alloc_ucontext = hns_roce_alloc_ucontext; | |
486 | ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext; | |
487 | ib_dev->mmap = hns_roce_mmap; | |
488 | ||
489 | /* PD */ | |
490 | ib_dev->alloc_pd = hns_roce_alloc_pd; | |
491 | ib_dev->dealloc_pd = hns_roce_dealloc_pd; | |
492 | ||
493 | /* AH */ | |
494 | ib_dev->create_ah = hns_roce_create_ah; | |
495 | ib_dev->query_ah = hns_roce_query_ah; | |
496 | ib_dev->destroy_ah = hns_roce_destroy_ah; | |
497 | ||
498 | /* QP */ | |
499 | ib_dev->create_qp = hns_roce_create_qp; | |
500 | ib_dev->modify_qp = hns_roce_modify_qp; | |
501 | ib_dev->query_qp = hr_dev->hw->query_qp; | |
502 | ib_dev->destroy_qp = hr_dev->hw->destroy_qp; | |
503 | ib_dev->post_send = hr_dev->hw->post_send; | |
504 | ib_dev->post_recv = hr_dev->hw->post_recv; | |
505 | ||
506 | /* CQ */ | |
507 | ib_dev->create_cq = hns_roce_ib_create_cq; | |
508 | ib_dev->destroy_cq = hns_roce_ib_destroy_cq; | |
509 | ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq; | |
510 | ib_dev->poll_cq = hr_dev->hw->poll_cq; | |
511 | ||
512 | /* MR */ | |
513 | ib_dev->get_dma_mr = hns_roce_get_dma_mr; | |
514 | ib_dev->reg_user_mr = hns_roce_reg_user_mr; | |
515 | ib_dev->dereg_mr = hns_roce_dereg_mr; | |
516 | ||
517 | /* OTHERS */ | |
518 | ib_dev->get_port_immutable = hns_roce_port_immutable; | |
519 | ||
520 | ret = ib_register_device(ib_dev, NULL); | |
521 | if (ret) { | |
522 | dev_err(dev, "ib_register_device failed!\n"); | |
523 | return ret; | |
524 | } | |
525 | ||
82547469 | 526 | ret = hns_roce_setup_mtu_mac(hr_dev); |
9a443537 | 527 | if (ret) { |
82547469 SX |
528 | dev_err(dev, "setup_mtu_mac failed!\n"); |
529 | goto error_failed_setup_mtu_mac; | |
9a443537 | 530 | } |
531 | ||
9a443537 | 532 | iboe->nb.notifier_call = hns_roce_netdev_event; |
533 | ret = register_netdevice_notifier(&iboe->nb); | |
534 | if (ret) { | |
535 | dev_err(dev, "register_netdevice_notifier failed!\n"); | |
82547469 | 536 | goto error_failed_setup_mtu_mac; |
9a443537 | 537 | } |
538 | ||
539 | return 0; | |
540 | ||
82547469 | 541 | error_failed_setup_mtu_mac: |
9a443537 | 542 | ib_unregister_device(ib_dev); |
543 | ||
544 | return ret; | |
545 | } | |
546 | ||
528f1deb S |
547 | static const struct of_device_id hns_roce_of_match[] = { |
548 | { .compatible = "hisilicon,hns-roce-v1", .data = &hns_roce_hw_v1, }, | |
549 | {}, | |
550 | }; | |
551 | MODULE_DEVICE_TABLE(of, hns_roce_of_match); | |
552 | ||
553 | static const struct acpi_device_id hns_roce_acpi_match[] = { | |
554 | { "HISI00D1", (kernel_ulong_t)&hns_roce_hw_v1 }, | |
555 | {}, | |
556 | }; | |
557 | MODULE_DEVICE_TABLE(acpi, hns_roce_acpi_match); | |
558 | ||
559 | static int hns_roce_node_match(struct device *dev, void *fwnode) | |
560 | { | |
561 | return dev->fwnode == fwnode; | |
562 | } | |
563 | ||
564 | static struct | |
565 | platform_device *hns_roce_find_pdev(struct fwnode_handle *fwnode) | |
566 | { | |
567 | struct device *dev; | |
568 | ||
569 | /* get the 'device'corresponding to matching 'fwnode' */ | |
570 | dev = bus_find_device(&platform_bus_type, NULL, | |
571 | fwnode, hns_roce_node_match); | |
572 | /* get the platform device */ | |
573 | return dev ? to_platform_device(dev) : NULL; | |
574 | } | |
575 | ||
9a443537 | 576 | static int hns_roce_get_cfg(struct hns_roce_dev *hr_dev) |
577 | { | |
578 | int i; | |
528f1deb | 579 | int ret; |
9a443537 | 580 | u8 phy_port; |
581 | int port_cnt = 0; | |
582 | struct device *dev = &hr_dev->pdev->dev; | |
9a443537 | 583 | struct device_node *net_node; |
584 | struct net_device *netdev = NULL; | |
585 | struct platform_device *pdev = NULL; | |
586 | struct resource *res; | |
587 | ||
528f1deb S |
588 | /* check if we are compatible with the underlying SoC */ |
589 | if (dev_of_node(dev)) { | |
590 | const struct of_device_id *of_id; | |
591 | ||
592 | of_id = of_match_node(hns_roce_of_match, dev->of_node); | |
593 | if (!of_id) { | |
594 | dev_err(dev, "device is not compatible!\n"); | |
595 | return -ENXIO; | |
596 | } | |
597 | hr_dev->hw = (struct hns_roce_hw *)of_id->data; | |
598 | if (!hr_dev->hw) { | |
599 | dev_err(dev, "couldn't get H/W specific DT data!\n"); | |
600 | return -ENXIO; | |
601 | } | |
602 | } else if (is_acpi_device_node(dev->fwnode)) { | |
603 | const struct acpi_device_id *acpi_id; | |
604 | ||
605 | acpi_id = acpi_match_device(hns_roce_acpi_match, dev); | |
606 | if (!acpi_id) { | |
607 | dev_err(dev, "device is not compatible!\n"); | |
608 | return -ENXIO; | |
609 | } | |
610 | hr_dev->hw = (struct hns_roce_hw *) acpi_id->driver_data; | |
611 | if (!hr_dev->hw) { | |
612 | dev_err(dev, "couldn't get H/W specific ACPI data!\n"); | |
613 | return -ENXIO; | |
614 | } | |
9a443537 | 615 | } else { |
528f1deb S |
616 | dev_err(dev, "can't read compatibility data from DT or ACPI\n"); |
617 | return -ENXIO; | |
9a443537 | 618 | } |
619 | ||
528f1deb | 620 | /* get the mapped register base address */ |
9a443537 | 621 | res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0); |
528f1deb S |
622 | if (!res) { |
623 | dev_err(dev, "memory resource not found!\n"); | |
624 | return -EINVAL; | |
625 | } | |
9a443537 | 626 | hr_dev->reg_base = devm_ioremap_resource(dev, res); |
204f69ba WY |
627 | if (IS_ERR(hr_dev->reg_base)) |
628 | return PTR_ERR(hr_dev->reg_base); | |
9a443537 | 629 | |
31644665 LO |
630 | /* read the node_guid of IB device from the DT or ACPI */ |
631 | ret = device_property_read_u8_array(dev, "node-guid", | |
632 | (u8 *)&hr_dev->ib_dev.node_guid, | |
633 | GUID_LEN); | |
634 | if (ret) { | |
635 | dev_err(dev, "couldn't get node_guid from DT or ACPI!\n"); | |
636 | return ret; | |
637 | } | |
638 | ||
528f1deb | 639 | /* get the RoCE associated ethernet ports or netdevices */ |
9a443537 | 640 | for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) { |
528f1deb S |
641 | if (dev_of_node(dev)) { |
642 | net_node = of_parse_phandle(dev->of_node, "eth-handle", | |
643 | i); | |
644 | if (!net_node) | |
645 | continue; | |
9a443537 | 646 | pdev = of_find_device_by_node(net_node); |
528f1deb S |
647 | } else if (is_acpi_device_node(dev->fwnode)) { |
648 | struct acpi_reference_args args; | |
649 | struct fwnode_handle *fwnode; | |
650 | ||
651 | ret = acpi_node_get_property_reference(dev->fwnode, | |
652 | "eth-handle", | |
653 | i, &args); | |
654 | if (ret) | |
655 | continue; | |
656 | fwnode = acpi_fwnode_handle(args.adev); | |
657 | pdev = hns_roce_find_pdev(fwnode); | |
658 | } else { | |
659 | dev_err(dev, "cannot read data from DT or ACPI\n"); | |
660 | return -ENXIO; | |
661 | } | |
662 | ||
663 | if (pdev) { | |
9a443537 | 664 | netdev = platform_get_drvdata(pdev); |
665 | phy_port = (u8)i; | |
666 | if (netdev) { | |
667 | hr_dev->iboe.netdevs[port_cnt] = netdev; | |
668 | hr_dev->iboe.phy_port[port_cnt] = phy_port; | |
669 | } else { | |
528f1deb S |
670 | dev_err(dev, "no netdev found with pdev %s\n", |
671 | pdev->name); | |
9a443537 | 672 | return -ENODEV; |
673 | } | |
674 | port_cnt++; | |
675 | } | |
676 | } | |
677 | ||
678 | if (port_cnt == 0) { | |
528f1deb | 679 | dev_err(dev, "unable to get eth-handle for available ports!\n"); |
9a443537 | 680 | return -EINVAL; |
681 | } | |
682 | ||
683 | hr_dev->caps.num_ports = port_cnt; | |
684 | ||
528f1deb | 685 | /* cmd issue mode: 0 is poll, 1 is event */ |
9a443537 | 686 | hr_dev->cmd_mod = 1; |
687 | hr_dev->loop_idc = 0; | |
688 | ||
528f1deb S |
689 | /* read the interrupt names from the DT or ACPI */ |
690 | ret = device_property_read_string_array(dev, "interrupt-names", | |
691 | hr_dev->irq_names, | |
692 | HNS_ROCE_MAX_IRQ_NUM); | |
693 | if (ret < 0) { | |
694 | dev_err(dev, "couldn't get interrupt names from DT or ACPI!\n"); | |
695 | return ret; | |
696 | } | |
697 | ||
698 | /* fetch the interrupt numbers */ | |
9a443537 | 699 | for (i = 0; i < HNS_ROCE_MAX_IRQ_NUM; i++) { |
700 | hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i); | |
701 | if (hr_dev->irq[i] <= 0) { | |
528f1deb | 702 | dev_err(dev, "platform get of irq[=%d] failed!\n", i); |
9a443537 | 703 | return -EINVAL; |
704 | } | |
9a443537 | 705 | } |
706 | ||
707 | return 0; | |
708 | } | |
709 | ||
710 | static int hns_roce_init_hem(struct hns_roce_dev *hr_dev) | |
711 | { | |
712 | int ret; | |
713 | struct device *dev = &hr_dev->pdev->dev; | |
714 | ||
715 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table, | |
716 | HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz, | |
717 | hr_dev->caps.num_mtt_segs, 1); | |
718 | if (ret) { | |
719 | dev_err(dev, "Failed to init MTT context memory, aborting.\n"); | |
720 | return ret; | |
721 | } | |
722 | ||
723 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table, | |
724 | HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz, | |
725 | hr_dev->caps.num_mtpts, 1); | |
726 | if (ret) { | |
727 | dev_err(dev, "Failed to init MTPT context memory, aborting.\n"); | |
728 | goto err_unmap_mtt; | |
729 | } | |
730 | ||
731 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table, | |
732 | HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz, | |
733 | hr_dev->caps.num_qps, 1); | |
734 | if (ret) { | |
735 | dev_err(dev, "Failed to init QP context memory, aborting.\n"); | |
736 | goto err_unmap_dmpt; | |
737 | } | |
738 | ||
739 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table, | |
740 | HEM_TYPE_IRRL, | |
741 | hr_dev->caps.irrl_entry_sz * | |
742 | hr_dev->caps.max_qp_init_rdma, | |
743 | hr_dev->caps.num_qps, 1); | |
744 | if (ret) { | |
745 | dev_err(dev, "Failed to init irrl_table memory, aborting.\n"); | |
746 | goto err_unmap_qp; | |
747 | } | |
748 | ||
749 | ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table, | |
750 | HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz, | |
751 | hr_dev->caps.num_cqs, 1); | |
752 | if (ret) { | |
753 | dev_err(dev, "Failed to init CQ context memory, aborting.\n"); | |
754 | goto err_unmap_irrl; | |
755 | } | |
756 | ||
757 | return 0; | |
758 | ||
759 | err_unmap_irrl: | |
760 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table); | |
761 | ||
762 | err_unmap_qp: | |
763 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table); | |
764 | ||
765 | err_unmap_dmpt: | |
766 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table); | |
767 | ||
768 | err_unmap_mtt: | |
769 | hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table); | |
770 | ||
771 | return ret; | |
772 | } | |
773 | ||
774 | /** | |
e84e40be S |
775 | * hns_roce_setup_hca - setup host channel adapter |
776 | * @hr_dev: pointer to hns roce device | |
777 | * Return : int | |
778 | */ | |
9a443537 | 779 | static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev) |
780 | { | |
781 | int ret; | |
782 | struct device *dev = &hr_dev->pdev->dev; | |
783 | ||
784 | spin_lock_init(&hr_dev->sm_lock); | |
9a443537 | 785 | spin_lock_init(&hr_dev->bt_cmd_lock); |
786 | ||
787 | ret = hns_roce_init_uar_table(hr_dev); | |
788 | if (ret) { | |
789 | dev_err(dev, "Failed to initialize uar table. aborting\n"); | |
790 | return ret; | |
791 | } | |
792 | ||
793 | ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar); | |
794 | if (ret) { | |
795 | dev_err(dev, "Failed to allocate priv_uar.\n"); | |
796 | goto err_uar_table_free; | |
797 | } | |
798 | ||
799 | ret = hns_roce_init_pd_table(hr_dev); | |
800 | if (ret) { | |
801 | dev_err(dev, "Failed to init protected domain table.\n"); | |
802 | goto err_uar_alloc_free; | |
803 | } | |
804 | ||
805 | ret = hns_roce_init_mr_table(hr_dev); | |
806 | if (ret) { | |
807 | dev_err(dev, "Failed to init memory region table.\n"); | |
808 | goto err_pd_table_free; | |
809 | } | |
810 | ||
811 | ret = hns_roce_init_cq_table(hr_dev); | |
812 | if (ret) { | |
813 | dev_err(dev, "Failed to init completion queue table.\n"); | |
814 | goto err_mr_table_free; | |
815 | } | |
816 | ||
817 | ret = hns_roce_init_qp_table(hr_dev); | |
818 | if (ret) { | |
819 | dev_err(dev, "Failed to init queue pair table.\n"); | |
820 | goto err_cq_table_free; | |
821 | } | |
822 | ||
823 | return 0; | |
824 | ||
825 | err_cq_table_free: | |
826 | hns_roce_cleanup_cq_table(hr_dev); | |
827 | ||
828 | err_mr_table_free: | |
829 | hns_roce_cleanup_mr_table(hr_dev); | |
830 | ||
831 | err_pd_table_free: | |
832 | hns_roce_cleanup_pd_table(hr_dev); | |
833 | ||
834 | err_uar_alloc_free: | |
835 | hns_roce_uar_free(hr_dev, &hr_dev->priv_uar); | |
836 | ||
837 | err_uar_table_free: | |
838 | hns_roce_cleanup_uar_table(hr_dev); | |
839 | return ret; | |
840 | } | |
841 | ||
842 | /** | |
e84e40be S |
843 | * hns_roce_probe - RoCE driver entrance |
844 | * @pdev: pointer to platform device | |
845 | * Return : int | |
846 | * | |
847 | */ | |
9a443537 | 848 | static int hns_roce_probe(struct platform_device *pdev) |
849 | { | |
850 | int ret; | |
851 | struct hns_roce_dev *hr_dev; | |
852 | struct device *dev = &pdev->dev; | |
853 | ||
854 | hr_dev = (struct hns_roce_dev *)ib_alloc_device(sizeof(*hr_dev)); | |
855 | if (!hr_dev) | |
856 | return -ENOMEM; | |
857 | ||
858 | memset((u8 *)hr_dev + sizeof(struct ib_device), 0, | |
859 | sizeof(struct hns_roce_dev) - sizeof(struct ib_device)); | |
860 | ||
861 | hr_dev->pdev = pdev; | |
862 | platform_set_drvdata(pdev, hr_dev); | |
863 | ||
864 | if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL)) && | |
865 | dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) { | |
528f1deb | 866 | dev_err(dev, "Not usable DMA addressing mode\n"); |
9a443537 | 867 | ret = -EIO; |
868 | goto error_failed_get_cfg; | |
869 | } | |
870 | ||
871 | ret = hns_roce_get_cfg(hr_dev); | |
872 | if (ret) { | |
873 | dev_err(dev, "Get Configuration failed!\n"); | |
874 | goto error_failed_get_cfg; | |
875 | } | |
876 | ||
877 | ret = hr_dev->hw->reset(hr_dev, true); | |
878 | if (ret) { | |
879 | dev_err(dev, "Reset RoCE engine failed!\n"); | |
880 | goto error_failed_get_cfg; | |
881 | } | |
882 | ||
883 | hr_dev->hw->hw_profile(hr_dev); | |
884 | ||
885 | ret = hns_roce_cmd_init(hr_dev); | |
886 | if (ret) { | |
887 | dev_err(dev, "cmd init failed!\n"); | |
888 | goto error_failed_cmd_init; | |
889 | } | |
890 | ||
891 | ret = hns_roce_init_eq_table(hr_dev); | |
892 | if (ret) { | |
893 | dev_err(dev, "eq init failed!\n"); | |
894 | goto error_failed_eq_table; | |
895 | } | |
896 | ||
897 | if (hr_dev->cmd_mod) { | |
898 | ret = hns_roce_cmd_use_events(hr_dev); | |
899 | if (ret) { | |
900 | dev_err(dev, "Switch to event-driven cmd failed!\n"); | |
901 | goto error_failed_use_event; | |
902 | } | |
903 | } | |
904 | ||
905 | ret = hns_roce_init_hem(hr_dev); | |
906 | if (ret) { | |
907 | dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n"); | |
908 | goto error_failed_init_hem; | |
909 | } | |
910 | ||
911 | ret = hns_roce_setup_hca(hr_dev); | |
912 | if (ret) { | |
913 | dev_err(dev, "setup hca failed!\n"); | |
914 | goto error_failed_setup_hca; | |
915 | } | |
916 | ||
917 | ret = hr_dev->hw->hw_init(hr_dev); | |
918 | if (ret) { | |
919 | dev_err(dev, "hw_init failed!\n"); | |
920 | goto error_failed_engine_init; | |
921 | } | |
922 | ||
923 | ret = hns_roce_register_device(hr_dev); | |
924 | if (ret) | |
925 | goto error_failed_register_device; | |
926 | ||
927 | return 0; | |
928 | ||
929 | error_failed_register_device: | |
930 | hr_dev->hw->hw_exit(hr_dev); | |
931 | ||
932 | error_failed_engine_init: | |
933 | hns_roce_cleanup_bitmap(hr_dev); | |
934 | ||
935 | error_failed_setup_hca: | |
936 | hns_roce_cleanup_hem(hr_dev); | |
937 | ||
938 | error_failed_init_hem: | |
939 | if (hr_dev->cmd_mod) | |
940 | hns_roce_cmd_use_polling(hr_dev); | |
941 | ||
942 | error_failed_use_event: | |
943 | hns_roce_cleanup_eq_table(hr_dev); | |
944 | ||
945 | error_failed_eq_table: | |
946 | hns_roce_cmd_cleanup(hr_dev); | |
947 | ||
948 | error_failed_cmd_init: | |
949 | ret = hr_dev->hw->reset(hr_dev, false); | |
950 | if (ret) | |
951 | dev_err(&hr_dev->pdev->dev, "roce_engine reset fail\n"); | |
952 | ||
953 | error_failed_get_cfg: | |
954 | ib_dealloc_device(&hr_dev->ib_dev); | |
955 | ||
956 | return ret; | |
957 | } | |
958 | ||
959 | /** | |
e84e40be S |
960 | * hns_roce_remove - remove RoCE device |
961 | * @pdev: pointer to platform device | |
962 | */ | |
9a443537 | 963 | static int hns_roce_remove(struct platform_device *pdev) |
964 | { | |
965 | struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev); | |
966 | ||
967 | hns_roce_unregister_device(hr_dev); | |
968 | hr_dev->hw->hw_exit(hr_dev); | |
969 | hns_roce_cleanup_bitmap(hr_dev); | |
970 | hns_roce_cleanup_hem(hr_dev); | |
971 | ||
972 | if (hr_dev->cmd_mod) | |
973 | hns_roce_cmd_use_polling(hr_dev); | |
974 | ||
975 | hns_roce_cleanup_eq_table(hr_dev); | |
976 | hns_roce_cmd_cleanup(hr_dev); | |
977 | hr_dev->hw->reset(hr_dev, false); | |
978 | ||
979 | ib_dealloc_device(&hr_dev->ib_dev); | |
980 | ||
981 | return 0; | |
982 | } | |
983 | ||
9a443537 | 984 | static struct platform_driver hns_roce_driver = { |
985 | .probe = hns_roce_probe, | |
986 | .remove = hns_roce_remove, | |
987 | .driver = { | |
988 | .name = DRV_NAME, | |
989 | .of_match_table = hns_roce_of_match, | |
528f1deb | 990 | .acpi_match_table = ACPI_PTR(hns_roce_acpi_match), |
9a443537 | 991 | }, |
992 | }; | |
993 | ||
994 | module_platform_driver(hns_roce_driver); | |
995 | ||
996 | MODULE_LICENSE("Dual BSD/GPL"); | |
997 | MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>"); | |
998 | MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>"); | |
999 | MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>"); | |
1000 | MODULE_DESCRIPTION("HNS RoCE Driver"); |