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9a443537 1/*
2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
528f1deb 33#include <linux/acpi.h>
9a443537 34#include <linux/of_platform.h>
3ecc16c8 35#include <linux/module.h>
9a443537 36#include <rdma/ib_addr.h>
37#include <rdma/ib_smi.h>
38#include <rdma/ib_user_verbs.h>
82547469 39#include <rdma/ib_cache.h>
9a443537 40#include "hns_roce_common.h"
41#include "hns_roce_device.h"
4d409958 42#include <rdma/hns-abi.h>
9a443537 43#include "hns_roce_hem.h"
44
9a443537 45/**
46 * hns_get_gid_index - Get gid index.
47 * @hr_dev: pointer to structure hns_roce_dev.
48 * @port: port, value range: 0 ~ MAX
49 * @gid_index: gid_index, value range: 0 ~ MAX
50 * Description:
51 * N ports shared gids, allocation method as follow:
52 * GID[0][0], GID[1][0],.....GID[N - 1][0],
53 * GID[0][0], GID[1][0],.....GID[N - 1][0],
54 * And so on
55 */
56int hns_get_gid_index(struct hns_roce_dev *hr_dev, u8 port, int gid_index)
57{
58 return gid_index * hr_dev->caps.num_ports + port;
59}
60
9a443537 61static void hns_roce_set_mac(struct hns_roce_dev *hr_dev, u8 port, u8 *addr)
62{
63 u8 phy_port;
64 u32 i = 0;
65
66 if (!memcmp(hr_dev->dev_addr[port], addr, MAC_ADDR_OCTET_NUM))
67 return;
68
69 for (i = 0; i < MAC_ADDR_OCTET_NUM; i++)
70 hr_dev->dev_addr[port][i] = addr[i];
71
72 phy_port = hr_dev->iboe.phy_port[port];
73 hr_dev->hw->set_mac(hr_dev, phy_port, addr);
74}
75
82547469
SX
76static int hns_roce_add_gid(struct ib_device *device, u8 port_num,
77 unsigned int index, const union ib_gid *gid,
78 const struct ib_gid_attr *attr, void **context)
9a443537 79{
82547469
SX
80 struct hns_roce_dev *hr_dev = to_hr_dev(device);
81 u8 port = port_num - 1;
82 unsigned long flags;
83
84 if (port >= hr_dev->caps.num_ports)
85 return -EINVAL;
9a443537 86
82547469
SX
87 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
88
89 hr_dev->hw->set_gid(hr_dev, port, index, (union ib_gid *)gid);
90
91 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
92
93 return 0;
94}
95
96static int hns_roce_del_gid(struct ib_device *device, u8 port_num,
97 unsigned int index, void **context)
98{
99 struct hns_roce_dev *hr_dev = to_hr_dev(device);
100 union ib_gid zgid = { {0} };
101 u8 port = port_num - 1;
102 unsigned long flags;
103
104 if (port >= hr_dev->caps.num_ports)
105 return -EINVAL;
106
107 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
108
109 hr_dev->hw->set_gid(hr_dev, port, index, &zgid);
110
111 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
112
113 return 0;
9a443537 114}
115
116static int handle_en_event(struct hns_roce_dev *hr_dev, u8 port,
117 unsigned long event)
118{
119 struct device *dev = &hr_dev->pdev->dev;
120 struct net_device *netdev;
9a443537 121
122 netdev = hr_dev->iboe.netdevs[port];
123 if (!netdev) {
124 dev_err(dev, "port(%d) can't find netdev\n", port);
125 return -ENODEV;
126 }
127
9a443537 128 switch (event) {
129 case NETDEV_UP:
130 case NETDEV_CHANGE:
131 case NETDEV_REGISTER:
132 case NETDEV_CHANGEADDR:
133 hns_roce_set_mac(hr_dev, port, netdev->dev_addr);
9a443537 134 break;
135 case NETDEV_DOWN:
136 /*
e84e40be
S
137 * In v1 engine, only support all ports closed together.
138 */
9a443537 139 break;
140 default:
141 dev_dbg(dev, "NETDEV event = 0x%x!\n", (u32)(event));
142 break;
143 }
144
82547469 145 return 0;
9a443537 146}
147
148static int hns_roce_netdev_event(struct notifier_block *self,
149 unsigned long event, void *ptr)
150{
151 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
152 struct hns_roce_ib_iboe *iboe = NULL;
153 struct hns_roce_dev *hr_dev = NULL;
154 u8 port = 0;
155 int ret = 0;
156
157 hr_dev = container_of(self, struct hns_roce_dev, iboe.nb);
158 iboe = &hr_dev->iboe;
159
160 for (port = 0; port < hr_dev->caps.num_ports; port++) {
161 if (dev == iboe->netdevs[port]) {
162 ret = handle_en_event(hr_dev, port, event);
163 if (ret)
164 return NOTIFY_DONE;
165 break;
166 }
167 }
168
169 return NOTIFY_DONE;
170}
171
82547469 172static int hns_roce_setup_mtu_mac(struct hns_roce_dev *hr_dev)
9a443537 173{
82547469 174 u8 i;
9a443537 175
176 for (i = 0; i < hr_dev->caps.num_ports; i++) {
9daed0af
WHX
177 hr_dev->hw->set_mtu(hr_dev, hr_dev->iboe.phy_port[i],
178 hr_dev->caps.max_mtu);
9a443537 179 hns_roce_set_mac(hr_dev, i, hr_dev->iboe.netdevs[i]->dev_addr);
9a443537 180 }
181
82547469 182 return 0;
9a443537 183}
184
185static int hns_roce_query_device(struct ib_device *ib_dev,
186 struct ib_device_attr *props,
187 struct ib_udata *uhw)
188{
189 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
190
191 memset(props, 0, sizeof(*props));
192
193 props->sys_image_guid = hr_dev->sys_image_guid;
194 props->max_mr_size = (u64)(~(0ULL));
195 props->page_size_cap = hr_dev->caps.page_size_cap;
196 props->vendor_id = hr_dev->vendor_id;
197 props->vendor_part_id = hr_dev->vendor_part_id;
198 props->hw_ver = hr_dev->hw_rev;
199 props->max_qp = hr_dev->caps.num_qps;
200 props->max_qp_wr = hr_dev->caps.max_wqes;
201 props->device_cap_flags = IB_DEVICE_PORT_ACTIVE_EVENT |
a74aab6c 202 IB_DEVICE_RC_RNR_NAK_GEN;
9a443537 203 props->max_sge = hr_dev->caps.max_sq_sg;
204 props->max_sge_rd = 1;
205 props->max_cq = hr_dev->caps.num_cqs;
206 props->max_cqe = hr_dev->caps.max_cqes;
207 props->max_mr = hr_dev->caps.num_mtpts;
208 props->max_pd = hr_dev->caps.num_pds;
209 props->max_qp_rd_atom = hr_dev->caps.max_qp_dest_rdma;
210 props->max_qp_init_rd_atom = hr_dev->caps.max_qp_init_rdma;
211 props->atomic_cap = IB_ATOMIC_NONE;
212 props->max_pkeys = 1;
213 props->local_ca_ack_delay = hr_dev->caps.local_ca_ack_delay;
214
215 return 0;
216}
217
2eefca27
LO
218static struct net_device *hns_roce_get_netdev(struct ib_device *ib_dev,
219 u8 port_num)
220{
221 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
222 struct net_device *ndev;
223
224 if (port_num < 1 || port_num > hr_dev->caps.num_ports)
225 return NULL;
226
227 rcu_read_lock();
228
229 ndev = hr_dev->iboe.netdevs[port_num - 1];
230 if (ndev)
231 dev_hold(ndev);
232
233 rcu_read_unlock();
234 return ndev;
235}
236
9a443537 237static int hns_roce_query_port(struct ib_device *ib_dev, u8 port_num,
238 struct ib_port_attr *props)
239{
240 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
241 struct device *dev = &hr_dev->pdev->dev;
242 struct net_device *net_dev;
243 unsigned long flags;
244 enum ib_mtu mtu;
245 u8 port;
246
247 assert(port_num > 0);
248 port = port_num - 1;
249
c4550c63 250 /* props being zeroed by the caller, avoid zeroing it here */
9a443537 251
252 props->max_mtu = hr_dev->caps.max_mtu;
253 props->gid_tbl_len = hr_dev->caps.gid_table_len[port];
254 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
255 IB_PORT_VENDOR_CLASS_SUP |
256 IB_PORT_BOOT_MGMT_SUP;
257 props->max_msg_sz = HNS_ROCE_MAX_MSG_LEN;
258 props->pkey_tbl_len = 1;
259 props->active_width = IB_WIDTH_4X;
260 props->active_speed = 1;
261
262 spin_lock_irqsave(&hr_dev->iboe.lock, flags);
263
264 net_dev = hr_dev->iboe.netdevs[port];
265 if (!net_dev) {
266 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
267 dev_err(dev, "find netdev %d failed!\r\n", port);
268 return -EINVAL;
269 }
270
271 mtu = iboe_get_mtu(net_dev->mtu);
272 props->active_mtu = mtu ? min(props->max_mtu, mtu) : IB_MTU_256;
273 props->state = (netif_running(net_dev) && netif_carrier_ok(net_dev)) ?
274 IB_PORT_ACTIVE : IB_PORT_DOWN;
275 props->phys_state = (props->state == IB_PORT_ACTIVE) ? 5 : 3;
276
277 spin_unlock_irqrestore(&hr_dev->iboe.lock, flags);
278
279 return 0;
280}
281
282static enum rdma_link_layer hns_roce_get_link_layer(struct ib_device *device,
283 u8 port_num)
284{
285 return IB_LINK_LAYER_ETHERNET;
286}
287
288static int hns_roce_query_gid(struct ib_device *ib_dev, u8 port_num, int index,
289 union ib_gid *gid)
290{
9a443537 291 return 0;
292}
293
294static int hns_roce_query_pkey(struct ib_device *ib_dev, u8 port, u16 index,
295 u16 *pkey)
296{
297 *pkey = PKEY_ID;
298
299 return 0;
300}
301
302static int hns_roce_modify_device(struct ib_device *ib_dev, int mask,
303 struct ib_device_modify *props)
304{
305 unsigned long flags;
306
307 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
308 return -EOPNOTSUPP;
309
310 if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
311 spin_lock_irqsave(&to_hr_dev(ib_dev)->sm_lock, flags);
312 memcpy(ib_dev->node_desc, props->node_desc, NODE_DESC_SIZE);
313 spin_unlock_irqrestore(&to_hr_dev(ib_dev)->sm_lock, flags);
314 }
315
316 return 0;
317}
318
319static int hns_roce_modify_port(struct ib_device *ib_dev, u8 port_num, int mask,
320 struct ib_port_modify *props)
321{
322 return 0;
323}
324
325static struct ib_ucontext *hns_roce_alloc_ucontext(struct ib_device *ib_dev,
326 struct ib_udata *udata)
327{
328 int ret = 0;
329 struct hns_roce_ucontext *context;
330 struct hns_roce_ib_alloc_ucontext_resp resp;
331 struct hns_roce_dev *hr_dev = to_hr_dev(ib_dev);
332
333 resp.qp_tab_size = hr_dev->caps.num_qps;
334
335 context = kmalloc(sizeof(*context), GFP_KERNEL);
336 if (!context)
337 return ERR_PTR(-ENOMEM);
338
339 ret = hns_roce_uar_alloc(hr_dev, &context->uar);
340 if (ret)
341 goto error_fail_uar_alloc;
342
343 ret = ib_copy_to_udata(udata, &resp, sizeof(resp));
344 if (ret)
345 goto error_fail_copy_to_udata;
346
347 return &context->ibucontext;
348
349error_fail_copy_to_udata:
350 hns_roce_uar_free(hr_dev, &context->uar);
351
352error_fail_uar_alloc:
353 kfree(context);
354
355 return ERR_PTR(ret);
356}
357
358static int hns_roce_dealloc_ucontext(struct ib_ucontext *ibcontext)
359{
360 struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext);
361
362 hns_roce_uar_free(to_hr_dev(ibcontext->device), &context->uar);
363 kfree(context);
364
365 return 0;
366}
367
368static int hns_roce_mmap(struct ib_ucontext *context,
369 struct vm_area_struct *vma)
370{
8f3e9f3e
WHX
371 struct hns_roce_dev *hr_dev = to_hr_dev(context->device);
372
9a443537 373 if (((vma->vm_end - vma->vm_start) % PAGE_SIZE) != 0)
374 return -EINVAL;
375
376 if (vma->vm_pgoff == 0) {
377 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
378 if (io_remap_pfn_range(vma, vma->vm_start,
379 to_hr_ucontext(context)->uar.pfn,
380 PAGE_SIZE, vma->vm_page_prot))
381 return -EAGAIN;
8f3e9f3e
WHX
382 } else if (vma->vm_pgoff == 1 && hr_dev->hw_rev == HNS_ROCE_HW_VER1) {
383 /* vm_pgoff: 1 -- TPTR */
384 if (io_remap_pfn_range(vma, vma->vm_start,
385 hr_dev->tptr_dma_addr >> PAGE_SHIFT,
386 hr_dev->tptr_size,
387 vma->vm_page_prot))
388 return -EAGAIN;
389 } else
9a443537 390 return -EINVAL;
9a443537 391
392 return 0;
393}
394
395static int hns_roce_port_immutable(struct ib_device *ib_dev, u8 port_num,
396 struct ib_port_immutable *immutable)
397{
398 struct ib_port_attr attr;
399 int ret;
400
c4550c63
OG
401 immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE;
402
403 ret = ib_query_port(ib_dev, port_num, &attr);
9a443537 404 if (ret)
405 return ret;
406
407 immutable->pkey_tbl_len = attr.pkey_tbl_len;
408 immutable->gid_tbl_len = attr.gid_tbl_len;
409
9a443537 410 immutable->max_mad_size = IB_MGMT_MAD_SIZE;
411
412 return 0;
413}
414
415static void hns_roce_unregister_device(struct hns_roce_dev *hr_dev)
416{
417 struct hns_roce_ib_iboe *iboe = &hr_dev->iboe;
418
419 unregister_inetaddr_notifier(&iboe->nb_inet);
420 unregister_netdevice_notifier(&iboe->nb);
421 ib_unregister_device(&hr_dev->ib_dev);
422}
423
424static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
425{
426 int ret;
427 struct hns_roce_ib_iboe *iboe = NULL;
428 struct ib_device *ib_dev = NULL;
429 struct device *dev = &hr_dev->pdev->dev;
430
431 iboe = &hr_dev->iboe;
49fdf6bb 432 spin_lock_init(&iboe->lock);
9a443537 433
434 ib_dev = &hr_dev->ib_dev;
3b5184be 435 strlcpy(ib_dev->name, "hns_%d", IB_DEVICE_NAME_MAX);
9a443537 436
437 ib_dev->owner = THIS_MODULE;
438 ib_dev->node_type = RDMA_NODE_IB_CA;
fecd02eb 439 ib_dev->dev.parent = dev;
9a443537 440
441 ib_dev->phys_port_cnt = hr_dev->caps.num_ports;
442 ib_dev->local_dma_lkey = hr_dev->caps.reserved_lkey;
443 ib_dev->num_comp_vectors = hr_dev->caps.num_comp_vectors;
444 ib_dev->uverbs_abi_ver = 1;
445 ib_dev->uverbs_cmd_mask =
446 (1ULL << IB_USER_VERBS_CMD_GET_CONTEXT) |
447 (1ULL << IB_USER_VERBS_CMD_QUERY_DEVICE) |
448 (1ULL << IB_USER_VERBS_CMD_QUERY_PORT) |
449 (1ULL << IB_USER_VERBS_CMD_ALLOC_PD) |
450 (1ULL << IB_USER_VERBS_CMD_DEALLOC_PD) |
451 (1ULL << IB_USER_VERBS_CMD_REG_MR) |
452 (1ULL << IB_USER_VERBS_CMD_DEREG_MR) |
453 (1ULL << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
454 (1ULL << IB_USER_VERBS_CMD_CREATE_CQ) |
455 (1ULL << IB_USER_VERBS_CMD_DESTROY_CQ) |
456 (1ULL << IB_USER_VERBS_CMD_CREATE_QP) |
457 (1ULL << IB_USER_VERBS_CMD_MODIFY_QP) |
458 (1ULL << IB_USER_VERBS_CMD_QUERY_QP) |
459 (1ULL << IB_USER_VERBS_CMD_DESTROY_QP);
460
461 /* HCA||device||port */
462 ib_dev->modify_device = hns_roce_modify_device;
463 ib_dev->query_device = hns_roce_query_device;
464 ib_dev->query_port = hns_roce_query_port;
465 ib_dev->modify_port = hns_roce_modify_port;
466 ib_dev->get_link_layer = hns_roce_get_link_layer;
2eefca27 467 ib_dev->get_netdev = hns_roce_get_netdev;
9a443537 468 ib_dev->query_gid = hns_roce_query_gid;
82547469
SX
469 ib_dev->add_gid = hns_roce_add_gid;
470 ib_dev->del_gid = hns_roce_del_gid;
9a443537 471 ib_dev->query_pkey = hns_roce_query_pkey;
472 ib_dev->alloc_ucontext = hns_roce_alloc_ucontext;
473 ib_dev->dealloc_ucontext = hns_roce_dealloc_ucontext;
474 ib_dev->mmap = hns_roce_mmap;
475
476 /* PD */
477 ib_dev->alloc_pd = hns_roce_alloc_pd;
478 ib_dev->dealloc_pd = hns_roce_dealloc_pd;
479
480 /* AH */
481 ib_dev->create_ah = hns_roce_create_ah;
482 ib_dev->query_ah = hns_roce_query_ah;
483 ib_dev->destroy_ah = hns_roce_destroy_ah;
484
485 /* QP */
486 ib_dev->create_qp = hns_roce_create_qp;
487 ib_dev->modify_qp = hns_roce_modify_qp;
488 ib_dev->query_qp = hr_dev->hw->query_qp;
489 ib_dev->destroy_qp = hr_dev->hw->destroy_qp;
490 ib_dev->post_send = hr_dev->hw->post_send;
491 ib_dev->post_recv = hr_dev->hw->post_recv;
492
493 /* CQ */
494 ib_dev->create_cq = hns_roce_ib_create_cq;
495 ib_dev->destroy_cq = hns_roce_ib_destroy_cq;
496 ib_dev->req_notify_cq = hr_dev->hw->req_notify_cq;
497 ib_dev->poll_cq = hr_dev->hw->poll_cq;
498
499 /* MR */
500 ib_dev->get_dma_mr = hns_roce_get_dma_mr;
501 ib_dev->reg_user_mr = hns_roce_reg_user_mr;
502 ib_dev->dereg_mr = hns_roce_dereg_mr;
503
504 /* OTHERS */
505 ib_dev->get_port_immutable = hns_roce_port_immutable;
506
507 ret = ib_register_device(ib_dev, NULL);
508 if (ret) {
509 dev_err(dev, "ib_register_device failed!\n");
510 return ret;
511 }
512
82547469 513 ret = hns_roce_setup_mtu_mac(hr_dev);
9a443537 514 if (ret) {
82547469
SX
515 dev_err(dev, "setup_mtu_mac failed!\n");
516 goto error_failed_setup_mtu_mac;
9a443537 517 }
518
9a443537 519 iboe->nb.notifier_call = hns_roce_netdev_event;
520 ret = register_netdevice_notifier(&iboe->nb);
521 if (ret) {
522 dev_err(dev, "register_netdevice_notifier failed!\n");
82547469 523 goto error_failed_setup_mtu_mac;
9a443537 524 }
525
526 return 0;
527
82547469 528error_failed_setup_mtu_mac:
9a443537 529 ib_unregister_device(ib_dev);
530
531 return ret;
532}
533
528f1deb
S
534static const struct of_device_id hns_roce_of_match[] = {
535 { .compatible = "hisilicon,hns-roce-v1", .data = &hns_roce_hw_v1, },
536 {},
537};
538MODULE_DEVICE_TABLE(of, hns_roce_of_match);
539
540static const struct acpi_device_id hns_roce_acpi_match[] = {
541 { "HISI00D1", (kernel_ulong_t)&hns_roce_hw_v1 },
542 {},
543};
544MODULE_DEVICE_TABLE(acpi, hns_roce_acpi_match);
545
546static int hns_roce_node_match(struct device *dev, void *fwnode)
547{
548 return dev->fwnode == fwnode;
549}
550
551static struct
552platform_device *hns_roce_find_pdev(struct fwnode_handle *fwnode)
553{
554 struct device *dev;
555
556 /* get the 'device'corresponding to matching 'fwnode' */
557 dev = bus_find_device(&platform_bus_type, NULL,
558 fwnode, hns_roce_node_match);
559 /* get the platform device */
560 return dev ? to_platform_device(dev) : NULL;
561}
562
9a443537 563static int hns_roce_get_cfg(struct hns_roce_dev *hr_dev)
564{
565 int i;
528f1deb 566 int ret;
9a443537 567 u8 phy_port;
568 int port_cnt = 0;
569 struct device *dev = &hr_dev->pdev->dev;
9a443537 570 struct device_node *net_node;
571 struct net_device *netdev = NULL;
572 struct platform_device *pdev = NULL;
573 struct resource *res;
574
528f1deb
S
575 /* check if we are compatible with the underlying SoC */
576 if (dev_of_node(dev)) {
577 const struct of_device_id *of_id;
578
579 of_id = of_match_node(hns_roce_of_match, dev->of_node);
580 if (!of_id) {
581 dev_err(dev, "device is not compatible!\n");
582 return -ENXIO;
583 }
584 hr_dev->hw = (struct hns_roce_hw *)of_id->data;
585 if (!hr_dev->hw) {
586 dev_err(dev, "couldn't get H/W specific DT data!\n");
587 return -ENXIO;
588 }
589 } else if (is_acpi_device_node(dev->fwnode)) {
590 const struct acpi_device_id *acpi_id;
591
592 acpi_id = acpi_match_device(hns_roce_acpi_match, dev);
593 if (!acpi_id) {
594 dev_err(dev, "device is not compatible!\n");
595 return -ENXIO;
596 }
597 hr_dev->hw = (struct hns_roce_hw *) acpi_id->driver_data;
598 if (!hr_dev->hw) {
599 dev_err(dev, "couldn't get H/W specific ACPI data!\n");
600 return -ENXIO;
601 }
9a443537 602 } else {
528f1deb
S
603 dev_err(dev, "can't read compatibility data from DT or ACPI\n");
604 return -ENXIO;
9a443537 605 }
606
528f1deb 607 /* get the mapped register base address */
9a443537 608 res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
528f1deb
S
609 if (!res) {
610 dev_err(dev, "memory resource not found!\n");
611 return -EINVAL;
612 }
9a443537 613 hr_dev->reg_base = devm_ioremap_resource(dev, res);
204f69ba
WY
614 if (IS_ERR(hr_dev->reg_base))
615 return PTR_ERR(hr_dev->reg_base);
9a443537 616
31644665
LO
617 /* read the node_guid of IB device from the DT or ACPI */
618 ret = device_property_read_u8_array(dev, "node-guid",
619 (u8 *)&hr_dev->ib_dev.node_guid,
620 GUID_LEN);
621 if (ret) {
622 dev_err(dev, "couldn't get node_guid from DT or ACPI!\n");
623 return ret;
624 }
625
528f1deb 626 /* get the RoCE associated ethernet ports or netdevices */
9a443537 627 for (i = 0; i < HNS_ROCE_MAX_PORTS; i++) {
528f1deb
S
628 if (dev_of_node(dev)) {
629 net_node = of_parse_phandle(dev->of_node, "eth-handle",
630 i);
631 if (!net_node)
632 continue;
9a443537 633 pdev = of_find_device_by_node(net_node);
528f1deb
S
634 } else if (is_acpi_device_node(dev->fwnode)) {
635 struct acpi_reference_args args;
636 struct fwnode_handle *fwnode;
637
638 ret = acpi_node_get_property_reference(dev->fwnode,
639 "eth-handle",
640 i, &args);
641 if (ret)
642 continue;
643 fwnode = acpi_fwnode_handle(args.adev);
644 pdev = hns_roce_find_pdev(fwnode);
645 } else {
646 dev_err(dev, "cannot read data from DT or ACPI\n");
647 return -ENXIO;
648 }
649
650 if (pdev) {
9a443537 651 netdev = platform_get_drvdata(pdev);
652 phy_port = (u8)i;
653 if (netdev) {
654 hr_dev->iboe.netdevs[port_cnt] = netdev;
655 hr_dev->iboe.phy_port[port_cnt] = phy_port;
656 } else {
528f1deb
S
657 dev_err(dev, "no netdev found with pdev %s\n",
658 pdev->name);
9a443537 659 return -ENODEV;
660 }
661 port_cnt++;
662 }
663 }
664
665 if (port_cnt == 0) {
528f1deb 666 dev_err(dev, "unable to get eth-handle for available ports!\n");
9a443537 667 return -EINVAL;
668 }
669
670 hr_dev->caps.num_ports = port_cnt;
671
528f1deb 672 /* cmd issue mode: 0 is poll, 1 is event */
9a443537 673 hr_dev->cmd_mod = 1;
674 hr_dev->loop_idc = 0;
675
528f1deb
S
676 /* read the interrupt names from the DT or ACPI */
677 ret = device_property_read_string_array(dev, "interrupt-names",
678 hr_dev->irq_names,
679 HNS_ROCE_MAX_IRQ_NUM);
680 if (ret < 0) {
681 dev_err(dev, "couldn't get interrupt names from DT or ACPI!\n");
682 return ret;
683 }
684
685 /* fetch the interrupt numbers */
9a443537 686 for (i = 0; i < HNS_ROCE_MAX_IRQ_NUM; i++) {
687 hr_dev->irq[i] = platform_get_irq(hr_dev->pdev, i);
688 if (hr_dev->irq[i] <= 0) {
528f1deb 689 dev_err(dev, "platform get of irq[=%d] failed!\n", i);
9a443537 690 return -EINVAL;
691 }
9a443537 692 }
693
694 return 0;
695}
696
697static int hns_roce_init_hem(struct hns_roce_dev *hr_dev)
698{
699 int ret;
700 struct device *dev = &hr_dev->pdev->dev;
701
702 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtt_table,
703 HEM_TYPE_MTT, hr_dev->caps.mtt_entry_sz,
704 hr_dev->caps.num_mtt_segs, 1);
705 if (ret) {
706 dev_err(dev, "Failed to init MTT context memory, aborting.\n");
707 return ret;
708 }
709
710 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table,
711 HEM_TYPE_MTPT, hr_dev->caps.mtpt_entry_sz,
712 hr_dev->caps.num_mtpts, 1);
713 if (ret) {
714 dev_err(dev, "Failed to init MTPT context memory, aborting.\n");
715 goto err_unmap_mtt;
716 }
717
718 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.qp_table,
719 HEM_TYPE_QPC, hr_dev->caps.qpc_entry_sz,
720 hr_dev->caps.num_qps, 1);
721 if (ret) {
722 dev_err(dev, "Failed to init QP context memory, aborting.\n");
723 goto err_unmap_dmpt;
724 }
725
726 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->qp_table.irrl_table,
727 HEM_TYPE_IRRL,
728 hr_dev->caps.irrl_entry_sz *
729 hr_dev->caps.max_qp_init_rdma,
730 hr_dev->caps.num_qps, 1);
731 if (ret) {
732 dev_err(dev, "Failed to init irrl_table memory, aborting.\n");
733 goto err_unmap_qp;
734 }
735
736 ret = hns_roce_init_hem_table(hr_dev, &hr_dev->cq_table.table,
737 HEM_TYPE_CQC, hr_dev->caps.cqc_entry_sz,
738 hr_dev->caps.num_cqs, 1);
739 if (ret) {
740 dev_err(dev, "Failed to init CQ context memory, aborting.\n");
741 goto err_unmap_irrl;
742 }
743
744 return 0;
745
746err_unmap_irrl:
747 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.irrl_table);
748
749err_unmap_qp:
750 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->qp_table.qp_table);
751
752err_unmap_dmpt:
753 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtpt_table);
754
755err_unmap_mtt:
756 hns_roce_cleanup_hem_table(hr_dev, &hr_dev->mr_table.mtt_table);
757
758 return ret;
759}
760
761/**
e84e40be
S
762 * hns_roce_setup_hca - setup host channel adapter
763 * @hr_dev: pointer to hns roce device
764 * Return : int
765 */
9a443537 766static int hns_roce_setup_hca(struct hns_roce_dev *hr_dev)
767{
768 int ret;
769 struct device *dev = &hr_dev->pdev->dev;
770
771 spin_lock_init(&hr_dev->sm_lock);
9a443537 772 spin_lock_init(&hr_dev->bt_cmd_lock);
773
774 ret = hns_roce_init_uar_table(hr_dev);
775 if (ret) {
776 dev_err(dev, "Failed to initialize uar table. aborting\n");
777 return ret;
778 }
779
780 ret = hns_roce_uar_alloc(hr_dev, &hr_dev->priv_uar);
781 if (ret) {
782 dev_err(dev, "Failed to allocate priv_uar.\n");
783 goto err_uar_table_free;
784 }
785
786 ret = hns_roce_init_pd_table(hr_dev);
787 if (ret) {
788 dev_err(dev, "Failed to init protected domain table.\n");
789 goto err_uar_alloc_free;
790 }
791
792 ret = hns_roce_init_mr_table(hr_dev);
793 if (ret) {
794 dev_err(dev, "Failed to init memory region table.\n");
795 goto err_pd_table_free;
796 }
797
798 ret = hns_roce_init_cq_table(hr_dev);
799 if (ret) {
800 dev_err(dev, "Failed to init completion queue table.\n");
801 goto err_mr_table_free;
802 }
803
804 ret = hns_roce_init_qp_table(hr_dev);
805 if (ret) {
806 dev_err(dev, "Failed to init queue pair table.\n");
807 goto err_cq_table_free;
808 }
809
810 return 0;
811
812err_cq_table_free:
813 hns_roce_cleanup_cq_table(hr_dev);
814
815err_mr_table_free:
816 hns_roce_cleanup_mr_table(hr_dev);
817
818err_pd_table_free:
819 hns_roce_cleanup_pd_table(hr_dev);
820
821err_uar_alloc_free:
822 hns_roce_uar_free(hr_dev, &hr_dev->priv_uar);
823
824err_uar_table_free:
825 hns_roce_cleanup_uar_table(hr_dev);
826 return ret;
827}
828
829/**
e84e40be
S
830 * hns_roce_probe - RoCE driver entrance
831 * @pdev: pointer to platform device
832 * Return : int
833 *
834 */
9a443537 835static int hns_roce_probe(struct platform_device *pdev)
836{
837 int ret;
838 struct hns_roce_dev *hr_dev;
839 struct device *dev = &pdev->dev;
840
841 hr_dev = (struct hns_roce_dev *)ib_alloc_device(sizeof(*hr_dev));
842 if (!hr_dev)
843 return -ENOMEM;
844
9a443537 845 hr_dev->pdev = pdev;
846 platform_set_drvdata(pdev, hr_dev);
847
848 if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64ULL)) &&
849 dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32ULL))) {
528f1deb 850 dev_err(dev, "Not usable DMA addressing mode\n");
9a443537 851 ret = -EIO;
852 goto error_failed_get_cfg;
853 }
854
855 ret = hns_roce_get_cfg(hr_dev);
856 if (ret) {
857 dev_err(dev, "Get Configuration failed!\n");
858 goto error_failed_get_cfg;
859 }
860
861 ret = hr_dev->hw->reset(hr_dev, true);
862 if (ret) {
863 dev_err(dev, "Reset RoCE engine failed!\n");
864 goto error_failed_get_cfg;
865 }
866
867 hr_dev->hw->hw_profile(hr_dev);
868
869 ret = hns_roce_cmd_init(hr_dev);
870 if (ret) {
871 dev_err(dev, "cmd init failed!\n");
872 goto error_failed_cmd_init;
873 }
874
875 ret = hns_roce_init_eq_table(hr_dev);
876 if (ret) {
877 dev_err(dev, "eq init failed!\n");
878 goto error_failed_eq_table;
879 }
880
881 if (hr_dev->cmd_mod) {
882 ret = hns_roce_cmd_use_events(hr_dev);
883 if (ret) {
884 dev_err(dev, "Switch to event-driven cmd failed!\n");
885 goto error_failed_use_event;
886 }
887 }
888
889 ret = hns_roce_init_hem(hr_dev);
890 if (ret) {
891 dev_err(dev, "init HEM(Hardware Entry Memory) failed!\n");
892 goto error_failed_init_hem;
893 }
894
895 ret = hns_roce_setup_hca(hr_dev);
896 if (ret) {
897 dev_err(dev, "setup hca failed!\n");
898 goto error_failed_setup_hca;
899 }
900
901 ret = hr_dev->hw->hw_init(hr_dev);
902 if (ret) {
903 dev_err(dev, "hw_init failed!\n");
904 goto error_failed_engine_init;
905 }
906
907 ret = hns_roce_register_device(hr_dev);
908 if (ret)
909 goto error_failed_register_device;
910
911 return 0;
912
913error_failed_register_device:
914 hr_dev->hw->hw_exit(hr_dev);
915
916error_failed_engine_init:
917 hns_roce_cleanup_bitmap(hr_dev);
918
919error_failed_setup_hca:
920 hns_roce_cleanup_hem(hr_dev);
921
922error_failed_init_hem:
923 if (hr_dev->cmd_mod)
924 hns_roce_cmd_use_polling(hr_dev);
925
926error_failed_use_event:
927 hns_roce_cleanup_eq_table(hr_dev);
928
929error_failed_eq_table:
930 hns_roce_cmd_cleanup(hr_dev);
931
932error_failed_cmd_init:
933 ret = hr_dev->hw->reset(hr_dev, false);
934 if (ret)
935 dev_err(&hr_dev->pdev->dev, "roce_engine reset fail\n");
936
937error_failed_get_cfg:
938 ib_dealloc_device(&hr_dev->ib_dev);
939
940 return ret;
941}
942
943/**
e84e40be
S
944 * hns_roce_remove - remove RoCE device
945 * @pdev: pointer to platform device
946 */
9a443537 947static int hns_roce_remove(struct platform_device *pdev)
948{
949 struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev);
950
951 hns_roce_unregister_device(hr_dev);
952 hr_dev->hw->hw_exit(hr_dev);
953 hns_roce_cleanup_bitmap(hr_dev);
954 hns_roce_cleanup_hem(hr_dev);
955
956 if (hr_dev->cmd_mod)
957 hns_roce_cmd_use_polling(hr_dev);
958
959 hns_roce_cleanup_eq_table(hr_dev);
960 hns_roce_cmd_cleanup(hr_dev);
961 hr_dev->hw->reset(hr_dev, false);
962
963 ib_dealloc_device(&hr_dev->ib_dev);
964
965 return 0;
966}
967
9a443537 968static struct platform_driver hns_roce_driver = {
969 .probe = hns_roce_probe,
970 .remove = hns_roce_remove,
971 .driver = {
972 .name = DRV_NAME,
973 .of_match_table = hns_roce_of_match,
528f1deb 974 .acpi_match_table = ACPI_PTR(hns_roce_acpi_match),
9a443537 975 },
976};
977
978module_platform_driver(hns_roce_driver);
979
980MODULE_LICENSE("Dual BSD/GPL");
981MODULE_AUTHOR("Wei Hu <xavier.huwei@huawei.com>");
982MODULE_AUTHOR("Nenglong Zhao <zhaonenglong@hisilicon.com>");
983MODULE_AUTHOR("Lijun Ou <oulijun@huawei.com>");
984MODULE_DESCRIPTION("HNS RoCE Driver");