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Merge remote-tracking branches 'asoc/fix/dpcm', 'asoc/fix/imx', 'asoc/fix/msm8916...
[mirror_ubuntu-artful-kernel.git] / drivers / infiniband / hw / i40iw / i40iw_verbs.c
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d3749841
FL		 1/*******************************************************************************
2*
3* Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4*
5* This software is available to you under a choice of one of two
6* licenses. You may choose to be licensed under the terms of the GNU
7* General Public License (GPL) Version 2, available from the file
8* COPYING in the main directory of this source tree, or the
9* OpenFabrics.org BSD license below:
10*
11* Redistribution and use in source and binary forms, with or
12* without modification, are permitted provided that the following
13* conditions are met:
14*
15* - Redistributions of source code must retain the above
16* copyright notice, this list of conditions and the following
17* disclaimer.
18*
19* - Redistributions in binary form must reproduce the above
20* copyright notice, this list of conditions and the following
21* disclaimer in the documentation and/or other materials
22* provided with the distribution.
23*
24* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31* SOFTWARE.
32*
33*******************************************************************************/
34
35#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/random.h>
38#include <linux/highmem.h>
39#include <linux/time.h>
f26c7c83 40#include <linux/hugetlb.h>
d3749841
FL		 41#include <asm/byteorder.h>
42#include <net/ip.h>
43#include <rdma/ib_verbs.h>
44#include <rdma/iw_cm.h>
45#include <rdma/ib_user_verbs.h>
46#include <rdma/ib_umem.h>
47#include "i40iw.h"
48
49/**
50 * i40iw_query_device - get device attributes
51 * @ibdev: device pointer from stack
52 * @props: returning device attributes
53 * @udata: user data
54 */
55static int i40iw_query_device(struct ib_device *ibdev,
56 struct ib_device_attr *props,
57 struct ib_udata *udata)
58{
59 struct i40iw_device *iwdev = to_iwdev(ibdev);
60
61 if (udata->inlen || udata->outlen)
62 return -EINVAL;
63 memset(props, 0, sizeof(*props));
64 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
65 props->fw_ver = I40IW_FW_VERSION;
66 props->device_cap_flags = iwdev->device_cap_flags;
4920dc31
IM		 67 props->vendor_id = iwdev->ldev->pcidev->vendor;
68 props->vendor_part_id = iwdev->ldev->pcidev->device;
d3749841
FL		 69 props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
70 props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
85a87c90 71 props->max_qp = iwdev->max_qp - iwdev->used_qps;
d3749841
FL		 72 props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
73 props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
85a87c90 74 props->max_cq = iwdev->max_cq - iwdev->used_cqs;
d3749841 75 props->max_cqe = iwdev->max_cqe;
85a87c90
HO		 76 props->max_mr = iwdev->max_mr - iwdev->used_mrs;
77 props->max_pd = iwdev->max_pd - iwdev->used_pds;
6c2f7619 78 props->max_sge_rd = I40IW_MAX_SGE_RD;
d3749841
FL		 79 props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
80 props->max_qp_init_rd_atom = props->max_qp_rd_atom;
81 props->atomic_cap = IB_ATOMIC_NONE;
82 props->max_map_per_fmr = 1;
0477e181 83 props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
d3749841
FL		 84 return 0;
85}
86
87/**
88 * i40iw_query_port - get port attrubutes
89 * @ibdev: device pointer from stack
90 * @port: port number for query
91 * @props: returning device attributes
92 */
93static int i40iw_query_port(struct ib_device *ibdev,
94 u8 port,
95 struct ib_port_attr *props)
96{
97 struct i40iw_device *iwdev = to_iwdev(ibdev);
98 struct net_device *netdev = iwdev->netdev;
99
c4550c63 100 /* props being zeroed by the caller, avoid zeroing it here */
d3749841 101 props->max_mtu = IB_MTU_4096;
d3f4aadd 102 props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
d3749841
FL		 103
104 props->lid = 1;
105 if (netif_carrier_ok(iwdev->netdev))
106 props->state = IB_PORT_ACTIVE;
107 else
108 props->state = IB_PORT_DOWN;
109 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
110 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
111 props->gid_tbl_len = 1;
112 props->pkey_tbl_len = 1;
113 props->active_width = IB_WIDTH_4X;
114 props->active_speed = 1;
bd57aeae 115 props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
d3749841
FL		 116 return 0;
117}
118
119/**
120 * i40iw_alloc_ucontext - Allocate the user context data structure
121 * @ibdev: device pointer from stack
122 * @udata: user data
123 *
124 * This keeps track of all objects associated with a particular
125 * user-mode client.
126 */
127static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
128 struct ib_udata *udata)
129{
130 struct i40iw_device *iwdev = to_iwdev(ibdev);
131 struct i40iw_alloc_ucontext_req req;
132 struct i40iw_alloc_ucontext_resp uresp;
133 struct i40iw_ucontext *ucontext;
134
135 if (ib_copy_from_udata(&req, udata, sizeof(req)))
136 return ERR_PTR(-EINVAL);
137
61f51b7b
CTT		 138 if (req.userspace_ver < 4 || req.userspace_ver > I40IW_ABI_VER) {
139 i40iw_pr_err("Unsupported provider library version %u.\n", req.userspace_ver);
d3749841
FL		 140 return ERR_PTR(-EINVAL);
141 }
142
143 memset(&uresp, 0, sizeof(uresp));
144 uresp.max_qps = iwdev->max_qp;
145 uresp.max_pds = iwdev->max_pd;
146 uresp.wq_size = iwdev->max_qp_wr * 2;
61f51b7b 147 uresp.kernel_ver = req.userspace_ver;
d3749841
FL		 148
149 ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
150 if (!ucontext)
151 return ERR_PTR(-ENOMEM);
152
153 ucontext->iwdev = iwdev;
61f51b7b 154 ucontext->abi_ver = req.userspace_ver;
d3749841
FL		 155
156 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
157 kfree(ucontext);
158 return ERR_PTR(-EFAULT);
159 }
160
161 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
162 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
163 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
164 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
165
166 return &ucontext->ibucontext;
167}
168
169/**
170 * i40iw_dealloc_ucontext - deallocate the user context data structure
171 * @context: user context created during alloc
172 */
173static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
174{
175 struct i40iw_ucontext *ucontext = to_ucontext(context);
176 unsigned long flags;
177
178 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
179 if (!list_empty(&ucontext->cq_reg_mem_list)) {
180 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
181 return -EBUSY;
182 }
183 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
184 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
185 if (!list_empty(&ucontext->qp_reg_mem_list)) {
186 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
187 return -EBUSY;
188 }
189 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
190
191 kfree(ucontext);
192 return 0;
193}
194
195/**
196 * i40iw_mmap - user memory map
197 * @context: context created during alloc
198 * @vma: kernel info for user memory map
199 */
200static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
201{
202 struct i40iw_ucontext *ucontext;
203 u64 db_addr_offset;
204 u64 push_offset;
205
206 ucontext = to_ucontext(context);
207 if (ucontext->iwdev->sc_dev.is_pf) {
208 db_addr_offset = I40IW_DB_ADDR_OFFSET;
209 push_offset = I40IW_PUSH_OFFSET;
210 if (vma->vm_pgoff)
211 vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
212 } else {
213 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
214 push_offset = I40IW_VF_PUSH_OFFSET;
215 if (vma->vm_pgoff)
216 vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
217 }
218
219 vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
220
221 if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
222 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
223 vma->vm_private_data = ucontext;
224 } else {
225 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
226 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
227 else
228 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
229 }
230
231 if (io_remap_pfn_range(vma, vma->vm_start,
232 vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
233 PAGE_SIZE, vma->vm_page_prot))
234 return -EAGAIN;
235
236 return 0;
237}
238
239/**
240 * i40iw_alloc_push_page - allocate a push page for qp
241 * @iwdev: iwarp device
242 * @qp: hardware control qp
243 */
244static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
245{
246 struct i40iw_cqp_request *cqp_request;
247 struct cqp_commands_info *cqp_info;
d3749841
FL		 248 enum i40iw_status_code status;
249
250 if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
251 return;
252
253 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
254 if (!cqp_request)
255 return;
256
257 atomic_inc(&cqp_request->refcount);
258
259 cqp_info = &cqp_request->info;
260 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
261 cqp_info->post_sq = 1;
262
0fc2dc58 263 cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
d3749841
FL		 264 cqp_info->in.u.manage_push_page.info.free_page = 0;
265 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
266 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
267
268 status = i40iw_handle_cqp_op(iwdev, cqp_request);
269 if (!status)
270 qp->push_idx = cqp_request->compl_info.op_ret_val;
271 else
272 i40iw_pr_err("CQP-OP Push page fail");
273 i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
274}
275
276/**
277 * i40iw_dealloc_push_page - free a push page for qp
278 * @iwdev: iwarp device
279 * @qp: hardware control qp
280 */
281static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
282{
283 struct i40iw_cqp_request *cqp_request;
284 struct cqp_commands_info *cqp_info;
d3749841
FL		 285 enum i40iw_status_code status;
286
287 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
288 return;
289
290 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
291 if (!cqp_request)
292 return;
293
294 cqp_info = &cqp_request->info;
295 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
296 cqp_info->post_sq = 1;
297
298 cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
0fc2dc58 299 cqp_info->in.u.manage_push_page.info.qs_handle = qp->qs_handle;
d3749841
FL		 300 cqp_info->in.u.manage_push_page.info.free_page = 1;
301 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
302 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
303
304 status = i40iw_handle_cqp_op(iwdev, cqp_request);
305 if (!status)
306 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
307 else
308 i40iw_pr_err("CQP-OP Push page fail");
309}
310
311/**
312 * i40iw_alloc_pd - allocate protection domain
313 * @ibdev: device pointer from stack
314 * @context: user context created during alloc
315 * @udata: user data
316 */
317static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
318 struct ib_ucontext *context,
319 struct ib_udata *udata)
320{
321 struct i40iw_pd *iwpd;
322 struct i40iw_device *iwdev = to_iwdev(ibdev);
323 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
324 struct i40iw_alloc_pd_resp uresp;
325 struct i40iw_sc_pd *sc_pd;
61f51b7b 326 struct i40iw_ucontext *ucontext;
d3749841
FL		 327 u32 pd_id = 0;
328 int err;
329
d5965934
MI		 330 if (iwdev->closing)
331 return ERR_PTR(-ENODEV);
332
d3749841
FL		 333 err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
334 iwdev->max_pd, &pd_id, &iwdev->next_pd);
335 if (err) {
336 i40iw_pr_err("alloc resource failed\n");
337 return ERR_PTR(err);
338 }
339
340 iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
341 if (!iwpd) {
342 err = -ENOMEM;
343 goto free_res;
344 }
345
346 sc_pd = &iwpd->sc_pd;
d3749841
FL		 347
348 if (context) {
61f51b7b
CTT		 349 ucontext = to_ucontext(context);
350 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
d3749841
FL		 351 memset(&uresp, 0, sizeof(uresp));
352 uresp.pd_id = pd_id;
353 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
354 err = -EFAULT;
355 goto error;
356 }
61f51b7b
CTT		 357 } else {
358 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id, -1);
d3749841
FL		 359 }
360
361 i40iw_add_pdusecount(iwpd);
362 return &iwpd->ibpd;
363error:
364 kfree(iwpd);
365free_res:
366 i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
367 return ERR_PTR(err);
368}
369
370/**
371 * i40iw_dealloc_pd - deallocate pd
372 * @ibpd: ptr of pd to be deallocated
373 */
374static int i40iw_dealloc_pd(struct ib_pd *ibpd)
375{
376 struct i40iw_pd *iwpd = to_iwpd(ibpd);
377 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
378
379 i40iw_rem_pdusecount(iwpd, iwdev);
380 return 0;
381}
382
383/**
384 * i40iw_qp_roundup - return round up qp ring size
385 * @wr_ring_size: ring size to round up
386 */
387static int i40iw_qp_roundup(u32 wr_ring_size)
388{
389 int scount = 1;
390
391 if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
392 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
393
394 for (wr_ring_size--; scount <= 16; scount *= 2)
395 wr_ring_size |= wr_ring_size >> scount;
396 return ++wr_ring_size;
397}
398
399/**
400 * i40iw_get_pbl - Retrieve pbl from a list given a virtual
401 * address
402 * @va: user virtual address
403 * @pbl_list: pbl list to search in (QP's or CQ's)
404 */
405static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
406 struct list_head *pbl_list)
407{
408 struct i40iw_pbl *iwpbl;
409
410 list_for_each_entry(iwpbl, pbl_list, list) {
411 if (iwpbl->user_base == va) {
412 list_del(&iwpbl->list);
413 return iwpbl;
414 }
415 }
416 return NULL;
417}
418
419/**
420 * i40iw_free_qp_resources - free up memory resources for qp
421 * @iwdev: iwarp device
422 * @iwqp: qp ptr (user or kernel)
423 * @qp_num: qp number assigned
424 */
425void i40iw_free_qp_resources(struct i40iw_device *iwdev,
426 struct i40iw_qp *iwqp,
427 u32 qp_num)
428{
af56e53c
TN		 429 struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
430
d3749841
FL		 431 i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
432 if (qp_num)
433 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
af56e53c
TN		 434 if (iwpbl->pbl_allocated)
435 i40iw_free_pble(iwdev->pble_rsrc, &iwpbl->pble_alloc);
d3749841
FL		 436 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
437 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
438 kfree(iwqp->kqp.wrid_mem);
439 iwqp->kqp.wrid_mem = NULL;
440 kfree(iwqp->allocated_buffer);
d3749841
FL		 441}
442
443/**
444 * i40iw_clean_cqes - clean cq entries for qp
445 * @iwqp: qp ptr (user or kernel)
446 * @iwcq: cq ptr
447 */
448static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
449{
450 struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
451
452 ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
453}
454
455/**
456 * i40iw_destroy_qp - destroy qp
457 * @ibqp: qp's ib pointer also to get to device's qp address
458 */
459static int i40iw_destroy_qp(struct ib_qp *ibqp)
460{
461 struct i40iw_qp *iwqp = to_iwqp(ibqp);
462
463 iwqp->destroyed = 1;
464
465 if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
466 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
467
468 if (!iwqp->user_mode) {
469 if (iwqp->iwscq) {
470 i40iw_clean_cqes(iwqp, iwqp->iwscq);
471 if (iwqp->iwrcq != iwqp->iwscq)
472 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
473 }
474 }
475
476 i40iw_rem_ref(&iwqp->ibqp);
477 return 0;
478}
479
480/**
481 * i40iw_setup_virt_qp - setup for allocation of virtual qp
482 * @dev: iwarp device
483 * @qp: qp ptr
484 * @init_info: initialize info to return
485 */
486static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
487 struct i40iw_qp *iwqp,
488 struct i40iw_qp_init_info *init_info)
489{
af56e53c 490 struct i40iw_pbl *iwpbl = &iwqp->iwpbl;
d3749841
FL		 491 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
492
493 iwqp->page = qpmr->sq_page;
494 init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
495 if (iwpbl->pbl_allocated) {
496 init_info->virtual_map = true;
497 init_info->sq_pa = qpmr->sq_pbl.idx;
498 init_info->rq_pa = qpmr->rq_pbl.idx;
499 } else {
500 init_info->sq_pa = qpmr->sq_pbl.addr;
501 init_info->rq_pa = qpmr->rq_pbl.addr;
502 }
503 return 0;
504}
505
506/**
507 * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
508 * @iwdev: iwarp device
509 * @iwqp: qp ptr (user or kernel)
510 * @info: initialize info to return
511 */
512static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
513 struct i40iw_qp *iwqp,
514 struct i40iw_qp_init_info *info)
515{
516 struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
517 u32 sqdepth, rqdepth;
518 u32 sq_size, rq_size;
61f51b7b 519 u8 sqshift;
d3749841
FL		 520 u32 size;
521 enum i40iw_status_code status;
522 struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
523
d3749841
FL		 524 sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
525 rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
526
23ef48ad 527 status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
d3749841 528 if (status)
fe5d6e62 529 return -ENOMEM;
d3749841
FL		 530
531 sqdepth = sq_size << sqshift;
61f51b7b 532 rqdepth = rq_size << I40IW_MAX_RQ_WQE_SHIFT;
d3749841
FL		 533
534 size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
535 iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
536
537 ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
538 if (!ukinfo->sq_wrtrk_array)
539 return -ENOMEM;
540
541 ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
542
543 size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
544 size += (I40IW_SHADOW_AREA_SIZE << 3);
545
546 status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
547 if (status) {
548 kfree(ukinfo->sq_wrtrk_array);
549 ukinfo->sq_wrtrk_array = NULL;
550 return -ENOMEM;
551 }
552
553 ukinfo->sq = mem->va;
554 info->sq_pa = mem->pa;
555
556 ukinfo->rq = &ukinfo->sq[sqdepth];
557 info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
558
559 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
560 info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
561
562 ukinfo->sq_size = sq_size;
563 ukinfo->rq_size = rq_size;
564 ukinfo->qp_id = iwqp->ibqp.qp_num;
565 return 0;
566}
567
568/**
569 * i40iw_create_qp - create qp
570 * @ibpd: ptr of pd
571 * @init_attr: attributes for qp
572 * @udata: user data for create qp
573 */
574static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
575 struct ib_qp_init_attr *init_attr,
576 struct ib_udata *udata)
577{
578 struct i40iw_pd *iwpd = to_iwpd(ibpd);
579 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
580 struct i40iw_cqp *iwcqp = &iwdev->cqp;
581 struct i40iw_qp *iwqp;
582 struct i40iw_ucontext *ucontext;
583 struct i40iw_create_qp_req req;
584 struct i40iw_create_qp_resp uresp;
585 u32 qp_num = 0;
586 void *mem;
587 enum i40iw_status_code ret;
588 int err_code;
589 int sq_size;
590 int rq_size;
591 struct i40iw_sc_qp *qp;
592 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
593 struct i40iw_qp_init_info init_info;
594 struct i40iw_create_qp_info *qp_info;
595 struct i40iw_cqp_request *cqp_request;
596 struct cqp_commands_info *cqp_info;
597
598 struct i40iw_qp_host_ctx_info *ctx_info;
599 struct i40iwarp_offload_info *iwarp_info;
600 unsigned long flags;
601
d5965934
MI		 602 if (iwdev->closing)
603 return ERR_PTR(-ENODEV);
604
d3749841
FL		 605 if (init_attr->create_flags)
606 return ERR_PTR(-EINVAL);
607 if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
608 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
609
23ef48ad
IM		 610 if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
611 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
612
01d0b367
HO		 613 if (init_attr->cap.max_recv_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
614 init_attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
615
d3749841
FL		 616 memset(&init_info, 0, sizeof(init_info));
617
618 sq_size = init_attr->cap.max_send_wr;
619 rq_size = init_attr->cap.max_recv_wr;
620
d6f7bbcc 621 init_info.vsi = &iwdev->vsi;
d3749841
FL		 622 init_info.qp_uk_init_info.sq_size = sq_size;
623 init_info.qp_uk_init_info.rq_size = rq_size;
624 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
625 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
23ef48ad 626 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
d3749841
FL		 627
628 mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
629 if (!mem)
630 return ERR_PTR(-ENOMEM);
631
632 iwqp = (struct i40iw_qp *)mem;
633 qp = &iwqp->sc_qp;
634 qp->back_qp = (void *)iwqp;
635 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
636
637 iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
638
639 if (i40iw_allocate_dma_mem(dev->hw,
640 &iwqp->q2_ctx_mem,
641 I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
642 256)) {
643 i40iw_pr_err("dma_mem failed\n");
644 err_code = -ENOMEM;
645 goto error;
646 }
647
648 init_info.q2 = iwqp->q2_ctx_mem.va;
649 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
650
651 init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
652 init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
653
654 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
655 &qp_num, &iwdev->next_qp);
656 if (err_code) {
657 i40iw_pr_err("qp resource\n");
658 goto error;
659 }
660
661 iwqp->allocated_buffer = mem;
662 iwqp->iwdev = iwdev;
663 iwqp->iwpd = iwpd;
664 iwqp->ibqp.qp_num = qp_num;
665 qp = &iwqp->sc_qp;
666 iwqp->iwscq = to_iwcq(init_attr->send_cq);
667 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
668
669 iwqp->host_ctx.va = init_info.host_ctx;
670 iwqp->host_ctx.pa = init_info.host_ctx_pa;
671 iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
672
673 init_info.pd = &iwpd->sc_pd;
674 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
675 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
676
677 if (init_attr->qp_type != IB_QPT_RC) {
fe5d6e62 678 err_code = -EINVAL;
d3749841
FL		 679 goto error;
680 }
681 if (iwdev->push_mode)
682 i40iw_alloc_push_page(iwdev, qp);
683 if (udata) {
684 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
685 if (err_code) {
686 i40iw_pr_err("ib_copy_from_data\n");
687 goto error;
688 }
689 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
690 if (ibpd->uobject && ibpd->uobject->context) {
691 iwqp->user_mode = 1;
692 ucontext = to_ucontext(ibpd->uobject->context);
693
694 if (req.user_wqe_buffers) {
af56e53c
TN		 695 struct i40iw_pbl *iwpbl;
696
d3749841
FL		 697 spin_lock_irqsave(
698 &ucontext->qp_reg_mem_list_lock, flags);
af56e53c 699 iwpbl = i40iw_get_pbl(
d3749841
FL		 700 (unsigned long)req.user_wqe_buffers,
701 &ucontext->qp_reg_mem_list);
702 spin_unlock_irqrestore(
703 &ucontext->qp_reg_mem_list_lock, flags);
704
af56e53c 705 if (!iwpbl) {
d3749841
FL		 706 err_code = -ENODATA;
707 i40iw_pr_err("no pbl info\n");
708 goto error;
709 }
af56e53c 710 memcpy(&iwqp->iwpbl, iwpbl, sizeof(iwqp->iwpbl));
d3749841
FL		 711 }
712 }
713 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
714 } else {
715 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
716 }
717
718 if (err_code) {
719 i40iw_pr_err("setup qp failed\n");
720 goto error;
721 }
722
723 init_info.type = I40IW_QP_TYPE_IWARP;
724 ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
725 if (ret) {
726 err_code = -EPROTO;
727 i40iw_pr_err("qp_init fail\n");
728 goto error;
729 }
730 ctx_info = &iwqp->ctx_info;
731 iwarp_info = &iwqp->iwarp_info;
732 iwarp_info->rd_enable = true;
733 iwarp_info->wr_rdresp_en = true;
b7aee855
IM		 734 if (!iwqp->user_mode) {
735 iwarp_info->fast_reg_en = true;
d3749841 736 iwarp_info->priv_mode_en = true;
b7aee855 737 }
d3749841
FL		 738 iwarp_info->ddp_ver = 1;
739 iwarp_info->rdmap_ver = 1;
740
741 ctx_info->iwarp_info_valid = true;
742 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
743 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
744 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
745 ctx_info->push_mode_en = false;
746 } else {
747 ctx_info->push_mode_en = true;
748 ctx_info->push_idx = qp->push_idx;
749 }
750
751 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
752 (u64 *)iwqp->host_ctx.va,
753 ctx_info);
754 ctx_info->iwarp_info_valid = false;
755 cqp_request = i40iw_get_cqp_request(iwcqp, true);
756 if (!cqp_request) {
757 err_code = -ENOMEM;
758 goto error;
759 }
760 cqp_info = &cqp_request->info;
761 qp_info = &cqp_request->info.in.u.qp_create.info;
762
763 memset(qp_info, 0, sizeof(*qp_info));
764
765 qp_info->cq_num_valid = true;
766 qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
767
768 cqp_info->cqp_cmd = OP_QP_CREATE;
769 cqp_info->post_sq = 1;
770 cqp_info->in.u.qp_create.qp = qp;
771 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
772 ret = i40iw_handle_cqp_op(iwdev, cqp_request);
773 if (ret) {
774 i40iw_pr_err("CQP-OP QP create fail");
775 err_code = -EACCES;
776 goto error;
777 }
778
779 i40iw_add_ref(&iwqp->ibqp);
780 spin_lock_init(&iwqp->lock);
781 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
782 iwdev->qp_table[qp_num] = iwqp;
783 i40iw_add_pdusecount(iwqp->iwpd);
d5965934 784 i40iw_add_devusecount(iwdev);
d3749841
FL		 785 if (ibpd->uobject && udata) {
786 memset(&uresp, 0, sizeof(uresp));
787 uresp.actual_sq_size = sq_size;
788 uresp.actual_rq_size = rq_size;
789 uresp.qp_id = qp_num;
790 uresp.push_idx = qp->push_idx;
791 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
792 if (err_code) {
793 i40iw_pr_err("copy_to_udata failed\n");
794 i40iw_destroy_qp(&iwqp->ibqp);
795 /* let the completion of the qp destroy free the qp */
796 return ERR_PTR(err_code);
797 }
798 }
c2b75ef7
IM		 799 init_completion(&iwqp->sq_drained);
800 init_completion(&iwqp->rq_drained);
d3749841
FL		 801
802 return &iwqp->ibqp;
803error:
804 i40iw_free_qp_resources(iwdev, iwqp, qp_num);
d3749841
FL		 805 return ERR_PTR(err_code);
806}
807
808/**
809 * i40iw_query - query qp attributes
810 * @ibqp: qp pointer
811 * @attr: attributes pointer
812 * @attr_mask: Not used
813 * @init_attr: qp attributes to return
814 */
815static int i40iw_query_qp(struct ib_qp *ibqp,
816 struct ib_qp_attr *attr,
817 int attr_mask,
818 struct ib_qp_init_attr *init_attr)
819{
820 struct i40iw_qp *iwqp = to_iwqp(ibqp);
821 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
822
823 attr->qp_access_flags = 0;
824 attr->cap.max_send_wr = qp->qp_uk.sq_size;
825 attr->cap.max_recv_wr = qp->qp_uk.rq_size;
d3749841 826 attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
01d0b367
HO		 827 attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
828 attr->cap.max_recv_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
d3749841
FL		 829 init_attr->event_handler = iwqp->ibqp.event_handler;
830 init_attr->qp_context = iwqp->ibqp.qp_context;
831 init_attr->send_cq = iwqp->ibqp.send_cq;
832 init_attr->recv_cq = iwqp->ibqp.recv_cq;
833 init_attr->srq = iwqp->ibqp.srq;
834 init_attr->cap = attr->cap;
835 return 0;
836}
837
838/**
839 * i40iw_hw_modify_qp - setup cqp for modify qp
840 * @iwdev: iwarp device
841 * @iwqp: qp ptr (user or kernel)
842 * @info: info for modify qp
843 * @wait: flag to wait or not for modify qp completion
844 */
845void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
846 struct i40iw_modify_qp_info *info, bool wait)
847{
848 enum i40iw_status_code status;
849 struct i40iw_cqp_request *cqp_request;
850 struct cqp_commands_info *cqp_info;
851 struct i40iw_modify_qp_info *m_info;
852
853 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
854 if (!cqp_request)
855 return;
856
857 cqp_info = &cqp_request->info;
858 m_info = &cqp_info->in.u.qp_modify.info;
859 memcpy(m_info, info, sizeof(*m_info));
860 cqp_info->cqp_cmd = OP_QP_MODIFY;
861 cqp_info->post_sq = 1;
862 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
863 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
864 status = i40iw_handle_cqp_op(iwdev, cqp_request);
865 if (status)
866 i40iw_pr_err("CQP-OP Modify QP fail");
867}
868
869/**
870 * i40iw_modify_qp - modify qp request
871 * @ibqp: qp's pointer for modify
872 * @attr: access attributes
873 * @attr_mask: state mask
874 * @udata: user data
875 */
876int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
877 int attr_mask, struct ib_udata *udata)
878{
879 struct i40iw_qp *iwqp = to_iwqp(ibqp);
880 struct i40iw_device *iwdev = iwqp->iwdev;
881 struct i40iw_qp_host_ctx_info *ctx_info;
882 struct i40iwarp_offload_info *iwarp_info;
883 struct i40iw_modify_qp_info info;
884 u8 issue_modify_qp = 0;
885 u8 dont_wait = 0;
886 u32 err;
887 unsigned long flags;
888
889 memset(&info, 0, sizeof(info));
890 ctx_info = &iwqp->ctx_info;
891 iwarp_info = &iwqp->iwarp_info;
892
893 spin_lock_irqsave(&iwqp->lock, flags);
894
895 if (attr_mask & IB_QP_STATE) {
d5965934
MI		 896 if (iwdev->closing && attr->qp_state != IB_QPS_ERR) {
897 err = -EINVAL;
898 goto exit;
899 }
900
d3749841
FL		 901 switch (attr->qp_state) {
902 case IB_QPS_INIT:
903 case IB_QPS_RTR:
904 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
905 err = -EINVAL;
906 goto exit;
907 }
908 if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
909 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
910 issue_modify_qp = 1;
911 }
912 break;
913 case IB_QPS_RTS:
914 if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
915 (!iwqp->cm_id)) {
916 err = -EINVAL;
917 goto exit;
918 }
919
920 issue_modify_qp = 1;
921 iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
922 iwqp->hte_added = 1;
923 info.next_iwarp_state = I40IW_QP_STATE_RTS;
924 info.tcp_ctx_valid = true;
925 info.ord_valid = true;
926 info.arp_cache_idx_valid = true;
927 info.cq_num_valid = true;
928 break;
929 case IB_QPS_SQD:
930 if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
931 err = 0;
932 goto exit;
933 }
934 if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
935 (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
936 err = 0;
937 goto exit;
938 }
939 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
940 err = -EINVAL;
941 goto exit;
942 }
943 info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
944 issue_modify_qp = 1;
945 break;
946 case IB_QPS_SQE:
947 if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
948 err = -EINVAL;
949 goto exit;
950 }
951 info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
952 issue_modify_qp = 1;
953 break;
954 case IB_QPS_ERR:
955 case IB_QPS_RESET:
956 if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
957 err = -EINVAL;
958 goto exit;
959 }
960 if (iwqp->sc_qp.term_flags)
d627b506 961 i40iw_terminate_del_timer(&iwqp->sc_qp);
d3749841
FL		 962 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
963 if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
964 iwdev->iw_status &&
965 (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
966 info.reset_tcp_conn = true;
967 else
968 dont_wait = 1;
969 issue_modify_qp = 1;
970 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
971 break;
972 default:
973 err = -EINVAL;
974 goto exit;
975 }
976
977 iwqp->ibqp_state = attr->qp_state;
978
979 if (issue_modify_qp)
980 iwqp->iwarp_state = info.next_iwarp_state;
981 else
982 info.next_iwarp_state = iwqp->iwarp_state;
983 }
984 if (attr_mask & IB_QP_ACCESS_FLAGS) {
985 ctx_info->iwarp_info_valid = true;
986 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
987 iwarp_info->wr_rdresp_en = true;
988 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
989 iwarp_info->wr_rdresp_en = true;
990 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
991 iwarp_info->rd_enable = true;
992 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
993 iwarp_info->bind_en = true;
994
995 if (iwqp->user_mode) {
996 iwarp_info->rd_enable = true;
997 iwarp_info->wr_rdresp_en = true;
998 iwarp_info->priv_mode_en = false;
999 }
1000 }
1001
1002 if (ctx_info->iwarp_info_valid) {
1003 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1004 int ret;
1005
1006 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1007 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1008 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
1009 (u64 *)iwqp->host_ctx.va,
1010 ctx_info);
1011 if (ret) {
1012 i40iw_pr_err("setting QP context\n");
1013 err = -EINVAL;
1014 goto exit;
1015 }
1016 }
1017
1018 spin_unlock_irqrestore(&iwqp->lock, flags);
1019
1020 if (issue_modify_qp)
1021 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1022
1023 if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1024 if (dont_wait) {
1025 if (iwqp->cm_id && iwqp->hw_tcp_state) {
1026 spin_lock_irqsave(&iwqp->lock, flags);
1027 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1028 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1029 spin_unlock_irqrestore(&iwqp->lock, flags);
1030 }
1031 }
1032 }
1033 return 0;
1034exit:
1035 spin_unlock_irqrestore(&iwqp->lock, flags);
1036 return err;
1037}
1038
1039/**
1040 * cq_free_resources - free up recources for cq
1041 * @iwdev: iwarp device
1042 * @iwcq: cq ptr
1043 */
1044static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1045{
1046 struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1047
1048 if (!iwcq->user_mode)
1049 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1050 i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1051}
1052
1053/**
d6f7bbcc 1054 * i40iw_cq_wq_destroy - send cq destroy cqp
d3749841
FL		 1055 * @iwdev: iwarp device
1056 * @cq: hardware control cq
1057 */
d6f7bbcc 1058void i40iw_cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
d3749841
FL		 1059{
1060 enum i40iw_status_code status;
1061 struct i40iw_cqp_request *cqp_request;
1062 struct cqp_commands_info *cqp_info;
1063
1064 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1065 if (!cqp_request)
1066 return;
1067
1068 cqp_info = &cqp_request->info;
1069
1070 cqp_info->cqp_cmd = OP_CQ_DESTROY;
1071 cqp_info->post_sq = 1;
1072 cqp_info->in.u.cq_destroy.cq = cq;
1073 cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1074 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1075 if (status)
1076 i40iw_pr_err("CQP-OP Destroy QP fail");
1077}
1078
1079/**
1080 * i40iw_destroy_cq - destroy cq
1081 * @ib_cq: cq pointer
1082 */
1083static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1084{
1085 struct i40iw_cq *iwcq;
1086 struct i40iw_device *iwdev;
1087 struct i40iw_sc_cq *cq;
1088
1089 if (!ib_cq) {
1090 i40iw_pr_err("ib_cq == NULL\n");
1091 return 0;
1092 }
1093
1094 iwcq = to_iwcq(ib_cq);
1095 iwdev = to_iwdev(ib_cq->device);
1096 cq = &iwcq->sc_cq;
d6f7bbcc 1097 i40iw_cq_wq_destroy(iwdev, cq);
d3749841
FL		 1098 cq_free_resources(iwdev, iwcq);
1099 kfree(iwcq);
d5965934 1100 i40iw_rem_devusecount(iwdev);
d3749841
FL		 1101 return 0;
1102}
1103
1104/**
1105 * i40iw_create_cq - create cq
1106 * @ibdev: device pointer from stack
1107 * @attr: attributes for cq
1108 * @context: user context created during alloc
1109 * @udata: user data
1110 */
1111static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1112 const struct ib_cq_init_attr *attr,
1113 struct ib_ucontext *context,
1114 struct ib_udata *udata)
1115{
1116 struct i40iw_device *iwdev = to_iwdev(ibdev);
1117 struct i40iw_cq *iwcq;
1118 struct i40iw_pbl *iwpbl;
1119 u32 cq_num = 0;
1120 struct i40iw_sc_cq *cq;
1121 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1122 struct i40iw_cq_init_info info;
1123 enum i40iw_status_code status;
1124 struct i40iw_cqp_request *cqp_request;
1125 struct cqp_commands_info *cqp_info;
1126 struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1127 unsigned long flags;
1128 int err_code;
1129 int entries = attr->cqe;
1130
d5965934
MI		 1131 if (iwdev->closing)
1132 return ERR_PTR(-ENODEV);
1133
d3749841
FL		 1134 if (entries > iwdev->max_cqe)
1135 return ERR_PTR(-EINVAL);
1136
1137 iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1138 if (!iwcq)
1139 return ERR_PTR(-ENOMEM);
1140
1141 memset(&info, 0, sizeof(info));
1142
1143 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1144 iwdev->max_cq, &cq_num,
1145 &iwdev->next_cq);
1146 if (err_code)
1147 goto error;
1148
1149 cq = &iwcq->sc_cq;
1150 cq->back_cq = (void *)iwcq;
1151 spin_lock_init(&iwcq->lock);
1152
1153 info.dev = dev;
1154 ukinfo->cq_size = max(entries, 4);
1155 ukinfo->cq_id = cq_num;
1156 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1157 info.ceqe_mask = 0;
e69c5093
HO		 1158 if (attr->comp_vector < iwdev->ceqs_count)
1159 info.ceq_id = attr->comp_vector;
d3749841
FL		 1160 info.ceq_id_valid = true;
1161 info.ceqe_mask = 1;
1162 info.type = I40IW_CQ_TYPE_IWARP;
1163 if (context) {
1164 struct i40iw_ucontext *ucontext;
1165 struct i40iw_create_cq_req req;
1166 struct i40iw_cq_mr *cqmr;
1167
1168 memset(&req, 0, sizeof(req));
1169 iwcq->user_mode = true;
1170 ucontext = to_ucontext(context);
6031e079
DC		 1171 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req))) {
1172 err_code = -EFAULT;
d3749841 1173 goto cq_free_resources;
6031e079 1174 }
d3749841
FL		 1175
1176 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1177 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1178 &ucontext->cq_reg_mem_list);
1179 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1180 if (!iwpbl) {
1181 err_code = -EPROTO;
1182 goto cq_free_resources;
1183 }
1184
1185 iwcq->iwpbl = iwpbl;
1186 iwcq->cq_mem_size = 0;
1187 cqmr = &iwpbl->cq_mr;
1188 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1189 if (iwpbl->pbl_allocated) {
1190 info.virtual_map = true;
1191 info.pbl_chunk_size = 1;
1192 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1193 } else {
1194 info.cq_base_pa = cqmr->cq_pbl.addr;
1195 }
1196 } else {
1197 /* Kmode allocations */
1198 int rsize;
1199 int shadow;
1200
1201 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1202 rsize = round_up(rsize, 256);
1203 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1204 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1205 rsize + shadow, 256);
1206 if (status) {
1207 err_code = -ENOMEM;
1208 goto cq_free_resources;
1209 }
1210 ukinfo->cq_base = iwcq->kmem.va;
1211 info.cq_base_pa = iwcq->kmem.pa;
1212 info.shadow_area_pa = info.cq_base_pa + rsize;
1213 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1214 }
1215
1216 if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1217 i40iw_pr_err("init cq fail\n");
1218 err_code = -EPROTO;
1219 goto cq_free_resources;
1220 }
1221
1222 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1223 if (!cqp_request) {
1224 err_code = -ENOMEM;
1225 goto cq_free_resources;
1226 }
1227
1228 cqp_info = &cqp_request->info;
1229 cqp_info->cqp_cmd = OP_CQ_CREATE;
1230 cqp_info->post_sq = 1;
1231 cqp_info->in.u.cq_create.cq = cq;
1232 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1233 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1234 if (status) {
1235 i40iw_pr_err("CQP-OP Create QP fail");
1236 err_code = -EPROTO;
1237 goto cq_free_resources;
1238 }
1239
1240 if (context) {
1241 struct i40iw_create_cq_resp resp;
1242
1243 memset(&resp, 0, sizeof(resp));
1244 resp.cq_id = info.cq_uk_init_info.cq_id;
1245 resp.cq_size = info.cq_uk_init_info.cq_size;
1246 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1247 i40iw_pr_err("copy to user data\n");
1248 err_code = -EPROTO;
1249 goto cq_destroy;
1250 }
1251 }
1252
d5965934 1253 i40iw_add_devusecount(iwdev);
d3749841
FL		 1254 return (struct ib_cq *)iwcq;
1255
1256cq_destroy:
d6f7bbcc 1257 i40iw_cq_wq_destroy(iwdev, cq);
d3749841
FL		 1258cq_free_resources:
1259 cq_free_resources(iwdev, iwcq);
1260error:
1261 kfree(iwcq);
1262 return ERR_PTR(err_code);
1263}
1264
1265/**
1266 * i40iw_get_user_access - get hw access from IB access
1267 * @acc: IB access to return hw access
1268 */
1269static inline u16 i40iw_get_user_access(int acc)
1270{
1271 u16 access = 0;
1272
1273 access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1274 access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1275 access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1276 access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1277 return access;
1278}
1279
1280/**
1281 * i40iw_free_stag - free stag resource
1282 * @iwdev: iwarp device
1283 * @stag: stag to free
1284 */
1285static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1286{
1287 u32 stag_idx;
1288
1289 stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1290 i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
d5965934 1291 i40iw_rem_devusecount(iwdev);
d3749841
FL		 1292}
1293
1294/**
1295 * i40iw_create_stag - create random stag
1296 * @iwdev: iwarp device
1297 */
1298static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1299{
1300 u32 stag = 0;
1301 u32 stag_index = 0;
1302 u32 next_stag_index;
1303 u32 driver_key;
1304 u32 random;
1305 u8 consumer_key;
1306 int ret;
1307
1308 get_random_bytes(&random, sizeof(random));
1309 consumer_key = (u8)random;
1310
1311 driver_key = random & ~iwdev->mr_stagmask;
1312 next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1313 next_stag_index %= iwdev->max_mr;
1314
1315 ret = i40iw_alloc_resource(iwdev,
1316 iwdev->allocated_mrs, iwdev->max_mr,
1317 &stag_index, &next_stag_index);
1318 if (!ret) {
1319 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1320 stag |= driver_key;
1321 stag += (u32)consumer_key;
d5965934 1322 i40iw_add_devusecount(iwdev);
d3749841
FL		 1323 }
1324 return stag;
1325}
1326
1327/**
1328 * i40iw_next_pbl_addr - Get next pbl address
d3749841
FL		 1329 * @pbl: pointer to a pble
1330 * @pinfo: info pointer
1331 * @idx: index
1332 */
f26c7c83 1333static inline u64 *i40iw_next_pbl_addr(u64 *pbl,
d3749841
FL		 1334 struct i40iw_pble_info **pinfo,
1335 u32 *idx)
1336{
1337 *idx += 1;
1338 if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1339 return ++pbl;
1340 *idx = 0;
1341 (*pinfo)++;
1342 return (u64 *)(*pinfo)->addr;
1343}
1344
1345/**
1346 * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1347 * @iwmr: iwmr for IB's user page addresses
1348 * @pbl: ple pointer to save 1 level or 0 level pble
1349 * @level: indicated level 0, 1 or 2
1350 */
1351static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1352 u64 *pbl,
1353 enum i40iw_pble_level level)
1354{
1355 struct ib_umem *region = iwmr->region;
1356 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
3e7e1193 1357 int chunk_pages, entry, i;
d3749841
FL		 1358 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1359 struct i40iw_pble_info *pinfo;
1360 struct scatterlist *sg;
f26c7c83 1361 u64 pg_addr = 0;
d3749841
FL		 1362 u32 idx = 0;
1363
1364 pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
f26c7c83 1365
d3749841 1366 for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
3e7e1193 1367 chunk_pages = sg_dma_len(sg) >> region->page_shift;
d3749841
FL		 1368 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1369 !iwpbl->qp_mr.sq_page)
1370 iwpbl->qp_mr.sq_page = sg_page(sg);
1371 for (i = 0; i < chunk_pages; i++) {
3e7e1193
AK		 1372 pg_addr = sg_dma_address(sg) +
1373 (i << region->page_shift);
f26c7c83
HO		 1374
1375 if ((entry + i) == 0)
1376 *pbl = cpu_to_le64(pg_addr & iwmr->page_msk);
1377 else if (!(pg_addr & ~iwmr->page_msk))
1378 *pbl = cpu_to_le64(pg_addr);
1379 else
1380 continue;
1381 pbl = i40iw_next_pbl_addr(pbl, &pinfo, &idx);
d3749841
FL		 1382 }
1383 }
1384}
1385
f26c7c83
HO		 1386/**
1387 * i40iw_set_hugetlb_params - set MR pg size and mask to huge pg values.
1388 * @addr: virtual address
1389 * @iwmr: mr pointer for this memory registration
1390 */
1391static void i40iw_set_hugetlb_values(u64 addr, struct i40iw_mr *iwmr)
1392{
1393 struct vm_area_struct *vma;
1394 struct hstate *h;
1395
1396 vma = find_vma(current->mm, addr);
1397 if (vma && is_vm_hugetlb_page(vma)) {
1398 h = hstate_vma(vma);
1399 if (huge_page_size(h) == 0x200000) {
1400 iwmr->page_size = huge_page_size(h);
1401 iwmr->page_msk = huge_page_mask(h);
d3749841
FL		 1402 }
1403 }
1404}
1405
b6a529da
HO		 1406/**
1407 * i40iw_check_mem_contiguous - check if pbls stored in arr are contiguous
1408 * @arr: lvl1 pbl array
1409 * @npages: page count
1410 * pg_size: page size
1411 *
1412 */
1413static bool i40iw_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
1414{
1415 u32 pg_idx;
1416
1417 for (pg_idx = 0; pg_idx < npages; pg_idx++) {
1418 if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
1419 return false;
1420 }
1421 return true;
1422}
1423
1424/**
1425 * i40iw_check_mr_contiguous - check if MR is physically contiguous
1426 * @palloc: pbl allocation struct
1427 * pg_size: page size
1428 */
1429static bool i40iw_check_mr_contiguous(struct i40iw_pble_alloc *palloc, u32 pg_size)
1430{
1431 struct i40iw_pble_level2 *lvl2 = &palloc->level2;
1432 struct i40iw_pble_info *leaf = lvl2->leaf;
1433 u64 *arr = NULL;
1434 u64 *start_addr = NULL;
1435 int i;
1436 bool ret;
1437
1438 if (palloc->level == I40IW_LEVEL_1) {
1439 arr = (u64 *)palloc->level1.addr;
1440 ret = i40iw_check_mem_contiguous(arr, palloc->total_cnt, pg_size);
1441 return ret;
1442 }
1443
1444 start_addr = (u64 *)leaf->addr;
1445
1446 for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
1447 arr = (u64 *)leaf->addr;
1448 if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
1449 return false;
1450 ret = i40iw_check_mem_contiguous(arr, leaf->cnt, pg_size);
1451 if (!ret)
1452 return false;
1453 }
1454
1455 return true;
1456}
1457
d3749841
FL		 1458/**
1459 * i40iw_setup_pbles - copy user pg address to pble's
1460 * @iwdev: iwarp device
1461 * @iwmr: mr pointer for this memory registration
b6a529da 1462 * @use_pbles: flag if to use pble's
d3749841
FL		 1463 */
1464static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1465 struct i40iw_mr *iwmr,
1466 bool use_pbles)
1467{
1468 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1469 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1470 struct i40iw_pble_info *pinfo;
1471 u64 *pbl;
1472 enum i40iw_status_code status;
1473 enum i40iw_pble_level level = I40IW_LEVEL_1;
1474
d3749841
FL		 1475 if (use_pbles) {
1476 mutex_lock(&iwdev->pbl_mutex);
1477 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1478 mutex_unlock(&iwdev->pbl_mutex);
1479 if (status)
1480 return -ENOMEM;
1481
1482 iwpbl->pbl_allocated = true;
1483 level = palloc->level;
1484 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1485 pbl = (u64 *)pinfo->addr;
1486 } else {
1487 pbl = iwmr->pgaddrmem;
1488 }
1489
1490 i40iw_copy_user_pgaddrs(iwmr, pbl, level);
b6a529da
HO		 1491
1492 if (use_pbles)
1493 iwmr->pgaddrmem[0] = *pbl;
1494
d3749841
FL		 1495 return 0;
1496}
1497
1498/**
1499 * i40iw_handle_q_mem - handle memory for qp and cq
1500 * @iwdev: iwarp device
1501 * @req: information for q memory management
1502 * @iwpbl: pble struct
1503 * @use_pbles: flag to use pble
1504 */
1505static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1506 struct i40iw_mem_reg_req *req,
1507 struct i40iw_pbl *iwpbl,
1508 bool use_pbles)
1509{
1510 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1511 struct i40iw_mr *iwmr = iwpbl->iwmr;
1512 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1513 struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1514 struct i40iw_hmc_pble *hmc_p;
1515 u64 *arr = iwmr->pgaddrmem;
b6a529da 1516 u32 pg_size;
d3749841
FL		 1517 int err;
1518 int total;
b6a529da 1519 bool ret = true;
d3749841
FL		 1520
1521 total = req->sq_pages + req->rq_pages + req->cq_pages;
f26c7c83 1522 pg_size = iwmr->page_size;
d3749841
FL		 1523
1524 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1525 if (err)
1526 return err;
b6a529da 1527
d3749841
FL		 1528 if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1529 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1530 iwpbl->pbl_allocated = false;
1531 return -ENOMEM;
1532 }
1533
1534 if (use_pbles)
1535 arr = (u64 *)palloc->level1.addr;
b6a529da
HO		 1536
1537 if (iwmr->type == IW_MEMREG_TYPE_QP) {
d3749841
FL		 1538 hmc_p = &qpmr->sq_pbl;
1539 qpmr->shadow = (dma_addr_t)arr[total];
b6a529da 1540
d3749841 1541 if (use_pbles) {
b6a529da
HO		 1542 ret = i40iw_check_mem_contiguous(arr, req->sq_pages, pg_size);
1543 if (ret)
1544 ret = i40iw_check_mem_contiguous(&arr[req->sq_pages], req->rq_pages, pg_size);
1545 }
1546
1547 if (!ret) {
d3749841
FL		 1548 hmc_p->idx = palloc->level1.idx;
1549 hmc_p = &qpmr->rq_pbl;
1550 hmc_p->idx = palloc->level1.idx + req->sq_pages;
1551 } else {
1552 hmc_p->addr = arr[0];
1553 hmc_p = &qpmr->rq_pbl;
b6a529da 1554 hmc_p->addr = arr[req->sq_pages];
d3749841
FL		 1555 }
1556 } else { /* CQ */
1557 hmc_p = &cqmr->cq_pbl;
1558 cqmr->shadow = (dma_addr_t)arr[total];
b6a529da 1559
d3749841 1560 if (use_pbles)
b6a529da
HO		 1561 ret = i40iw_check_mem_contiguous(arr, req->cq_pages, pg_size);
1562
1563 if (!ret)
d3749841
FL		 1564 hmc_p->idx = palloc->level1.idx;
1565 else
1566 hmc_p->addr = arr[0];
1567 }
b6a529da
HO		 1568
1569 if (use_pbles && ret) {
1570 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1571 iwpbl->pbl_allocated = false;
1572 }
1573
d3749841
FL		 1574 return err;
1575}
1576
b7aee855
IM		 1577/**
1578 * i40iw_hw_alloc_stag - cqp command to allocate stag
1579 * @iwdev: iwarp device
1580 * @iwmr: iwarp mr pointer
1581 */
1582static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1583{
1584 struct i40iw_allocate_stag_info *info;
1585 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1586 enum i40iw_status_code status;
1587 int err = 0;
1588 struct i40iw_cqp_request *cqp_request;
1589 struct cqp_commands_info *cqp_info;
1590
1591 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1592 if (!cqp_request)
1593 return -ENOMEM;
1594
1595 cqp_info = &cqp_request->info;
1596 info = &cqp_info->in.u.alloc_stag.info;
1597 memset(info, 0, sizeof(*info));
1598 info->page_size = PAGE_SIZE;
1599 info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1600 info->pd_id = iwpd->sc_pd.pd_id;
1601 info->total_len = iwmr->length;
8e0e7aed 1602 info->remote_access = true;
b7aee855
IM		 1603 cqp_info->cqp_cmd = OP_ALLOC_STAG;
1604 cqp_info->post_sq = 1;
1605 cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1606 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1607
1608 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1609 if (status) {
1610 err = -ENOMEM;
1611 i40iw_pr_err("CQP-OP MR Reg fail");
1612 }
1613 return err;
1614}
1615
1616/**
1617 * i40iw_alloc_mr - register stag for fast memory registration
1618 * @pd: ibpd pointer
1619 * @mr_type: memory for stag registrion
1620 * @max_num_sg: man number of pages
1621 */
1622static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1623 enum ib_mr_type mr_type,
1624 u32 max_num_sg)
1625{
1626 struct i40iw_pd *iwpd = to_iwpd(pd);
1627 struct i40iw_device *iwdev = to_iwdev(pd->device);
1628 struct i40iw_pble_alloc *palloc;
1629 struct i40iw_pbl *iwpbl;
1630 struct i40iw_mr *iwmr;
1631 enum i40iw_status_code status;
1632 u32 stag;
1633 int err_code = -ENOMEM;
1634
1635 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1636 if (!iwmr)
1637 return ERR_PTR(-ENOMEM);
1638
1639 stag = i40iw_create_stag(iwdev);
1640 if (!stag) {
1641 err_code = -EOVERFLOW;
1642 goto err;
1643 }
1644 iwmr->stag = stag;
1645 iwmr->ibmr.rkey = stag;
1646 iwmr->ibmr.lkey = stag;
1647 iwmr->ibmr.pd = pd;
1648 iwmr->ibmr.device = pd->device;
1649 iwpbl = &iwmr->iwpbl;
1650 iwpbl->iwmr = iwmr;
1651 iwmr->type = IW_MEMREG_TYPE_MEM;
1652 palloc = &iwpbl->pble_alloc;
1653 iwmr->page_cnt = max_num_sg;
1654 mutex_lock(&iwdev->pbl_mutex);
1655 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1656 mutex_unlock(&iwdev->pbl_mutex);
ee23abd7 1657 if (status)
b7aee855
IM		 1658 goto err1;
1659
1660 if (palloc->level != I40IW_LEVEL_1)
1661 goto err2;
1662 err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1663 if (err_code)
1664 goto err2;
1665 iwpbl->pbl_allocated = true;
1666 i40iw_add_pdusecount(iwpd);
1667 return &iwmr->ibmr;
1668err2:
1669 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1670err1:
1671 i40iw_free_stag(iwdev, stag);
1672err:
1673 kfree(iwmr);
1674 return ERR_PTR(err_code);
1675}
1676
1677/**
1678 * i40iw_set_page - populate pbl list for fmr
1679 * @ibmr: ib mem to access iwarp mr pointer
1680 * @addr: page dma address fro pbl list
1681 */
1682static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1683{
1684 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1685 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1686 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1687 u64 *pbl;
1688
1689 if (unlikely(iwmr->npages == iwmr->page_cnt))
1690 return -ENOMEM;
1691
1692 pbl = (u64 *)palloc->level1.addr;
1693 pbl[iwmr->npages++] = cpu_to_le64(addr);
1694 return 0;
1695}
1696
1697/**
1698 * i40iw_map_mr_sg - map of sg list for fmr
1699 * @ibmr: ib mem to access iwarp mr pointer
1700 * @sg: scatter gather list for fmr
1701 * @sg_nents: number of sg pages
1702 */
ff2ba993 1703static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
9aa8b321 1704 int sg_nents, unsigned int *sg_offset)
b7aee855
IM		 1705{
1706 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1707
1708 iwmr->npages = 0;
ff2ba993 1709 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
b7aee855
IM		 1710}
1711
c2b75ef7
IM		 1712/**
1713 * i40iw_drain_sq - drain the send queue
1714 * @ibqp: ib qp pointer
1715 */
1716static void i40iw_drain_sq(struct ib_qp *ibqp)
1717{
1718 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1719 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1720
1721 if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1722 wait_for_completion(&iwqp->sq_drained);
1723}
1724
1725/**
1726 * i40iw_drain_rq - drain the receive queue
1727 * @ibqp: ib qp pointer
1728 */
1729static void i40iw_drain_rq(struct ib_qp *ibqp)
1730{
1731 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1732 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1733
1734 if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1735 wait_for_completion(&iwqp->rq_drained);
1736}
1737
d3749841
FL		 1738/**
1739 * i40iw_hwreg_mr - send cqp command for memory registration
1740 * @iwdev: iwarp device
1741 * @iwmr: iwarp mr pointer
1742 * @access: access for MR
1743 */
1744static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1745 struct i40iw_mr *iwmr,
1746 u16 access)
1747{
1748 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1749 struct i40iw_reg_ns_stag_info *stag_info;
1750 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1751 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1752 enum i40iw_status_code status;
1753 int err = 0;
1754 struct i40iw_cqp_request *cqp_request;
1755 struct cqp_commands_info *cqp_info;
1756
1757 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1758 if (!cqp_request)
1759 return -ENOMEM;
1760
1761 cqp_info = &cqp_request->info;
1762 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1763 memset(stag_info, 0, sizeof(*stag_info));
1764 stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1765 stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1766 stag_info->stag_key = (u8)iwmr->stag;
1767 stag_info->total_len = iwmr->length;
1768 stag_info->access_rights = access;
1769 stag_info->pd_id = iwpd->sc_pd.pd_id;
1770 stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
f26c7c83 1771 stag_info->page_size = iwmr->page_size;
d3749841 1772
b6a529da 1773 if (iwpbl->pbl_allocated) {
d3749841
FL		 1774 if (palloc->level == I40IW_LEVEL_1) {
1775 stag_info->first_pm_pbl_index = palloc->level1.idx;
1776 stag_info->chunk_size = 1;
1777 } else {
1778 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1779 stag_info->chunk_size = 3;
1780 }
1781 } else {
1782 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1783 }
1784
1785 cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1786 cqp_info->post_sq = 1;
1787 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1788 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1789
1790 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1791 if (status) {
1792 err = -ENOMEM;
1793 i40iw_pr_err("CQP-OP MR Reg fail");
1794 }
1795 return err;
1796}
1797
1798/**
1799 * i40iw_reg_user_mr - Register a user memory region
1800 * @pd: ptr of pd
1801 * @start: virtual start address
1802 * @length: length of mr
1803 * @virt: virtual address
1804 * @acc: access of mr
1805 * @udata: user data
1806 */
1807static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1808 u64 start,
1809 u64 length,
1810 u64 virt,
1811 int acc,
1812 struct ib_udata *udata)
1813{
1814 struct i40iw_pd *iwpd = to_iwpd(pd);
1815 struct i40iw_device *iwdev = to_iwdev(pd->device);
1816 struct i40iw_ucontext *ucontext;
1817 struct i40iw_pble_alloc *palloc;
1818 struct i40iw_pbl *iwpbl;
1819 struct i40iw_mr *iwmr;
1820 struct ib_umem *region;
1821 struct i40iw_mem_reg_req req;
6b900365 1822 u64 pbl_depth = 0;
d3749841
FL		 1823 u32 stag = 0;
1824 u16 access;
6b900365 1825 u64 region_length;
d3749841
FL		 1826 bool use_pbles = false;
1827 unsigned long flags;
1828 int err = -ENOSYS;
b6a529da 1829 int ret;
f26c7c83 1830 int pg_shift;
d3749841 1831
d5965934
MI		 1832 if (iwdev->closing)
1833 return ERR_PTR(-ENODEV);
d3749841 1834
6b900365
IM		 1835 if (length > I40IW_MAX_MR_SIZE)
1836 return ERR_PTR(-EINVAL);
d3749841
FL		 1837 region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1838 if (IS_ERR(region))
1839 return (struct ib_mr *)region;
1840
1841 if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1842 ib_umem_release(region);
1843 return ERR_PTR(-EFAULT);
1844 }
1845
1846 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1847 if (!iwmr) {
1848 ib_umem_release(region);
1849 return ERR_PTR(-ENOMEM);
1850 }
1851
1852 iwpbl = &iwmr->iwpbl;
1853 iwpbl->iwmr = iwmr;
1854 iwmr->region = region;
1855 iwmr->ibmr.pd = pd;
1856 iwmr->ibmr.device = pd->device;
1857 ucontext = to_ucontext(pd->uobject->context);
f26c7c83 1858
3e7e1193 1859 iwmr->page_size = PAGE_SIZE;
f26c7c83
HO		 1860 iwmr->page_msk = PAGE_MASK;
1861
1862 if (region->hugetlb && (req.reg_type == IW_MEMREG_TYPE_MEM))
1863 i40iw_set_hugetlb_values(start, iwmr);
1864
1865 region_length = region->length + (start & (iwmr->page_size - 1));
1866 pg_shift = ffs(iwmr->page_size) - 1;
1867 pbl_depth = region_length >> pg_shift;
1868 pbl_depth += (region_length & (iwmr->page_size - 1)) ? 1 : 0;
d3749841
FL		 1869 iwmr->length = region->length;
1870
1871 iwpbl->user_base = virt;
1872 palloc = &iwpbl->pble_alloc;
1873
1874 iwmr->type = req.reg_type;
6b900365 1875 iwmr->page_cnt = (u32)pbl_depth;
d3749841
FL		 1876
1877 switch (req.reg_type) {
1878 case IW_MEMREG_TYPE_QP:
1879 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1880 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1881 if (err)
1882 goto error;
1883 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1884 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1885 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1886 break;
1887 case IW_MEMREG_TYPE_CQ:
1888 use_pbles = (req.cq_pages > 1);
1889 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1890 if (err)
1891 goto error;
1892
1893 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1894 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1895 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1896 break;
1897 case IW_MEMREG_TYPE_MEM:
b6a529da 1898 use_pbles = (iwmr->page_cnt != 1);
d3749841
FL		 1899 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1900
d3749841
FL		 1901 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1902 if (err)
1903 goto error;
1904
b6a529da 1905 if (use_pbles) {
f26c7c83 1906 ret = i40iw_check_mr_contiguous(palloc, iwmr->page_size);
b6a529da
HO		 1907 if (ret) {
1908 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1909 iwpbl->pbl_allocated = false;
1910 }
1911 }
1912
d3749841
FL		 1913 access |= i40iw_get_user_access(acc);
1914 stag = i40iw_create_stag(iwdev);
1915 if (!stag) {
1916 err = -ENOMEM;
1917 goto error;
1918 }
1919
1920 iwmr->stag = stag;
1921 iwmr->ibmr.rkey = stag;
1922 iwmr->ibmr.lkey = stag;
1923
1924 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1925 if (err) {
1926 i40iw_free_stag(iwdev, stag);
1927 goto error;
1928 }
f26c7c83 1929
d3749841
FL		 1930 break;
1931 default:
1932 goto error;
1933 }
1934
1935 iwmr->type = req.reg_type;
1936 if (req.reg_type == IW_MEMREG_TYPE_MEM)
1937 i40iw_add_pdusecount(iwpd);
1938 return &iwmr->ibmr;
1939
1940error:
b6a529da 1941 if (palloc->level != I40IW_LEVEL_0 && iwpbl->pbl_allocated)
d3749841
FL		 1942 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1943 ib_umem_release(region);
1944 kfree(iwmr);
1945 return ERR_PTR(err);
1946}
1947
1948/**
1949 * i40iw_reg_phys_mr - register kernel physical memory
1950 * @pd: ibpd pointer
1951 * @addr: physical address of memory to register
1952 * @size: size of memory to register
1953 * @acc: Access rights
1954 * @iova_start: start of virtual address for physical buffers
1955 */
1956struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1957 u64 addr,
1958 u64 size,
1959 int acc,
1960 u64 *iova_start)
1961{
1962 struct i40iw_pd *iwpd = to_iwpd(pd);
1963 struct i40iw_device *iwdev = to_iwdev(pd->device);
1964 struct i40iw_pbl *iwpbl;
1965 struct i40iw_mr *iwmr;
1966 enum i40iw_status_code status;
1967 u32 stag;
1968 u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1969 int ret;
1970
1971 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1972 if (!iwmr)
1973 return ERR_PTR(-ENOMEM);
1974 iwmr->ibmr.pd = pd;
1975 iwmr->ibmr.device = pd->device;
1976 iwpbl = &iwmr->iwpbl;
1977 iwpbl->iwmr = iwmr;
1978 iwmr->type = IW_MEMREG_TYPE_MEM;
1979 iwpbl->user_base = *iova_start;
1980 stag = i40iw_create_stag(iwdev);
1981 if (!stag) {
1982 ret = -EOVERFLOW;
1983 goto err;
1984 }
1985 access |= i40iw_get_user_access(acc);
1986 iwmr->stag = stag;
1987 iwmr->ibmr.rkey = stag;
1988 iwmr->ibmr.lkey = stag;
1989 iwmr->page_cnt = 1;
1990 iwmr->pgaddrmem[0] = addr;
342c387b 1991 iwmr->length = size;
d3749841
FL		 1992 status = i40iw_hwreg_mr(iwdev, iwmr, access);
1993 if (status) {
1994 i40iw_free_stag(iwdev, stag);
1995 ret = -ENOMEM;
1996 goto err;
1997 }
1998
1999 i40iw_add_pdusecount(iwpd);
2000 return &iwmr->ibmr;
2001 err:
2002 kfree(iwmr);
2003 return ERR_PTR(ret);
2004}
2005
2006/**
2007 * i40iw_get_dma_mr - register physical mem
2008 * @pd: ptr of pd
2009 * @acc: access for memory
2010 */
2011static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
2012{
2013 u64 kva = 0;
2014
342c387b 2015 return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
d3749841
FL		 2016}
2017
2018/**
2019 * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
2020 * @iwmr: iwmr for IB's user page addresses
2021 * @ucontext: ptr to user context
2022 */
2023static void i40iw_del_memlist(struct i40iw_mr *iwmr,
2024 struct i40iw_ucontext *ucontext)
2025{
2026 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2027 unsigned long flags;
2028
2029 switch (iwmr->type) {
2030 case IW_MEMREG_TYPE_CQ:
2031 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2032 if (!list_empty(&ucontext->cq_reg_mem_list))
2033 list_del(&iwpbl->list);
2034 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2035 break;
2036 case IW_MEMREG_TYPE_QP:
2037 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
2038 if (!list_empty(&ucontext->qp_reg_mem_list))
2039 list_del(&iwpbl->list);
2040 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
2041 break;
2042 default:
2043 break;
2044 }
2045}
2046
2047/**
2048 * i40iw_dereg_mr - deregister mr
2049 * @ib_mr: mr ptr for dereg
2050 */
2051static int i40iw_dereg_mr(struct ib_mr *ib_mr)
2052{
2053 struct ib_pd *ibpd = ib_mr->pd;
2054 struct i40iw_pd *iwpd = to_iwpd(ibpd);
2055 struct i40iw_mr *iwmr = to_iwmr(ib_mr);
2056 struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
2057 enum i40iw_status_code status;
2058 struct i40iw_dealloc_stag_info *info;
2059 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
2060 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
2061 struct i40iw_cqp_request *cqp_request;
2062 struct cqp_commands_info *cqp_info;
2063 u32 stag_idx;
2064
2065 if (iwmr->region)
2066 ib_umem_release(iwmr->region);
2067
2068 if (iwmr->type != IW_MEMREG_TYPE_MEM) {
2069 if (ibpd->uobject) {
2070 struct i40iw_ucontext *ucontext;
2071
2072 ucontext = to_ucontext(ibpd->uobject->context);
2073 i40iw_del_memlist(iwmr, ucontext);
2074 }
af56e53c 2075 if (iwpbl->pbl_allocated && iwmr->type != IW_MEMREG_TYPE_QP)
d3749841 2076 i40iw_free_pble(iwdev->pble_rsrc, palloc);
433c5813 2077 kfree(iwmr);
d3749841
FL		 2078 return 0;
2079 }
2080
2081 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
2082 if (!cqp_request)
2083 return -ENOMEM;
2084
2085 cqp_info = &cqp_request->info;
2086 info = &cqp_info->in.u.dealloc_stag.info;
2087 memset(info, 0, sizeof(*info));
2088
2089 info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
2090 info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
2091 stag_idx = info->stag_idx;
2092 info->mr = true;
2093 if (iwpbl->pbl_allocated)
2094 info->dealloc_pbl = true;
2095
2096 cqp_info->cqp_cmd = OP_DEALLOC_STAG;
2097 cqp_info->post_sq = 1;
2098 cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
2099 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
2100 status = i40iw_handle_cqp_op(iwdev, cqp_request);
2101 if (status)
2102 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
2103 i40iw_rem_pdusecount(iwpd, iwdev);
2104 i40iw_free_stag(iwdev, iwmr->stag);
2105 if (iwpbl->pbl_allocated)
2106 i40iw_free_pble(iwdev->pble_rsrc, palloc);
2107 kfree(iwmr);
2108 return 0;
2109}
2110
2111/**
2112 * i40iw_show_rev
2113 */
2114static ssize_t i40iw_show_rev(struct device *dev,
2115 struct device_attribute *attr, char *buf)
2116{
2117 struct i40iw_ib_device *iwibdev = container_of(dev,
2118 struct i40iw_ib_device,
2119 ibdev.dev);
2120 u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
2121
2122 return sprintf(buf, "%x\n", hw_rev);
2123}
2124
d3749841
FL		 2125/**
2126 * i40iw_show_hca
2127 */
2128static ssize_t i40iw_show_hca(struct device *dev,
2129 struct device_attribute *attr, char *buf)
2130{
2131 return sprintf(buf, "I40IW\n");
2132}
2133
2134/**
2135 * i40iw_show_board
2136 */
2137static ssize_t i40iw_show_board(struct device *dev,
2138 struct device_attribute *attr,
2139 char *buf)
2140{
2141 return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
2142}
2143
2144static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
d3749841
FL		 2145static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
2146static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2147
2148static struct device_attribute *i40iw_dev_attributes[] = {
2149 &dev_attr_hw_rev,
d3749841
FL		 2150 &dev_attr_hca_type,
2151 &dev_attr_board_id
2152};
2153
2154/**
2155 * i40iw_copy_sg_list - copy sg list for qp
2156 * @sg_list: copied into sg_list
2157 * @sgl: copy from sgl
2158 * @num_sges: count of sg entries
2159 */
2160static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2161{
2162 unsigned int i;
2163
2164 for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2165 sg_list[i].tag_off = sgl[i].addr;
2166 sg_list[i].len = sgl[i].length;
2167 sg_list[i].stag = sgl[i].lkey;
2168 }
2169}
2170
2171/**
2172 * i40iw_post_send - kernel application wr
2173 * @ibqp: qp ptr for wr
2174 * @ib_wr: work request ptr
2175 * @bad_wr: return of bad wr if err
2176 */
2177static int i40iw_post_send(struct ib_qp *ibqp,
2178 struct ib_send_wr *ib_wr,
2179 struct ib_send_wr **bad_wr)
2180{
2181 struct i40iw_qp *iwqp;
2182 struct i40iw_qp_uk *ukqp;
2183 struct i40iw_post_sq_info info;
2184 enum i40iw_status_code ret;
2185 int err = 0;
2186 unsigned long flags;
b7aee855 2187 bool inv_stag;
d3749841
FL		 2188
2189 iwqp = (struct i40iw_qp *)ibqp;
2190 ukqp = &iwqp->sc_qp.qp_uk;
2191
2192 spin_lock_irqsave(&iwqp->lock, flags);
2193 while (ib_wr) {
b7aee855 2194 inv_stag = false;
d3749841
FL		 2195 memset(&info, 0, sizeof(info));
2196 info.wr_id = (u64)(ib_wr->wr_id);
2197 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2198 info.signaled = true;
2199 if (ib_wr->send_flags & IB_SEND_FENCE)
2200 info.read_fence = true;
2201
2202 switch (ib_wr->opcode) {
2203 case IB_WR_SEND:
b7aee855
IM		 2204 /* fall-through */
2205 case IB_WR_SEND_WITH_INV:
2206 if (ib_wr->opcode == IB_WR_SEND) {
2207 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2208 info.op_type = I40IW_OP_TYPE_SEND_SOL;
2209 else
2210 info.op_type = I40IW_OP_TYPE_SEND;
2211 } else {
2212 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2213 info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2214 else
2215 info.op_type = I40IW_OP_TYPE_SEND_INV;
2216 }
d3749841
FL		 2217
2218 if (ib_wr->send_flags & IB_SEND_INLINE) {
2219 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2220 info.op.inline_send.len = ib_wr->sg_list[0].length;
b7aee855 2221 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
d3749841
FL		 2222 } else {
2223 info.op.send.num_sges = ib_wr->num_sge;
2224 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
b7aee855 2225 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
d3749841
FL		 2226 }
2227
fe5d6e62
SS		 2228 if (ret) {
2229 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2230 err = -ENOMEM;
2231 else
2232 err = -EINVAL;
2233 }
d3749841
FL		 2234 break;
2235 case IB_WR_RDMA_WRITE:
2236 info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2237
2238 if (ib_wr->send_flags & IB_SEND_INLINE) {
2239 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2240 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2241 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2242 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2243 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2244 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2245 } else {
2246 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2247 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2248 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2249 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2250 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2251 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2252 }
2253
fe5d6e62
SS		 2254 if (ret) {
2255 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2256 err = -ENOMEM;
2257 else
2258 err = -EINVAL;
2259 }
d3749841 2260 break;
b7aee855
IM		 2261 case IB_WR_RDMA_READ_WITH_INV:
2262 inv_stag = true;
2263 /* fall-through*/
d3749841 2264 case IB_WR_RDMA_READ:
6c2f7619
SS		 2265 if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2266 err = -EINVAL;
2267 break;
2268 }
d3749841
FL		 2269 info.op_type = I40IW_OP_TYPE_RDMA_READ;
2270 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2271 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2272 info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2273 info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2274 info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2275 info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
b7aee855 2276 ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
fe5d6e62
SS		 2277 if (ret) {
2278 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2279 err = -ENOMEM;
2280 else
2281 err = -EINVAL;
2282 }
d3749841 2283 break;
b7aee855
IM		 2284 case IB_WR_LOCAL_INV:
2285 info.op_type = I40IW_OP_TYPE_INV_STAG;
2286 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2287 ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2288 if (ret)
fe5d6e62 2289 err = -ENOMEM;
b7aee855
IM		 2290 break;
2291 case IB_WR_REG_MR:
2292 {
2293 struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
b7aee855
IM		 2294 int flags = reg_wr(ib_wr)->access;
2295 struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2296 struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2297 struct i40iw_fast_reg_stag_info info;
2298
7748e499 2299 memset(&info, 0, sizeof(info));
b7aee855
IM		 2300 info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2301 info.access_rights |= i40iw_get_user_access(flags);
2302 info.stag_key = reg_wr(ib_wr)->key & 0xff;
2303 info.stag_idx = reg_wr(ib_wr)->key >> 8;
e6779185 2304 info.page_size = reg_wr(ib_wr)->mr->page_size;
b7aee855
IM		 2305 info.wr_id = ib_wr->wr_id;
2306
2307 info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2308 info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2309 info.total_len = iwmr->ibmr.length;
7748e499 2310 info.reg_addr_pa = *(u64 *)palloc->level1.addr;
b7aee855
IM		 2311 info.first_pm_pbl_index = palloc->level1.idx;
2312 info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2313 info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2314
7748e499
SS		 2315 if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2316 info.chunk_size = 1;
2317
b7aee855
IM		 2318 ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2319 if (ret)
fe5d6e62 2320 err = -ENOMEM;
b7aee855
IM		 2321 break;
2322 }
d3749841
FL		 2323 default:
2324 err = -EINVAL;
2325 i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2326 ib_wr->opcode);
2327 break;
2328 }
2329
2330 if (err)
2331 break;
2332 ib_wr = ib_wr->next;
2333 }
2334
2335 if (err)
2336 *bad_wr = ib_wr;
2337 else
2338 ukqp->ops.iw_qp_post_wr(ukqp);
2339 spin_unlock_irqrestore(&iwqp->lock, flags);
2340
2341 return err;
2342}
2343
2344/**
2345 * i40iw_post_recv - post receive wr for kernel application
2346 * @ibqp: ib qp pointer
2347 * @ib_wr: work request for receive
2348 * @bad_wr: bad wr caused an error
2349 */
2350static int i40iw_post_recv(struct ib_qp *ibqp,
2351 struct ib_recv_wr *ib_wr,
2352 struct ib_recv_wr **bad_wr)
2353{
2354 struct i40iw_qp *iwqp;
2355 struct i40iw_qp_uk *ukqp;
2356 struct i40iw_post_rq_info post_recv;
2357 struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2358 enum i40iw_status_code ret = 0;
2359 unsigned long flags;
fe5d6e62 2360 int err = 0;
d3749841
FL		 2361
2362 iwqp = (struct i40iw_qp *)ibqp;
2363 ukqp = &iwqp->sc_qp.qp_uk;
2364
2365 memset(&post_recv, 0, sizeof(post_recv));
2366 spin_lock_irqsave(&iwqp->lock, flags);
2367 while (ib_wr) {
2368 post_recv.num_sges = ib_wr->num_sge;
2369 post_recv.wr_id = ib_wr->wr_id;
2370 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2371 post_recv.sg_list = sg_list;
2372 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2373 if (ret) {
2374 i40iw_pr_err(" post_recv err %d\n", ret);
fe5d6e62
SS		 2375 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2376 err = -ENOMEM;
2377 else
2378 err = -EINVAL;
d3749841
FL		 2379 *bad_wr = ib_wr;
2380 goto out;
2381 }
2382 ib_wr = ib_wr->next;
2383 }
2384 out:
2385 spin_unlock_irqrestore(&iwqp->lock, flags);
fe5d6e62 2386 return err;
d3749841
FL		 2387}
2388
2389/**
2390 * i40iw_poll_cq - poll cq for completion (kernel apps)
2391 * @ibcq: cq to poll
2392 * @num_entries: number of entries to poll
2393 * @entry: wr of entry completed
2394 */
2395static int i40iw_poll_cq(struct ib_cq *ibcq,
2396 int num_entries,
2397 struct ib_wc *entry)
2398{
2399 struct i40iw_cq *iwcq;
2400 int cqe_count = 0;
2401 struct i40iw_cq_poll_info cq_poll_info;
2402 enum i40iw_status_code ret;
2403 struct i40iw_cq_uk *ukcq;
2404 struct i40iw_sc_qp *qp;
c2b75ef7 2405 struct i40iw_qp *iwqp;
d3749841
FL		 2406 unsigned long flags;
2407
2408 iwcq = (struct i40iw_cq *)ibcq;
2409 ukcq = &iwcq->sc_cq.cq_uk;
2410
2411 spin_lock_irqsave(&iwcq->lock, flags);
2412 while (cqe_count < num_entries) {
b54143be 2413 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
d3749841
FL		 2414 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2415 break;
f8a4e76c
TN		 2416 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2417 continue;
d3749841
FL		 2418 } else if (ret) {
2419 if (!cqe_count)
2420 cqe_count = -1;
2421 break;
2422 }
2423 entry->wc_flags = 0;
2424 entry->wr_id = cq_poll_info.wr_id;
df35630a 2425 if (cq_poll_info.error) {
d3749841 2426 entry->status = IB_WC_WR_FLUSH_ERR;
df35630a
IM		 2427 entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2428 } else {
2429 entry->status = IB_WC_SUCCESS;
2430 }
d3749841
FL		 2431
2432 switch (cq_poll_info.op_type) {
2433 case I40IW_OP_TYPE_RDMA_WRITE:
2434 entry->opcode = IB_WC_RDMA_WRITE;
2435 break;
2436 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2437 case I40IW_OP_TYPE_RDMA_READ:
2438 entry->opcode = IB_WC_RDMA_READ;
2439 break;
2440 case I40IW_OP_TYPE_SEND_SOL:
2441 case I40IW_OP_TYPE_SEND_SOL_INV:
2442 case I40IW_OP_TYPE_SEND_INV:
2443 case I40IW_OP_TYPE_SEND:
2444 entry->opcode = IB_WC_SEND;
2445 break;
2446 case I40IW_OP_TYPE_REC:
2447 entry->opcode = IB_WC_RECV;
2448 break;
2449 default:
2450 entry->opcode = IB_WC_RECV;
2451 break;
2452 }
2453
d3749841
FL		 2454 entry->ex.imm_data = 0;
2455 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2456 entry->qp = (struct ib_qp *)qp->back_qp;
2457 entry->src_qp = cq_poll_info.qp_id;
c2b75ef7
IM		 2458 iwqp = (struct i40iw_qp *)qp->back_qp;
2459 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2460 if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2461 complete(&iwqp->sq_drained);
2462 if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2463 complete(&iwqp->rq_drained);
2464 }
d3749841
FL		 2465 entry->byte_len = cq_poll_info.bytes_xfered;
2466 entry++;
2467 cqe_count++;
2468 }
2469 spin_unlock_irqrestore(&iwcq->lock, flags);
2470 return cqe_count;
2471}
2472
2473/**
2474 * i40iw_req_notify_cq - arm cq kernel application
2475 * @ibcq: cq to arm
2476 * @notify_flags: notofication flags
2477 */
2478static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2479 enum ib_cq_notify_flags notify_flags)
2480{
2481 struct i40iw_cq *iwcq;
2482 struct i40iw_cq_uk *ukcq;
747f1c6d
SS		 2483 unsigned long flags;
2484 enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
d3749841
FL		 2485
2486 iwcq = (struct i40iw_cq *)ibcq;
2487 ukcq = &iwcq->sc_cq.cq_uk;
747f1c6d
SS		 2488 if (notify_flags == IB_CQ_SOLICITED)
2489 cq_notify = IW_CQ_COMPL_SOLICITED;
2490 spin_lock_irqsave(&iwcq->lock, flags);
d3749841 2491 ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
747f1c6d 2492 spin_unlock_irqrestore(&iwcq->lock, flags);
d3749841
FL		 2493 return 0;
2494}
2495
2496/**
2497 * i40iw_port_immutable - return port's immutable data
2498 * @ibdev: ib dev struct
2499 * @port_num: port number
2500 * @immutable: immutable data for the port return
2501 */
2502static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2503 struct ib_port_immutable *immutable)
2504{
2505 struct ib_port_attr attr;
2506 int err;
2507
c4550c63
OG		 2508 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2509
2510 err = ib_query_port(ibdev, port_num, &attr);
d3749841
FL		 2511
2512 if (err)
2513 return err;
2514
2515 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2516 immutable->gid_tbl_len = attr.gid_tbl_len;
d3749841
FL		 2517
2518 return 0;
2519}
2520
b40f4757
CL		 2521static const char * const i40iw_hw_stat_names[] = {
2522 // 32bit names
2523 [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2524 [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2525 [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2526 [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2527 [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2528 [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2529 [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2530 [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2531 [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2532 // 64bit names
2533 [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2534 "ip4InOctets",
2535 [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2536 "ip4InPkts",
2537 [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2538 "ip4InReasmRqd",
2539 [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2540 "ip4InMcastPkts",
2541 [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2542 "ip4OutOctets",
2543 [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2544 "ip4OutPkts",
2545 [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2546 "ip4OutSegRqd",
2547 [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2548 "ip4OutMcastPkts",
2549 [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2550 "ip6InOctets",
2551 [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2552 "ip6InPkts",
2553 [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2554 "ip6InReasmRqd",
2555 [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2556 "ip6InMcastPkts",
2557 [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2558 "ip6OutOctets",
2559 [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2560 "ip6OutPkts",
2561 [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2562 "ip6OutSegRqd",
2563 [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2564 "ip6OutMcastPkts",
2565 [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2566 "tcpInSegs",
2567 [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2568 "tcpOutSegs",
2569 [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2570 "iwInRdmaReads",
2571 [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2572 "iwInRdmaSends",
2573 [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2574 "iwInRdmaWrites",
2575 [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2576 "iwOutRdmaReads",
2577 [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2578 "iwOutRdmaSends",
2579 [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2580 "iwOutRdmaWrites",
2581 [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2582 "iwRdmaBnd",
2583 [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2584 "iwRdmaInv"
2585};
2586
f65c52ca
IW		 2587static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str,
2588 size_t str_len)
2589{
2590 u32 firmware_version = I40IW_FW_VERSION;
2591
2592 snprintf(str, str_len, "%u.%u", firmware_version,
2593 (firmware_version & 0x000000ff));
2594}
2595
d3749841 2596/**
b40f4757
CL		 2597 * i40iw_alloc_hw_stats - Allocate a hw stats structure
2598 * @ibdev: device pointer from stack
2599 * @port_num: port number
d3749841 2600 */
b40f4757
CL		 2601static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2602 u8 port_num)
2603{
2604 struct i40iw_device *iwdev = to_iwdev(ibdev);
2605 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2606 int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2607 I40IW_HW_STAT_INDEX_MAX_64;
2608 unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2609
2610 BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2611 (I40IW_HW_STAT_INDEX_MAX_32 +
2612 I40IW_HW_STAT_INDEX_MAX_64));
2613
2614 /*
2615 * PFs get the default update lifespan, but VFs only update once
2616 * per second
2617 */
2618 if (!dev->is_pf)
2619 lifespan = 1000;
2620 return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2621 lifespan);
2622}
2623
2624/**
2625 * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2626 * @ibdev: device pointer from stack
2627 * @stats: stats pointer from stack
2628 * @port_num: port number
2629 * @index: which hw counter the stack is requesting we update
2630 */
2631static int i40iw_get_hw_stats(struct ib_device *ibdev,
2632 struct rdma_hw_stats *stats,
2633 u8 port_num, int index)
d3749841
FL		 2634{
2635 struct i40iw_device *iwdev = to_iwdev(ibdev);
2636 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
d6f7bbcc 2637 struct i40iw_vsi_pestat *devstat = iwdev->vsi.pestat;
d3749841 2638 struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
d3749841 2639
d3749841 2640 if (dev->is_pf) {
d6f7bbcc 2641 i40iw_hw_stats_read_all(devstat, &devstat->hw_stats);
d3749841 2642 } else {
b40f4757
CL		 2643 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2644 return -ENOSYS;
d3749841
FL		 2645 }
2646
91c42b72 2647 memcpy(&stats->value[0], hw_stats, sizeof(*hw_stats));
b40f4757
CL		 2648
2649 return stats->num_counters;
d3749841
FL		 2650}
2651
2652/**
2653 * i40iw_query_gid - Query port GID
2654 * @ibdev: device pointer from stack
2655 * @port: port number
2656 * @index: Entry index
2657 * @gid: Global ID
2658 */
2659static int i40iw_query_gid(struct ib_device *ibdev,
2660 u8 port,
2661 int index,
2662 union ib_gid *gid)
2663{
2664 struct i40iw_device *iwdev = to_iwdev(ibdev);
2665
2666 memset(gid->raw, 0, sizeof(gid->raw));
2667 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2668 return 0;
2669}
2670
2671/**
2672 * i40iw_modify_port Modify port properties
2673 * @ibdev: device pointer from stack
2674 * @port: port number
2675 * @port_modify_mask: mask for port modifications
2676 * @props: port properties
2677 */
2678static int i40iw_modify_port(struct ib_device *ibdev,
2679 u8 port,
2680 int port_modify_mask,
2681 struct ib_port_modify *props)
2682{
fe5d6e62 2683 return -ENOSYS;
d3749841
FL		 2684}
2685
2686/**
2687 * i40iw_query_pkey - Query partition key
2688 * @ibdev: device pointer from stack
2689 * @port: port number
2690 * @index: index of pkey
2691 * @pkey: pointer to store the pkey
2692 */
2693static int i40iw_query_pkey(struct ib_device *ibdev,
2694 u8 port,
2695 u16 index,
2696 u16 *pkey)
2697{
2698 *pkey = 0;
2699 return 0;
2700}
2701
2702/**
2703 * i40iw_create_ah - create address handle
2704 * @ibpd: ptr of pd
2705 * @ah_attr: address handle attributes
2706 */
2707static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
90898850 2708 struct rdma_ah_attr *attr,
477864c8
MS		 2709 struct ib_udata *udata)
2710
d3749841
FL		 2711{
2712 return ERR_PTR(-ENOSYS);
2713}
2714
2715/**
2716 * i40iw_destroy_ah - Destroy address handle
2717 * @ah: pointer to address handle
2718 */
2719static int i40iw_destroy_ah(struct ib_ah *ah)
2720{
2721 return -ENOSYS;
2722}
2723
2724/**
2725 * i40iw_init_rdma_device - initialization of iwarp device
2726 * @iwdev: iwarp device
2727 */
2728static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2729{
2730 struct i40iw_ib_device *iwibdev;
2731 struct net_device *netdev = iwdev->netdev;
2732 struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2733
2734 iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2735 if (!iwibdev) {
2736 i40iw_pr_err("iwdev == NULL\n");
2737 return NULL;
2738 }
2739 strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2740 iwibdev->ibdev.owner = THIS_MODULE;
2741 iwdev->iwibdev = iwibdev;
2742 iwibdev->iwdev = iwdev;
2743
2744 iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2745 ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2746
2747 iwibdev->ibdev.uverbs_cmd_mask =
2748 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2749 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2750 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2751 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2752 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2753 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2754 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2755 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2756 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2757 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2758 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2759 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2760 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2761 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2762 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2763 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2764 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2765 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2766 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2767 (1ull << IB_USER_VERBS_CMD_POST_SEND);
2768 iwibdev->ibdev.phys_port_cnt = 1;
e69c5093 2769 iwibdev->ibdev.num_comp_vectors = iwdev->ceqs_count;
d3749841
FL		 2770 iwibdev->ibdev.dev.parent = &pcidev->dev;
2771 iwibdev->ibdev.query_port = i40iw_query_port;
2772 iwibdev->ibdev.modify_port = i40iw_modify_port;
2773 iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2774 iwibdev->ibdev.query_gid = i40iw_query_gid;
2775 iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2776 iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2777 iwibdev->ibdev.mmap = i40iw_mmap;
2778 iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2779 iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2780 iwibdev->ibdev.create_qp = i40iw_create_qp;
2781 iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2782 iwibdev->ibdev.query_qp = i40iw_query_qp;
2783 iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2784 iwibdev->ibdev.create_cq = i40iw_create_cq;
2785 iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2786 iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2787 iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2788 iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
b40f4757
CL		 2789 iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2790 iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
d3749841
FL		 2791 iwibdev->ibdev.query_device = i40iw_query_device;
2792 iwibdev->ibdev.create_ah = i40iw_create_ah;
2793 iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
c2b75ef7
IM		 2794 iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2795 iwibdev->ibdev.drain_rq = i40iw_drain_rq;
b7aee855
IM		 2796 iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2797 iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
d3749841
FL		 2798 iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2799 if (!iwibdev->ibdev.iwcm) {
2800 ib_dealloc_device(&iwibdev->ibdev);
d3749841
FL		 2801 return NULL;
2802 }
2803
2804 iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2805 iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2806 iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2807 iwibdev->ibdev.iwcm->connect = i40iw_connect;
2808 iwibdev->ibdev.iwcm->accept = i40iw_accept;
2809 iwibdev->ibdev.iwcm->reject = i40iw_reject;
2810 iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2811 iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
8d8cd0bf
FL		 2812 memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2813 sizeof(iwibdev->ibdev.iwcm->ifname));
d3749841 2814 iwibdev->ibdev.get_port_immutable = i40iw_port_immutable;
f65c52ca 2815 iwibdev->ibdev.get_dev_fw_str = i40iw_get_dev_fw_str;
d3749841
FL		 2816 iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2817 iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2818 iwibdev->ibdev.post_send = i40iw_post_send;
2819 iwibdev->ibdev.post_recv = i40iw_post_recv;
8d8cd0bf 2820
d3749841
FL		 2821 return iwibdev;
2822}
2823
2824/**
2825 * i40iw_port_ibevent - indicate port event
2826 * @iwdev: iwarp device
2827 */
2828void i40iw_port_ibevent(struct i40iw_device *iwdev)
2829{
2830 struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2831 struct ib_event event;
2832
2833 event.device = &iwibdev->ibdev;
2834 event.element.port_num = 1;
2835 event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2836 ib_dispatch_event(&event);
2837}
2838
2839/**
2840 * i40iw_unregister_rdma_device - unregister of iwarp from IB
2841 * @iwibdev: rdma device ptr
2842 */
2843static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2844{
2845 int i;
2846
2847 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2848 device_remove_file(&iwibdev->ibdev.dev,
2849 i40iw_dev_attributes[i]);
2850 ib_unregister_device(&iwibdev->ibdev);
2851}
2852
2853/**
2854 * i40iw_destroy_rdma_device - destroy rdma device and free resources
2855 * @iwibdev: IB device ptr
2856 */
2857void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2858{
2859 if (!iwibdev)
2860 return;
2861
2862 i40iw_unregister_rdma_device(iwibdev);
2863 kfree(iwibdev->ibdev.iwcm);
2864 iwibdev->ibdev.iwcm = NULL;
d5965934
MI		 2865 wait_event_timeout(iwibdev->iwdev->close_wq,
2866 !atomic64_read(&iwibdev->iwdev->use_count),
2867 I40IW_EVENT_TIMEOUT);
d3749841
FL		 2868 ib_dealloc_device(&iwibdev->ibdev);
2869}
2870
2871/**
2872 * i40iw_register_rdma_device - register iwarp device to IB
2873 * @iwdev: iwarp device
2874 */
2875int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2876{
2877 int i, ret;
2878 struct i40iw_ib_device *iwibdev;
2879
2880 iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2881 if (!iwdev->iwibdev)
fe5d6e62 2882 return -ENOMEM;
d3749841
FL		 2883 iwibdev = iwdev->iwibdev;
2884
2885 ret = ib_register_device(&iwibdev->ibdev, NULL);
2886 if (ret)
2887 goto error;
2888
2889 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2890 ret =
2891 device_create_file(&iwibdev->ibdev.dev,
2892 i40iw_dev_attributes[i]);
2893 if (ret) {
2894 while (i > 0) {
2895 i--;
2896 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2897 }
2898 ib_unregister_device(&iwibdev->ibdev);
2899 goto error;
2900 }
2901 }
2902 return 0;
2903error:
2904 kfree(iwdev->iwibdev->ibdev.iwcm);
2905 iwdev->iwibdev->ibdev.iwcm = NULL;
2906 ib_dealloc_device(&iwdev->iwibdev->ibdev);
fe5d6e62 2907 return ret;
d3749841 2908}
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